2 * AMD 10Gb Ethernet driver
4 * This file is available to you under your choice of the following two
9 * Copyright (c) 2016 Advanced Micro Devices, Inc.
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 * This file incorporates work covered by the following copyright and
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
57 * License 2: Modified BSD
59 * Copyright (c) 2016 Advanced Micro Devices, Inc.
60 * All rights reserved.
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 * This file incorporates work covered by the following copyright and
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
117 #include <linux/module.h>
118 #include <linux/device.h>
119 #include <linux/pci.h>
120 #include <linux/log2.h>
123 #include "xgbe-common.h"
125 static int xgbe_config_msi(struct xgbe_prv_data *pdata)
127 unsigned int msi_count;
131 msi_count = XGBE_MSIX_BASE_COUNT;
132 msi_count += max(pdata->rx_ring_count,
133 pdata->tx_ring_count);
134 msi_count = roundup_pow_of_two(msi_count);
136 ret = pci_enable_msi_exact(pdata->pcidev, msi_count);
138 dev_info(pdata->dev, "MSI request for %u interrupts failed\n",
141 ret = pci_enable_msi(pdata->pcidev);
143 dev_info(pdata->dev, "MSI enablement failed\n");
150 pdata->irq_count = msi_count;
152 pdata->dev_irq = pdata->pcidev->irq;
155 pdata->ecc_irq = pdata->pcidev->irq + 1;
156 pdata->i2c_irq = pdata->pcidev->irq + 2;
157 pdata->an_irq = pdata->pcidev->irq + 3;
159 for (i = XGBE_MSIX_BASE_COUNT, j = 0;
160 (i < msi_count) && (j < XGBE_MAX_DMA_CHANNELS);
162 pdata->channel_irq[j] = pdata->pcidev->irq + i;
163 pdata->channel_irq_count = j;
165 pdata->per_channel_irq = 1;
166 pdata->channel_irq_mode = XGBE_IRQ_MODE_LEVEL;
168 pdata->ecc_irq = pdata->pcidev->irq;
169 pdata->i2c_irq = pdata->pcidev->irq;
170 pdata->an_irq = pdata->pcidev->irq;
173 if (netif_msg_probe(pdata))
174 dev_dbg(pdata->dev, "MSI interrupts enabled\n");
179 static int xgbe_config_msix(struct xgbe_prv_data *pdata)
181 unsigned int msix_count;
185 msix_count = XGBE_MSIX_BASE_COUNT;
186 msix_count += max(pdata->rx_ring_count,
187 pdata->tx_ring_count);
189 pdata->msix_entries = devm_kcalloc(pdata->dev, msix_count,
190 sizeof(struct msix_entry),
192 if (!pdata->msix_entries)
195 for (i = 0; i < msix_count; i++)
196 pdata->msix_entries[i].entry = i;
198 ret = pci_enable_msix_range(pdata->pcidev, pdata->msix_entries,
199 XGBE_MSIX_MIN_COUNT, msix_count);
201 dev_info(pdata->dev, "MSI-X enablement failed\n");
202 devm_kfree(pdata->dev, pdata->msix_entries);
203 pdata->msix_entries = NULL;
207 pdata->irq_count = ret;
209 pdata->dev_irq = pdata->msix_entries[0].vector;
210 pdata->ecc_irq = pdata->msix_entries[1].vector;
211 pdata->i2c_irq = pdata->msix_entries[2].vector;
212 pdata->an_irq = pdata->msix_entries[3].vector;
214 for (i = XGBE_MSIX_BASE_COUNT, j = 0; i < ret; i++, j++)
215 pdata->channel_irq[j] = pdata->msix_entries[i].vector;
216 pdata->channel_irq_count = j;
218 pdata->per_channel_irq = 1;
219 pdata->channel_irq_mode = XGBE_IRQ_MODE_LEVEL;
221 if (netif_msg_probe(pdata))
222 dev_dbg(pdata->dev, "MSI-X interrupts enabled\n");
227 static int xgbe_config_irqs(struct xgbe_prv_data *pdata)
231 ret = xgbe_config_msix(pdata);
235 ret = xgbe_config_msi(pdata);
239 pdata->irq_count = 1;
240 pdata->irq_shared = 1;
242 pdata->dev_irq = pdata->pcidev->irq;
243 pdata->ecc_irq = pdata->pcidev->irq;
244 pdata->i2c_irq = pdata->pcidev->irq;
245 pdata->an_irq = pdata->pcidev->irq;
248 if (netif_msg_probe(pdata)) {
251 dev_dbg(pdata->dev, " dev irq=%d\n", pdata->dev_irq);
252 dev_dbg(pdata->dev, " ecc irq=%d\n", pdata->ecc_irq);
253 dev_dbg(pdata->dev, " i2c irq=%d\n", pdata->i2c_irq);
254 dev_dbg(pdata->dev, " an irq=%d\n", pdata->an_irq);
255 for (i = 0; i < pdata->channel_irq_count; i++)
256 dev_dbg(pdata->dev, " dma%u irq=%d\n",
257 i, pdata->channel_irq[i]);
263 static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
265 struct xgbe_prv_data *pdata;
266 struct device *dev = &pdev->dev;
267 void __iomem * const *iomap_table;
268 struct pci_dev *rdev;
269 unsigned int ma_lo, ma_hi;
274 pdata = xgbe_alloc_pdata(dev);
276 ret = PTR_ERR(pdata);
280 pdata->pcidev = pdev;
281 pci_set_drvdata(pdev, pdata);
283 /* Get the version data */
284 pdata->vdata = (struct xgbe_version_data *)id->driver_data;
286 ret = pcim_enable_device(pdev);
288 dev_err(dev, "pcim_enable_device failed\n");
292 /* Obtain the mmio areas for the device */
293 bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
294 ret = pcim_iomap_regions(pdev, bar_mask, XGBE_DRV_NAME);
296 dev_err(dev, "pcim_iomap_regions failed\n");
300 iomap_table = pcim_iomap_table(pdev);
302 dev_err(dev, "pcim_iomap_table failed\n");
307 pdata->xgmac_regs = iomap_table[XGBE_XGMAC_BAR];
308 if (!pdata->xgmac_regs) {
309 dev_err(dev, "xgmac ioremap failed\n");
313 pdata->xprop_regs = pdata->xgmac_regs + XGBE_MAC_PROP_OFFSET;
314 pdata->xi2c_regs = pdata->xgmac_regs + XGBE_I2C_CTRL_OFFSET;
315 if (netif_msg_probe(pdata)) {
316 dev_dbg(dev, "xgmac_regs = %p\n", pdata->xgmac_regs);
317 dev_dbg(dev, "xprop_regs = %p\n", pdata->xprop_regs);
318 dev_dbg(dev, "xi2c_regs = %p\n", pdata->xi2c_regs);
321 pdata->xpcs_regs = iomap_table[XGBE_XPCS_BAR];
322 if (!pdata->xpcs_regs) {
323 dev_err(dev, "xpcs ioremap failed\n");
327 if (netif_msg_probe(pdata))
328 dev_dbg(dev, "xpcs_regs = %p\n", pdata->xpcs_regs);
330 /* Set the PCS indirect addressing definition registers */
331 rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
333 (rdev->vendor == PCI_VENDOR_ID_AMD) && (rdev->device == 0x15d0)) {
334 pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
335 pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
337 pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
338 pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
342 /* Configure the PCS indirect addressing support */
343 reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
344 pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
345 pdata->xpcs_window <<= 6;
346 pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
347 pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
348 pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
349 if (netif_msg_probe(pdata)) {
350 dev_dbg(dev, "xpcs window = %#010x\n",
352 dev_dbg(dev, "xpcs window size = %#010x\n",
353 pdata->xpcs_window_size);
354 dev_dbg(dev, "xpcs window mask = %#010x\n",
355 pdata->xpcs_window_mask);
358 pci_set_master(pdev);
360 /* Enable all interrupts in the hardware */
361 XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff);
363 /* Retrieve the MAC address */
364 ma_lo = XP_IOREAD(pdata, XP_MAC_ADDR_LO);
365 ma_hi = XP_IOREAD(pdata, XP_MAC_ADDR_HI);
366 pdata->mac_addr[0] = ma_lo & 0xff;
367 pdata->mac_addr[1] = (ma_lo >> 8) & 0xff;
368 pdata->mac_addr[2] = (ma_lo >> 16) & 0xff;
369 pdata->mac_addr[3] = (ma_lo >> 24) & 0xff;
370 pdata->mac_addr[4] = ma_hi & 0xff;
371 pdata->mac_addr[5] = (ma_hi >> 8) & 0xff;
372 if (!XP_GET_BITS(ma_hi, XP_MAC_ADDR_HI, VALID) ||
373 !is_valid_ether_addr(pdata->mac_addr)) {
374 dev_err(dev, "invalid mac address\n");
380 pdata->sysclk_rate = XGBE_V2_DMA_CLOCK_FREQ;
381 pdata->ptpclk_rate = XGBE_V2_PTP_CLOCK_FREQ;
383 /* Set the DMA coherency values */
385 pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
386 pdata->arcache = XGBE_DMA_OS_ARCACHE;
387 pdata->awcache = XGBE_DMA_OS_AWCACHE;
389 /* Set the maximum channels and queues */
390 reg = XP_IOREAD(pdata, XP_PROP_1);
391 pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA);
392 pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA);
393 pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES);
394 pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES);
395 if (netif_msg_probe(pdata)) {
396 dev_dbg(dev, "max tx/rx channel count = %u/%u\n",
397 pdata->tx_max_channel_count,
398 pdata->tx_max_channel_count);
399 dev_dbg(dev, "max tx/rx hw queue count = %u/%u\n",
400 pdata->tx_max_q_count, pdata->rx_max_q_count);
403 /* Set the hardware channel and queue counts */
404 xgbe_set_counts(pdata);
406 /* Set the maximum fifo amounts */
407 reg = XP_IOREAD(pdata, XP_PROP_2);
408 pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE);
409 pdata->tx_max_fifo_size *= 16384;
410 pdata->tx_max_fifo_size = min(pdata->tx_max_fifo_size,
411 pdata->vdata->tx_max_fifo_size);
412 pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE);
413 pdata->rx_max_fifo_size *= 16384;
414 pdata->rx_max_fifo_size = min(pdata->rx_max_fifo_size,
415 pdata->vdata->rx_max_fifo_size);
416 if (netif_msg_probe(pdata))
417 dev_dbg(dev, "max tx/rx max fifo size = %u/%u\n",
418 pdata->tx_max_fifo_size, pdata->rx_max_fifo_size);
420 /* Configure interrupt support */
421 ret = xgbe_config_irqs(pdata);
425 /* Configure the netdev resource */
426 ret = xgbe_config_netdev(pdata);
430 netdev_notice(pdata->netdev, "net device enabled\n");
435 xgbe_free_pdata(pdata);
438 dev_notice(dev, "net device not enabled\n");
443 static void xgbe_pci_remove(struct pci_dev *pdev)
445 struct xgbe_prv_data *pdata = pci_get_drvdata(pdev);
447 xgbe_deconfig_netdev(pdata);
449 xgbe_free_pdata(pdata);
453 static int xgbe_pci_suspend(struct pci_dev *pdev, pm_message_t state)
455 struct xgbe_prv_data *pdata = pci_get_drvdata(pdev);
456 struct net_device *netdev = pdata->netdev;
459 if (netif_running(netdev))
460 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
462 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);
463 pdata->lpm_ctrl |= MDIO_CTRL1_LPOWER;
464 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
469 static int xgbe_pci_resume(struct pci_dev *pdev)
471 struct xgbe_prv_data *pdata = pci_get_drvdata(pdev);
472 struct net_device *netdev = pdata->netdev;
475 pdata->lpm_ctrl &= ~MDIO_CTRL1_LPOWER;
476 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
478 if (netif_running(netdev)) {
479 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
481 /* Schedule a restart in case the link or phy state changed
482 * while we were powered down.
484 schedule_work(&pdata->restart_work);
489 #endif /* CONFIG_PM */
491 static const struct xgbe_version_data xgbe_v2a = {
492 .init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v2,
493 .xpcs_access = XGBE_XPCS_ACCESS_V2,
495 .tx_max_fifo_size = 229376,
496 .rx_max_fifo_size = 229376,
497 .tx_tstamp_workaround = 1,
502 static const struct xgbe_version_data xgbe_v2b = {
503 .init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v2,
504 .xpcs_access = XGBE_XPCS_ACCESS_V2,
506 .tx_max_fifo_size = 65536,
507 .rx_max_fifo_size = 65536,
508 .tx_tstamp_workaround = 1,
513 static const struct pci_device_id xgbe_pci_table[] = {
514 { PCI_VDEVICE(AMD, 0x1458),
515 .driver_data = (kernel_ulong_t)&xgbe_v2a },
516 { PCI_VDEVICE(AMD, 0x1459),
517 .driver_data = (kernel_ulong_t)&xgbe_v2b },
518 /* Last entry must be zero */
521 MODULE_DEVICE_TABLE(pci, xgbe_pci_table);
523 static struct pci_driver xgbe_driver = {
524 .name = XGBE_DRV_NAME,
525 .id_table = xgbe_pci_table,
526 .probe = xgbe_pci_probe,
527 .remove = xgbe_pci_remove,
529 .suspend = xgbe_pci_suspend,
530 .resume = xgbe_pci_resume,
534 int xgbe_pci_init(void)
536 return pci_register_driver(&xgbe_driver);
539 void xgbe_pci_exit(void)
541 pci_unregister_driver(&xgbe_driver);