2 * Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved.
3 * Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com>
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option)
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program; if not, write to the Free Software Foundation, Inc., 59
20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 #include <linux/atomic.h>
24 #include <linux/crc32.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/hardirq.h>
29 #include <linux/if_vlan.h>
31 #include <linux/interrupt.h>
33 #include <linux/irqflags.h>
34 #include <linux/irqreturn.h>
35 #include <linux/mii.h>
36 #include <linux/net.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/pci_ids.h>
41 #include <linux/skbuff.h>
42 #include <linux/slab.h>
43 #include <linux/spinlock.h>
44 #include <linux/string.h>
45 #include <linux/tcp.h>
46 #include <linux/timer.h>
47 #include <linux/types.h>
48 #include <linux/workqueue.h>
52 #define ATL2_DRV_VERSION "2.2.3"
54 static const char atl2_driver_name[] = "atl2";
55 static const char atl2_driver_string[] = "Atheros(R) L2 Ethernet Driver";
56 static const char atl2_copyright[] = "Copyright (c) 2007 Atheros Corporation.";
57 static const char atl2_driver_version[] = ATL2_DRV_VERSION;
58 static const struct ethtool_ops atl2_ethtool_ops;
60 MODULE_AUTHOR("Atheros Corporation <xiong.huang@atheros.com>, Chris Snook <csnook@redhat.com>");
61 MODULE_DESCRIPTION("Atheros Fast Ethernet Network Driver");
62 MODULE_LICENSE("GPL");
63 MODULE_VERSION(ATL2_DRV_VERSION);
66 * atl2_pci_tbl - PCI Device ID Table
68 static const struct pci_device_id atl2_pci_tbl[] = {
69 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2)},
70 /* required last entry */
73 MODULE_DEVICE_TABLE(pci, atl2_pci_tbl);
75 static void atl2_check_options(struct atl2_adapter *adapter);
78 * atl2_sw_init - Initialize general software structures (struct atl2_adapter)
79 * @adapter: board private structure to initialize
81 * atl2_sw_init initializes the Adapter private data structure.
82 * Fields are initialized based on PCI device information and
83 * OS network device settings (MTU size).
85 static int atl2_sw_init(struct atl2_adapter *adapter)
87 struct atl2_hw *hw = &adapter->hw;
88 struct pci_dev *pdev = adapter->pdev;
90 /* PCI config space info */
91 hw->vendor_id = pdev->vendor;
92 hw->device_id = pdev->device;
93 hw->subsystem_vendor_id = pdev->subsystem_vendor;
94 hw->subsystem_id = pdev->subsystem_device;
95 hw->revision_id = pdev->revision;
97 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
100 adapter->ict = 50000; /* ~100ms */
101 adapter->link_speed = SPEED_0; /* hardware init */
102 adapter->link_duplex = FULL_DUPLEX;
104 hw->phy_configured = false;
105 hw->preamble_len = 7;
116 hw->max_frame_size = adapter->netdev->mtu;
118 spin_lock_init(&adapter->stats_lock);
120 set_bit(__ATL2_DOWN, &adapter->flags);
126 * atl2_set_multi - Multicast and Promiscuous mode set
127 * @netdev: network interface device structure
129 * The set_multi entry point is called whenever the multicast address
130 * list or the network interface flags are updated. This routine is
131 * responsible for configuring the hardware for proper multicast,
132 * promiscuous mode, and all-multi behavior.
134 static void atl2_set_multi(struct net_device *netdev)
136 struct atl2_adapter *adapter = netdev_priv(netdev);
137 struct atl2_hw *hw = &adapter->hw;
138 struct netdev_hw_addr *ha;
142 /* Check for Promiscuous and All Multicast modes */
143 rctl = ATL2_READ_REG(hw, REG_MAC_CTRL);
145 if (netdev->flags & IFF_PROMISC) {
146 rctl |= MAC_CTRL_PROMIS_EN;
147 } else if (netdev->flags & IFF_ALLMULTI) {
148 rctl |= MAC_CTRL_MC_ALL_EN;
149 rctl &= ~MAC_CTRL_PROMIS_EN;
151 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
153 ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);
155 /* clear the old settings from the multicast hash table */
156 ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
157 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
159 /* comoute mc addresses' hash value ,and put it into hash table */
160 netdev_for_each_mc_addr(ha, netdev) {
161 hash_value = atl2_hash_mc_addr(hw, ha->addr);
162 atl2_hash_set(hw, hash_value);
166 static void init_ring_ptrs(struct atl2_adapter *adapter)
168 /* Read / Write Ptr Initialize: */
169 adapter->txd_write_ptr = 0;
170 atomic_set(&adapter->txd_read_ptr, 0);
172 adapter->rxd_read_ptr = 0;
173 adapter->rxd_write_ptr = 0;
175 atomic_set(&adapter->txs_write_ptr, 0);
176 adapter->txs_next_clear = 0;
180 * atl2_configure - Configure Transmit&Receive Unit after Reset
181 * @adapter: board private structure
183 * Configure the Tx /Rx unit of the MAC after a reset.
185 static int atl2_configure(struct atl2_adapter *adapter)
187 struct atl2_hw *hw = &adapter->hw;
190 /* clear interrupt status */
191 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff);
193 /* set MAC Address */
194 value = (((u32)hw->mac_addr[2]) << 24) |
195 (((u32)hw->mac_addr[3]) << 16) |
196 (((u32)hw->mac_addr[4]) << 8) |
197 (((u32)hw->mac_addr[5]));
198 ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value);
199 value = (((u32)hw->mac_addr[0]) << 8) |
200 (((u32)hw->mac_addr[1]));
201 ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value);
203 /* HI base address */
204 ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
205 (u32)((adapter->ring_dma & 0xffffffff00000000ULL) >> 32));
207 /* LO base address */
208 ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO,
209 (u32)(adapter->txd_dma & 0x00000000ffffffffULL));
210 ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO,
211 (u32)(adapter->txs_dma & 0x00000000ffffffffULL));
212 ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO,
213 (u32)(adapter->rxd_dma & 0x00000000ffffffffULL));
216 ATL2_WRITE_REGW(hw, REG_TXD_MEM_SIZE, (u16)(adapter->txd_ring_size/4));
217 ATL2_WRITE_REGW(hw, REG_TXS_MEM_SIZE, (u16)adapter->txs_ring_size);
218 ATL2_WRITE_REGW(hw, REG_RXD_BUF_NUM, (u16)adapter->rxd_ring_size);
220 /* config Internal SRAM */
222 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_tx_end);
223 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_rx_end);
227 value = (((u32)hw->ipgt & MAC_IPG_IFG_IPGT_MASK) <<
228 MAC_IPG_IFG_IPGT_SHIFT) |
229 (((u32)hw->min_ifg & MAC_IPG_IFG_MIFG_MASK) <<
230 MAC_IPG_IFG_MIFG_SHIFT) |
231 (((u32)hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK) <<
232 MAC_IPG_IFG_IPGR1_SHIFT)|
233 (((u32)hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK) <<
234 MAC_IPG_IFG_IPGR2_SHIFT);
235 ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value);
237 /* config Half-Duplex Control */
238 value = ((u32)hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
239 (((u32)hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK) <<
240 MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
241 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
242 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
243 (((u32)hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK) <<
244 MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
245 ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value);
247 /* set Interrupt Moderator Timer */
248 ATL2_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, adapter->imt);
249 ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);
251 /* set Interrupt Clear Timer */
252 ATL2_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, adapter->ict);
255 ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu +
256 ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN);
259 ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177);
262 ATL2_WRITE_REGW(hw, REG_PAUSE_ON_TH, hw->fc_rxd_hi);
263 ATL2_WRITE_REGW(hw, REG_PAUSE_OFF_TH, hw->fc_rxd_lo);
266 ATL2_WRITE_REGW(hw, REG_MB_TXD_WR_IDX, (u16)adapter->txd_write_ptr);
267 ATL2_WRITE_REGW(hw, REG_MB_RXD_RD_IDX, (u16)adapter->rxd_read_ptr);
269 /* enable DMA read/write */
270 ATL2_WRITE_REGB(hw, REG_DMAR, DMAR_EN);
271 ATL2_WRITE_REGB(hw, REG_DMAW, DMAW_EN);
273 value = ATL2_READ_REG(&adapter->hw, REG_ISR);
274 if ((value & ISR_PHY_LINKDOWN) != 0)
275 value = 1; /* config failed */
279 /* clear all interrupt status */
280 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff);
281 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
286 * atl2_setup_ring_resources - allocate Tx / RX descriptor resources
287 * @adapter: board private structure
289 * Return 0 on success, negative on failure
291 static s32 atl2_setup_ring_resources(struct atl2_adapter *adapter)
293 struct pci_dev *pdev = adapter->pdev;
297 /* real ring DMA buffer */
298 adapter->ring_size = size =
299 adapter->txd_ring_size * 1 + 7 + /* dword align */
300 adapter->txs_ring_size * 4 + 7 + /* dword align */
301 adapter->rxd_ring_size * 1536 + 127; /* 128bytes align */
303 adapter->ring_vir_addr = pci_alloc_consistent(pdev, size,
305 if (!adapter->ring_vir_addr)
307 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
310 adapter->txd_dma = adapter->ring_dma ;
311 offset = (adapter->txd_dma & 0x7) ? (8 - (adapter->txd_dma & 0x7)) : 0;
312 adapter->txd_dma += offset;
313 adapter->txd_ring = adapter->ring_vir_addr + offset;
316 adapter->txs_dma = adapter->txd_dma + adapter->txd_ring_size;
317 offset = (adapter->txs_dma & 0x7) ? (8 - (adapter->txs_dma & 0x7)) : 0;
318 adapter->txs_dma += offset;
319 adapter->txs_ring = (struct tx_pkt_status *)
320 (((u8 *)adapter->txd_ring) + (adapter->txd_ring_size + offset));
323 adapter->rxd_dma = adapter->txs_dma + adapter->txs_ring_size * 4;
324 offset = (adapter->rxd_dma & 127) ?
325 (128 - (adapter->rxd_dma & 127)) : 0;
331 adapter->rxd_dma += offset;
332 adapter->rxd_ring = (struct rx_desc *) (((u8 *)adapter->txs_ring) +
333 (adapter->txs_ring_size * 4 + offset));
336 * Read / Write Ptr Initialize:
337 * init_ring_ptrs(adapter);
343 * atl2_irq_enable - Enable default interrupt generation settings
344 * @adapter: board private structure
346 static inline void atl2_irq_enable(struct atl2_adapter *adapter)
348 ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
349 ATL2_WRITE_FLUSH(&adapter->hw);
353 * atl2_irq_disable - Mask off interrupt generation on the NIC
354 * @adapter: board private structure
356 static inline void atl2_irq_disable(struct atl2_adapter *adapter)
358 ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);
359 ATL2_WRITE_FLUSH(&adapter->hw);
360 synchronize_irq(adapter->pdev->irq);
363 static void __atl2_vlan_mode(netdev_features_t features, u32 *ctrl)
365 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
366 /* enable VLAN tag insert/strip */
367 *ctrl |= MAC_CTRL_RMV_VLAN;
369 /* disable VLAN tag insert/strip */
370 *ctrl &= ~MAC_CTRL_RMV_VLAN;
374 static void atl2_vlan_mode(struct net_device *netdev,
375 netdev_features_t features)
377 struct atl2_adapter *adapter = netdev_priv(netdev);
380 atl2_irq_disable(adapter);
382 ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
383 __atl2_vlan_mode(features, &ctrl);
384 ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
386 atl2_irq_enable(adapter);
389 static void atl2_restore_vlan(struct atl2_adapter *adapter)
391 atl2_vlan_mode(adapter->netdev, adapter->netdev->features);
394 static netdev_features_t atl2_fix_features(struct net_device *netdev,
395 netdev_features_t features)
398 * Since there is no support for separate rx/tx vlan accel
399 * enable/disable make sure tx flag is always in same state as rx.
401 if (features & NETIF_F_HW_VLAN_CTAG_RX)
402 features |= NETIF_F_HW_VLAN_CTAG_TX;
404 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
409 static int atl2_set_features(struct net_device *netdev,
410 netdev_features_t features)
412 netdev_features_t changed = netdev->features ^ features;
414 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
415 atl2_vlan_mode(netdev, features);
420 static void atl2_intr_rx(struct atl2_adapter *adapter)
422 struct net_device *netdev = adapter->netdev;
427 rxd = adapter->rxd_ring+adapter->rxd_write_ptr;
428 if (!rxd->status.update)
429 break; /* end of tx */
431 /* clear this flag at once */
432 rxd->status.update = 0;
434 if (rxd->status.ok && rxd->status.pkt_size >= 60) {
435 int rx_size = (int)(rxd->status.pkt_size - 4);
436 /* alloc new buffer */
437 skb = netdev_alloc_skb_ip_align(netdev, rx_size);
440 * Check that some rx space is free. If not,
441 * free one and mark stats->rx_dropped++.
443 netdev->stats.rx_dropped++;
446 memcpy(skb->data, rxd->packet, rx_size);
447 skb_put(skb, rx_size);
448 skb->protocol = eth_type_trans(skb, netdev);
449 if (rxd->status.vlan) {
450 u16 vlan_tag = (rxd->status.vtag>>4) |
451 ((rxd->status.vtag&7) << 13) |
452 ((rxd->status.vtag&8) << 9);
454 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
457 netdev->stats.rx_bytes += rx_size;
458 netdev->stats.rx_packets++;
460 netdev->stats.rx_errors++;
462 if (rxd->status.ok && rxd->status.pkt_size <= 60)
463 netdev->stats.rx_length_errors++;
464 if (rxd->status.mcast)
465 netdev->stats.multicast++;
467 netdev->stats.rx_crc_errors++;
468 if (rxd->status.align)
469 netdev->stats.rx_frame_errors++;
472 /* advance write ptr */
473 if (++adapter->rxd_write_ptr == adapter->rxd_ring_size)
474 adapter->rxd_write_ptr = 0;
477 /* update mailbox? */
478 adapter->rxd_read_ptr = adapter->rxd_write_ptr;
479 ATL2_WRITE_REGW(&adapter->hw, REG_MB_RXD_RD_IDX, adapter->rxd_read_ptr);
482 static void atl2_intr_tx(struct atl2_adapter *adapter)
484 struct net_device *netdev = adapter->netdev;
487 struct tx_pkt_status *txs;
488 struct tx_pkt_header *txph;
492 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
493 txs = adapter->txs_ring + txs_write_ptr;
495 break; /* tx stop here */
500 if (++txs_write_ptr == adapter->txs_ring_size)
502 atomic_set(&adapter->txs_write_ptr, (int)txs_write_ptr);
504 txd_read_ptr = (u32) atomic_read(&adapter->txd_read_ptr);
505 txph = (struct tx_pkt_header *)
506 (((u8 *)adapter->txd_ring) + txd_read_ptr);
508 if (txph->pkt_size != txs->pkt_size) {
509 struct tx_pkt_status *old_txs = txs;
511 "%s: txs packet size not consistent with txd"
512 " txd_:0x%08x, txs_:0x%08x!\n",
513 adapter->netdev->name,
514 *(u32 *)txph, *(u32 *)txs);
516 "txd read ptr: 0x%x\n",
518 txs = adapter->txs_ring + txs_write_ptr;
520 "txs-behind:0x%08x\n",
522 if (txs_write_ptr < 2) {
523 txs = adapter->txs_ring +
524 (adapter->txs_ring_size +
527 txs = adapter->txs_ring + (txs_write_ptr - 2);
530 "txs-before:0x%08x\n",
536 txd_read_ptr += (((u32)(txph->pkt_size) + 7) & ~3);
537 if (txd_read_ptr >= adapter->txd_ring_size)
538 txd_read_ptr -= adapter->txd_ring_size;
540 atomic_set(&adapter->txd_read_ptr, (int)txd_read_ptr);
544 netdev->stats.tx_bytes += txs->pkt_size;
545 netdev->stats.tx_packets++;
548 netdev->stats.tx_errors++;
551 netdev->stats.collisions++;
553 netdev->stats.tx_aborted_errors++;
555 netdev->stats.tx_window_errors++;
557 netdev->stats.tx_fifo_errors++;
561 if (netif_queue_stopped(adapter->netdev) &&
562 netif_carrier_ok(adapter->netdev))
563 netif_wake_queue(adapter->netdev);
567 static void atl2_check_for_link(struct atl2_adapter *adapter)
569 struct net_device *netdev = adapter->netdev;
572 spin_lock(&adapter->stats_lock);
573 atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
574 atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
575 spin_unlock(&adapter->stats_lock);
577 /* notify upper layer link down ASAP */
578 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
579 if (netif_carrier_ok(netdev)) { /* old link state: Up */
580 printk(KERN_INFO "%s: %s NIC Link is Down\n",
581 atl2_driver_name, netdev->name);
582 adapter->link_speed = SPEED_0;
583 netif_carrier_off(netdev);
584 netif_stop_queue(netdev);
587 schedule_work(&adapter->link_chg_task);
590 static inline void atl2_clear_phy_int(struct atl2_adapter *adapter)
593 spin_lock(&adapter->stats_lock);
594 atl2_read_phy_reg(&adapter->hw, 19, &phy_data);
595 spin_unlock(&adapter->stats_lock);
599 * atl2_intr - Interrupt Handler
600 * @irq: interrupt number
601 * @data: pointer to a network interface device structure
603 static irqreturn_t atl2_intr(int irq, void *data)
605 struct atl2_adapter *adapter = netdev_priv(data);
606 struct atl2_hw *hw = &adapter->hw;
609 status = ATL2_READ_REG(hw, REG_ISR);
614 if (status & ISR_PHY)
615 atl2_clear_phy_int(adapter);
617 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
618 ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
620 /* check if PCIE PHY Link down */
621 if (status & ISR_PHY_LINKDOWN) {
622 if (netif_running(adapter->netdev)) { /* reset MAC */
623 ATL2_WRITE_REG(hw, REG_ISR, 0);
624 ATL2_WRITE_REG(hw, REG_IMR, 0);
625 ATL2_WRITE_FLUSH(hw);
626 schedule_work(&adapter->reset_task);
631 /* check if DMA read/write error? */
632 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
633 ATL2_WRITE_REG(hw, REG_ISR, 0);
634 ATL2_WRITE_REG(hw, REG_IMR, 0);
635 ATL2_WRITE_FLUSH(hw);
636 schedule_work(&adapter->reset_task);
641 if (status & (ISR_PHY | ISR_MANUAL)) {
642 adapter->netdev->stats.tx_carrier_errors++;
643 atl2_check_for_link(adapter);
647 if (status & ISR_TX_EVENT)
648 atl2_intr_tx(adapter);
651 if (status & ISR_RX_EVENT)
652 atl2_intr_rx(adapter);
654 /* re-enable Interrupt */
655 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
659 static int atl2_request_irq(struct atl2_adapter *adapter)
661 struct net_device *netdev = adapter->netdev;
665 adapter->have_msi = true;
666 err = pci_enable_msi(adapter->pdev);
668 adapter->have_msi = false;
670 if (adapter->have_msi)
671 flags &= ~IRQF_SHARED;
673 return request_irq(adapter->pdev->irq, atl2_intr, flags, netdev->name,
678 * atl2_free_ring_resources - Free Tx / RX descriptor Resources
679 * @adapter: board private structure
681 * Free all transmit software resources
683 static void atl2_free_ring_resources(struct atl2_adapter *adapter)
685 struct pci_dev *pdev = adapter->pdev;
686 pci_free_consistent(pdev, adapter->ring_size, adapter->ring_vir_addr,
691 * atl2_open - Called when a network interface is made active
692 * @netdev: network interface device structure
694 * Returns 0 on success, negative value on failure
696 * The open entry point is called when a network interface is made
697 * active by the system (IFF_UP). At this point all resources needed
698 * for transmit and receive operations are allocated, the interrupt
699 * handler is registered with the OS, the watchdog timer is started,
700 * and the stack is notified that the interface is ready.
702 static int atl2_open(struct net_device *netdev)
704 struct atl2_adapter *adapter = netdev_priv(netdev);
708 /* disallow open during test */
709 if (test_bit(__ATL2_TESTING, &adapter->flags))
712 /* allocate transmit descriptors */
713 err = atl2_setup_ring_resources(adapter);
717 err = atl2_init_hw(&adapter->hw);
723 /* hardware has been reset, we need to reload some things */
724 atl2_set_multi(netdev);
725 init_ring_ptrs(adapter);
727 atl2_restore_vlan(adapter);
729 if (atl2_configure(adapter)) {
734 err = atl2_request_irq(adapter);
738 clear_bit(__ATL2_DOWN, &adapter->flags);
740 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 4*HZ));
742 val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
743 ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
744 val | MASTER_CTRL_MANUAL_INT);
746 atl2_irq_enable(adapter);
753 atl2_free_ring_resources(adapter);
754 atl2_reset_hw(&adapter->hw);
759 static void atl2_down(struct atl2_adapter *adapter)
761 struct net_device *netdev = adapter->netdev;
763 /* signal that we're down so the interrupt handler does not
764 * reschedule our watchdog timer */
765 set_bit(__ATL2_DOWN, &adapter->flags);
767 netif_tx_disable(netdev);
769 /* reset MAC to disable all RX/TX */
770 atl2_reset_hw(&adapter->hw);
773 atl2_irq_disable(adapter);
775 del_timer_sync(&adapter->watchdog_timer);
776 del_timer_sync(&adapter->phy_config_timer);
777 clear_bit(0, &adapter->cfg_phy);
779 netif_carrier_off(netdev);
780 adapter->link_speed = SPEED_0;
781 adapter->link_duplex = -1;
784 static void atl2_free_irq(struct atl2_adapter *adapter)
786 struct net_device *netdev = adapter->netdev;
788 free_irq(adapter->pdev->irq, netdev);
790 #ifdef CONFIG_PCI_MSI
791 if (adapter->have_msi)
792 pci_disable_msi(adapter->pdev);
797 * atl2_close - Disables a network interface
798 * @netdev: network interface device structure
800 * Returns 0, this is not allowed to fail
802 * The close entry point is called when an interface is de-activated
803 * by the OS. The hardware is still under the drivers control, but
804 * needs to be disabled. A global MAC reset is issued to stop the
805 * hardware, and all transmit and receive resources are freed.
807 static int atl2_close(struct net_device *netdev)
809 struct atl2_adapter *adapter = netdev_priv(netdev);
811 WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
814 atl2_free_irq(adapter);
815 atl2_free_ring_resources(adapter);
820 static inline int TxsFreeUnit(struct atl2_adapter *adapter)
822 u32 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
824 return (adapter->txs_next_clear >= txs_write_ptr) ?
825 (int) (adapter->txs_ring_size - adapter->txs_next_clear +
827 (int) (txs_write_ptr - adapter->txs_next_clear - 1);
830 static inline int TxdFreeBytes(struct atl2_adapter *adapter)
832 u32 txd_read_ptr = (u32)atomic_read(&adapter->txd_read_ptr);
834 return (adapter->txd_write_ptr >= txd_read_ptr) ?
835 (int) (adapter->txd_ring_size - adapter->txd_write_ptr +
837 (int) (txd_read_ptr - adapter->txd_write_ptr - 1);
840 static netdev_tx_t atl2_xmit_frame(struct sk_buff *skb,
841 struct net_device *netdev)
843 struct atl2_adapter *adapter = netdev_priv(netdev);
844 struct tx_pkt_header *txph;
845 u32 offset, copy_len;
849 if (test_bit(__ATL2_DOWN, &adapter->flags)) {
850 dev_kfree_skb_any(skb);
854 if (unlikely(skb->len <= 0)) {
855 dev_kfree_skb_any(skb);
859 txs_unused = TxsFreeUnit(adapter);
860 txbuf_unused = TxdFreeBytes(adapter);
862 if (skb->len + sizeof(struct tx_pkt_header) + 4 > txbuf_unused ||
864 /* not enough resources */
865 netif_stop_queue(netdev);
866 return NETDEV_TX_BUSY;
869 offset = adapter->txd_write_ptr;
871 txph = (struct tx_pkt_header *) (((u8 *)adapter->txd_ring) + offset);
874 txph->pkt_size = skb->len;
877 if (offset >= adapter->txd_ring_size)
878 offset -= adapter->txd_ring_size;
879 copy_len = adapter->txd_ring_size - offset;
880 if (copy_len >= skb->len) {
881 memcpy(((u8 *)adapter->txd_ring) + offset, skb->data, skb->len);
882 offset += ((u32)(skb->len + 3) & ~3);
884 memcpy(((u8 *)adapter->txd_ring)+offset, skb->data, copy_len);
885 memcpy((u8 *)adapter->txd_ring, skb->data+copy_len,
887 offset = ((u32)(skb->len-copy_len + 3) & ~3);
889 #ifdef NETIF_F_HW_VLAN_CTAG_TX
890 if (skb_vlan_tag_present(skb)) {
891 u16 vlan_tag = skb_vlan_tag_get(skb);
892 vlan_tag = (vlan_tag << 4) |
894 ((vlan_tag >> 9) & 0x8);
896 txph->vlan = vlan_tag;
899 if (offset >= adapter->txd_ring_size)
900 offset -= adapter->txd_ring_size;
901 adapter->txd_write_ptr = offset;
903 /* clear txs before send */
904 adapter->txs_ring[adapter->txs_next_clear].update = 0;
905 if (++adapter->txs_next_clear == adapter->txs_ring_size)
906 adapter->txs_next_clear = 0;
908 ATL2_WRITE_REGW(&adapter->hw, REG_MB_TXD_WR_IDX,
909 (adapter->txd_write_ptr >> 2));
912 dev_kfree_skb_any(skb);
917 * atl2_change_mtu - Change the Maximum Transfer Unit
918 * @netdev: network interface device structure
919 * @new_mtu: new value for maximum frame size
921 * Returns 0 on success, negative on failure
923 static int atl2_change_mtu(struct net_device *netdev, int new_mtu)
925 struct atl2_adapter *adapter = netdev_priv(netdev);
926 struct atl2_hw *hw = &adapter->hw;
929 netdev->mtu = new_mtu;
930 hw->max_frame_size = new_mtu;
931 ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ETH_HLEN +
932 VLAN_HLEN + ETH_FCS_LEN);
938 * atl2_set_mac - Change the Ethernet Address of the NIC
939 * @netdev: network interface device structure
940 * @p: pointer to an address structure
942 * Returns 0 on success, negative on failure
944 static int atl2_set_mac(struct net_device *netdev, void *p)
946 struct atl2_adapter *adapter = netdev_priv(netdev);
947 struct sockaddr *addr = p;
949 if (!is_valid_ether_addr(addr->sa_data))
950 return -EADDRNOTAVAIL;
952 if (netif_running(netdev))
955 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
956 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
958 atl2_set_mac_addr(&adapter->hw);
963 static int atl2_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
965 struct atl2_adapter *adapter = netdev_priv(netdev);
966 struct mii_ioctl_data *data = if_mii(ifr);
974 spin_lock_irqsave(&adapter->stats_lock, flags);
975 if (atl2_read_phy_reg(&adapter->hw,
976 data->reg_num & 0x1F, &data->val_out)) {
977 spin_unlock_irqrestore(&adapter->stats_lock, flags);
980 spin_unlock_irqrestore(&adapter->stats_lock, flags);
983 if (data->reg_num & ~(0x1F))
985 spin_lock_irqsave(&adapter->stats_lock, flags);
986 if (atl2_write_phy_reg(&adapter->hw, data->reg_num,
988 spin_unlock_irqrestore(&adapter->stats_lock, flags);
991 spin_unlock_irqrestore(&adapter->stats_lock, flags);
999 static int atl2_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1005 return atl2_mii_ioctl(netdev, ifr, cmd);
1006 #ifdef ETHTOOL_OPS_COMPAT
1008 return ethtool_ioctl(ifr);
1016 * atl2_tx_timeout - Respond to a Tx Hang
1017 * @netdev: network interface device structure
1019 static void atl2_tx_timeout(struct net_device *netdev)
1021 struct atl2_adapter *adapter = netdev_priv(netdev);
1023 /* Do the reset outside of interrupt context */
1024 schedule_work(&adapter->reset_task);
1028 * atl2_watchdog - Timer Call-back
1029 * @data: pointer to netdev cast into an unsigned long
1031 static void atl2_watchdog(unsigned long data)
1033 struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1035 if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1036 u32 drop_rxd, drop_rxs;
1037 unsigned long flags;
1039 spin_lock_irqsave(&adapter->stats_lock, flags);
1040 drop_rxd = ATL2_READ_REG(&adapter->hw, REG_STS_RXD_OV);
1041 drop_rxs = ATL2_READ_REG(&adapter->hw, REG_STS_RXS_OV);
1042 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1044 adapter->netdev->stats.rx_over_errors += drop_rxd + drop_rxs;
1046 /* Reset the timer */
1047 mod_timer(&adapter->watchdog_timer,
1048 round_jiffies(jiffies + 4 * HZ));
1053 * atl2_phy_config - Timer Call-back
1054 * @data: pointer to netdev cast into an unsigned long
1056 static void atl2_phy_config(unsigned long data)
1058 struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1059 struct atl2_hw *hw = &adapter->hw;
1060 unsigned long flags;
1062 spin_lock_irqsave(&adapter->stats_lock, flags);
1063 atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1064 atl2_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN |
1065 MII_CR_RESTART_AUTO_NEG);
1066 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1067 clear_bit(0, &adapter->cfg_phy);
1070 static int atl2_up(struct atl2_adapter *adapter)
1072 struct net_device *netdev = adapter->netdev;
1076 /* hardware has been reset, we need to reload some things */
1078 err = atl2_init_hw(&adapter->hw);
1084 atl2_set_multi(netdev);
1085 init_ring_ptrs(adapter);
1087 atl2_restore_vlan(adapter);
1089 if (atl2_configure(adapter)) {
1094 clear_bit(__ATL2_DOWN, &adapter->flags);
1096 val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1097 ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |
1098 MASTER_CTRL_MANUAL_INT);
1100 atl2_irq_enable(adapter);
1106 static void atl2_reinit_locked(struct atl2_adapter *adapter)
1108 WARN_ON(in_interrupt());
1109 while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1113 clear_bit(__ATL2_RESETTING, &adapter->flags);
1116 static void atl2_reset_task(struct work_struct *work)
1118 struct atl2_adapter *adapter;
1119 adapter = container_of(work, struct atl2_adapter, reset_task);
1121 atl2_reinit_locked(adapter);
1124 static void atl2_setup_mac_ctrl(struct atl2_adapter *adapter)
1127 struct atl2_hw *hw = &adapter->hw;
1128 struct net_device *netdev = adapter->netdev;
1130 /* Config MAC CTRL Register */
1131 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1134 if (FULL_DUPLEX == adapter->link_duplex)
1135 value |= MAC_CTRL_DUPLX;
1138 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1141 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1143 /* preamble length */
1144 value |= (((u32)adapter->hw.preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1145 MAC_CTRL_PRMLEN_SHIFT);
1148 __atl2_vlan_mode(netdev->features, &value);
1151 value |= MAC_CTRL_BC_EN;
1152 if (netdev->flags & IFF_PROMISC)
1153 value |= MAC_CTRL_PROMIS_EN;
1154 else if (netdev->flags & IFF_ALLMULTI)
1155 value |= MAC_CTRL_MC_ALL_EN;
1157 /* half retry buffer */
1158 value |= (((u32)(adapter->hw.retry_buf &
1159 MAC_CTRL_HALF_LEFT_BUF_MASK)) << MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1161 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1164 static int atl2_check_link(struct atl2_adapter *adapter)
1166 struct atl2_hw *hw = &adapter->hw;
1167 struct net_device *netdev = adapter->netdev;
1169 u16 speed, duplex, phy_data;
1172 /* MII_BMSR must read twise */
1173 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1174 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1175 if (!(phy_data&BMSR_LSTATUS)) { /* link down */
1176 if (netif_carrier_ok(netdev)) { /* old link state: Up */
1179 value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1180 value &= ~MAC_CTRL_RX_EN;
1181 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1182 adapter->link_speed = SPEED_0;
1183 netif_carrier_off(netdev);
1184 netif_stop_queue(netdev);
1190 ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1193 switch (hw->MediaType) {
1194 case MEDIA_TYPE_100M_FULL:
1195 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1198 case MEDIA_TYPE_100M_HALF:
1199 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1202 case MEDIA_TYPE_10M_FULL:
1203 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1206 case MEDIA_TYPE_10M_HALF:
1207 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1211 /* link result is our setting */
1212 if (reconfig == 0) {
1213 if (adapter->link_speed != speed ||
1214 adapter->link_duplex != duplex) {
1215 adapter->link_speed = speed;
1216 adapter->link_duplex = duplex;
1217 atl2_setup_mac_ctrl(adapter);
1218 printk(KERN_INFO "%s: %s NIC Link is Up<%d Mbps %s>\n",
1219 atl2_driver_name, netdev->name,
1220 adapter->link_speed,
1221 adapter->link_duplex == FULL_DUPLEX ?
1222 "Full Duplex" : "Half Duplex");
1225 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
1226 netif_carrier_on(netdev);
1227 netif_wake_queue(netdev);
1232 /* change original link status */
1233 if (netif_carrier_ok(netdev)) {
1236 value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1237 value &= ~MAC_CTRL_RX_EN;
1238 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1240 adapter->link_speed = SPEED_0;
1241 netif_carrier_off(netdev);
1242 netif_stop_queue(netdev);
1245 /* auto-neg, insert timer to re-config phy
1246 * (if interval smaller than 5 seconds, something strange) */
1247 if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1248 if (!test_and_set_bit(0, &adapter->cfg_phy))
1249 mod_timer(&adapter->phy_config_timer,
1250 round_jiffies(jiffies + 5 * HZ));
1257 * atl2_link_chg_task - deal with link change event Out of interrupt context
1259 static void atl2_link_chg_task(struct work_struct *work)
1261 struct atl2_adapter *adapter;
1262 unsigned long flags;
1264 adapter = container_of(work, struct atl2_adapter, link_chg_task);
1266 spin_lock_irqsave(&adapter->stats_lock, flags);
1267 atl2_check_link(adapter);
1268 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1271 static void atl2_setup_pcicmd(struct pci_dev *pdev)
1275 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1277 if (cmd & PCI_COMMAND_INTX_DISABLE)
1278 cmd &= ~PCI_COMMAND_INTX_DISABLE;
1279 if (cmd & PCI_COMMAND_IO)
1280 cmd &= ~PCI_COMMAND_IO;
1281 if (0 == (cmd & PCI_COMMAND_MEMORY))
1282 cmd |= PCI_COMMAND_MEMORY;
1283 if (0 == (cmd & PCI_COMMAND_MASTER))
1284 cmd |= PCI_COMMAND_MASTER;
1285 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1288 * some motherboards BIOS(PXE/EFI) driver may set PME
1289 * while they transfer control to OS (Windows/Linux)
1290 * so we should clear this bit before NIC work normally
1292 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
1295 #ifdef CONFIG_NET_POLL_CONTROLLER
1296 static void atl2_poll_controller(struct net_device *netdev)
1298 disable_irq(netdev->irq);
1299 atl2_intr(netdev->irq, netdev);
1300 enable_irq(netdev->irq);
1305 static const struct net_device_ops atl2_netdev_ops = {
1306 .ndo_open = atl2_open,
1307 .ndo_stop = atl2_close,
1308 .ndo_start_xmit = atl2_xmit_frame,
1309 .ndo_set_rx_mode = atl2_set_multi,
1310 .ndo_validate_addr = eth_validate_addr,
1311 .ndo_set_mac_address = atl2_set_mac,
1312 .ndo_change_mtu = atl2_change_mtu,
1313 .ndo_fix_features = atl2_fix_features,
1314 .ndo_set_features = atl2_set_features,
1315 .ndo_do_ioctl = atl2_ioctl,
1316 .ndo_tx_timeout = atl2_tx_timeout,
1317 #ifdef CONFIG_NET_POLL_CONTROLLER
1318 .ndo_poll_controller = atl2_poll_controller,
1323 * atl2_probe - Device Initialization Routine
1324 * @pdev: PCI device information struct
1325 * @ent: entry in atl2_pci_tbl
1327 * Returns 0 on success, negative on failure
1329 * atl2_probe initializes an adapter identified by a pci_dev structure.
1330 * The OS initialization, configuring of the adapter private structure,
1331 * and a hardware reset occur.
1333 static int atl2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1335 struct net_device *netdev;
1336 struct atl2_adapter *adapter;
1337 static int cards_found;
1338 unsigned long mmio_start;
1344 err = pci_enable_device(pdev);
1349 * atl2 is a shared-high-32-bit device, so we're stuck with 32-bit DMA
1350 * until the kernel has the proper infrastructure to support 64-bit DMA
1353 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &&
1354 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1355 printk(KERN_ERR "atl2: No usable DMA configuration, aborting\n");
1360 /* Mark all PCI regions associated with PCI device
1361 * pdev as being reserved by owner atl2_driver_name */
1362 err = pci_request_regions(pdev, atl2_driver_name);
1366 /* Enables bus-mastering on the device and calls
1367 * pcibios_set_master to do the needed arch specific settings */
1368 pci_set_master(pdev);
1370 netdev = alloc_etherdev(sizeof(struct atl2_adapter));
1373 goto err_alloc_etherdev;
1376 SET_NETDEV_DEV(netdev, &pdev->dev);
1378 pci_set_drvdata(pdev, netdev);
1379 adapter = netdev_priv(netdev);
1380 adapter->netdev = netdev;
1381 adapter->pdev = pdev;
1382 adapter->hw.back = adapter;
1384 mmio_start = pci_resource_start(pdev, 0x0);
1385 mmio_len = pci_resource_len(pdev, 0x0);
1387 adapter->hw.mem_rang = (u32)mmio_len;
1388 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1389 if (!adapter->hw.hw_addr) {
1394 atl2_setup_pcicmd(pdev);
1396 netdev->netdev_ops = &atl2_netdev_ops;
1397 netdev->ethtool_ops = &atl2_ethtool_ops;
1398 netdev->watchdog_timeo = 5 * HZ;
1399 netdev->min_mtu = 40;
1400 netdev->max_mtu = ETH_DATA_LEN + VLAN_HLEN;
1401 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1403 netdev->mem_start = mmio_start;
1404 netdev->mem_end = mmio_start + mmio_len;
1405 adapter->bd_number = cards_found;
1406 adapter->pci_using_64 = false;
1408 /* setup the private structure */
1409 err = atl2_sw_init(adapter);
1413 netdev->hw_features = NETIF_F_HW_VLAN_CTAG_RX;
1414 netdev->features |= (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX);
1416 /* Init PHY as early as possible due to power saving issue */
1417 atl2_phy_init(&adapter->hw);
1419 /* reset the controller to
1420 * put the device in a known good starting state */
1422 if (atl2_reset_hw(&adapter->hw)) {
1427 /* copy the MAC address out of the EEPROM */
1428 atl2_read_mac_addr(&adapter->hw);
1429 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1430 if (!is_valid_ether_addr(netdev->dev_addr)) {
1435 atl2_check_options(adapter);
1437 setup_timer(&adapter->watchdog_timer, atl2_watchdog,
1438 (unsigned long)adapter);
1440 setup_timer(&adapter->phy_config_timer, atl2_phy_config,
1441 (unsigned long)adapter);
1443 INIT_WORK(&adapter->reset_task, atl2_reset_task);
1444 INIT_WORK(&adapter->link_chg_task, atl2_link_chg_task);
1446 strcpy(netdev->name, "eth%d"); /* ?? */
1447 err = register_netdev(netdev);
1451 /* assume we have no link for now */
1452 netif_carrier_off(netdev);
1453 netif_stop_queue(netdev);
1463 iounmap(adapter->hw.hw_addr);
1465 free_netdev(netdev);
1467 pci_release_regions(pdev);
1470 pci_disable_device(pdev);
1475 * atl2_remove - Device Removal Routine
1476 * @pdev: PCI device information struct
1478 * atl2_remove is called by the PCI subsystem to alert the driver
1479 * that it should release a PCI device. The could be caused by a
1480 * Hot-Plug event, or because the driver is going to be removed from
1483 /* FIXME: write the original MAC address back in case it was changed from a
1484 * BIOS-set value, as in atl1 -- CHS */
1485 static void atl2_remove(struct pci_dev *pdev)
1487 struct net_device *netdev = pci_get_drvdata(pdev);
1488 struct atl2_adapter *adapter = netdev_priv(netdev);
1490 /* flush_scheduled work may reschedule our watchdog task, so
1491 * explicitly disable watchdog tasks from being rescheduled */
1492 set_bit(__ATL2_DOWN, &adapter->flags);
1494 del_timer_sync(&adapter->watchdog_timer);
1495 del_timer_sync(&adapter->phy_config_timer);
1496 cancel_work_sync(&adapter->reset_task);
1497 cancel_work_sync(&adapter->link_chg_task);
1499 unregister_netdev(netdev);
1501 atl2_force_ps(&adapter->hw);
1503 iounmap(adapter->hw.hw_addr);
1504 pci_release_regions(pdev);
1506 free_netdev(netdev);
1508 pci_disable_device(pdev);
1511 static int atl2_suspend(struct pci_dev *pdev, pm_message_t state)
1513 struct net_device *netdev = pci_get_drvdata(pdev);
1514 struct atl2_adapter *adapter = netdev_priv(netdev);
1515 struct atl2_hw *hw = &adapter->hw;
1518 u32 wufc = adapter->wol;
1524 netif_device_detach(netdev);
1526 if (netif_running(netdev)) {
1527 WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
1532 retval = pci_save_state(pdev);
1537 atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1538 atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1539 if (ctrl & BMSR_LSTATUS)
1540 wufc &= ~ATLX_WUFC_LNKC;
1542 if (0 != (ctrl & BMSR_LSTATUS) && 0 != wufc) {
1544 /* get current link speed & duplex */
1545 ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1548 "%s: get speed&duplex error while suspend\n",
1555 /* turn on magic packet wol */
1556 if (wufc & ATLX_WUFC_MAG)
1557 ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
1559 /* ignore Link Chg event when Link is up */
1560 ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1562 /* Config MAC CTRL Register */
1563 ctrl = MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1564 if (FULL_DUPLEX == adapter->link_duplex)
1565 ctrl |= MAC_CTRL_DUPLX;
1566 ctrl |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1567 ctrl |= (((u32)adapter->hw.preamble_len &
1568 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1569 ctrl |= (((u32)(adapter->hw.retry_buf &
1570 MAC_CTRL_HALF_LEFT_BUF_MASK)) <<
1571 MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1572 if (wufc & ATLX_WUFC_MAG) {
1573 /* magic packet maybe Broadcast&multicast&Unicast */
1574 ctrl |= MAC_CTRL_BC_EN;
1577 ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);
1580 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1581 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1582 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1583 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1584 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1585 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1587 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1591 if (0 == (ctrl&BMSR_LSTATUS) && 0 != (wufc&ATLX_WUFC_LNKC)) {
1592 /* link is down, so only LINK CHG WOL event enable */
1593 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
1594 ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1595 ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);
1598 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1599 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1600 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1601 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1602 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1603 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1605 hw->phy_configured = false; /* re-init PHY when resume */
1607 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1614 ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0);
1617 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1618 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1619 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1620 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1621 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1622 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1625 hw->phy_configured = false; /* re-init PHY when resume */
1627 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1630 if (netif_running(netdev))
1631 atl2_free_irq(adapter);
1633 pci_disable_device(pdev);
1635 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1641 static int atl2_resume(struct pci_dev *pdev)
1643 struct net_device *netdev = pci_get_drvdata(pdev);
1644 struct atl2_adapter *adapter = netdev_priv(netdev);
1647 pci_set_power_state(pdev, PCI_D0);
1648 pci_restore_state(pdev);
1650 err = pci_enable_device(pdev);
1653 "atl2: Cannot enable PCI device from suspend\n");
1657 pci_set_master(pdev);
1659 ATL2_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
1661 pci_enable_wake(pdev, PCI_D3hot, 0);
1662 pci_enable_wake(pdev, PCI_D3cold, 0);
1664 ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
1666 if (netif_running(netdev)) {
1667 err = atl2_request_irq(adapter);
1672 atl2_reset_hw(&adapter->hw);
1674 if (netif_running(netdev))
1677 netif_device_attach(netdev);
1683 static void atl2_shutdown(struct pci_dev *pdev)
1685 atl2_suspend(pdev, PMSG_SUSPEND);
1688 static struct pci_driver atl2_driver = {
1689 .name = atl2_driver_name,
1690 .id_table = atl2_pci_tbl,
1691 .probe = atl2_probe,
1692 .remove = atl2_remove,
1693 /* Power Management Hooks */
1694 .suspend = atl2_suspend,
1696 .resume = atl2_resume,
1698 .shutdown = atl2_shutdown,
1702 * atl2_init_module - Driver Registration Routine
1704 * atl2_init_module is the first routine called when the driver is
1705 * loaded. All it does is register with the PCI subsystem.
1707 static int __init atl2_init_module(void)
1709 printk(KERN_INFO "%s - version %s\n", atl2_driver_string,
1710 atl2_driver_version);
1711 printk(KERN_INFO "%s\n", atl2_copyright);
1712 return pci_register_driver(&atl2_driver);
1714 module_init(atl2_init_module);
1717 * atl2_exit_module - Driver Exit Cleanup Routine
1719 * atl2_exit_module is called just before the driver is removed
1722 static void __exit atl2_exit_module(void)
1724 pci_unregister_driver(&atl2_driver);
1726 module_exit(atl2_exit_module);
1728 static void atl2_read_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1730 struct atl2_adapter *adapter = hw->back;
1731 pci_read_config_word(adapter->pdev, reg, value);
1734 static void atl2_write_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1736 struct atl2_adapter *adapter = hw->back;
1737 pci_write_config_word(adapter->pdev, reg, *value);
1740 static int atl2_get_link_ksettings(struct net_device *netdev,
1741 struct ethtool_link_ksettings *cmd)
1743 struct atl2_adapter *adapter = netdev_priv(netdev);
1744 struct atl2_hw *hw = &adapter->hw;
1745 u32 supported, advertising;
1747 supported = (SUPPORTED_10baseT_Half |
1748 SUPPORTED_10baseT_Full |
1749 SUPPORTED_100baseT_Half |
1750 SUPPORTED_100baseT_Full |
1753 advertising = ADVERTISED_TP;
1755 advertising |= ADVERTISED_Autoneg;
1756 advertising |= hw->autoneg_advertised;
1758 cmd->base.port = PORT_TP;
1759 cmd->base.phy_address = 0;
1761 if (adapter->link_speed != SPEED_0) {
1762 cmd->base.speed = adapter->link_speed;
1763 if (adapter->link_duplex == FULL_DUPLEX)
1764 cmd->base.duplex = DUPLEX_FULL;
1766 cmd->base.duplex = DUPLEX_HALF;
1768 cmd->base.speed = SPEED_UNKNOWN;
1769 cmd->base.duplex = DUPLEX_UNKNOWN;
1772 cmd->base.autoneg = AUTONEG_ENABLE;
1774 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1776 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1782 static int atl2_set_link_ksettings(struct net_device *netdev,
1783 const struct ethtool_link_ksettings *cmd)
1785 struct atl2_adapter *adapter = netdev_priv(netdev);
1786 struct atl2_hw *hw = &adapter->hw;
1789 ethtool_convert_link_mode_to_legacy_u32(&advertising,
1790 cmd->link_modes.advertising);
1792 while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1795 if (cmd->base.autoneg == AUTONEG_ENABLE) {
1796 #define MY_ADV_MASK (ADVERTISE_10_HALF | \
1797 ADVERTISE_10_FULL | \
1798 ADVERTISE_100_HALF| \
1801 if ((advertising & MY_ADV_MASK) == MY_ADV_MASK) {
1802 hw->MediaType = MEDIA_TYPE_AUTO_SENSOR;
1803 hw->autoneg_advertised = MY_ADV_MASK;
1804 } else if ((advertising & MY_ADV_MASK) == ADVERTISE_100_FULL) {
1805 hw->MediaType = MEDIA_TYPE_100M_FULL;
1806 hw->autoneg_advertised = ADVERTISE_100_FULL;
1807 } else if ((advertising & MY_ADV_MASK) == ADVERTISE_100_HALF) {
1808 hw->MediaType = MEDIA_TYPE_100M_HALF;
1809 hw->autoneg_advertised = ADVERTISE_100_HALF;
1810 } else if ((advertising & MY_ADV_MASK) == ADVERTISE_10_FULL) {
1811 hw->MediaType = MEDIA_TYPE_10M_FULL;
1812 hw->autoneg_advertised = ADVERTISE_10_FULL;
1813 } else if ((advertising & MY_ADV_MASK) == ADVERTISE_10_HALF) {
1814 hw->MediaType = MEDIA_TYPE_10M_HALF;
1815 hw->autoneg_advertised = ADVERTISE_10_HALF;
1817 clear_bit(__ATL2_RESETTING, &adapter->flags);
1820 advertising = hw->autoneg_advertised |
1821 ADVERTISED_TP | ADVERTISED_Autoneg;
1823 clear_bit(__ATL2_RESETTING, &adapter->flags);
1827 /* reset the link */
1828 if (netif_running(adapter->netdev)) {
1832 atl2_reset_hw(&adapter->hw);
1834 clear_bit(__ATL2_RESETTING, &adapter->flags);
1838 static u32 atl2_get_msglevel(struct net_device *netdev)
1844 * It's sane for this to be empty, but we might want to take advantage of this.
1846 static void atl2_set_msglevel(struct net_device *netdev, u32 data)
1850 static int atl2_get_regs_len(struct net_device *netdev)
1852 #define ATL2_REGS_LEN 42
1853 return sizeof(u32) * ATL2_REGS_LEN;
1856 static void atl2_get_regs(struct net_device *netdev,
1857 struct ethtool_regs *regs, void *p)
1859 struct atl2_adapter *adapter = netdev_priv(netdev);
1860 struct atl2_hw *hw = &adapter->hw;
1864 memset(p, 0, sizeof(u32) * ATL2_REGS_LEN);
1866 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
1868 regs_buff[0] = ATL2_READ_REG(hw, REG_VPD_CAP);
1869 regs_buff[1] = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
1870 regs_buff[2] = ATL2_READ_REG(hw, REG_SPI_FLASH_CONFIG);
1871 regs_buff[3] = ATL2_READ_REG(hw, REG_TWSI_CTRL);
1872 regs_buff[4] = ATL2_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL);
1873 regs_buff[5] = ATL2_READ_REG(hw, REG_MASTER_CTRL);
1874 regs_buff[6] = ATL2_READ_REG(hw, REG_MANUAL_TIMER_INIT);
1875 regs_buff[7] = ATL2_READ_REG(hw, REG_IRQ_MODU_TIMER_INIT);
1876 regs_buff[8] = ATL2_READ_REG(hw, REG_PHY_ENABLE);
1877 regs_buff[9] = ATL2_READ_REG(hw, REG_CMBDISDMA_TIMER);
1878 regs_buff[10] = ATL2_READ_REG(hw, REG_IDLE_STATUS);
1879 regs_buff[11] = ATL2_READ_REG(hw, REG_MDIO_CTRL);
1880 regs_buff[12] = ATL2_READ_REG(hw, REG_SERDES_LOCK);
1881 regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL);
1882 regs_buff[14] = ATL2_READ_REG(hw, REG_MAC_IPG_IFG);
1883 regs_buff[15] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
1884 regs_buff[16] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR+4);
1885 regs_buff[17] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE);
1886 regs_buff[18] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE+4);
1887 regs_buff[19] = ATL2_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL);
1888 regs_buff[20] = ATL2_READ_REG(hw, REG_MTU);
1889 regs_buff[21] = ATL2_READ_REG(hw, REG_WOL_CTRL);
1890 regs_buff[22] = ATL2_READ_REG(hw, REG_SRAM_TXRAM_END);
1891 regs_buff[23] = ATL2_READ_REG(hw, REG_DESC_BASE_ADDR_HI);
1892 regs_buff[24] = ATL2_READ_REG(hw, REG_TXD_BASE_ADDR_LO);
1893 regs_buff[25] = ATL2_READ_REG(hw, REG_TXD_MEM_SIZE);
1894 regs_buff[26] = ATL2_READ_REG(hw, REG_TXS_BASE_ADDR_LO);
1895 regs_buff[27] = ATL2_READ_REG(hw, REG_TXS_MEM_SIZE);
1896 regs_buff[28] = ATL2_READ_REG(hw, REG_RXD_BASE_ADDR_LO);
1897 regs_buff[29] = ATL2_READ_REG(hw, REG_RXD_BUF_NUM);
1898 regs_buff[30] = ATL2_READ_REG(hw, REG_DMAR);
1899 regs_buff[31] = ATL2_READ_REG(hw, REG_TX_CUT_THRESH);
1900 regs_buff[32] = ATL2_READ_REG(hw, REG_DMAW);
1901 regs_buff[33] = ATL2_READ_REG(hw, REG_PAUSE_ON_TH);
1902 regs_buff[34] = ATL2_READ_REG(hw, REG_PAUSE_OFF_TH);
1903 regs_buff[35] = ATL2_READ_REG(hw, REG_MB_TXD_WR_IDX);
1904 regs_buff[36] = ATL2_READ_REG(hw, REG_MB_RXD_RD_IDX);
1905 regs_buff[38] = ATL2_READ_REG(hw, REG_ISR);
1906 regs_buff[39] = ATL2_READ_REG(hw, REG_IMR);
1908 atl2_read_phy_reg(hw, MII_BMCR, &phy_data);
1909 regs_buff[40] = (u32)phy_data;
1910 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1911 regs_buff[41] = (u32)phy_data;
1914 static int atl2_get_eeprom_len(struct net_device *netdev)
1916 struct atl2_adapter *adapter = netdev_priv(netdev);
1918 if (!atl2_check_eeprom_exist(&adapter->hw))
1924 static int atl2_get_eeprom(struct net_device *netdev,
1925 struct ethtool_eeprom *eeprom, u8 *bytes)
1927 struct atl2_adapter *adapter = netdev_priv(netdev);
1928 struct atl2_hw *hw = &adapter->hw;
1930 int first_dword, last_dword;
1934 if (eeprom->len == 0)
1937 if (atl2_check_eeprom_exist(hw))
1940 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1942 first_dword = eeprom->offset >> 2;
1943 last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
1945 eeprom_buff = kmalloc(sizeof(u32) * (last_dword - first_dword + 1),
1950 for (i = first_dword; i < last_dword; i++) {
1951 if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) {
1957 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
1965 static int atl2_set_eeprom(struct net_device *netdev,
1966 struct ethtool_eeprom *eeprom, u8 *bytes)
1968 struct atl2_adapter *adapter = netdev_priv(netdev);
1969 struct atl2_hw *hw = &adapter->hw;
1972 int max_len, first_dword, last_dword, ret_val = 0;
1975 if (eeprom->len == 0)
1978 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1983 first_dword = eeprom->offset >> 2;
1984 last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
1985 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
1991 if (eeprom->offset & 3) {
1992 /* need read/modify/write of first changed EEPROM word */
1993 /* only the second byte of the word is being modified */
1994 if (!atl2_read_eeprom(hw, first_dword*4, &(eeprom_buff[0]))) {
2000 if (((eeprom->offset + eeprom->len) & 3)) {
2002 * need read/modify/write of last changed EEPROM word
2003 * only the first byte of the word is being modified
2005 if (!atl2_read_eeprom(hw, last_dword * 4,
2006 &(eeprom_buff[last_dword - first_dword]))) {
2012 /* Device's eeprom is always little-endian, word addressable */
2013 memcpy(ptr, bytes, eeprom->len);
2015 for (i = 0; i < last_dword - first_dword + 1; i++) {
2016 if (!atl2_write_eeprom(hw, ((first_dword+i)*4), eeprom_buff[i])) {
2026 static void atl2_get_drvinfo(struct net_device *netdev,
2027 struct ethtool_drvinfo *drvinfo)
2029 struct atl2_adapter *adapter = netdev_priv(netdev);
2031 strlcpy(drvinfo->driver, atl2_driver_name, sizeof(drvinfo->driver));
2032 strlcpy(drvinfo->version, atl2_driver_version,
2033 sizeof(drvinfo->version));
2034 strlcpy(drvinfo->fw_version, "L2", sizeof(drvinfo->fw_version));
2035 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
2036 sizeof(drvinfo->bus_info));
2039 static void atl2_get_wol(struct net_device *netdev,
2040 struct ethtool_wolinfo *wol)
2042 struct atl2_adapter *adapter = netdev_priv(netdev);
2044 wol->supported = WAKE_MAGIC;
2047 if (adapter->wol & ATLX_WUFC_EX)
2048 wol->wolopts |= WAKE_UCAST;
2049 if (adapter->wol & ATLX_WUFC_MC)
2050 wol->wolopts |= WAKE_MCAST;
2051 if (adapter->wol & ATLX_WUFC_BC)
2052 wol->wolopts |= WAKE_BCAST;
2053 if (adapter->wol & ATLX_WUFC_MAG)
2054 wol->wolopts |= WAKE_MAGIC;
2055 if (adapter->wol & ATLX_WUFC_LNKC)
2056 wol->wolopts |= WAKE_PHY;
2059 static int atl2_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2061 struct atl2_adapter *adapter = netdev_priv(netdev);
2063 if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2066 if (wol->wolopts & (WAKE_UCAST | WAKE_BCAST | WAKE_MCAST))
2069 /* these settings will always override what we currently have */
2072 if (wol->wolopts & WAKE_MAGIC)
2073 adapter->wol |= ATLX_WUFC_MAG;
2074 if (wol->wolopts & WAKE_PHY)
2075 adapter->wol |= ATLX_WUFC_LNKC;
2080 static int atl2_nway_reset(struct net_device *netdev)
2082 struct atl2_adapter *adapter = netdev_priv(netdev);
2083 if (netif_running(netdev))
2084 atl2_reinit_locked(adapter);
2088 static const struct ethtool_ops atl2_ethtool_ops = {
2089 .get_drvinfo = atl2_get_drvinfo,
2090 .get_regs_len = atl2_get_regs_len,
2091 .get_regs = atl2_get_regs,
2092 .get_wol = atl2_get_wol,
2093 .set_wol = atl2_set_wol,
2094 .get_msglevel = atl2_get_msglevel,
2095 .set_msglevel = atl2_set_msglevel,
2096 .nway_reset = atl2_nway_reset,
2097 .get_link = ethtool_op_get_link,
2098 .get_eeprom_len = atl2_get_eeprom_len,
2099 .get_eeprom = atl2_get_eeprom,
2100 .set_eeprom = atl2_set_eeprom,
2101 .get_link_ksettings = atl2_get_link_ksettings,
2102 .set_link_ksettings = atl2_set_link_ksettings,
2105 #define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
2106 (((a) & 0xff00ff00) >> 8))
2107 #define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
2108 #define SHORTSWAP(a) (((a) << 8) | ((a) >> 8))
2111 * Reset the transmit and receive units; mask and clear all interrupts.
2113 * hw - Struct containing variables accessed by shared code
2114 * return : 0 or idle status (if error)
2116 static s32 atl2_reset_hw(struct atl2_hw *hw)
2119 u16 pci_cfg_cmd_word;
2122 /* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */
2123 atl2_read_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2124 if ((pci_cfg_cmd_word &
2125 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) !=
2126 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) {
2128 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER);
2129 atl2_write_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2132 /* Clear Interrupt mask to stop board from generating
2133 * interrupts & Clear any pending interrupt events
2136 /* ATL2_WRITE_REG(hw, REG_IMR, 0); */
2137 /* ATL2_WRITE_REG(hw, REG_ISR, 0xffffffff); */
2139 /* Issue Soft Reset to the MAC. This will reset the chip's
2140 * transmit, receive, DMA. It will not effect
2141 * the current PCI configuration. The global reset bit is self-
2142 * clearing, and should clear within a microsecond.
2144 ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
2146 msleep(1); /* delay about 1ms */
2148 /* Wait at least 10ms for All module to be Idle */
2149 for (i = 0; i < 10; i++) {
2150 icr = ATL2_READ_REG(hw, REG_IDLE_STATUS);
2153 msleep(1); /* delay 1 ms */
2163 #define CUSTOM_SPI_CS_SETUP 2
2164 #define CUSTOM_SPI_CLK_HI 2
2165 #define CUSTOM_SPI_CLK_LO 2
2166 #define CUSTOM_SPI_CS_HOLD 2
2167 #define CUSTOM_SPI_CS_HI 3
2169 static struct atl2_spi_flash_dev flash_table[] =
2171 /* MFR WRSR READ PROGRAM WREN WRDI RDSR RDID SECTOR_ERASE CHIP_ERASE */
2172 {"Atmel", 0x0, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 },
2173 {"SST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 },
2174 {"ST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8, 0xC7 },
2177 static bool atl2_spi_read(struct atl2_hw *hw, u32 addr, u32 *buf)
2182 ATL2_WRITE_REG(hw, REG_SPI_DATA, 0);
2183 ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr);
2185 value = SPI_FLASH_CTRL_WAIT_READY |
2186 (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
2187 SPI_FLASH_CTRL_CS_SETUP_SHIFT |
2188 (CUSTOM_SPI_CLK_HI & SPI_FLASH_CTRL_CLK_HI_MASK) <<
2189 SPI_FLASH_CTRL_CLK_HI_SHIFT |
2190 (CUSTOM_SPI_CLK_LO & SPI_FLASH_CTRL_CLK_LO_MASK) <<
2191 SPI_FLASH_CTRL_CLK_LO_SHIFT |
2192 (CUSTOM_SPI_CS_HOLD & SPI_FLASH_CTRL_CS_HOLD_MASK) <<
2193 SPI_FLASH_CTRL_CS_HOLD_SHIFT |
2194 (CUSTOM_SPI_CS_HI & SPI_FLASH_CTRL_CS_HI_MASK) <<
2195 SPI_FLASH_CTRL_CS_HI_SHIFT |
2196 (0x1 & SPI_FLASH_CTRL_INS_MASK) << SPI_FLASH_CTRL_INS_SHIFT;
2198 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2200 value |= SPI_FLASH_CTRL_START;
2202 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2204 for (i = 0; i < 10; i++) {
2206 value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2207 if (!(value & SPI_FLASH_CTRL_START))
2211 if (value & SPI_FLASH_CTRL_START)
2214 *buf = ATL2_READ_REG(hw, REG_SPI_DATA);
2220 * get_permanent_address
2221 * return 0 if get valid mac address,
2223 static int get_permanent_address(struct atl2_hw *hw)
2228 u8 EthAddr[ETH_ALEN];
2231 if (is_valid_ether_addr(hw->perm_mac_addr))
2237 if (!atl2_check_eeprom_exist(hw)) { /* eeprom exists */
2241 /* Read out all EEPROM content */
2244 if (atl2_read_eeprom(hw, i + 0x100, &Control)) {
2246 if (Register == REG_MAC_STA_ADDR)
2248 else if (Register ==
2249 (REG_MAC_STA_ADDR + 4))
2252 } else if ((Control & 0xff) == 0x5A) {
2254 Register = (u16) (Control >> 16);
2256 /* assume data end while encount an invalid KEYWORD */
2260 break; /* read error */
2265 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2266 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2268 if (is_valid_ether_addr(EthAddr)) {
2269 memcpy(hw->perm_mac_addr, EthAddr, ETH_ALEN);
2275 /* see if SPI flash exists? */
2282 if (atl2_spi_read(hw, i + 0x1f000, &Control)) {
2284 if (Register == REG_MAC_STA_ADDR)
2286 else if (Register == (REG_MAC_STA_ADDR + 4))
2289 } else if ((Control & 0xff) == 0x5A) {
2291 Register = (u16) (Control >> 16);
2293 break; /* data end */
2296 break; /* read error */
2301 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2302 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *)&Addr[1]);
2303 if (is_valid_ether_addr(EthAddr)) {
2304 memcpy(hw->perm_mac_addr, EthAddr, ETH_ALEN);
2307 /* maybe MAC-address is from BIOS */
2308 Addr[0] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
2309 Addr[1] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR + 4);
2310 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2311 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2313 if (is_valid_ether_addr(EthAddr)) {
2314 memcpy(hw->perm_mac_addr, EthAddr, ETH_ALEN);
2322 * Reads the adapter's MAC address from the EEPROM
2324 * hw - Struct containing variables accessed by shared code
2326 static s32 atl2_read_mac_addr(struct atl2_hw *hw)
2328 if (get_permanent_address(hw)) {
2330 /* FIXME: shouldn't we use eth_random_addr() here? */
2331 hw->perm_mac_addr[0] = 0x00;
2332 hw->perm_mac_addr[1] = 0x13;
2333 hw->perm_mac_addr[2] = 0x74;
2334 hw->perm_mac_addr[3] = 0x00;
2335 hw->perm_mac_addr[4] = 0x5c;
2336 hw->perm_mac_addr[5] = 0x38;
2339 memcpy(hw->mac_addr, hw->perm_mac_addr, ETH_ALEN);
2345 * Hashes an address to determine its location in the multicast table
2347 * hw - Struct containing variables accessed by shared code
2348 * mc_addr - the multicast address to hash
2352 * set hash value for a multicast address
2353 * hash calcu processing :
2354 * 1. calcu 32bit CRC for multicast address
2355 * 2. reverse crc with MSB to LSB
2357 static u32 atl2_hash_mc_addr(struct atl2_hw *hw, u8 *mc_addr)
2363 crc32 = ether_crc_le(6, mc_addr);
2365 for (i = 0; i < 32; i++)
2366 value |= (((crc32 >> i) & 1) << (31 - i));
2372 * Sets the bit in the multicast table corresponding to the hash value.
2374 * hw - Struct containing variables accessed by shared code
2375 * hash_value - Multicast address hash value
2377 static void atl2_hash_set(struct atl2_hw *hw, u32 hash_value)
2379 u32 hash_bit, hash_reg;
2382 /* The HASH Table is a register array of 2 32-bit registers.
2383 * It is treated like an array of 64 bits. We want to set
2384 * bit BitArray[hash_value]. So we figure out what register
2385 * the bit is in, read it, OR in the new bit, then write
2386 * back the new value. The register is determined by the
2387 * upper 7 bits of the hash value and the bit within that
2388 * register are determined by the lower 5 bits of the value.
2390 hash_reg = (hash_value >> 31) & 0x1;
2391 hash_bit = (hash_value >> 26) & 0x1F;
2393 mta = ATL2_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg);
2395 mta |= (1 << hash_bit);
2397 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta);
2401 * atl2_init_pcie - init PCIE module
2403 static void atl2_init_pcie(struct atl2_hw *hw)
2406 value = LTSSM_TEST_MODE_DEF;
2407 ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value);
2409 value = PCIE_DLL_TX_CTRL1_DEF;
2410 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value);
2413 static void atl2_init_flash_opcode(struct atl2_hw *hw)
2415 if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
2416 hw->flash_vendor = 0; /* ATMEL */
2419 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_PROGRAM,
2420 flash_table[hw->flash_vendor].cmdPROGRAM);
2421 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_SC_ERASE,
2422 flash_table[hw->flash_vendor].cmdSECTOR_ERASE);
2423 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_CHIP_ERASE,
2424 flash_table[hw->flash_vendor].cmdCHIP_ERASE);
2425 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDID,
2426 flash_table[hw->flash_vendor].cmdRDID);
2427 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WREN,
2428 flash_table[hw->flash_vendor].cmdWREN);
2429 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDSR,
2430 flash_table[hw->flash_vendor].cmdRDSR);
2431 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WRSR,
2432 flash_table[hw->flash_vendor].cmdWRSR);
2433 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_READ,
2434 flash_table[hw->flash_vendor].cmdREAD);
2437 /********************************************************************
2438 * Performs basic configuration of the adapter.
2440 * hw - Struct containing variables accessed by shared code
2441 * Assumes that the controller has previously been reset and is in a
2442 * post-reset uninitialized state. Initializes multicast table,
2443 * and Calls routines to setup link
2444 * Leaves the transmit and receive units disabled and uninitialized.
2445 ********************************************************************/
2446 static s32 atl2_init_hw(struct atl2_hw *hw)
2452 /* Zero out the Multicast HASH table */
2453 /* clear the old settings from the multicast hash table */
2454 ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
2455 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
2457 atl2_init_flash_opcode(hw);
2459 ret_val = atl2_phy_init(hw);
2465 * Detects the current speed and duplex settings of the hardware.
2467 * hw - Struct containing variables accessed by shared code
2468 * speed - Speed of the connection
2469 * duplex - Duplex setting of the connection
2471 static s32 atl2_get_speed_and_duplex(struct atl2_hw *hw, u16 *speed,
2477 /* Read PHY Specific Status Register (17) */
2478 ret_val = atl2_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
2482 if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
2483 return ATLX_ERR_PHY_RES;
2485 switch (phy_data & MII_ATLX_PSSR_SPEED) {
2486 case MII_ATLX_PSSR_100MBS:
2489 case MII_ATLX_PSSR_10MBS:
2493 return ATLX_ERR_PHY_SPEED;
2496 if (phy_data & MII_ATLX_PSSR_DPLX)
2497 *duplex = FULL_DUPLEX;
2499 *duplex = HALF_DUPLEX;
2505 * Reads the value from a PHY register
2506 * hw - Struct containing variables accessed by shared code
2507 * reg_addr - address of the PHY register to read
2509 static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data)
2514 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
2518 MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2519 ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2523 for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2525 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2526 if (!(val & (MDIO_START | MDIO_BUSY)))
2530 if (!(val & (MDIO_START | MDIO_BUSY))) {
2531 *phy_data = (u16)val;
2535 return ATLX_ERR_PHY;
2539 * Writes a value to a PHY register
2540 * hw - Struct containing variables accessed by shared code
2541 * reg_addr - address of the PHY register to write
2542 * data - data to write to the PHY
2544 static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data)
2549 val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
2550 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
2553 MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2554 ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2558 for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2560 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2561 if (!(val & (MDIO_START | MDIO_BUSY)))
2567 if (!(val & (MDIO_START | MDIO_BUSY)))
2570 return ATLX_ERR_PHY;
2574 * Configures PHY autoneg and flow control advertisement settings
2576 * hw - Struct containing variables accessed by shared code
2578 static s32 atl2_phy_setup_autoneg_adv(struct atl2_hw *hw)
2581 s16 mii_autoneg_adv_reg;
2583 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
2584 mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
2586 /* Need to parse autoneg_advertised and set up
2587 * the appropriate PHY registers. First we will parse for
2588 * autoneg_advertised software override. Since we can advertise
2589 * a plethora of combinations, we need to check each bit
2593 /* First we clear all the 10/100 mb speed bits in the Auto-Neg
2594 * Advertisement Register (Address 4) and the 1000 mb speed bits in
2595 * the 1000Base-T Control Register (Address 9). */
2596 mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
2598 /* Need to parse MediaType and setup the
2599 * appropriate PHY registers. */
2600 switch (hw->MediaType) {
2601 case MEDIA_TYPE_AUTO_SENSOR:
2602 mii_autoneg_adv_reg |=
2603 (MII_AR_10T_HD_CAPS |
2604 MII_AR_10T_FD_CAPS |
2605 MII_AR_100TX_HD_CAPS|
2606 MII_AR_100TX_FD_CAPS);
2607 hw->autoneg_advertised =
2613 case MEDIA_TYPE_100M_FULL:
2614 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
2615 hw->autoneg_advertised = ADVERTISE_100_FULL;
2617 case MEDIA_TYPE_100M_HALF:
2618 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
2619 hw->autoneg_advertised = ADVERTISE_100_HALF;
2621 case MEDIA_TYPE_10M_FULL:
2622 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
2623 hw->autoneg_advertised = ADVERTISE_10_FULL;
2626 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
2627 hw->autoneg_advertised = ADVERTISE_10_HALF;
2631 /* flow control fixed to enable all */
2632 mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
2634 hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
2636 ret_val = atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
2645 * Resets the PHY and make all config validate
2647 * hw - Struct containing variables accessed by shared code
2649 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
2651 static s32 atl2_phy_commit(struct atl2_hw *hw)
2656 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2657 ret_val = atl2_write_phy_reg(hw, MII_BMCR, phy_data);
2661 /* pcie serdes link may be down ! */
2662 for (i = 0; i < 25; i++) {
2664 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2665 if (!(val & (MDIO_START | MDIO_BUSY)))
2669 if (0 != (val & (MDIO_START | MDIO_BUSY))) {
2670 printk(KERN_ERR "atl2: PCIe link down for at least 25ms !\n");
2677 static s32 atl2_phy_init(struct atl2_hw *hw)
2682 if (hw->phy_configured)
2686 ATL2_WRITE_REGW(hw, REG_PHY_ENABLE, 1);
2687 ATL2_WRITE_FLUSH(hw);
2690 /* check if the PHY is in powersaving mode */
2691 atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2692 atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2694 /* 024E / 124E 0r 0274 / 1274 ? */
2695 if (phy_val & 0x1000) {
2697 atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val);
2702 /*Enable PHY LinkChange Interrupt */
2703 ret_val = atl2_write_phy_reg(hw, 18, 0xC00);
2707 /* setup AutoNeg parameters */
2708 ret_val = atl2_phy_setup_autoneg_adv(hw);
2712 /* SW.Reset & En-Auto-Neg to restart Auto-Neg */
2713 ret_val = atl2_phy_commit(hw);
2717 hw->phy_configured = true;
2722 static void atl2_set_mac_addr(struct atl2_hw *hw)
2725 /* 00-0B-6A-F6-00-DC
2726 * 0: 6AF600DC 1: 000B
2728 value = (((u32)hw->mac_addr[2]) << 24) |
2729 (((u32)hw->mac_addr[3]) << 16) |
2730 (((u32)hw->mac_addr[4]) << 8) |
2731 (((u32)hw->mac_addr[5]));
2732 ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);
2734 value = (((u32)hw->mac_addr[0]) << 8) |
2735 (((u32)hw->mac_addr[1]));
2736 ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);
2740 * check_eeprom_exist
2741 * return 0 if eeprom exist
2743 static int atl2_check_eeprom_exist(struct atl2_hw *hw)
2747 value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2748 if (value & SPI_FLASH_CTRL_EN_VPD) {
2749 value &= ~SPI_FLASH_CTRL_EN_VPD;
2750 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2752 value = ATL2_READ_REGW(hw, REG_PCIE_CAP_LIST);
2753 return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
2756 /* FIXME: This doesn't look right. -- CHS */
2757 static bool atl2_write_eeprom(struct atl2_hw *hw, u32 offset, u32 value)
2762 static bool atl2_read_eeprom(struct atl2_hw *hw, u32 Offset, u32 *pValue)
2768 return false; /* address do not align */
2770 ATL2_WRITE_REG(hw, REG_VPD_DATA, 0);
2771 Control = (Offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
2772 ATL2_WRITE_REG(hw, REG_VPD_CAP, Control);
2774 for (i = 0; i < 10; i++) {
2776 Control = ATL2_READ_REG(hw, REG_VPD_CAP);
2777 if (Control & VPD_CAP_VPD_FLAG)
2781 if (Control & VPD_CAP_VPD_FLAG) {
2782 *pValue = ATL2_READ_REG(hw, REG_VPD_DATA);
2785 return false; /* timeout */
2788 static void atl2_force_ps(struct atl2_hw *hw)
2792 atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2793 atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2794 atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val | 0x1000);
2796 atl2_write_phy_reg(hw, MII_DBG_ADDR, 2);
2797 atl2_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
2798 atl2_write_phy_reg(hw, MII_DBG_ADDR, 3);
2799 atl2_write_phy_reg(hw, MII_DBG_DATA, 0);
2802 /* This is the only thing that needs to be changed to adjust the
2803 * maximum number of ports that the driver can manage.
2805 #define ATL2_MAX_NIC 4
2807 #define OPTION_UNSET -1
2808 #define OPTION_DISABLED 0
2809 #define OPTION_ENABLED 1
2811 /* All parameters are treated the same, as an integer array of values.
2812 * This macro just reduces the need to repeat the same declaration code
2813 * over and over (plus this helps to avoid typo bugs).
2815 #define ATL2_PARAM_INIT {[0 ... ATL2_MAX_NIC] = OPTION_UNSET}
2816 #ifndef module_param_array
2817 /* Module Parameters are always initialized to -1, so that the driver
2818 * can tell the difference between no user specified value or the
2819 * user asking for the default value.
2820 * The true default values are loaded in when atl2_check_options is called.
2822 * This is a GCC extension to ANSI C.
2823 * See the item "Labeled Elements in Initializers" in the section
2824 * "Extensions to the C Language Family" of the GCC documentation.
2827 #define ATL2_PARAM(X, desc) \
2828 static const int X[ATL2_MAX_NIC + 1] = ATL2_PARAM_INIT; \
2829 MODULE_PARM(X, "1-" __MODULE_STRING(ATL2_MAX_NIC) "i"); \
2830 MODULE_PARM_DESC(X, desc);
2832 #define ATL2_PARAM(X, desc) \
2833 static int X[ATL2_MAX_NIC+1] = ATL2_PARAM_INIT; \
2834 static unsigned int num_##X; \
2835 module_param_array_named(X, X, int, &num_##X, 0); \
2836 MODULE_PARM_DESC(X, desc);
2840 * Transmit Memory Size
2841 * Valid Range: 64-2048
2842 * Default Value: 128
2844 #define ATL2_MIN_TX_MEMSIZE 4 /* 4KB */
2845 #define ATL2_MAX_TX_MEMSIZE 64 /* 64KB */
2846 #define ATL2_DEFAULT_TX_MEMSIZE 8 /* 8KB */
2847 ATL2_PARAM(TxMemSize, "Bytes of Transmit Memory");
2850 * Receive Memory Block Count
2851 * Valid Range: 16-512
2852 * Default Value: 128
2854 #define ATL2_MIN_RXD_COUNT 16
2855 #define ATL2_MAX_RXD_COUNT 512
2856 #define ATL2_DEFAULT_RXD_COUNT 64
2857 ATL2_PARAM(RxMemBlock, "Number of receive memory block");
2860 * User Specified MediaType Override
2863 * - 0 - auto-negotiate at all supported speeds
2864 * - 1 - only link at 1000Mbps Full Duplex
2865 * - 2 - only link at 100Mbps Full Duplex
2866 * - 3 - only link at 100Mbps Half Duplex
2867 * - 4 - only link at 10Mbps Full Duplex
2868 * - 5 - only link at 10Mbps Half Duplex
2871 ATL2_PARAM(MediaType, "MediaType Select");
2874 * Interrupt Moderate Timer in units of 2048 ns (~2 us)
2875 * Valid Range: 10-65535
2876 * Default Value: 45000(90ms)
2878 #define INT_MOD_DEFAULT_CNT 100 /* 200us */
2879 #define INT_MOD_MAX_CNT 65000
2880 #define INT_MOD_MIN_CNT 50
2881 ATL2_PARAM(IntModTimer, "Interrupt Moderator Timer");
2890 ATL2_PARAM(FlashVendor, "SPI Flash Vendor");
2892 #define AUTONEG_ADV_DEFAULT 0x2F
2893 #define AUTONEG_ADV_MASK 0x2F
2894 #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL
2896 #define FLASH_VENDOR_DEFAULT 0
2897 #define FLASH_VENDOR_MIN 0
2898 #define FLASH_VENDOR_MAX 2
2900 struct atl2_option {
2901 enum { enable_option, range_option, list_option } type;
2906 struct { /* range_option info */
2910 struct { /* list_option info */
2912 struct atl2_opt_list { int i; char *str; } *p;
2917 static int atl2_validate_option(int *value, struct atl2_option *opt)
2920 struct atl2_opt_list *ent;
2922 if (*value == OPTION_UNSET) {
2927 switch (opt->type) {
2930 case OPTION_ENABLED:
2931 printk(KERN_INFO "%s Enabled\n", opt->name);
2933 case OPTION_DISABLED:
2934 printk(KERN_INFO "%s Disabled\n", opt->name);
2939 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
2940 printk(KERN_INFO "%s set to %i\n", opt->name, *value);
2945 for (i = 0; i < opt->arg.l.nr; i++) {
2946 ent = &opt->arg.l.p[i];
2947 if (*value == ent->i) {
2948 if (ent->str[0] != '\0')
2949 printk(KERN_INFO "%s\n", ent->str);
2958 printk(KERN_INFO "Invalid %s specified (%i) %s\n",
2959 opt->name, *value, opt->err);
2965 * atl2_check_options - Range Checking for Command Line Parameters
2966 * @adapter: board private structure
2968 * This routine checks all command line parameters for valid user
2969 * input. If an invalid value is given, or if no user specified
2970 * value exists, a default value is used. The final value is stored
2971 * in a variable in the adapter structure.
2973 static void atl2_check_options(struct atl2_adapter *adapter)
2976 struct atl2_option opt;
2977 int bd = adapter->bd_number;
2978 if (bd >= ATL2_MAX_NIC) {
2979 printk(KERN_NOTICE "Warning: no configuration for board #%i\n",
2981 printk(KERN_NOTICE "Using defaults for all values\n");
2982 #ifndef module_param_array
2987 /* Bytes of Transmit Memory */
2988 opt.type = range_option;
2989 opt.name = "Bytes of Transmit Memory";
2990 opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_TX_MEMSIZE);
2991 opt.def = ATL2_DEFAULT_TX_MEMSIZE;
2992 opt.arg.r.min = ATL2_MIN_TX_MEMSIZE;
2993 opt.arg.r.max = ATL2_MAX_TX_MEMSIZE;
2994 #ifdef module_param_array
2995 if (num_TxMemSize > bd) {
2997 val = TxMemSize[bd];
2998 atl2_validate_option(&val, &opt);
2999 adapter->txd_ring_size = ((u32) val) * 1024;
3000 #ifdef module_param_array
3002 adapter->txd_ring_size = ((u32)opt.def) * 1024;
3004 /* txs ring size: */
3005 adapter->txs_ring_size = adapter->txd_ring_size / 128;
3006 if (adapter->txs_ring_size > 160)
3007 adapter->txs_ring_size = 160;
3009 /* Receive Memory Block Count */
3010 opt.type = range_option;
3011 opt.name = "Number of receive memory block";
3012 opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_RXD_COUNT);
3013 opt.def = ATL2_DEFAULT_RXD_COUNT;
3014 opt.arg.r.min = ATL2_MIN_RXD_COUNT;
3015 opt.arg.r.max = ATL2_MAX_RXD_COUNT;
3016 #ifdef module_param_array
3017 if (num_RxMemBlock > bd) {
3019 val = RxMemBlock[bd];
3020 atl2_validate_option(&val, &opt);
3021 adapter->rxd_ring_size = (u32)val;
3023 /* ((u16)val)&~1; */ /* even number */
3024 #ifdef module_param_array
3026 adapter->rxd_ring_size = (u32)opt.def;
3028 /* init RXD Flow control value */
3029 adapter->hw.fc_rxd_hi = (adapter->rxd_ring_size / 8) * 7;
3030 adapter->hw.fc_rxd_lo = (ATL2_MIN_RXD_COUNT / 8) >
3031 (adapter->rxd_ring_size / 12) ? (ATL2_MIN_RXD_COUNT / 8) :
3032 (adapter->rxd_ring_size / 12);
3034 /* Interrupt Moderate Timer */
3035 opt.type = range_option;
3036 opt.name = "Interrupt Moderate Timer";
3037 opt.err = "using default of " __MODULE_STRING(INT_MOD_DEFAULT_CNT);
3038 opt.def = INT_MOD_DEFAULT_CNT;
3039 opt.arg.r.min = INT_MOD_MIN_CNT;
3040 opt.arg.r.max = INT_MOD_MAX_CNT;
3041 #ifdef module_param_array
3042 if (num_IntModTimer > bd) {
3044 val = IntModTimer[bd];
3045 atl2_validate_option(&val, &opt);
3046 adapter->imt = (u16) val;
3047 #ifdef module_param_array
3049 adapter->imt = (u16)(opt.def);
3052 opt.type = range_option;
3053 opt.name = "SPI Flash Vendor";
3054 opt.err = "using default of " __MODULE_STRING(FLASH_VENDOR_DEFAULT);
3055 opt.def = FLASH_VENDOR_DEFAULT;
3056 opt.arg.r.min = FLASH_VENDOR_MIN;
3057 opt.arg.r.max = FLASH_VENDOR_MAX;
3058 #ifdef module_param_array
3059 if (num_FlashVendor > bd) {
3061 val = FlashVendor[bd];
3062 atl2_validate_option(&val, &opt);
3063 adapter->hw.flash_vendor = (u8) val;
3064 #ifdef module_param_array
3066 adapter->hw.flash_vendor = (u8)(opt.def);
3069 opt.type = range_option;
3070 opt.name = "Speed/Duplex Selection";
3071 opt.err = "using default of " __MODULE_STRING(MEDIA_TYPE_AUTO_SENSOR);
3072 opt.def = MEDIA_TYPE_AUTO_SENSOR;
3073 opt.arg.r.min = MEDIA_TYPE_AUTO_SENSOR;
3074 opt.arg.r.max = MEDIA_TYPE_10M_HALF;
3075 #ifdef module_param_array
3076 if (num_MediaType > bd) {
3078 val = MediaType[bd];
3079 atl2_validate_option(&val, &opt);
3080 adapter->hw.MediaType = (u16) val;
3081 #ifdef module_param_array
3083 adapter->hw.MediaType = (u16)(opt.def);