1 /* bnx2x_sriov.c: QLogic Everest network driver.
3 * Copyright 2009-2013 Broadcom Corporation
4 * Copyright 2014 QLogic Corporation
7 * Unless you and QLogic execute a separate written software license
8 * agreement governing use of this software, this software is licensed to you
9 * under the terms of the GNU General Public License version 2, available
10 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
12 * Notwithstanding the above, under no circumstances may you combine this
13 * software in any way with any other QLogic software provided under a
14 * license other than the GPL, without QLogic's express prior written
17 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
18 * Written by: Shmulik Ravid
19 * Ariel Elior <ariel.elior@qlogic.com>
23 #include "bnx2x_init.h"
24 #include "bnx2x_cmn.h"
26 #include <linux/crc32.h>
27 #include <linux/if_vlan.h>
29 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
30 struct bnx2x_virtf **vf,
31 struct pf_vf_bulletin_content **bulletin,
34 /* General service functions */
35 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
38 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
40 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
42 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
44 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
48 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
51 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
53 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
55 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
57 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
61 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
66 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
72 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
74 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
75 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
78 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
79 u8 igu_sb_id, u8 segment, u16 index, u8 op,
82 /* acking a VF sb through the PF - use the GRC */
84 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
85 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
86 u32 func_encode = vf->abs_vfid;
87 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
88 struct igu_regular cmd_data = {0};
90 cmd_data.sb_id_and_flags =
91 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
92 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
93 (update << IGU_REGULAR_BUPDATE_SHIFT) |
94 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
96 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
97 func_encode << IGU_CTRL_REG_FID_SHIFT |
98 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
100 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
101 cmd_data.sb_id_and_flags, igu_addr_data);
102 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
106 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
108 REG_WR(bp, igu_addr_ctl, ctl);
113 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
114 struct bnx2x_virtf *vf,
117 if (!bnx2x_leading_vfq(vf, sp_initialized)) {
119 BNX2X_ERR("Slowpath objects not yet initialized!\n");
121 DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
127 /* VFOP operations states */
128 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
129 struct bnx2x_queue_init_params *init_params,
130 struct bnx2x_queue_setup_params *setup_params,
131 u16 q_idx, u16 sb_idx)
134 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
138 init_params->tx.sb_cq_index,
139 init_params->tx.hc_rate,
141 setup_params->txq_params.traffic_type);
144 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
145 struct bnx2x_queue_init_params *init_params,
146 struct bnx2x_queue_setup_params *setup_params,
147 u16 q_idx, u16 sb_idx)
149 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
151 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
152 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
156 init_params->rx.sb_cq_index,
157 init_params->rx.hc_rate,
158 setup_params->gen_params.mtu,
160 rxq_params->sge_buf_sz,
161 rxq_params->max_sges_pkt,
162 rxq_params->tpa_agg_sz,
164 rxq_params->drop_flags,
165 rxq_params->cache_line_log);
168 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
169 struct bnx2x_virtf *vf,
170 struct bnx2x_vf_queue *q,
171 struct bnx2x_vf_queue_construct_params *p,
172 unsigned long q_type)
174 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
175 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
179 /* Enable host coalescing in the transition to INIT state */
180 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
181 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
183 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
184 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
187 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
188 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
191 init_p->cxts[0] = q->cxt;
195 /* Setup-op general parameters */
196 setup_p->gen_params.spcl_id = vf->sp_cl_id;
197 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
198 setup_p->gen_params.fp_hsi = vf->fp_hsi;
201 * collect statistics, zero statistics, local-switching, security,
202 * OV for Flex10, RSS and MCAST for leading
204 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
205 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
207 /* for VFs, enable tx switching, bd coherency, and mac address
210 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
211 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
213 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
215 __clear_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
217 /* Setup-op rx parameters */
218 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
219 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
221 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
222 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
223 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
225 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
226 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
229 /* Setup-op tx parameters */
230 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
231 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
232 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
236 static int bnx2x_vf_queue_create(struct bnx2x *bp,
237 struct bnx2x_virtf *vf, int qid,
238 struct bnx2x_vf_queue_construct_params *qctor)
240 struct bnx2x_queue_state_params *q_params;
243 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
245 /* Prepare ramrod information */
246 q_params = &qctor->qstate;
247 q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
248 set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
250 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
251 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
252 DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
256 /* Run Queue 'construction' ramrods */
257 q_params->cmd = BNX2X_Q_CMD_INIT;
258 rc = bnx2x_queue_state_change(bp, q_params);
262 memcpy(&q_params->params.setup, &qctor->prep_qsetup,
263 sizeof(struct bnx2x_queue_setup_params));
264 q_params->cmd = BNX2X_Q_CMD_SETUP;
265 rc = bnx2x_queue_state_change(bp, q_params);
269 /* enable interrupts */
270 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
271 USTORM_ID, 0, IGU_INT_ENABLE, 0);
276 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
279 enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
280 BNX2X_Q_CMD_TERMINATE,
281 BNX2X_Q_CMD_CFC_DEL};
282 struct bnx2x_queue_state_params q_params;
285 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
287 /* Prepare ramrod information */
288 memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
289 q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
290 set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
292 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
293 BNX2X_Q_LOGICAL_STATE_STOPPED) {
294 DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
298 /* Run Queue 'destruction' ramrods */
299 for (i = 0; i < ARRAY_SIZE(cmds); i++) {
300 q_params.cmd = cmds[i];
301 rc = bnx2x_queue_state_change(bp, &q_params);
303 BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
309 if (bnx2x_vfq(vf, qid, cxt)) {
310 bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
311 bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
318 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
320 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
322 /* the first igu entry belonging to VFs of this PF */
323 if (!BP_VFDB(bp)->first_vf_igu_entry)
324 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
326 /* the first igu entry belonging to this VF */
327 if (!vf_sb_count(vf))
328 vf->igu_base_id = igu_sb_id;
333 BP_VFDB(bp)->vf_sbs_pool++;
336 static inline void bnx2x_vf_vlan_credit(struct bnx2x *bp,
337 struct bnx2x_vlan_mac_obj *obj,
340 struct list_head *pos;
344 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
346 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
348 list_for_each(pos, &obj->head)
352 bnx2x_vlan_mac_h_read_unlock(bp, obj);
354 atomic_set(counter, cnt);
357 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
358 int qid, bool drv_only, int type)
360 struct bnx2x_vlan_mac_ramrod_params ramrod;
363 DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
364 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
365 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
367 /* Prepare ramrod params */
368 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
369 if (type == BNX2X_VF_FILTER_VLAN_MAC) {
370 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
371 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
372 } else if (type == BNX2X_VF_FILTER_MAC) {
373 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
374 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
376 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
378 ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
380 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
382 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
384 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
387 rc = ramrod.vlan_mac_obj->delete_all(bp,
389 &ramrod.user_req.vlan_mac_flags,
390 &ramrod.ramrod_flags);
392 BNX2X_ERR("Failed to delete all %s\n",
393 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
394 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
401 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
402 struct bnx2x_virtf *vf, int qid,
403 struct bnx2x_vf_mac_vlan_filter *filter,
406 struct bnx2x_vlan_mac_ramrod_params ramrod;
409 DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
410 vf->abs_vfid, filter->add ? "Adding" : "Deleting",
411 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :
412 (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");
414 /* Prepare ramrod params */
415 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
416 if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {
417 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
418 ramrod.user_req.u.vlan.vlan = filter->vid;
419 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
420 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
421 } else if (filter->type == BNX2X_VF_FILTER_VLAN) {
422 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
423 ramrod.user_req.u.vlan.vlan = filter->vid;
425 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
426 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
427 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
429 ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
432 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
434 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
436 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
438 /* Add/Remove the filter */
439 rc = bnx2x_config_vlan_mac(bp, &ramrod);
443 BNX2X_ERR("Failed to %s %s\n",
444 filter->add ? "add" : "delete",
445 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?
447 (filter->type == BNX2X_VF_FILTER_MAC) ?
452 filter->applied = true;
457 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
458 struct bnx2x_vf_mac_vlan_filters *filters,
459 int qid, bool drv_only)
463 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
465 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
468 /* Prepare ramrod params */
469 for (i = 0; i < filters->count; i++) {
470 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
471 &filters->filters[i], drv_only);
476 /* Rollback if needed */
477 if (i != filters->count) {
478 BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
481 if (!filters->filters[i].applied)
483 filters->filters[i].add = !filters->filters[i].add;
484 bnx2x_vf_mac_vlan_config(bp, vf, qid,
485 &filters->filters[i],
490 /* It's our responsibility to free the filters */
496 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
497 struct bnx2x_vf_queue_construct_params *qctor)
501 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
503 rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
507 /* Schedule the configuration of any pending vlan filters */
508 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
512 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
516 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
521 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
523 /* If needed, clean the filtering data base */
524 if ((qid == LEADING_IDX) &&
525 bnx2x_validate_vf_sp_objs(bp, vf, false)) {
526 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
527 BNX2X_VF_FILTER_VLAN_MAC);
530 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
531 BNX2X_VF_FILTER_VLAN);
534 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
535 BNX2X_VF_FILTER_MAC);
540 /* Terminate queue */
541 if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
542 struct bnx2x_queue_state_params qstate;
544 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
545 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
546 qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
547 qstate.cmd = BNX2X_Q_CMD_TERMINATE;
548 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
549 rc = bnx2x_queue_state_change(bp, &qstate);
556 BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
560 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
561 bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
563 struct bnx2x_mcast_list_elem *mc = NULL;
564 struct bnx2x_mcast_ramrod_params mcast;
567 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
569 /* Prepare Multicast command */
570 memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
571 mcast.mcast_obj = &vf->mcast_obj;
573 set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
575 set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
577 mc = kcalloc(mc_num, sizeof(struct bnx2x_mcast_list_elem),
580 BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
586 INIT_LIST_HEAD(&mcast.mcast_list);
587 for (i = 0; i < mc_num; i++) {
588 mc[i].mac = mcasts[i];
589 list_add_tail(&mc[i].link,
594 mcast.mcast_list_len = mc_num;
595 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_SET);
597 BNX2X_ERR("Failed to set multicasts\n");
599 /* clear existing mcasts */
600 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
602 BNX2X_ERR("Failed to remove multicasts\n");
610 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
611 struct bnx2x_rx_mode_ramrod_params *ramrod,
612 struct bnx2x_virtf *vf,
613 unsigned long accept_flags)
615 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
617 memset(ramrod, 0, sizeof(*ramrod));
618 ramrod->cid = vfq->cid;
619 ramrod->cl_id = vfq_cl_id(vf, vfq);
620 ramrod->rx_mode_obj = &bp->rx_mode_obj;
621 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
622 ramrod->rx_accept_flags = accept_flags;
623 ramrod->tx_accept_flags = accept_flags;
624 ramrod->pstate = &vf->filter_state;
625 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
627 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
628 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
629 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
631 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
632 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
635 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
636 int qid, unsigned long accept_flags)
638 struct bnx2x_rx_mode_ramrod_params ramrod;
640 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
642 bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
643 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
644 vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
645 return bnx2x_config_rx_mode(bp, &ramrod);
648 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
652 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
654 /* Remove all classification configuration for leading queue */
655 if (qid == LEADING_IDX) {
656 rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
660 /* Remove filtering if feasible */
661 if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
662 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
664 BNX2X_VF_FILTER_VLAN_MAC);
667 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
669 BNX2X_VF_FILTER_VLAN);
672 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
674 BNX2X_VF_FILTER_MAC);
677 rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
684 rc = bnx2x_vf_queue_destroy(bp, vf, qid);
689 BNX2X_ERR("vf[%d:%d] error: rc %d\n",
690 vf->abs_vfid, qid, rc);
694 /* VF enable primitives
695 * when pretend is required the caller is responsible
696 * for calling pretend prior to calling these routines
699 /* internal vf enable - until vf is enabled internally all transactions
700 * are blocked. This routine should always be called last with pretend.
702 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
704 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
707 /* clears vf error in all semi blocks */
708 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
710 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
711 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
712 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
713 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
716 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
718 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
721 switch (was_err_group) {
723 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
726 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
729 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
732 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
735 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
738 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
743 /* Set VF masks and configuration - pretend */
744 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
746 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
747 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
748 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
749 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
750 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
751 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
753 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
754 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
755 val &= ~IGU_VF_CONF_PARENT_MASK;
756 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
757 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
760 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
763 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
765 /* iterate over all queues, clear sb consumer */
766 for (i = 0; i < vf_sb_count(vf); i++) {
767 u8 igu_sb_id = vf_igu_sb(vf, i);
769 /* zero prod memory */
770 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
772 /* clear sb state machine */
773 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
776 /* disable + update */
777 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
782 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
784 /* set the VF-PF association in the FW */
785 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
786 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
789 bnx2x_vf_semi_clear_err(bp, abs_vfid);
790 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
792 /* internal vf-enable - pretend */
793 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
794 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
795 bnx2x_vf_enable_internal(bp, true);
796 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
799 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
801 /* Reset vf in IGU interrupts are still disabled */
802 bnx2x_vf_igu_reset(bp, vf);
804 /* pretend to enable the vf with the PBF */
805 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
806 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
807 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
810 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
813 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
818 dev = pci_get_domain_bus_and_slot(vf->domain, vf->bus, vf->devfn);
820 return bnx2x_is_pcie_pending(dev);
824 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
826 /* Verify no pending pci transactions */
827 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
828 BNX2X_ERR("PCIE Transactions still pending\n");
833 /* must be called after the number of PF queues and the number of VFs are
837 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
839 struct vf_pf_resc_request *resc = &vf->alloc_resc;
841 /* will be set only during VF-ACQUIRE */
845 resc->num_mac_filters = VF_MAC_CREDIT_CNT;
846 resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;
848 /* no real limitation */
849 resc->num_mc_filters = 0;
851 /* num_sbs already set */
852 resc->num_sbs = vf->sb_count;
856 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
858 /* reset the state variables */
859 bnx2x_iov_static_resc(bp, vf);
863 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
865 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
867 /* DQ usage counter */
868 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
869 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
870 "DQ VF usage counter timed out",
872 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
874 /* FW cleanup command - poll for the results */
875 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
877 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
879 /* verify TX hw is flushed */
880 bnx2x_tx_hw_flushed(bp, poll_cnt);
883 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
887 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
889 /* the cleanup operations are valid if and only if the VF
890 * was first acquired.
892 for (i = 0; i < vf_rxq_count(vf); i++) {
893 rc = bnx2x_vf_queue_flr(bp, vf, i);
898 /* remove multicasts */
899 bnx2x_vf_mcast(bp, vf, NULL, 0, true);
901 /* dispatch final cleanup and wait for HW queues to flush */
902 bnx2x_vf_flr_clnup_hw(bp, vf);
904 /* release VF resources */
905 bnx2x_vf_free_resc(bp, vf);
907 vf->malicious = false;
909 /* re-open the mailbox */
910 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
913 BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
914 vf->abs_vfid, i, rc);
917 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
919 struct bnx2x_virtf *vf;
922 for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
923 /* VF should be RESET & in FLR cleanup states */
924 if (bnx2x_vf(bp, i, state) != VF_RESET ||
925 !bnx2x_vf(bp, i, flr_clnup_stage))
928 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
929 i, BNX2X_NR_VIRTFN(bp));
933 /* lock the vf pf channel */
934 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
936 /* invoke the VF FLR SM */
937 bnx2x_vf_flr(bp, vf);
939 /* mark the VF to be ACKED and continue */
940 vf->flr_clnup_stage = false;
941 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
944 /* Acknowledge the handled VFs.
945 * we are acknowledge all the vfs which an flr was requested for, even
946 * if amongst them there are such that we never opened, since the mcp
947 * will interrupt us immediately again if we only ack some of the bits,
948 * resulting in an endless loop. This can happen for example in KVM
949 * where an 'all ones' flr request is sometimes given by hyper visor
951 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
952 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
953 for (i = 0; i < FLRD_VFS_DWORDS; i++)
954 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
955 bp->vfdb->flrd_vfs[i]);
957 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
959 /* clear the acked bits - better yet if the MCP implemented
960 * write to clear semantics
962 for (i = 0; i < FLRD_VFS_DWORDS; i++)
963 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
966 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
971 for (i = 0; i < FLRD_VFS_DWORDS; i++)
972 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
975 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
976 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
979 struct bnx2x_virtf *vf = BP_VF(bp, i);
982 if (vf->abs_vfid < 32)
983 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
985 reset = bp->vfdb->flrd_vfs[1] &
986 (1 << (vf->abs_vfid - 32));
989 /* set as reset and ready for cleanup */
990 vf->state = VF_RESET;
991 vf->flr_clnup_stage = true;
994 "Initiating Final cleanup for VF %d\n",
999 /* do the FLR cleanup for all marked VFs*/
1000 bnx2x_vf_flr_clnup(bp);
1003 /* IOV global initialization routines */
1004 void bnx2x_iov_init_dq(struct bnx2x *bp)
1009 /* Set the DQ such that the CID reflect the abs_vfid */
1010 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1011 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1013 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1016 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1018 /* The VF window size is the log2 of the max number of CIDs per VF */
1019 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1021 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1022 * the Pf doorbell size although the 2 are independent.
1024 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1026 /* No security checks for now -
1027 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1028 * CID range 0 - 0x1ffff
1030 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1031 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1032 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1033 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1035 /* set the VF doorbell threshold. This threshold represents the amount
1036 * of doorbells allowed in the main DORQ fifo for a specific VF.
1038 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1041 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1043 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1044 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1047 static int bnx2x_vf_domain(struct bnx2x *bp, int vfid)
1049 struct pci_dev *dev = bp->pdev;
1051 return pci_domain_nr(dev->bus);
1054 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1056 struct pci_dev *dev = bp->pdev;
1057 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1059 return dev->bus->number + ((dev->devfn + iov->offset +
1060 iov->stride * vfid) >> 8);
1063 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1065 struct pci_dev *dev = bp->pdev;
1066 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1068 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1071 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1074 struct pci_dev *dev = bp->pdev;
1075 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1077 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1078 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1079 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1082 vf->bars[n].bar = start + size * vf->abs_vfid;
1083 vf->bars[n].size = size;
1088 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1092 u8 fid, current_pf = 0;
1094 /* IGU in normal mode - read CAM */
1095 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1096 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1097 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1099 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1100 if (fid & IGU_FID_ENCODE_IS_PF)
1101 current_pf = fid & IGU_FID_PF_NUM_MASK;
1102 else if (current_pf == BP_FUNC(bp))
1103 bnx2x_vf_set_igu_info(bp, sb_id,
1104 (fid & IGU_FID_VF_NUM_MASK));
1105 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1106 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1107 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1108 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1109 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1111 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1112 return BP_VFDB(bp)->vf_sbs_pool;
1115 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1118 kfree(bp->vfdb->vfqs);
1119 kfree(bp->vfdb->vfs);
1125 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1128 struct pci_dev *dev = bp->pdev;
1130 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1132 BNX2X_ERR("failed to find SRIOV capability in device\n");
1137 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1138 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1139 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1140 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1141 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1142 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1143 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1144 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1145 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1150 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1154 /* read the SRIOV capability structure
1155 * The fields can be read via configuration read or
1156 * directly from the device (starting at offset PCICFG_OFFSET)
1158 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1161 /* get the number of SRIOV bars */
1164 /* read the first_vfid */
1165 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1166 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1167 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1170 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1172 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1173 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1178 /* must be called after PF bars are mapped */
1179 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1183 struct bnx2x_sriov *iov;
1184 struct pci_dev *dev = bp->pdev;
1192 /* verify sriov capability is present in configuration space */
1193 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1196 /* verify chip revision */
1197 if (CHIP_IS_E1x(bp))
1200 /* check if SRIOV support is turned off */
1204 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1205 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1206 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1207 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1211 /* SRIOV can be enabled only with MSIX */
1212 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1213 int_mode_param == BNX2X_INT_MODE_INTX) {
1214 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1219 /* verify ari is enabled */
1220 if (!pci_ari_enabled(bp->pdev->bus)) {
1221 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1225 /* verify igu is in normal mode */
1226 if (CHIP_INT_MODE_IS_BC(bp)) {
1227 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1231 /* allocate the vfs database */
1232 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1234 BNX2X_ERR("failed to allocate vf database\n");
1239 /* get the sriov info - Linux already collected all the pertinent
1240 * information, however the sriov structure is for the private use
1241 * of the pci module. Also we want this information regardless
1242 * of the hyper-visor.
1244 iov = &(bp->vfdb->sriov);
1245 err = bnx2x_sriov_info(bp, iov);
1249 /* SR-IOV capability was enabled but there are no VFs*/
1250 if (iov->total == 0)
1253 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1255 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1256 num_vfs_param, iov->nr_virtfn);
1258 /* allocate the vf array */
1259 bp->vfdb->vfs = kcalloc(BNX2X_NR_VIRTFN(bp),
1260 sizeof(struct bnx2x_virtf),
1262 if (!bp->vfdb->vfs) {
1263 BNX2X_ERR("failed to allocate vf array\n");
1268 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1269 for_each_vf(bp, i) {
1270 bnx2x_vf(bp, i, index) = i;
1271 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1272 bnx2x_vf(bp, i, state) = VF_FREE;
1273 mutex_init(&bnx2x_vf(bp, i, op_mutex));
1274 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1275 /* enable spoofchk by default */
1276 bnx2x_vf(bp, i, spoofchk) = 1;
1279 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1280 if (!bnx2x_get_vf_igu_cam_info(bp)) {
1281 BNX2X_ERR("No entries in IGU CAM for vfs\n");
1286 /* allocate the queue arrays for all VFs */
1287 bp->vfdb->vfqs = kcalloc(BNX2X_MAX_NUM_VF_QUEUES,
1288 sizeof(struct bnx2x_vf_queue),
1291 if (!bp->vfdb->vfqs) {
1292 BNX2X_ERR("failed to allocate vf queue array\n");
1297 /* Prepare the VFs event synchronization mechanism */
1298 mutex_init(&bp->vfdb->event_mutex);
1300 mutex_init(&bp->vfdb->bulletin_mutex);
1302 if (SHMEM2_HAS(bp, sriov_switch_mode))
1303 SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);
1307 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1308 __bnx2x_iov_free_vfdb(bp);
1312 void bnx2x_iov_remove_one(struct bnx2x *bp)
1316 /* if SRIOV is not enabled there's nothing to do */
1320 bnx2x_disable_sriov(bp);
1322 /* disable access to all VFs */
1323 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1324 bnx2x_pretend_func(bp,
1326 bp->vfdb->sriov.first_vf_in_pf +
1328 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1329 bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1330 bnx2x_vf_enable_internal(bp, 0);
1331 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1334 /* free vf database */
1335 __bnx2x_iov_free_vfdb(bp);
1338 void bnx2x_iov_free_mem(struct bnx2x *bp)
1345 /* free vfs hw contexts */
1346 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1347 struct hw_dma *cxt = &bp->vfdb->context[i];
1348 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1351 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1352 BP_VFDB(bp)->sp_dma.mapping,
1353 BP_VFDB(bp)->sp_dma.size);
1355 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1356 BP_VF_MBX_DMA(bp)->mapping,
1357 BP_VF_MBX_DMA(bp)->size);
1359 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1360 BP_VF_BULLETIN_DMA(bp)->mapping,
1361 BP_VF_BULLETIN_DMA(bp)->size);
1364 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1372 /* allocate vfs hw contexts */
1373 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1374 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1376 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1377 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1378 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1381 cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1388 tot_size -= cxt->size;
1391 /* allocate vfs ramrods dma memory - client_init and set_mac */
1392 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1393 BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1395 if (!BP_VFDB(bp)->sp_dma.addr)
1397 BP_VFDB(bp)->sp_dma.size = tot_size;
1399 /* allocate mailboxes */
1400 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1401 BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1403 if (!BP_VF_MBX_DMA(bp)->addr)
1406 BP_VF_MBX_DMA(bp)->size = tot_size;
1408 /* allocate local bulletin boards */
1409 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1410 BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1412 if (!BP_VF_BULLETIN_DMA(bp)->addr)
1415 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1423 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1424 struct bnx2x_vf_queue *q)
1426 u8 cl_id = vfq_cl_id(vf, q);
1427 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1428 unsigned long q_type = 0;
1430 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1431 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1433 /* Queue State object */
1434 bnx2x_init_queue_obj(bp, &q->sp_obj,
1435 cl_id, &q->cid, 1, func_id,
1436 bnx2x_vf_sp(bp, vf, q_data),
1437 bnx2x_vf_sp_map(bp, vf, q_data),
1440 /* sp indication is set only when vlan/mac/etc. are initialized */
1441 q->sp_initialized = false;
1444 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1445 vf->abs_vfid, q->sp_obj.func_id, q->cid);
1448 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1450 u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1453 (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1456 return 10000; /* assume lowest supported speed is 10G */
1459 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1461 struct bnx2x_link_report_data *state = &bp->last_reported_link;
1462 struct pf_vf_bulletin_content *bulletin;
1463 struct bnx2x_virtf *vf;
1467 /* sanity and init */
1468 rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1472 mutex_lock(&bp->vfdb->bulletin_mutex);
1474 if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1475 bulletin->valid_bitmap |= 1 << LINK_VALID;
1477 bulletin->link_speed = state->line_speed;
1478 bulletin->link_flags = 0;
1479 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1480 &state->link_report_flags))
1481 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1482 if (test_bit(BNX2X_LINK_REPORT_FD,
1483 &state->link_report_flags))
1484 bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1485 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1486 &state->link_report_flags))
1487 bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1488 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1489 &state->link_report_flags))
1490 bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1491 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1492 !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1493 bulletin->valid_bitmap |= 1 << LINK_VALID;
1494 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1495 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1496 (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1497 bulletin->valid_bitmap |= 1 << LINK_VALID;
1498 bulletin->link_speed = bnx2x_max_speed_cap(bp);
1499 bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1505 DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1506 "vf %d mode %u speed %d flags %x\n", idx,
1507 vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1509 /* Post update on VF's bulletin board */
1510 rc = bnx2x_post_vf_bulletin(bp, idx);
1512 BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1518 mutex_unlock(&bp->vfdb->bulletin_mutex);
1522 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1524 struct bnx2x *bp = netdev_priv(dev);
1525 struct bnx2x_virtf *vf = BP_VF(bp, idx);
1530 if (vf->link_cfg == link_state)
1531 return 0; /* nothing todo */
1533 vf->link_cfg = link_state;
1535 return bnx2x_iov_link_update_vf(bp, idx);
1538 void bnx2x_iov_link_update(struct bnx2x *bp)
1545 for_each_vf(bp, vfid)
1546 bnx2x_iov_link_update_vf(bp, vfid);
1549 /* called by bnx2x_nic_load */
1550 int bnx2x_iov_nic_init(struct bnx2x *bp)
1554 if (!IS_SRIOV(bp)) {
1555 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1559 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1561 /* let FLR complete ... */
1564 /* initialize vf database */
1565 for_each_vf(bp, vfid) {
1566 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1568 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1571 union cdu_context *base_cxt = (union cdu_context *)
1572 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1573 (base_vf_cid & (ILT_PAGE_CIDS-1));
1576 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1577 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1578 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1580 /* init statically provisioned resources */
1581 bnx2x_iov_static_resc(bp, vf);
1583 /* queues are initialized during VF-ACQUIRE */
1584 vf->filter_state = 0;
1585 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1587 bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,
1588 vf_vlan_rules_cnt(vf));
1589 bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,
1590 vf_mac_rules_cnt(vf));
1592 /* init mcast object - This object will be re-initialized
1593 * during VF-ACQUIRE with the proper cl_id and cid.
1594 * It needs to be initialized here so that it can be safely
1595 * handled by a subsequent FLR flow.
1597 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1599 bnx2x_vf_sp(bp, vf, mcast_rdata),
1600 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1601 BNX2X_FILTER_MCAST_PENDING,
1603 BNX2X_OBJ_TYPE_RX_TX);
1605 /* set the mailbox message addresses */
1606 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1607 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1608 MBX_MSG_ALIGNED_SIZE);
1610 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1611 vfid * MBX_MSG_ALIGNED_SIZE;
1613 /* Enable vf mailbox */
1614 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1618 for_each_vf(bp, vfid) {
1619 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1621 /* fill in the BDF and bars */
1622 vf->domain = bnx2x_vf_domain(bp, vfid);
1623 vf->bus = bnx2x_vf_bus(bp, vfid);
1624 vf->devfn = bnx2x_vf_devfn(bp, vfid);
1625 bnx2x_vf_set_bars(bp, vf);
1628 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1629 vf->abs_vfid, vf->bus, vf->devfn,
1630 (unsigned)vf->bars[0].bar, vf->bars[0].size,
1631 (unsigned)vf->bars[1].bar, vf->bars[1].size,
1632 (unsigned)vf->bars[2].bar, vf->bars[2].size);
1638 /* called by bnx2x_chip_cleanup */
1639 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1646 /* release all the VFs */
1648 bnx2x_vf_release(bp, BP_VF(bp, i));
1653 /* called by bnx2x_init_hw_func, returns the next ilt line */
1654 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1657 struct bnx2x_ilt *ilt = BP_ILT(bp);
1662 /* set vfs ilt lines */
1663 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1664 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1666 ilt->lines[line+i].page = hw_cxt->addr;
1667 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1668 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1673 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1675 return ((cid >= BNX2X_FIRST_VF_CID) &&
1676 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1680 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1681 struct bnx2x_vf_queue *vfq,
1682 union event_ring_elem *elem)
1684 unsigned long ramrod_flags = 0;
1686 u32 echo = le32_to_cpu(elem->message.data.eth_event.echo);
1688 /* Always push next commands out, don't wait here */
1689 set_bit(RAMROD_CONT, &ramrod_flags);
1691 switch (echo >> BNX2X_SWCID_SHIFT) {
1692 case BNX2X_FILTER_MAC_PENDING:
1693 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1696 case BNX2X_FILTER_VLAN_PENDING:
1697 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1701 BNX2X_ERR("Unsupported classification command: 0x%x\n", echo);
1705 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1707 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1711 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1712 struct bnx2x_virtf *vf)
1714 struct bnx2x_mcast_ramrod_params rparam = {NULL};
1717 rparam.mcast_obj = &vf->mcast_obj;
1718 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1720 /* If there are pending mcast commands - send them */
1721 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1722 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1724 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1730 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1731 struct bnx2x_virtf *vf)
1733 smp_mb__before_atomic();
1734 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1735 smp_mb__after_atomic();
1738 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1739 struct bnx2x_virtf *vf)
1741 vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1744 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1746 struct bnx2x_virtf *vf;
1747 int qidx = 0, abs_vfid;
1754 /* first get the cid - the only events we handle here are cfc-delete
1755 * and set-mac completion
1757 opcode = elem->message.opcode;
1760 case EVENT_RING_OPCODE_CFC_DEL:
1761 cid = SW_CID(elem->message.data.cfc_del_event.cid);
1762 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1764 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1765 case EVENT_RING_OPCODE_MULTICAST_RULES:
1766 case EVENT_RING_OPCODE_FILTERS_RULES:
1767 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1768 cid = SW_CID(elem->message.data.eth_event.echo);
1769 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1771 case EVENT_RING_OPCODE_VF_FLR:
1772 abs_vfid = elem->message.data.vf_flr_event.vf_id;
1773 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1776 case EVENT_RING_OPCODE_MALICIOUS_VF:
1777 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1778 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1780 elem->message.data.malicious_vf_event.err_id);
1786 /* check if the cid is the VF range */
1787 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1788 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1792 /* extract vf and rxq index from vf_cid - relies on the following:
1793 * 1. vfid on cid reflects the true abs_vfid
1794 * 2. The max number of VFs (per path) is 64
1796 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1797 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1799 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1802 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1808 case EVENT_RING_OPCODE_CFC_DEL:
1809 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1810 vf->abs_vfid, qidx);
1811 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1814 BNX2X_Q_CMD_CFC_DEL);
1816 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1817 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1818 vf->abs_vfid, qidx);
1819 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1821 case EVENT_RING_OPCODE_MULTICAST_RULES:
1822 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1823 vf->abs_vfid, qidx);
1824 bnx2x_vf_handle_mcast_eqe(bp, vf);
1826 case EVENT_RING_OPCODE_FILTERS_RULES:
1827 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1828 vf->abs_vfid, qidx);
1829 bnx2x_vf_handle_filters_eqe(bp, vf);
1831 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1832 DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1833 vf->abs_vfid, qidx);
1834 bnx2x_vf_handle_rss_update_eqe(bp, vf);
1836 case EVENT_RING_OPCODE_VF_FLR:
1837 /* Do nothing for now */
1839 case EVENT_RING_OPCODE_MALICIOUS_VF:
1840 vf->malicious = true;
1847 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1849 /* extract the vf from vf_cid - relies on the following:
1850 * 1. vfid on cid reflects the true abs_vfid
1851 * 2. The max number of VFs (per path) is 64
1853 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1854 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1857 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1858 struct bnx2x_queue_sp_obj **q_obj)
1860 struct bnx2x_virtf *vf;
1865 vf = bnx2x_vf_by_cid(bp, vf_cid);
1868 /* extract queue index from vf_cid - relies on the following:
1869 * 1. vfid on cid reflects the true abs_vfid
1870 * 2. The max number of VFs (per path) is 64
1872 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1873 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1875 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1879 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1882 int first_queue_query_index, num_queues_req;
1883 dma_addr_t cur_data_offset;
1884 struct stats_query_entry *cur_query_entry;
1886 bool is_fcoe = false;
1894 /* fcoe adds one global request and one queue request */
1895 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1896 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1899 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1900 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1901 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1902 first_queue_query_index + num_queues_req);
1904 cur_data_offset = bp->fw_stats_data_mapping +
1905 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
1906 num_queues_req * sizeof(struct per_queue_stats);
1908 cur_query_entry = &bp->fw_stats_req->
1909 query[first_queue_query_index + num_queues_req];
1911 for_each_vf(bp, i) {
1913 struct bnx2x_virtf *vf = BP_VF(bp, i);
1915 if (vf->state != VF_ENABLED) {
1916 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1917 "vf %d not enabled so no stats for it\n",
1922 if (vf->malicious) {
1923 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1924 "vf %d malicious so no stats for it\n",
1929 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1930 "add addresses for vf %d\n", vf->abs_vfid);
1931 for_each_vfq(vf, j) {
1932 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1934 dma_addr_t q_stats_addr =
1935 vf->fw_stat_map + j * vf->stats_stride;
1937 /* collect stats fro active queues only */
1938 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1939 BNX2X_Q_LOGICAL_STATE_STOPPED)
1942 /* create stats query entry for this queue */
1943 cur_query_entry->kind = STATS_TYPE_QUEUE;
1944 cur_query_entry->index = vfq_stat_id(vf, rxq);
1945 cur_query_entry->funcID =
1946 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1947 cur_query_entry->address.hi =
1948 cpu_to_le32(U64_HI(q_stats_addr));
1949 cur_query_entry->address.lo =
1950 cpu_to_le32(U64_LO(q_stats_addr));
1951 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1952 "added address %x %x for vf %d queue %d client %d\n",
1953 cur_query_entry->address.hi,
1954 cur_query_entry->address.lo,
1955 cur_query_entry->funcID,
1956 j, cur_query_entry->index);
1958 cur_data_offset += sizeof(struct per_queue_stats);
1961 /* all stats are coalesced to the leading queue */
1962 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1966 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1969 /* VF API helpers */
1970 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1973 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1974 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1976 REG_WR(bp, reg, val);
1979 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
1984 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
1985 vfq_qzone_id(vf, vfq_get(vf, i)), false);
1988 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
1992 /* clear the VF configuration - pretend */
1993 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1994 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1995 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
1996 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
1997 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1998 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2001 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
2003 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
2004 BNX2X_VF_MAX_QUEUES);
2008 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2009 struct vf_pf_resc_request *req_resc)
2011 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2012 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2014 return ((req_resc->num_rxqs <= rxq_cnt) &&
2015 (req_resc->num_txqs <= txq_cnt) &&
2016 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2017 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2018 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2022 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2023 struct vf_pf_resc_request *resc)
2025 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2028 union cdu_context *base_cxt = (union cdu_context *)
2029 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2030 (base_vf_cid & (ILT_PAGE_CIDS-1));
2033 /* if state is 'acquired' the VF was not released or FLR'd, in
2034 * this case the returned resources match the acquired already
2035 * acquired resources. Verify that the requested numbers do
2036 * not exceed the already acquired numbers.
2038 if (vf->state == VF_ACQUIRED) {
2039 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2042 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2043 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2050 /* Otherwise vf state must be 'free' or 'reset' */
2051 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2052 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2053 vf->abs_vfid, vf->state);
2057 /* static allocation:
2058 * the global maximum number are fixed per VF. Fail the request if
2059 * requested number exceed these globals
2061 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2063 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2064 /* set the max resource in the vf */
2068 /* Set resources counters - 0 request means max available */
2069 vf_sb_count(vf) = resc->num_sbs;
2070 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2071 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2074 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2075 vf_sb_count(vf), vf_rxq_count(vf),
2076 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2077 vf_vlan_rules_cnt(vf));
2079 /* Initialize the queues */
2081 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2085 for_each_vfq(vf, i) {
2086 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2089 BNX2X_ERR("q number %d was not allocated\n", i);
2094 q->cxt = &((base_cxt + i)->eth);
2095 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2097 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2098 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2100 /* init SP objects */
2101 bnx2x_vfq_init(bp, vf, q);
2103 vf->state = VF_ACQUIRED;
2107 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2109 struct bnx2x_func_init_params func_init = {0};
2112 /* the sb resources are initialized at this point, do the
2113 * FW/HW initializations
2115 for_each_vf_sb(vf, i)
2116 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2117 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2120 if (vf->state != VF_ACQUIRED) {
2121 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2122 vf->abs_vfid, vf->state);
2126 /* let FLR complete ... */
2129 /* FLR cleanup epilogue */
2130 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2133 /* reset IGU VF statistics: MSIX */
2134 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2136 /* function setup */
2137 func_init.pf_id = BP_FUNC(bp);
2138 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2139 bnx2x_func_init(bp, &func_init);
2142 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2143 bnx2x_vf_enable_traffic(bp, vf);
2145 /* queue protection table */
2147 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2148 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2150 vf->state = VF_ENABLED;
2152 /* update vf bulletin board */
2153 bnx2x_post_vf_bulletin(bp, vf->index);
2158 struct set_vf_state_cookie {
2159 struct bnx2x_virtf *vf;
2163 static void bnx2x_set_vf_state(void *cookie)
2165 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2167 p->vf->state = p->state;
2170 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2174 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2176 /* Close all queues */
2177 for (i = 0; i < vf_rxq_count(vf); i++) {
2178 rc = bnx2x_vf_queue_teardown(bp, vf, i);
2183 /* disable the interrupts */
2184 DP(BNX2X_MSG_IOV, "disabling igu\n");
2185 bnx2x_vf_igu_disable(bp, vf);
2187 /* disable the VF */
2188 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2189 bnx2x_vf_clr_qtbl(bp, vf);
2191 /* need to make sure there are no outstanding stats ramrods which may
2192 * cause the device to access the VF's stats buffer which it will free
2193 * as soon as we return from the close flow.
2196 struct set_vf_state_cookie cookie;
2199 cookie.state = VF_ACQUIRED;
2200 rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2205 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2209 BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2213 /* VF release can be called either: 1. The VF was acquired but
2214 * not enabled 2. the vf was enabled or in the process of being
2217 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2221 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2222 vf->state == VF_FREE ? "Free" :
2223 vf->state == VF_ACQUIRED ? "Acquired" :
2224 vf->state == VF_ENABLED ? "Enabled" :
2225 vf->state == VF_RESET ? "Reset" :
2228 switch (vf->state) {
2230 rc = bnx2x_vf_close(bp, vf);
2233 /* Fall through - to release resources */
2235 DP(BNX2X_MSG_IOV, "about to free resources\n");
2236 bnx2x_vf_free_resc(bp, vf);
2246 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2250 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2251 struct bnx2x_config_rss_params *rss)
2253 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2254 set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2255 return bnx2x_config_rss(bp, rss);
2258 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2259 struct vfpf_tpa_tlv *tlv,
2260 struct bnx2x_queue_update_tpa_params *params)
2262 aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2263 struct bnx2x_queue_state_params qstate;
2266 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2268 /* Set ramrod params */
2269 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2270 memcpy(&qstate.params.update_tpa, params,
2271 sizeof(struct bnx2x_queue_update_tpa_params));
2272 qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2273 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2275 for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2276 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2277 qstate.params.update_tpa.sge_map = sge_addr[qid];
2278 DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2279 vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2280 U64_LO(sge_addr[qid]));
2281 rc = bnx2x_queue_state_change(bp, &qstate);
2283 BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2284 U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2293 /* VF release ~ VF close + VF release-resources
2294 * Release is the ultimate SW shutdown and is called whenever an
2295 * irrecoverable error is encountered.
2297 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2301 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2302 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2304 rc = bnx2x_vf_free(bp, vf);
2307 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2309 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2313 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2314 enum channel_tlvs tlv)
2316 /* we don't lock the channel for unsupported tlvs */
2317 if (!bnx2x_tlv_supported(tlv)) {
2318 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2322 /* lock the channel */
2323 mutex_lock(&vf->op_mutex);
2325 /* record the locking op */
2326 vf->op_current = tlv;
2329 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2333 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2334 enum channel_tlvs expected_tlv)
2336 enum channel_tlvs current_tlv;
2339 BNX2X_ERR("VF was %p\n", vf);
2343 current_tlv = vf->op_current;
2345 /* we don't unlock the channel for unsupported tlvs */
2346 if (!bnx2x_tlv_supported(expected_tlv))
2349 WARN(expected_tlv != vf->op_current,
2350 "lock mismatch: expected %d found %d", expected_tlv,
2353 /* record the locking op */
2354 vf->op_current = CHANNEL_TLV_NONE;
2356 /* lock the channel */
2357 mutex_unlock(&vf->op_mutex);
2359 /* log the unlock */
2360 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2361 vf->abs_vfid, current_tlv);
2364 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2366 struct bnx2x_queue_state_params q_params;
2370 /* Verify changes are needed and record current Tx switching state */
2371 prev_flags = bp->flags;
2373 bp->flags |= TX_SWITCHING;
2375 bp->flags &= ~TX_SWITCHING;
2376 if (prev_flags == bp->flags)
2379 /* Verify state enables the sending of queue ramrods */
2380 if ((bp->state != BNX2X_STATE_OPEN) ||
2381 (bnx2x_get_q_logical_state(bp,
2382 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2383 BNX2X_Q_LOGICAL_STATE_ACTIVE))
2386 /* send q. update ramrod to configure Tx switching */
2387 memset(&q_params, 0, sizeof(q_params));
2388 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2389 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2390 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2391 &q_params.params.update.update_flags);
2393 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2394 &q_params.params.update.update_flags);
2396 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2397 &q_params.params.update.update_flags);
2399 /* send the ramrod on all the queues of the PF */
2400 for_each_eth_queue(bp, i) {
2401 struct bnx2x_fastpath *fp = &bp->fp[i];
2403 /* Set the appropriate Queue object */
2404 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2406 /* Update the Queue state */
2407 rc = bnx2x_queue_state_change(bp, &q_params);
2409 BNX2X_ERR("Failed to configure Tx switching\n");
2414 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2418 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2420 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2422 if (!IS_SRIOV(bp)) {
2423 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2427 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2428 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2430 /* HW channel is only operational when PF is up */
2431 if (bp->state != BNX2X_STATE_OPEN) {
2432 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2436 /* we are always bound by the total_vfs in the configuration space */
2437 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2438 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2439 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2440 num_vfs_param = BNX2X_NR_VIRTFN(bp);
2443 bp->requested_nr_virtfn = num_vfs_param;
2444 if (num_vfs_param == 0) {
2445 bnx2x_set_pf_tx_switching(bp, false);
2446 bnx2x_disable_sriov(bp);
2449 return bnx2x_enable_sriov(bp);
2453 #define IGU_ENTRY_SIZE 4
2455 int bnx2x_enable_sriov(struct bnx2x *bp)
2457 int rc = 0, req_vfs = bp->requested_nr_virtfn;
2458 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2459 u32 igu_entry, address;
2465 first_vf = bp->vfdb->sriov.first_vf_in_pf;
2467 /* statically distribute vf sb pool between VFs */
2468 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2469 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2471 /* zero previous values learned from igu cam */
2472 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2473 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2476 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2478 bp->vfdb->vf_sbs_pool = 0;
2480 /* prepare IGU cam */
2481 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2482 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2483 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2484 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2485 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2486 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2487 IGU_REG_MAPPING_MEMORY_VALID;
2488 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2490 REG_WR(bp, address, igu_entry);
2492 address += IGU_ENTRY_SIZE;
2496 /* Reinitialize vf database according to igu cam */
2497 bnx2x_get_vf_igu_cam_info(bp);
2499 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2500 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2503 for_each_vf(bp, vf_idx) {
2504 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2506 /* set local queue arrays */
2507 vf->vfqs = &bp->vfdb->vfqs[qcount];
2508 qcount += vf_sb_count(vf);
2509 bnx2x_iov_static_resc(bp, vf);
2512 /* prepare msix vectors in VF configuration space - the value in the
2513 * PCI configuration space should be the index of the last entry,
2514 * namely one less than the actual size of the table
2516 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2517 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2518 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2520 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2521 vf_idx, num_vf_queues - 1);
2523 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2525 /* enable sriov. This will probe all the VFs, and consequentially cause
2526 * the "acquire" messages to appear on the VF PF channel.
2528 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2529 bnx2x_disable_sriov(bp);
2531 rc = bnx2x_set_pf_tx_switching(bp, true);
2535 rc = pci_enable_sriov(bp->pdev, req_vfs);
2537 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2540 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2544 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2547 struct pf_vf_bulletin_content *bulletin;
2549 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2550 for_each_vf(bp, vfidx) {
2551 bulletin = BP_VF_BULLETIN(bp, vfidx);
2552 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2553 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0,
2554 htons(ETH_P_8021Q));
2558 void bnx2x_disable_sriov(struct bnx2x *bp)
2560 if (pci_vfs_assigned(bp->pdev)) {
2562 "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2566 pci_disable_sriov(bp->pdev);
2569 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2570 struct bnx2x_virtf **vf,
2571 struct pf_vf_bulletin_content **bulletin,
2574 if (bp->state != BNX2X_STATE_OPEN) {
2575 BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2579 if (!IS_SRIOV(bp)) {
2580 BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2584 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2585 BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2586 vfidx, BNX2X_NR_VIRTFN(bp));
2591 *vf = BP_VF(bp, vfidx);
2592 *bulletin = BP_VF_BULLETIN(bp, vfidx);
2595 BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2599 if (test_queue && !(*vf)->vfqs) {
2600 BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2606 BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2614 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2615 struct ifla_vf_info *ivi)
2617 struct bnx2x *bp = netdev_priv(dev);
2618 struct bnx2x_virtf *vf = NULL;
2619 struct pf_vf_bulletin_content *bulletin = NULL;
2620 struct bnx2x_vlan_mac_obj *mac_obj;
2621 struct bnx2x_vlan_mac_obj *vlan_obj;
2624 /* sanity and init */
2625 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2629 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2630 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2631 if (!mac_obj || !vlan_obj) {
2632 BNX2X_ERR("VF partially initialized\n");
2638 ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2639 ivi->min_tx_rate = 0;
2640 ivi->spoofchk = vf->spoofchk ? 1 : 0;
2641 ivi->linkstate = vf->link_cfg;
2642 if (vf->state == VF_ENABLED) {
2643 /* mac and vlan are in vlan_mac objects */
2644 if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2645 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2647 vlan_obj->get_n_elements(bp, vlan_obj, 1,
2648 (u8 *)&ivi->vlan, 0,
2652 mutex_lock(&bp->vfdb->bulletin_mutex);
2654 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2655 /* mac configured by ndo so its in bulletin board */
2656 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2658 /* function has not been loaded yet. Show mac as 0s */
2659 eth_zero_addr(ivi->mac);
2662 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2663 /* vlan configured by ndo so its in bulletin board */
2664 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2666 /* function has not been loaded yet. Show vlans as 0s */
2667 memset(&ivi->vlan, 0, VLAN_HLEN);
2669 mutex_unlock(&bp->vfdb->bulletin_mutex);
2675 /* New mac for VF. Consider these cases:
2676 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2677 * supply at acquire.
2678 * 2. VF has already been acquired but has not yet initialized - store in local
2679 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
2680 * will configure this mac when it is ready.
2681 * 3. VF has already initialized but has not yet setup a queue - post the new
2682 * mac on VF's bulletin board right now. VF will configure this mac when it
2684 * 4. VF has already set a queue - delete any macs already configured for this
2685 * queue and manually config the new mac.
2686 * In any event, once this function has been called refuse any attempts by the
2687 * VF to configure any mac for itself except for this mac. In case of a race
2688 * where the VF fails to see the new post on its bulletin board before sending a
2689 * mac configuration request, the PF will simply fail the request and VF can try
2690 * again after consulting its bulletin board.
2692 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2694 struct bnx2x *bp = netdev_priv(dev);
2695 int rc, q_logical_state;
2696 struct bnx2x_virtf *vf = NULL;
2697 struct pf_vf_bulletin_content *bulletin = NULL;
2699 if (!is_valid_ether_addr(mac)) {
2700 BNX2X_ERR("mac address invalid\n");
2704 /* sanity and init */
2705 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2709 mutex_lock(&bp->vfdb->bulletin_mutex);
2711 /* update PF's copy of the VF's bulletin. Will no longer accept mac
2712 * configuration requests from vf unless match this mac
2714 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2715 memcpy(bulletin->mac, mac, ETH_ALEN);
2717 /* Post update on VF's bulletin board */
2718 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2720 /* release lock before checking return code */
2721 mutex_unlock(&bp->vfdb->bulletin_mutex);
2724 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2729 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2730 if (vf->state == VF_ENABLED &&
2731 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2732 /* configure the mac in device on this vf's queue */
2733 unsigned long ramrod_flags = 0;
2734 struct bnx2x_vlan_mac_obj *mac_obj;
2736 /* User should be able to see failure reason in system logs */
2737 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2740 /* must lock vfpf channel to protect against vf flows */
2741 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2743 /* remove existing eth macs */
2744 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2745 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2747 BNX2X_ERR("failed to delete eth macs\n");
2752 /* remove existing uc list macs */
2753 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2755 BNX2X_ERR("failed to delete uc_list macs\n");
2760 /* configure the new mac to device */
2761 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2762 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2763 BNX2X_ETH_MAC, &ramrod_flags);
2766 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2772 static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,
2773 struct bnx2x_virtf *vf, bool accept)
2775 struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2776 unsigned long accept_flags;
2778 /* need to remove/add the VF's accept_any_vlan bit */
2779 accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2781 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2783 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2785 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2787 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2788 bnx2x_config_rx_mode(bp, &rx_ramrod);
2791 static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,
2794 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2795 unsigned long ramrod_flags = 0;
2798 /* configure the new vlan to device */
2799 memset(&ramrod_param, 0, sizeof(ramrod_param));
2800 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2801 ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2802 ramrod_param.ramrod_flags = ramrod_flags;
2803 ramrod_param.user_req.u.vlan.vlan = vlan;
2804 ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD
2805 : BNX2X_VLAN_MAC_DEL;
2806 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2808 BNX2X_ERR("failed to configure vlan\n");
2815 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos,
2818 struct pf_vf_bulletin_content *bulletin = NULL;
2819 struct bnx2x *bp = netdev_priv(dev);
2820 struct bnx2x_vlan_mac_obj *vlan_obj;
2821 unsigned long vlan_mac_flags = 0;
2822 unsigned long ramrod_flags = 0;
2823 struct bnx2x_virtf *vf = NULL;
2827 BNX2X_ERR("illegal vlan value %d\n", vlan);
2831 if (vlan_proto != htons(ETH_P_8021Q))
2832 return -EPROTONOSUPPORT;
2834 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2837 /* sanity and init */
2838 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2842 /* update PF's copy of the VF's bulletin. No point in posting the vlan
2843 * to the VF since it doesn't have anything to do with it. But it useful
2844 * to store it here in case the VF is not up yet and we can only
2845 * configure the vlan later when it does. Treat vlan id 0 as remove the
2848 mutex_lock(&bp->vfdb->bulletin_mutex);
2851 bulletin->valid_bitmap |= 1 << VLAN_VALID;
2853 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2854 bulletin->vlan = vlan;
2856 /* Post update on VF's bulletin board */
2857 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2859 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2860 mutex_unlock(&bp->vfdb->bulletin_mutex);
2862 /* is vf initialized and queue set up? */
2863 if (vf->state != VF_ENABLED ||
2864 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2865 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2868 /* User should be able to see error in system logs */
2869 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2872 /* must lock vfpf channel to protect against vf flows */
2873 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2875 /* remove existing vlans */
2876 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2877 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2878 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2881 BNX2X_ERR("failed to delete vlans\n");
2886 /* clear accept_any_vlan when HV forces vlan, otherwise
2887 * according to VF capabilities
2889 if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))
2890 bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);
2892 rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);
2896 /* send queue update ramrods to configure default vlan and
2897 * silent vlan removal
2899 for_each_vfq(vf, i) {
2900 struct bnx2x_queue_state_params q_params = {NULL};
2901 struct bnx2x_queue_update_params *update_params;
2903 q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2905 /* validate the Q is UP */
2906 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2907 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2910 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2911 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2912 update_params = &q_params.params.update;
2913 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2914 &update_params->update_flags);
2915 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2916 &update_params->update_flags);
2918 /* if vlan is 0 then we want to leave the VF traffic
2919 * untagged, and leave the incoming traffic untouched
2920 * (i.e. do not remove any vlan tags).
2922 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2923 &update_params->update_flags);
2924 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2925 &update_params->update_flags);
2927 /* configure default vlan to vf queue and set silent
2928 * vlan removal (the vf remains unaware of this vlan).
2930 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2931 &update_params->update_flags);
2932 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2933 &update_params->update_flags);
2934 update_params->def_vlan = vlan;
2935 update_params->silent_removal_value =
2936 vlan & VLAN_VID_MASK;
2937 update_params->silent_removal_mask = VLAN_VID_MASK;
2940 /* Update the Queue state */
2941 rc = bnx2x_queue_state_change(bp, &q_params);
2943 BNX2X_ERR("Failed to configure default VLAN queue %d\n",
2949 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2953 "updated VF[%d] vlan configuration (vlan = %d)\n",
2959 int bnx2x_set_vf_spoofchk(struct net_device *dev, int idx, bool val)
2961 struct bnx2x *bp = netdev_priv(dev);
2962 struct bnx2x_virtf *vf;
2965 vf = BP_VF(bp, idx);
2970 if (vf->spoofchk == val)
2973 vf->spoofchk = val ? 1 : 0;
2975 DP(BNX2X_MSG_IOV, "%s spoofchk for VF %d\n",
2976 val ? "enabling" : "disabling", idx);
2978 /* is vf initialized and queue set up? */
2979 if (vf->state != VF_ENABLED ||
2980 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2981 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2984 /* User should be able to see error in system logs */
2985 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2988 /* send queue update ramrods to configure spoofchk */
2989 for_each_vfq(vf, i) {
2990 struct bnx2x_queue_state_params q_params = {NULL};
2991 struct bnx2x_queue_update_params *update_params;
2993 q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2995 /* validate the Q is UP */
2996 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2997 BNX2X_Q_LOGICAL_STATE_ACTIVE)
3000 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
3001 q_params.cmd = BNX2X_Q_CMD_UPDATE;
3002 update_params = &q_params.params.update;
3003 __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
3004 &update_params->update_flags);
3006 __set_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
3007 &update_params->update_flags);
3009 __clear_bit(BNX2X_Q_UPDATE_ANTI_SPOOF,
3010 &update_params->update_flags);
3013 /* Update the Queue state */
3014 rc = bnx2x_queue_state_change(bp, &q_params);
3016 BNX2X_ERR("Failed to %s spoofchk on VF %d - vfq %d\n",
3017 val ? "enable" : "disable", idx, i);
3024 "%s spoofchk for VF[%d]\n", val ? "Enabled" : "Disabled",
3030 /* crc is the first field in the bulletin board. Compute the crc over the
3031 * entire bulletin board excluding the crc field itself. Use the length field
3032 * as the Bulletin Board was posted by a PF with possibly a different version
3033 * from the vf which will sample it. Therefore, the length is computed by the
3034 * PF and then used blindly by the VF.
3036 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
3038 return crc32(BULLETIN_CRC_SEED,
3039 ((u8 *)bulletin) + sizeof(bulletin->crc),
3040 bulletin->length - sizeof(bulletin->crc));
3043 /* Check for new posts on the bulletin board */
3044 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
3046 struct pf_vf_bulletin_content *bulletin;
3049 /* sampling structure in mid post may result with corrupted data
3050 * validate crc to ensure coherency.
3052 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
3055 /* sample the bulletin board */
3056 memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
3057 sizeof(union pf_vf_bulletin));
3059 crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
3061 if (bp->shadow_bulletin.content.crc == crc)
3064 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
3065 bp->shadow_bulletin.content.crc, crc);
3068 if (attempts >= BULLETIN_ATTEMPTS) {
3069 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3071 return PFVF_BULLETIN_CRC_ERR;
3073 bulletin = &bp->shadow_bulletin.content;
3075 /* bulletin board hasn't changed since last sample */
3076 if (bp->old_bulletin.version == bulletin->version)
3077 return PFVF_BULLETIN_UNCHANGED;
3079 /* the mac address in bulletin board is valid and is new */
3080 if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
3081 !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
3082 /* update new mac to net device */
3083 memcpy(bp->dev->dev_addr, bulletin->mac, ETH_ALEN);
3086 if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3087 DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3088 bulletin->link_speed, bulletin->link_flags);
3090 bp->vf_link_vars.line_speed = bulletin->link_speed;
3091 bp->vf_link_vars.link_report_flags = 0;
3093 if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3094 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3095 &bp->vf_link_vars.link_report_flags);
3097 if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3098 __set_bit(BNX2X_LINK_REPORT_FD,
3099 &bp->vf_link_vars.link_report_flags);
3100 /* Rx Flow Control is ON */
3101 if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3102 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3103 &bp->vf_link_vars.link_report_flags);
3104 /* Tx Flow Control is ON */
3105 if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3106 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3107 &bp->vf_link_vars.link_report_flags);
3108 __bnx2x_link_report(bp);
3111 /* copy new bulletin board to bp */
3112 memcpy(&bp->old_bulletin, bulletin,
3113 sizeof(struct pf_vf_bulletin_content));
3115 return PFVF_BULLETIN_UPDATED;
3118 void bnx2x_timer_sriov(struct bnx2x *bp)
3120 bnx2x_sample_bulletin(bp);
3122 /* if channel is down we need to self destruct */
3123 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3124 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3128 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3130 /* vf doorbells are embedded within the regview */
3131 return bp->regview + PXP_VF_ADDR_DB_START;
3134 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3136 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3137 sizeof(struct bnx2x_vf_mbx_msg));
3138 BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping,
3139 sizeof(union pf_vf_bulletin));
3142 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3144 mutex_init(&bp->vf2pf_mutex);
3146 /* allocate vf2pf mailbox for vf to pf channel */
3147 bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3148 sizeof(struct bnx2x_vf_mbx_msg));
3149 if (!bp->vf2pf_mbox)
3152 /* allocate pf 2 vf bulletin board */
3153 bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3154 sizeof(union pf_vf_bulletin));
3155 if (!bp->pf2vf_bulletin)
3158 bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3163 bnx2x_vf_pci_dealloc(bp);
3167 void bnx2x_iov_channel_down(struct bnx2x *bp)
3170 struct pf_vf_bulletin_content *bulletin;
3175 for_each_vf(bp, vf_idx) {
3176 /* locate this VFs bulletin board and update the channel down
3179 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3180 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3182 /* update vf bulletin board */
3183 bnx2x_post_vf_bulletin(bp, vf_idx);
3187 void bnx2x_iov_task(struct work_struct *work)
3189 struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3191 if (!netif_running(bp->dev))
3194 if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3195 &bp->iov_task_state))
3196 bnx2x_vf_handle_flr_event(bp);
3198 if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3199 &bp->iov_task_state))
3203 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3205 smp_mb__before_atomic();
3206 set_bit(flag, &bp->iov_task_state);
3207 smp_mb__after_atomic();
3208 DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3209 queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);