drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c

   1 /* Broadcom NetXtreme-C/E network driver.
   2  *
   3  * Copyright (c) 2014-2016 Broadcom Corporation
   4  * Copyright (c) 2016-2017 Broadcom Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation.
   9  */
  10
  11 #include <linux/ctype.h>
  12 #include <linux/stringify.h>
  13 #include <linux/ethtool.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/etherdevice.h>
  17 #include <linux/crc32.h>
  18 #include <linux/firmware.h>
  19 #include <linux/utsname.h>
  20 #include <linux/time.h>
  21 #include "bnxt_hsi.h"
  22 #include "bnxt.h"
  23 #include "bnxt_xdp.h"
  24 #include "bnxt_ethtool.h"
  25 #include "bnxt_nvm_defs.h"      /* NVRAM content constant and structure defs */
  26 #include "bnxt_fw_hdr.h"        /* Firmware hdr constant and structure defs */
  27 #include "bnxt_coredump.h"
  28 #define FLASH_NVRAM_TIMEOUT     ((HWRM_CMD_TIMEOUT) * 100)
  29 #define FLASH_PACKAGE_TIMEOUT   ((HWRM_CMD_TIMEOUT) * 200)
  30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  31
  32 static u32 bnxt_get_msglevel(struct net_device *dev)
  33 {
  34         struct bnxt *bp = netdev_priv(dev);
  35
  36         return bp->msg_enable;
  37 }
  38
  39 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  40 {
  41         struct bnxt *bp = netdev_priv(dev);
  42
  43         bp->msg_enable = value;
  44 }
  45
  46 static int bnxt_get_coalesce(struct net_device *dev,
  47                              struct ethtool_coalesce *coal)
  48 {
  49         struct bnxt *bp = netdev_priv(dev);
  50         struct bnxt_coal *hw_coal;
  51         u16 mult;
  52
  53         memset(coal, 0, sizeof(*coal));
  54
  55         coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
  56
  57         hw_coal = &bp->rx_coal;
  58         mult = hw_coal->bufs_per_record;
  59         coal->rx_coalesce_usecs = hw_coal->coal_ticks;
  60         coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  61         coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  62         coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  63
  64         hw_coal = &bp->tx_coal;
  65         mult = hw_coal->bufs_per_record;
  66         coal->tx_coalesce_usecs = hw_coal->coal_ticks;
  67         coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  68         coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  69         coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  70
  71         coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  72
  73         return 0;
  74 }
  75
  76 static int bnxt_set_coalesce(struct net_device *dev,
  77                              struct ethtool_coalesce *coal)
  78 {
  79         struct bnxt *bp = netdev_priv(dev);
  80         bool update_stats = false;
  81         struct bnxt_coal *hw_coal;
  82         int rc = 0;
  83         u16 mult;
  84
  85         if (coal->use_adaptive_rx_coalesce) {
  86                 bp->flags |= BNXT_FLAG_DIM;
  87         } else {
  88                 if (bp->flags & BNXT_FLAG_DIM) {
  89                         bp->flags &= ~(BNXT_FLAG_DIM);
  90                         goto reset_coalesce;
  91                 }
  92         }
  93
  94         hw_coal = &bp->rx_coal;
  95         mult = hw_coal->bufs_per_record;
  96         hw_coal->coal_ticks = coal->rx_coalesce_usecs;
  97         hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
  98         hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  99         hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
 100
 101         hw_coal = &bp->tx_coal;
 102         mult = hw_coal->bufs_per_record;
 103         hw_coal->coal_ticks = coal->tx_coalesce_usecs;
 104         hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
 105         hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
 106         hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
 107
 108         if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
 109                 u32 stats_ticks = coal->stats_block_coalesce_usecs;
 110
 111                 /* Allow 0, which means disable. */
 112                 if (stats_ticks)
 113                         stats_ticks = clamp_t(u32, stats_ticks,
 114                                               BNXT_MIN_STATS_COAL_TICKS,
 115                                               BNXT_MAX_STATS_COAL_TICKS);
 116                 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
 117                 bp->stats_coal_ticks = stats_ticks;
 118                 if (bp->stats_coal_ticks)
 119                         bp->current_interval =
 120                                 bp->stats_coal_ticks * HZ / 1000000;
 121                 else
 122                         bp->current_interval = BNXT_TIMER_INTERVAL;
 123                 update_stats = true;
 124         }
 125
 126 reset_coalesce:
 127         if (netif_running(dev)) {
 128                 if (update_stats) {
 129                         rc = bnxt_close_nic(bp, true, false);
 130                         if (!rc)
 131                                 rc = bnxt_open_nic(bp, true, false);
 132                 } else {
 133                         rc = bnxt_hwrm_set_coal(bp);
 134                 }
 135         }
 136
 137         return rc;
 138 }
 139
 140 static const char * const bnxt_ring_stats_str[] = {
 141         "rx_ucast_packets",
 142         "rx_mcast_packets",
 143         "rx_bcast_packets",
 144         "rx_discards",
 145         "rx_drops",
 146         "rx_ucast_bytes",
 147         "rx_mcast_bytes",
 148         "rx_bcast_bytes",
 149         "tx_ucast_packets",
 150         "tx_mcast_packets",
 151         "tx_bcast_packets",
 152         "tx_discards",
 153         "tx_drops",
 154         "tx_ucast_bytes",
 155         "tx_mcast_bytes",
 156         "tx_bcast_bytes",
 157 };
 158
 159 static const char * const bnxt_ring_tpa_stats_str[] = {
 160         "tpa_packets",
 161         "tpa_bytes",
 162         "tpa_events",
 163         "tpa_aborts",
 164 };
 165
 166 static const char * const bnxt_ring_tpa2_stats_str[] = {
 167         "rx_tpa_eligible_pkt",
 168         "rx_tpa_eligible_bytes",
 169         "rx_tpa_pkt",
 170         "rx_tpa_bytes",
 171         "rx_tpa_errors",
 172 };
 173
 174 static const char * const bnxt_ring_sw_stats_str[] = {
 175         "rx_l4_csum_errors",
 176         "missed_irqs",
 177 };
 178
 179 #define BNXT_RX_STATS_ENTRY(counter)    \
 180         { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
 181
 182 #define BNXT_TX_STATS_ENTRY(counter)    \
 183         { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
 184
 185 #define BNXT_RX_STATS_EXT_ENTRY(counter)        \
 186         { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 187
 188 #define BNXT_TX_STATS_EXT_ENTRY(counter)        \
 189         { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 190
 191 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n)                          \
 192         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us),   \
 193         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
 194
 195 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n)                          \
 196         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us),   \
 197         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
 198
 199 #define BNXT_RX_STATS_EXT_PFC_ENTRIES                           \
 200         BNXT_RX_STATS_EXT_PFC_ENTRY(0),                         \
 201         BNXT_RX_STATS_EXT_PFC_ENTRY(1),                         \
 202         BNXT_RX_STATS_EXT_PFC_ENTRY(2),                         \
 203         BNXT_RX_STATS_EXT_PFC_ENTRY(3),                         \
 204         BNXT_RX_STATS_EXT_PFC_ENTRY(4),                         \
 205         BNXT_RX_STATS_EXT_PFC_ENTRY(5),                         \
 206         BNXT_RX_STATS_EXT_PFC_ENTRY(6),                         \
 207         BNXT_RX_STATS_EXT_PFC_ENTRY(7)
 208
 209 #define BNXT_TX_STATS_EXT_PFC_ENTRIES                           \
 210         BNXT_TX_STATS_EXT_PFC_ENTRY(0),                         \
 211         BNXT_TX_STATS_EXT_PFC_ENTRY(1),                         \
 212         BNXT_TX_STATS_EXT_PFC_ENTRY(2),                         \
 213         BNXT_TX_STATS_EXT_PFC_ENTRY(3),                         \
 214         BNXT_TX_STATS_EXT_PFC_ENTRY(4),                         \
 215         BNXT_TX_STATS_EXT_PFC_ENTRY(5),                         \
 216         BNXT_TX_STATS_EXT_PFC_ENTRY(6),                         \
 217         BNXT_TX_STATS_EXT_PFC_ENTRY(7)
 218
 219 #define BNXT_RX_STATS_EXT_COS_ENTRY(n)                          \
 220         BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n),               \
 221         BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
 222
 223 #define BNXT_TX_STATS_EXT_COS_ENTRY(n)                          \
 224         BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n),               \
 225         BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
 226
 227 #define BNXT_RX_STATS_EXT_COS_ENTRIES                           \
 228         BNXT_RX_STATS_EXT_COS_ENTRY(0),                         \
 229         BNXT_RX_STATS_EXT_COS_ENTRY(1),                         \
 230         BNXT_RX_STATS_EXT_COS_ENTRY(2),                         \
 231         BNXT_RX_STATS_EXT_COS_ENTRY(3),                         \
 232         BNXT_RX_STATS_EXT_COS_ENTRY(4),                         \
 233         BNXT_RX_STATS_EXT_COS_ENTRY(5),                         \
 234         BNXT_RX_STATS_EXT_COS_ENTRY(6),                         \
 235         BNXT_RX_STATS_EXT_COS_ENTRY(7)                          \
 236
 237 #define BNXT_TX_STATS_EXT_COS_ENTRIES                           \
 238         BNXT_TX_STATS_EXT_COS_ENTRY(0),                         \
 239         BNXT_TX_STATS_EXT_COS_ENTRY(1),                         \
 240         BNXT_TX_STATS_EXT_COS_ENTRY(2),                         \
 241         BNXT_TX_STATS_EXT_COS_ENTRY(3),                         \
 242         BNXT_TX_STATS_EXT_COS_ENTRY(4),                         \
 243         BNXT_TX_STATS_EXT_COS_ENTRY(5),                         \
 244         BNXT_TX_STATS_EXT_COS_ENTRY(6),                         \
 245         BNXT_TX_STATS_EXT_COS_ENTRY(7)                          \
 246
 247 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n)                  \
 248         BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n),       \
 249         BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
 250
 251 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES                           \
 252         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0),                         \
 253         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1),                         \
 254         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2),                         \
 255         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3),                         \
 256         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4),                         \
 257         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5),                         \
 258         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6),                         \
 259         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
 260
 261 #define BNXT_RX_STATS_PRI_ENTRY(counter, n)             \
 262         { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0),     \
 263           __stringify(counter##_pri##n) }
 264
 265 #define BNXT_TX_STATS_PRI_ENTRY(counter, n)             \
 266         { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0),     \
 267           __stringify(counter##_pri##n) }
 268
 269 #define BNXT_RX_STATS_PRI_ENTRIES(counter)              \
 270         BNXT_RX_STATS_PRI_ENTRY(counter, 0),            \
 271         BNXT_RX_STATS_PRI_ENTRY(counter, 1),            \
 272         BNXT_RX_STATS_PRI_ENTRY(counter, 2),            \
 273         BNXT_RX_STATS_PRI_ENTRY(counter, 3),            \
 274         BNXT_RX_STATS_PRI_ENTRY(counter, 4),            \
 275         BNXT_RX_STATS_PRI_ENTRY(counter, 5),            \
 276         BNXT_RX_STATS_PRI_ENTRY(counter, 6),            \
 277         BNXT_RX_STATS_PRI_ENTRY(counter, 7)
 278
 279 #define BNXT_TX_STATS_PRI_ENTRIES(counter)              \
 280         BNXT_TX_STATS_PRI_ENTRY(counter, 0),            \
 281         BNXT_TX_STATS_PRI_ENTRY(counter, 1),            \
 282         BNXT_TX_STATS_PRI_ENTRY(counter, 2),            \
 283         BNXT_TX_STATS_PRI_ENTRY(counter, 3),            \
 284         BNXT_TX_STATS_PRI_ENTRY(counter, 4),            \
 285         BNXT_TX_STATS_PRI_ENTRY(counter, 5),            \
 286         BNXT_TX_STATS_PRI_ENTRY(counter, 6),            \
 287         BNXT_TX_STATS_PRI_ENTRY(counter, 7)
 288
 289 #define BNXT_PCIE_STATS_ENTRY(counter)  \
 290         { BNXT_PCIE_STATS_OFFSET(counter), __stringify(counter) }
 291
 292 enum {
 293         RX_TOTAL_DISCARDS,
 294         TX_TOTAL_DISCARDS,
 295 };
 296
 297 static struct {
 298         u64                     counter;
 299         char                    string[ETH_GSTRING_LEN];
 300 } bnxt_sw_func_stats[] = {
 301         {0, "rx_total_discard_pkts"},
 302         {0, "tx_total_discard_pkts"},
 303 };
 304
 305 static const struct {
 306         long offset;
 307         char string[ETH_GSTRING_LEN];
 308 } bnxt_port_stats_arr[] = {
 309         BNXT_RX_STATS_ENTRY(rx_64b_frames),
 310         BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
 311         BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
 312         BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
 313         BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
 314         BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
 315         BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
 316         BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
 317         BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
 318         BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
 319         BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
 320         BNXT_RX_STATS_ENTRY(rx_total_frames),
 321         BNXT_RX_STATS_ENTRY(rx_ucast_frames),
 322         BNXT_RX_STATS_ENTRY(rx_mcast_frames),
 323         BNXT_RX_STATS_ENTRY(rx_bcast_frames),
 324         BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
 325         BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
 326         BNXT_RX_STATS_ENTRY(rx_pause_frames),
 327         BNXT_RX_STATS_ENTRY(rx_pfc_frames),
 328         BNXT_RX_STATS_ENTRY(rx_align_err_frames),
 329         BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
 330         BNXT_RX_STATS_ENTRY(rx_jbr_frames),
 331         BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
 332         BNXT_RX_STATS_ENTRY(rx_tagged_frames),
 333         BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
 334         BNXT_RX_STATS_ENTRY(rx_good_frames),
 335         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
 336         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
 337         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
 338         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
 339         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
 340         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
 341         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
 342         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
 343         BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
 344         BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
 345         BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
 346         BNXT_RX_STATS_ENTRY(rx_bytes),
 347         BNXT_RX_STATS_ENTRY(rx_runt_bytes),
 348         BNXT_RX_STATS_ENTRY(rx_runt_frames),
 349         BNXT_RX_STATS_ENTRY(rx_stat_discard),
 350         BNXT_RX_STATS_ENTRY(rx_stat_err),
 351
 352         BNXT_TX_STATS_ENTRY(tx_64b_frames),
 353         BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
 354         BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
 355         BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
 356         BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
 357         BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
 358         BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
 359         BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
 360         BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
 361         BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
 362         BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
 363         BNXT_TX_STATS_ENTRY(tx_good_frames),
 364         BNXT_TX_STATS_ENTRY(tx_total_frames),
 365         BNXT_TX_STATS_ENTRY(tx_ucast_frames),
 366         BNXT_TX_STATS_ENTRY(tx_mcast_frames),
 367         BNXT_TX_STATS_ENTRY(tx_bcast_frames),
 368         BNXT_TX_STATS_ENTRY(tx_pause_frames),
 369         BNXT_TX_STATS_ENTRY(tx_pfc_frames),
 370         BNXT_TX_STATS_ENTRY(tx_jabber_frames),
 371         BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
 372         BNXT_TX_STATS_ENTRY(tx_err),
 373         BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
 374         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
 375         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
 376         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
 377         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
 378         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
 379         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
 380         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
 381         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
 382         BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
 383         BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
 384         BNXT_TX_STATS_ENTRY(tx_total_collisions),
 385         BNXT_TX_STATS_ENTRY(tx_bytes),
 386         BNXT_TX_STATS_ENTRY(tx_xthol_frames),
 387         BNXT_TX_STATS_ENTRY(tx_stat_discard),
 388         BNXT_TX_STATS_ENTRY(tx_stat_error),
 389 };
 390
 391 static const struct {
 392         long offset;
 393         char string[ETH_GSTRING_LEN];
 394 } bnxt_port_stats_ext_arr[] = {
 395         BNXT_RX_STATS_EXT_ENTRY(link_down_events),
 396         BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
 397         BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
 398         BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
 399         BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
 400         BNXT_RX_STATS_EXT_COS_ENTRIES,
 401         BNXT_RX_STATS_EXT_PFC_ENTRIES,
 402         BNXT_RX_STATS_EXT_ENTRY(rx_bits),
 403         BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
 404         BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
 405         BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
 406         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
 407 };
 408
 409 static const struct {
 410         long offset;
 411         char string[ETH_GSTRING_LEN];
 412 } bnxt_tx_port_stats_ext_arr[] = {
 413         BNXT_TX_STATS_EXT_COS_ENTRIES,
 414         BNXT_TX_STATS_EXT_PFC_ENTRIES,
 415 };
 416
 417 static const struct {
 418         long base_off;
 419         char string[ETH_GSTRING_LEN];
 420 } bnxt_rx_bytes_pri_arr[] = {
 421         BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
 422 };
 423
 424 static const struct {
 425         long base_off;
 426         char string[ETH_GSTRING_LEN];
 427 } bnxt_rx_pkts_pri_arr[] = {
 428         BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
 429 };
 430
 431 static const struct {
 432         long base_off;
 433         char string[ETH_GSTRING_LEN];
 434 } bnxt_tx_bytes_pri_arr[] = {
 435         BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
 436 };
 437
 438 static const struct {
 439         long base_off;
 440         char string[ETH_GSTRING_LEN];
 441 } bnxt_tx_pkts_pri_arr[] = {
 442         BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
 443 };
 444
 445 static const struct {
 446         long offset;
 447         char string[ETH_GSTRING_LEN];
 448 } bnxt_pcie_stats_arr[] = {
 449         BNXT_PCIE_STATS_ENTRY(pcie_pl_signal_integrity),
 450         BNXT_PCIE_STATS_ENTRY(pcie_dl_signal_integrity),
 451         BNXT_PCIE_STATS_ENTRY(pcie_tl_signal_integrity),
 452         BNXT_PCIE_STATS_ENTRY(pcie_link_integrity),
 453         BNXT_PCIE_STATS_ENTRY(pcie_tx_traffic_rate),
 454         BNXT_PCIE_STATS_ENTRY(pcie_rx_traffic_rate),
 455         BNXT_PCIE_STATS_ENTRY(pcie_tx_dllp_statistics),
 456         BNXT_PCIE_STATS_ENTRY(pcie_rx_dllp_statistics),
 457         BNXT_PCIE_STATS_ENTRY(pcie_equalization_time),
 458         BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram[0]),
 459         BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram[2]),
 460         BNXT_PCIE_STATS_ENTRY(pcie_recovery_histogram),
 461 };
 462
 463 #define BNXT_NUM_SW_FUNC_STATS  ARRAY_SIZE(bnxt_sw_func_stats)
 464 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
 465 #define BNXT_NUM_STATS_PRI                      \
 466         (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) +    \
 467          ARRAY_SIZE(bnxt_rx_pkts_pri_arr) +     \
 468          ARRAY_SIZE(bnxt_tx_bytes_pri_arr) +    \
 469          ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
 470 #define BNXT_NUM_PCIE_STATS ARRAY_SIZE(bnxt_pcie_stats_arr)
 471
 472 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
 473 {
 474         if (BNXT_SUPPORTS_TPA(bp)) {
 475                 if (bp->max_tpa_v2)
 476                         return ARRAY_SIZE(bnxt_ring_tpa2_stats_str);
 477                 return ARRAY_SIZE(bnxt_ring_tpa_stats_str);
 478         }
 479         return 0;
 480 }
 481
 482 static int bnxt_get_num_ring_stats(struct bnxt *bp)
 483 {
 484         int num_stats;
 485
 486         num_stats = ARRAY_SIZE(bnxt_ring_stats_str) +
 487                     ARRAY_SIZE(bnxt_ring_sw_stats_str) +
 488                     bnxt_get_num_tpa_ring_stats(bp);
 489         return num_stats * bp->cp_nr_rings;
 490 }
 491
 492 static int bnxt_get_num_stats(struct bnxt *bp)
 493 {
 494         int num_stats = bnxt_get_num_ring_stats(bp);
 495
 496         num_stats += BNXT_NUM_SW_FUNC_STATS;
 497
 498         if (bp->flags & BNXT_FLAG_PORT_STATS)
 499                 num_stats += BNXT_NUM_PORT_STATS;
 500
 501         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 502                 num_stats += bp->fw_rx_stats_ext_size +
 503                              bp->fw_tx_stats_ext_size;
 504                 if (bp->pri2cos_valid)
 505                         num_stats += BNXT_NUM_STATS_PRI;
 506         }
 507
 508         if (bp->flags & BNXT_FLAG_PCIE_STATS)
 509                 num_stats += BNXT_NUM_PCIE_STATS;
 510
 511         return num_stats;
 512 }
 513
 514 static int bnxt_get_sset_count(struct net_device *dev, int sset)
 515 {
 516         struct bnxt *bp = netdev_priv(dev);
 517
 518         switch (sset) {
 519         case ETH_SS_STATS:
 520                 return bnxt_get_num_stats(bp);
 521         case ETH_SS_TEST:
 522                 if (!bp->num_tests)
 523                         return -EOPNOTSUPP;
 524                 return bp->num_tests;
 525         default:
 526                 return -EOPNOTSUPP;
 527         }
 528 }
 529
 530 static void bnxt_get_ethtool_stats(struct net_device *dev,
 531                                    struct ethtool_stats *stats, u64 *buf)
 532 {
 533         u32 i, j = 0;
 534         struct bnxt *bp = netdev_priv(dev);
 535         u32 stat_fields = ARRAY_SIZE(bnxt_ring_stats_str) +
 536                           bnxt_get_num_tpa_ring_stats(bp);
 537
 538         if (!bp->bnapi) {
 539                 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS;
 540                 goto skip_ring_stats;
 541         }
 542
 543         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
 544                 bnxt_sw_func_stats[i].counter = 0;
 545
 546         for (i = 0; i < bp->cp_nr_rings; i++) {
 547                 struct bnxt_napi *bnapi = bp->bnapi[i];
 548                 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
 549                 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
 550                 int k;
 551
 552                 for (k = 0; k < stat_fields; j++, k++)
 553                         buf[j] = le64_to_cpu(hw_stats[k]);
 554                 buf[j++] = cpr->rx_l4_csum_errors;
 555                 buf[j++] = cpr->missed_irqs;
 556
 557                 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
 558                         le64_to_cpu(cpr->hw_stats->rx_discard_pkts);
 559                 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
 560                         le64_to_cpu(cpr->hw_stats->tx_discard_pkts);
 561         }
 562
 563         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
 564                 buf[j] = bnxt_sw_func_stats[i].counter;
 565
 566 skip_ring_stats:
 567         if (bp->flags & BNXT_FLAG_PORT_STATS) {
 568                 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
 569
 570                 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
 571                         buf[j] = le64_to_cpu(*(port_stats +
 572                                                bnxt_port_stats_arr[i].offset));
 573                 }
 574         }
 575         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 576                 __le64 *rx_port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext;
 577                 __le64 *tx_port_stats_ext = (__le64 *)bp->hw_tx_port_stats_ext;
 578
 579                 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
 580                         buf[j] = le64_to_cpu(*(rx_port_stats_ext +
 581                                             bnxt_port_stats_ext_arr[i].offset));
 582                 }
 583                 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
 584                         buf[j] = le64_to_cpu(*(tx_port_stats_ext +
 585                                         bnxt_tx_port_stats_ext_arr[i].offset));
 586                 }
 587                 if (bp->pri2cos_valid) {
 588                         for (i = 0; i < 8; i++, j++) {
 589                                 long n = bnxt_rx_bytes_pri_arr[i].base_off +
 590                                          bp->pri2cos[i];
 591
 592                                 buf[j] = le64_to_cpu(*(rx_port_stats_ext + n));
 593                         }
 594                         for (i = 0; i < 8; i++, j++) {
 595                                 long n = bnxt_rx_pkts_pri_arr[i].base_off +
 596                                          bp->pri2cos[i];
 597
 598                                 buf[j] = le64_to_cpu(*(rx_port_stats_ext + n));
 599                         }
 600                         for (i = 0; i < 8; i++, j++) {
 601                                 long n = bnxt_tx_bytes_pri_arr[i].base_off +
 602                                          bp->pri2cos[i];
 603
 604                                 buf[j] = le64_to_cpu(*(tx_port_stats_ext + n));
 605                         }
 606                         for (i = 0; i < 8; i++, j++) {
 607                                 long n = bnxt_tx_pkts_pri_arr[i].base_off +
 608                                          bp->pri2cos[i];
 609
 610                                 buf[j] = le64_to_cpu(*(tx_port_stats_ext + n));
 611                         }
 612                 }
 613         }
 614         if (bp->flags & BNXT_FLAG_PCIE_STATS) {
 615                 __le64 *pcie_stats = (__le64 *)bp->hw_pcie_stats;
 616
 617                 for (i = 0; i < BNXT_NUM_PCIE_STATS; i++, j++) {
 618                         buf[j] = le64_to_cpu(*(pcie_stats +
 619                                                bnxt_pcie_stats_arr[i].offset));
 620                 }
 621         }
 622 }
 623
 624 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
 625 {
 626         struct bnxt *bp = netdev_priv(dev);
 627         static const char * const *str;
 628         u32 i, j, num_str;
 629
 630         switch (stringset) {
 631         case ETH_SS_STATS:
 632                 for (i = 0; i < bp->cp_nr_rings; i++) {
 633                         num_str = ARRAY_SIZE(bnxt_ring_stats_str);
 634                         for (j = 0; j < num_str; j++) {
 635                                 sprintf(buf, "[%d]: %s", i,
 636                                         bnxt_ring_stats_str[j]);
 637                                 buf += ETH_GSTRING_LEN;
 638                         }
 639                         if (!BNXT_SUPPORTS_TPA(bp))
 640                                 goto skip_tpa_stats;
 641
 642                         if (bp->max_tpa_v2) {
 643                                 num_str = ARRAY_SIZE(bnxt_ring_tpa2_stats_str);
 644                                 str = bnxt_ring_tpa2_stats_str;
 645                         } else {
 646                                 num_str = ARRAY_SIZE(bnxt_ring_tpa_stats_str);
 647                                 str = bnxt_ring_tpa_stats_str;
 648                         }
 649                         for (j = 0; j < num_str; j++) {
 650                                 sprintf(buf, "[%d]: %s", i, str[j]);
 651                                 buf += ETH_GSTRING_LEN;
 652                         }
 653 skip_tpa_stats:
 654                         num_str = ARRAY_SIZE(bnxt_ring_sw_stats_str);
 655                         for (j = 0; j < num_str; j++) {
 656                                 sprintf(buf, "[%d]: %s", i,
 657                                         bnxt_ring_sw_stats_str[j]);
 658                                 buf += ETH_GSTRING_LEN;
 659                         }
 660                 }
 661                 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
 662                         strcpy(buf, bnxt_sw_func_stats[i].string);
 663                         buf += ETH_GSTRING_LEN;
 664                 }
 665
 666                 if (bp->flags & BNXT_FLAG_PORT_STATS) {
 667                         for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
 668                                 strcpy(buf, bnxt_port_stats_arr[i].string);
 669                                 buf += ETH_GSTRING_LEN;
 670                         }
 671                 }
 672                 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 673                         for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
 674                                 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
 675                                 buf += ETH_GSTRING_LEN;
 676                         }
 677                         for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
 678                                 strcpy(buf,
 679                                        bnxt_tx_port_stats_ext_arr[i].string);
 680                                 buf += ETH_GSTRING_LEN;
 681                         }
 682                         if (bp->pri2cos_valid) {
 683                                 for (i = 0; i < 8; i++) {
 684                                         strcpy(buf,
 685                                                bnxt_rx_bytes_pri_arr[i].string);
 686                                         buf += ETH_GSTRING_LEN;
 687                                 }
 688                                 for (i = 0; i < 8; i++) {
 689                                         strcpy(buf,
 690                                                bnxt_rx_pkts_pri_arr[i].string);
 691                                         buf += ETH_GSTRING_LEN;
 692                                 }
 693                                 for (i = 0; i < 8; i++) {
 694                                         strcpy(buf,
 695                                                bnxt_tx_bytes_pri_arr[i].string);
 696                                         buf += ETH_GSTRING_LEN;
 697                                 }
 698                                 for (i = 0; i < 8; i++) {
 699                                         strcpy(buf,
 700                                                bnxt_tx_pkts_pri_arr[i].string);
 701                                         buf += ETH_GSTRING_LEN;
 702                                 }
 703                         }
 704                 }
 705                 if (bp->flags & BNXT_FLAG_PCIE_STATS) {
 706                         for (i = 0; i < BNXT_NUM_PCIE_STATS; i++) {
 707                                 strcpy(buf, bnxt_pcie_stats_arr[i].string);
 708                                 buf += ETH_GSTRING_LEN;
 709                         }
 710                 }
 711                 break;
 712         case ETH_SS_TEST:
 713                 if (bp->num_tests)
 714                         memcpy(buf, bp->test_info->string,
 715                                bp->num_tests * ETH_GSTRING_LEN);
 716                 break;
 717         default:
 718                 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
 719                            stringset);
 720                 break;
 721         }
 722 }
 723
 724 static void bnxt_get_ringparam(struct net_device *dev,
 725                                struct ethtool_ringparam *ering)
 726 {
 727         struct bnxt *bp = netdev_priv(dev);
 728
 729         ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
 730         ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
 731         ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
 732
 733         ering->rx_pending = bp->rx_ring_size;
 734         ering->rx_jumbo_pending = bp->rx_agg_ring_size;
 735         ering->tx_pending = bp->tx_ring_size;
 736 }
 737
 738 static int bnxt_set_ringparam(struct net_device *dev,
 739                               struct ethtool_ringparam *ering)
 740 {
 741         struct bnxt *bp = netdev_priv(dev);
 742
 743         if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
 744             (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
 745             (ering->tx_pending <= MAX_SKB_FRAGS))
 746                 return -EINVAL;
 747
 748         if (netif_running(dev))
 749                 bnxt_close_nic(bp, false, false);
 750
 751         bp->rx_ring_size = ering->rx_pending;
 752         bp->tx_ring_size = ering->tx_pending;
 753         bnxt_set_ring_params(bp);
 754
 755         if (netif_running(dev))
 756                 return bnxt_open_nic(bp, false, false);
 757
 758         return 0;
 759 }
 760
 761 static void bnxt_get_channels(struct net_device *dev,
 762                               struct ethtool_channels *channel)
 763 {
 764         struct bnxt *bp = netdev_priv(dev);
 765         struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
 766         int max_rx_rings, max_tx_rings, tcs;
 767         int max_tx_sch_inputs;
 768
 769         /* Get the most up-to-date max_tx_sch_inputs. */
 770         if (BNXT_NEW_RM(bp))
 771                 bnxt_hwrm_func_resc_qcaps(bp, false);
 772         max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
 773
 774         bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
 775         if (max_tx_sch_inputs)
 776                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 777         channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
 778
 779         if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
 780                 max_rx_rings = 0;
 781                 max_tx_rings = 0;
 782         }
 783         if (max_tx_sch_inputs)
 784                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 785
 786         tcs = netdev_get_num_tc(dev);
 787         if (tcs > 1)
 788                 max_tx_rings /= tcs;
 789
 790         channel->max_rx = max_rx_rings;
 791         channel->max_tx = max_tx_rings;
 792         channel->max_other = 0;
 793         if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
 794                 channel->combined_count = bp->rx_nr_rings;
 795                 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
 796                         channel->combined_count--;
 797         } else {
 798                 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
 799                         channel->rx_count = bp->rx_nr_rings;
 800                         channel->tx_count = bp->tx_nr_rings_per_tc;
 801                 }
 802         }
 803 }
 804
 805 static int bnxt_set_channels(struct net_device *dev,
 806                              struct ethtool_channels *channel)
 807 {
 808         struct bnxt *bp = netdev_priv(dev);
 809         int req_tx_rings, req_rx_rings, tcs;
 810         bool sh = false;
 811         int tx_xdp = 0;
 812         int rc = 0;
 813
 814         if (channel->other_count)
 815                 return -EINVAL;
 816
 817         if (!channel->combined_count &&
 818             (!channel->rx_count || !channel->tx_count))
 819                 return -EINVAL;
 820
 821         if (channel->combined_count &&
 822             (channel->rx_count || channel->tx_count))
 823                 return -EINVAL;
 824
 825         if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
 826                                             channel->tx_count))
 827                 return -EINVAL;
 828
 829         if (channel->combined_count)
 830                 sh = true;
 831
 832         tcs = netdev_get_num_tc(dev);
 833
 834         req_tx_rings = sh ? channel->combined_count : channel->tx_count;
 835         req_rx_rings = sh ? channel->combined_count : channel->rx_count;
 836         if (bp->tx_nr_rings_xdp) {
 837                 if (!sh) {
 838                         netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
 839                         return -EINVAL;
 840                 }
 841                 tx_xdp = req_rx_rings;
 842         }
 843         rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
 844         if (rc) {
 845                 netdev_warn(dev, "Unable to allocate the requested rings\n");
 846                 return rc;
 847         }
 848
 849         if (netif_running(dev)) {
 850                 if (BNXT_PF(bp)) {
 851                         /* TODO CHIMP_FW: Send message to all VF's
 852                          * before PF unload
 853                          */
 854                 }
 855                 rc = bnxt_close_nic(bp, true, false);
 856                 if (rc) {
 857                         netdev_err(bp->dev, "Set channel failure rc :%x\n",
 858                                    rc);
 859                         return rc;
 860                 }
 861         }
 862
 863         if (sh) {
 864                 bp->flags |= BNXT_FLAG_SHARED_RINGS;
 865                 bp->rx_nr_rings = channel->combined_count;
 866                 bp->tx_nr_rings_per_tc = channel->combined_count;
 867         } else {
 868                 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
 869                 bp->rx_nr_rings = channel->rx_count;
 870                 bp->tx_nr_rings_per_tc = channel->tx_count;
 871         }
 872         bp->tx_nr_rings_xdp = tx_xdp;
 873         bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
 874         if (tcs > 1)
 875                 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
 876
 877         bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
 878                                bp->tx_nr_rings + bp->rx_nr_rings;
 879
 880         /* After changing number of rx channels, update NTUPLE feature. */
 881         netdev_update_features(dev);
 882         if (netif_running(dev)) {
 883                 rc = bnxt_open_nic(bp, true, false);
 884                 if ((!rc) && BNXT_PF(bp)) {
 885                         /* TODO CHIMP_FW: Send message to all VF's
 886                          * to renable
 887                          */
 888                 }
 889         } else {
 890                 rc = bnxt_reserve_rings(bp, true);
 891         }
 892
 893         return rc;
 894 }
 895
 896 #ifdef CONFIG_RFS_ACCEL
 897 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
 898                             u32 *rule_locs)
 899 {
 900         int i, j = 0;
 901
 902         cmd->data = bp->ntp_fltr_count;
 903         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
 904                 struct hlist_head *head;
 905                 struct bnxt_ntuple_filter *fltr;
 906
 907                 head = &bp->ntp_fltr_hash_tbl[i];
 908                 rcu_read_lock();
 909                 hlist_for_each_entry_rcu(fltr, head, hash) {
 910                         if (j == cmd->rule_cnt)
 911                                 break;
 912                         rule_locs[j++] = fltr->sw_id;
 913                 }
 914                 rcu_read_unlock();
 915                 if (j == cmd->rule_cnt)
 916                         break;
 917         }
 918         cmd->rule_cnt = j;
 919         return 0;
 920 }
 921
 922 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
 923 {
 924         struct ethtool_rx_flow_spec *fs =
 925                 (struct ethtool_rx_flow_spec *)&cmd->fs;
 926         struct bnxt_ntuple_filter *fltr;
 927         struct flow_keys *fkeys;
 928         int i, rc = -EINVAL;
 929
 930         if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
 931                 return rc;
 932
 933         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
 934                 struct hlist_head *head;
 935
 936                 head = &bp->ntp_fltr_hash_tbl[i];
 937                 rcu_read_lock();
 938                 hlist_for_each_entry_rcu(fltr, head, hash) {
 939                         if (fltr->sw_id == fs->location)
 940                                 goto fltr_found;
 941                 }
 942                 rcu_read_unlock();
 943         }
 944         return rc;
 945
 946 fltr_found:
 947         fkeys = &fltr->fkeys;
 948         if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
 949                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
 950                         fs->flow_type = TCP_V4_FLOW;
 951                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
 952                         fs->flow_type = UDP_V4_FLOW;
 953                 else
 954                         goto fltr_err;
 955
 956                 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
 957                 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
 958
 959                 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
 960                 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
 961
 962                 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
 963                 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
 964
 965                 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
 966                 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
 967         } else {
 968                 int i;
 969
 970                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
 971                         fs->flow_type = TCP_V6_FLOW;
 972                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
 973                         fs->flow_type = UDP_V6_FLOW;
 974                 else
 975                         goto fltr_err;
 976
 977                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
 978                         fkeys->addrs.v6addrs.src;
 979                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
 980                         fkeys->addrs.v6addrs.dst;
 981                 for (i = 0; i < 4; i++) {
 982                         fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
 983                         fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
 984                 }
 985                 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
 986                 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
 987
 988                 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
 989                 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
 990         }
 991
 992         fs->ring_cookie = fltr->rxq;
 993         rc = 0;
 994
 995 fltr_err:
 996         rcu_read_unlock();
 997
 998         return rc;
 999 }
1000 #endif
1001
1002 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1003 {
1004         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1005                 return RXH_IP_SRC | RXH_IP_DST;
1006         return 0;
1007 }
1008
1009 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1010 {
1011         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1012                 return RXH_IP_SRC | RXH_IP_DST;
1013         return 0;
1014 }
1015
1016 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1017 {
1018         cmd->data = 0;
1019         switch (cmd->flow_type) {
1020         case TCP_V4_FLOW:
1021                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1022                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1023                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1024                 cmd->data |= get_ethtool_ipv4_rss(bp);
1025                 break;
1026         case UDP_V4_FLOW:
1027                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1028                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1029                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1030                 /* fall through */
1031         case SCTP_V4_FLOW:
1032         case AH_ESP_V4_FLOW:
1033         case AH_V4_FLOW:
1034         case ESP_V4_FLOW:
1035         case IPV4_FLOW:
1036                 cmd->data |= get_ethtool_ipv4_rss(bp);
1037                 break;
1038
1039         case TCP_V6_FLOW:
1040                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1041                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1042                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1043                 cmd->data |= get_ethtool_ipv6_rss(bp);
1044                 break;
1045         case UDP_V6_FLOW:
1046                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1047                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1048                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1049                 /* fall through */
1050         case SCTP_V6_FLOW:
1051         case AH_ESP_V6_FLOW:
1052         case AH_V6_FLOW:
1053         case ESP_V6_FLOW:
1054         case IPV6_FLOW:
1055                 cmd->data |= get_ethtool_ipv6_rss(bp);
1056                 break;
1057         }
1058         return 0;
1059 }
1060
1061 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1062 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1063
1064 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1065 {
1066         u32 rss_hash_cfg = bp->rss_hash_cfg;
1067         int tuple, rc = 0;
1068
1069         if (cmd->data == RXH_4TUPLE)
1070                 tuple = 4;
1071         else if (cmd->data == RXH_2TUPLE)
1072                 tuple = 2;
1073         else if (!cmd->data)
1074                 tuple = 0;
1075         else
1076                 return -EINVAL;
1077
1078         if (cmd->flow_type == TCP_V4_FLOW) {
1079                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1080                 if (tuple == 4)
1081                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1082         } else if (cmd->flow_type == UDP_V4_FLOW) {
1083                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1084                         return -EINVAL;
1085                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1086                 if (tuple == 4)
1087                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1088         } else if (cmd->flow_type == TCP_V6_FLOW) {
1089                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1090                 if (tuple == 4)
1091                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1092         } else if (cmd->flow_type == UDP_V6_FLOW) {
1093                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1094                         return -EINVAL;
1095                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1096                 if (tuple == 4)
1097                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1098         } else if (tuple == 4) {
1099                 return -EINVAL;
1100         }
1101
1102         switch (cmd->flow_type) {
1103         case TCP_V4_FLOW:
1104         case UDP_V4_FLOW:
1105         case SCTP_V4_FLOW:
1106         case AH_ESP_V4_FLOW:
1107         case AH_V4_FLOW:
1108         case ESP_V4_FLOW:
1109         case IPV4_FLOW:
1110                 if (tuple == 2)
1111                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1112                 else if (!tuple)
1113                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1114                 break;
1115
1116         case TCP_V6_FLOW:
1117         case UDP_V6_FLOW:
1118         case SCTP_V6_FLOW:
1119         case AH_ESP_V6_FLOW:
1120         case AH_V6_FLOW:
1121         case ESP_V6_FLOW:
1122         case IPV6_FLOW:
1123                 if (tuple == 2)
1124                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1125                 else if (!tuple)
1126                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1127                 break;
1128         }
1129
1130         if (bp->rss_hash_cfg == rss_hash_cfg)
1131                 return 0;
1132
1133         bp->rss_hash_cfg = rss_hash_cfg;
1134         if (netif_running(bp->dev)) {
1135                 bnxt_close_nic(bp, false, false);
1136                 rc = bnxt_open_nic(bp, false, false);
1137         }
1138         return rc;
1139 }
1140
1141 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1142                           u32 *rule_locs)
1143 {
1144         struct bnxt *bp = netdev_priv(dev);
1145         int rc = 0;
1146
1147         switch (cmd->cmd) {
1148 #ifdef CONFIG_RFS_ACCEL
1149         case ETHTOOL_GRXRINGS:
1150                 cmd->data = bp->rx_nr_rings;
1151                 break;
1152
1153         case ETHTOOL_GRXCLSRLCNT:
1154                 cmd->rule_cnt = bp->ntp_fltr_count;
1155                 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1156                 break;
1157
1158         case ETHTOOL_GRXCLSRLALL:
1159                 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1160                 break;
1161
1162         case ETHTOOL_GRXCLSRULE:
1163                 rc = bnxt_grxclsrule(bp, cmd);
1164                 break;
1165 #endif
1166
1167         case ETHTOOL_GRXFH:
1168                 rc = bnxt_grxfh(bp, cmd);
1169                 break;
1170
1171         default:
1172                 rc = -EOPNOTSUPP;
1173                 break;
1174         }
1175
1176         return rc;
1177 }
1178
1179 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1180 {
1181         struct bnxt *bp = netdev_priv(dev);
1182         int rc;
1183
1184         switch (cmd->cmd) {
1185         case ETHTOOL_SRXFH:
1186                 rc = bnxt_srxfh(bp, cmd);
1187                 break;
1188
1189         default:
1190                 rc = -EOPNOTSUPP;
1191                 break;
1192         }
1193         return rc;
1194 }
1195
1196 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1197 {
1198         return HW_HASH_INDEX_SIZE;
1199 }
1200
1201 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1202 {
1203         return HW_HASH_KEY_SIZE;
1204 }
1205
1206 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1207                          u8 *hfunc)
1208 {
1209         struct bnxt *bp = netdev_priv(dev);
1210         struct bnxt_vnic_info *vnic;
1211         int i = 0;
1212
1213         if (hfunc)
1214                 *hfunc = ETH_RSS_HASH_TOP;
1215
1216         if (!bp->vnic_info)
1217                 return 0;
1218
1219         vnic = &bp->vnic_info[0];
1220         if (indir && vnic->rss_table) {
1221                 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
1222                         indir[i] = le16_to_cpu(vnic->rss_table[i]);
1223         }
1224
1225         if (key && vnic->rss_hash_key)
1226                 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1227
1228         return 0;
1229 }
1230
1231 static void bnxt_get_drvinfo(struct net_device *dev,
1232                              struct ethtool_drvinfo *info)
1233 {
1234         struct bnxt *bp = netdev_priv(dev);
1235
1236         strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1237         strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
1238         strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1239         strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1240         info->n_stats = bnxt_get_num_stats(bp);
1241         info->testinfo_len = bp->num_tests;
1242         /* TODO CHIMP_FW: eeprom dump details */
1243         info->eedump_len = 0;
1244         /* TODO CHIMP FW: reg dump details */
1245         info->regdump_len = 0;
1246 }
1247
1248 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1249 {
1250         struct bnxt *bp = netdev_priv(dev);
1251
1252         wol->supported = 0;
1253         wol->wolopts = 0;
1254         memset(&wol->sopass, 0, sizeof(wol->sopass));
1255         if (bp->flags & BNXT_FLAG_WOL_CAP) {
1256                 wol->supported = WAKE_MAGIC;
1257                 if (bp->wol)
1258                         wol->wolopts = WAKE_MAGIC;
1259         }
1260 }
1261
1262 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1263 {
1264         struct bnxt *bp = netdev_priv(dev);
1265
1266         if (wol->wolopts & ~WAKE_MAGIC)
1267                 return -EINVAL;
1268
1269         if (wol->wolopts & WAKE_MAGIC) {
1270                 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1271                         return -EINVAL;
1272                 if (!bp->wol) {
1273                         if (bnxt_hwrm_alloc_wol_fltr(bp))
1274                                 return -EBUSY;
1275                         bp->wol = 1;
1276                 }
1277         } else {
1278                 if (bp->wol) {
1279                         if (bnxt_hwrm_free_wol_fltr(bp))
1280                                 return -EBUSY;
1281                         bp->wol = 0;
1282                 }
1283         }
1284         return 0;
1285 }
1286
1287 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1288 {
1289         u32 speed_mask = 0;
1290
1291         /* TODO: support 25GB, 40GB, 50GB with different cable type */
1292         /* set the advertised speeds */
1293         if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1294                 speed_mask |= ADVERTISED_100baseT_Full;
1295         if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1296                 speed_mask |= ADVERTISED_1000baseT_Full;
1297         if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1298                 speed_mask |= ADVERTISED_2500baseX_Full;
1299         if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1300                 speed_mask |= ADVERTISED_10000baseT_Full;
1301         if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1302                 speed_mask |= ADVERTISED_40000baseCR4_Full;
1303
1304         if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1305                 speed_mask |= ADVERTISED_Pause;
1306         else if (fw_pause & BNXT_LINK_PAUSE_TX)
1307                 speed_mask |= ADVERTISED_Asym_Pause;
1308         else if (fw_pause & BNXT_LINK_PAUSE_RX)
1309                 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1310
1311         return speed_mask;
1312 }
1313
1314 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1315 {                                                                       \
1316         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)                    \
1317                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1318                                                      100baseT_Full);    \
1319         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)                      \
1320                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1321                                                      1000baseT_Full);   \
1322         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)                     \
1323                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1324                                                      10000baseT_Full);  \
1325         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)                     \
1326                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1327                                                      25000baseCR_Full); \
1328         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)                     \
1329                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1330                                                      40000baseCR4_Full);\
1331         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)                     \
1332                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1333                                                      50000baseCR2_Full);\
1334         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)                    \
1335                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1336                                                      100000baseCR4_Full);\
1337         if ((fw_pause) & BNXT_LINK_PAUSE_RX) {                          \
1338                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1339                                                      Pause);            \
1340                 if (!((fw_pause) & BNXT_LINK_PAUSE_TX))                 \
1341                         ethtool_link_ksettings_add_link_mode(           \
1342                                         lk_ksettings, name, Asym_Pause);\
1343         } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {                   \
1344                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1345                                                      Asym_Pause);       \
1346         }                                                               \
1347 }
1348
1349 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)          \
1350 {                                                                       \
1351         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1352                                                   100baseT_Full) ||     \
1353             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1354                                                   100baseT_Half))       \
1355                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;               \
1356         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1357                                                   1000baseT_Full) ||    \
1358             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1359                                                   1000baseT_Half))      \
1360                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;                 \
1361         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1362                                                   10000baseT_Full))     \
1363                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;                \
1364         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1365                                                   25000baseCR_Full))    \
1366                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;                \
1367         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1368                                                   40000baseCR4_Full))   \
1369                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;                \
1370         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1371                                                   50000baseCR2_Full))   \
1372                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;                \
1373         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1374                                                   100000baseCR4_Full))  \
1375                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;               \
1376 }
1377
1378 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1379                                 struct ethtool_link_ksettings *lk_ksettings)
1380 {
1381         u16 fw_speeds = link_info->advertising;
1382         u8 fw_pause = 0;
1383
1384         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1385                 fw_pause = link_info->auto_pause_setting;
1386
1387         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1388 }
1389
1390 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1391                                 struct ethtool_link_ksettings *lk_ksettings)
1392 {
1393         u16 fw_speeds = link_info->lp_auto_link_speeds;
1394         u8 fw_pause = 0;
1395
1396         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1397                 fw_pause = link_info->lp_pause;
1398
1399         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1400                                 lp_advertising);
1401 }
1402
1403 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1404                                 struct ethtool_link_ksettings *lk_ksettings)
1405 {
1406         u16 fw_speeds = link_info->support_speeds;
1407
1408         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1409
1410         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1411         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1412                                              Asym_Pause);
1413
1414         if (link_info->support_auto_speeds)
1415                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1416                                                      Autoneg);
1417 }
1418
1419 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1420 {
1421         switch (fw_link_speed) {
1422         case BNXT_LINK_SPEED_100MB:
1423                 return SPEED_100;
1424         case BNXT_LINK_SPEED_1GB:
1425                 return SPEED_1000;
1426         case BNXT_LINK_SPEED_2_5GB:
1427                 return SPEED_2500;
1428         case BNXT_LINK_SPEED_10GB:
1429                 return SPEED_10000;
1430         case BNXT_LINK_SPEED_20GB:
1431                 return SPEED_20000;
1432         case BNXT_LINK_SPEED_25GB:
1433                 return SPEED_25000;
1434         case BNXT_LINK_SPEED_40GB:
1435                 return SPEED_40000;
1436         case BNXT_LINK_SPEED_50GB:
1437                 return SPEED_50000;
1438         case BNXT_LINK_SPEED_100GB:
1439                 return SPEED_100000;
1440         default:
1441                 return SPEED_UNKNOWN;
1442         }
1443 }
1444
1445 static int bnxt_get_link_ksettings(struct net_device *dev,
1446                                    struct ethtool_link_ksettings *lk_ksettings)
1447 {
1448         struct bnxt *bp = netdev_priv(dev);
1449         struct bnxt_link_info *link_info = &bp->link_info;
1450         struct ethtool_link_settings *base = &lk_ksettings->base;
1451         u32 ethtool_speed;
1452
1453         ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1454         mutex_lock(&bp->link_lock);
1455         bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1456
1457         ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1458         if (link_info->autoneg) {
1459                 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1460                 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1461                                                      advertising, Autoneg);
1462                 base->autoneg = AUTONEG_ENABLE;
1463                 if (link_info->phy_link_status == BNXT_LINK_LINK)
1464                         bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1465                 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1466                 if (!netif_carrier_ok(dev))
1467                         base->duplex = DUPLEX_UNKNOWN;
1468                 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1469                         base->duplex = DUPLEX_FULL;
1470                 else
1471                         base->duplex = DUPLEX_HALF;
1472         } else {
1473                 base->autoneg = AUTONEG_DISABLE;
1474                 ethtool_speed =
1475                         bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1476                 base->duplex = DUPLEX_HALF;
1477                 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1478                         base->duplex = DUPLEX_FULL;
1479         }
1480         base->speed = ethtool_speed;
1481
1482         base->port = PORT_NONE;
1483         if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1484                 base->port = PORT_TP;
1485                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1486                                                      TP);
1487                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1488                                                      TP);
1489         } else {
1490                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1491                                                      FIBRE);
1492                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1493                                                      FIBRE);
1494
1495                 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1496                         base->port = PORT_DA;
1497                 else if (link_info->media_type ==
1498                          PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1499                         base->port = PORT_FIBRE;
1500         }
1501         base->phy_address = link_info->phy_addr;
1502         mutex_unlock(&bp->link_lock);
1503
1504         return 0;
1505 }
1506
1507 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1508 {
1509         struct bnxt *bp = netdev_priv(dev);
1510         struct bnxt_link_info *link_info = &bp->link_info;
1511         u16 support_spds = link_info->support_speeds;
1512         u32 fw_speed = 0;
1513
1514         switch (ethtool_speed) {
1515         case SPEED_100:
1516                 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1517                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1518                 break;
1519         case SPEED_1000:
1520                 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1521                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1522                 break;
1523         case SPEED_2500:
1524                 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1525                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1526                 break;
1527         case SPEED_10000:
1528                 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1529                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1530                 break;
1531         case SPEED_20000:
1532                 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1533                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1534                 break;
1535         case SPEED_25000:
1536                 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1537                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1538                 break;
1539         case SPEED_40000:
1540                 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1541                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1542                 break;
1543         case SPEED_50000:
1544                 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1545                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1546                 break;
1547         case SPEED_100000:
1548                 if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1549                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1550                 break;
1551         default:
1552                 netdev_err(dev, "unsupported speed!\n");
1553                 break;
1554         }
1555         return fw_speed;
1556 }
1557
1558 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1559 {
1560         u16 fw_speed_mask = 0;
1561
1562         /* only support autoneg at speed 100, 1000, and 10000 */
1563         if (advertising & (ADVERTISED_100baseT_Full |
1564                            ADVERTISED_100baseT_Half)) {
1565                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1566         }
1567         if (advertising & (ADVERTISED_1000baseT_Full |
1568                            ADVERTISED_1000baseT_Half)) {
1569                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1570         }
1571         if (advertising & ADVERTISED_10000baseT_Full)
1572                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1573
1574         if (advertising & ADVERTISED_40000baseCR4_Full)
1575                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1576
1577         return fw_speed_mask;
1578 }
1579
1580 static int bnxt_set_link_ksettings(struct net_device *dev,
1581                            const struct ethtool_link_ksettings *lk_ksettings)
1582 {
1583         struct bnxt *bp = netdev_priv(dev);
1584         struct bnxt_link_info *link_info = &bp->link_info;
1585         const struct ethtool_link_settings *base = &lk_ksettings->base;
1586         bool set_pause = false;
1587         u16 fw_advertising = 0;
1588         u32 speed;
1589         int rc = 0;
1590
1591         if (!BNXT_SINGLE_PF(bp))
1592                 return -EOPNOTSUPP;
1593
1594         mutex_lock(&bp->link_lock);
1595         if (base->autoneg == AUTONEG_ENABLE) {
1596                 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1597                                         advertising);
1598                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1599                 if (!fw_advertising)
1600                         link_info->advertising = link_info->support_auto_speeds;
1601                 else
1602                         link_info->advertising = fw_advertising;
1603                 /* any change to autoneg will cause link change, therefore the
1604                  * driver should put back the original pause setting in autoneg
1605                  */
1606                 set_pause = true;
1607         } else {
1608                 u16 fw_speed;
1609                 u8 phy_type = link_info->phy_type;
1610
1611                 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1612                     phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1613                     link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1614                         netdev_err(dev, "10GBase-T devices must autoneg\n");
1615                         rc = -EINVAL;
1616                         goto set_setting_exit;
1617                 }
1618                 if (base->duplex == DUPLEX_HALF) {
1619                         netdev_err(dev, "HALF DUPLEX is not supported!\n");
1620                         rc = -EINVAL;
1621                         goto set_setting_exit;
1622                 }
1623                 speed = base->speed;
1624                 fw_speed = bnxt_get_fw_speed(dev, speed);
1625                 if (!fw_speed) {
1626                         rc = -EINVAL;
1627                         goto set_setting_exit;
1628                 }
1629                 link_info->req_link_speed = fw_speed;
1630                 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1631                 link_info->autoneg = 0;
1632                 link_info->advertising = 0;
1633         }
1634
1635         if (netif_running(dev))
1636                 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1637
1638 set_setting_exit:
1639         mutex_unlock(&bp->link_lock);
1640         return rc;
1641 }
1642
1643 static void bnxt_get_pauseparam(struct net_device *dev,
1644                                 struct ethtool_pauseparam *epause)
1645 {
1646         struct bnxt *bp = netdev_priv(dev);
1647         struct bnxt_link_info *link_info = &bp->link_info;
1648
1649         if (BNXT_VF(bp))
1650                 return;
1651         epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1652         epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1653         epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1654 }
1655
1656 static int bnxt_set_pauseparam(struct net_device *dev,
1657                                struct ethtool_pauseparam *epause)
1658 {
1659         int rc = 0;
1660         struct bnxt *bp = netdev_priv(dev);
1661         struct bnxt_link_info *link_info = &bp->link_info;
1662
1663         if (!BNXT_SINGLE_PF(bp))
1664                 return -EOPNOTSUPP;
1665
1666         if (epause->autoneg) {
1667                 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1668                         return -EINVAL;
1669
1670                 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1671                 if (bp->hwrm_spec_code >= 0x10201)
1672                         link_info->req_flow_ctrl =
1673                                 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1674         } else {
1675                 /* when transition from auto pause to force pause,
1676                  * force a link change
1677                  */
1678                 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1679                         link_info->force_link_chng = true;
1680                 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1681                 link_info->req_flow_ctrl = 0;
1682         }
1683         if (epause->rx_pause)
1684                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1685
1686         if (epause->tx_pause)
1687                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1688
1689         if (netif_running(dev))
1690                 rc = bnxt_hwrm_set_pause(bp);
1691         return rc;
1692 }
1693
1694 static u32 bnxt_get_link(struct net_device *dev)
1695 {
1696         struct bnxt *bp = netdev_priv(dev);
1697
1698         /* TODO: handle MF, VF, driver close case */
1699         return bp->link_info.link_up;
1700 }
1701
1702 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1703                                 u16 ext, u16 *index, u32 *item_length,
1704                                 u32 *data_length);
1705
1706 static int bnxt_flash_nvram(struct net_device *dev,
1707                             u16 dir_type,
1708                             u16 dir_ordinal,
1709                             u16 dir_ext,
1710                             u16 dir_attr,
1711                             const u8 *data,
1712                             size_t data_len)
1713 {
1714         struct bnxt *bp = netdev_priv(dev);
1715         int rc;
1716         struct hwrm_nvm_write_input req = {0};
1717         dma_addr_t dma_handle;
1718         u8 *kmem;
1719
1720         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1721
1722         req.dir_type = cpu_to_le16(dir_type);
1723         req.dir_ordinal = cpu_to_le16(dir_ordinal);
1724         req.dir_ext = cpu_to_le16(dir_ext);
1725         req.dir_attr = cpu_to_le16(dir_attr);
1726         req.dir_data_length = cpu_to_le32(data_len);
1727
1728         kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1729                                   GFP_KERNEL);
1730         if (!kmem) {
1731                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1732                            (unsigned)data_len);
1733                 return -ENOMEM;
1734         }
1735         memcpy(kmem, data, data_len);
1736         req.host_src_addr = cpu_to_le64(dma_handle);
1737
1738         rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1739         dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1740
1741         if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1742                 netdev_info(dev,
1743                             "PF does not have admin privileges to flash the device\n");
1744                 rc = -EACCES;
1745         } else if (rc) {
1746                 rc = -EIO;
1747         }
1748         return rc;
1749 }
1750
1751 static int bnxt_firmware_reset(struct net_device *dev,
1752                                u16 dir_type)
1753 {
1754         struct hwrm_fw_reset_input req = {0};
1755         struct bnxt *bp = netdev_priv(dev);
1756         int rc;
1757
1758         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1759
1760         /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1761         /*       (e.g. when firmware isn't already running) */
1762         switch (dir_type) {
1763         case BNX_DIR_TYPE_CHIMP_PATCH:
1764         case BNX_DIR_TYPE_BOOTCODE:
1765         case BNX_DIR_TYPE_BOOTCODE_2:
1766                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1767                 /* Self-reset ChiMP upon next PCIe reset: */
1768                 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1769                 break;
1770         case BNX_DIR_TYPE_APE_FW:
1771         case BNX_DIR_TYPE_APE_PATCH:
1772                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1773                 /* Self-reset APE upon next PCIe reset: */
1774                 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1775                 break;
1776         case BNX_DIR_TYPE_KONG_FW:
1777         case BNX_DIR_TYPE_KONG_PATCH:
1778                 req.embedded_proc_type =
1779                         FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1780                 break;
1781         case BNX_DIR_TYPE_BONO_FW:
1782         case BNX_DIR_TYPE_BONO_PATCH:
1783                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1784                 break;
1785         case BNXT_FW_RESET_CHIP:
1786                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1787                 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1788                 break;
1789         case BNXT_FW_RESET_AP:
1790                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
1791                 break;
1792         default:
1793                 return -EINVAL;
1794         }
1795
1796         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1797         if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1798                 netdev_info(dev,
1799                             "PF does not have admin privileges to reset the device\n");
1800                 rc = -EACCES;
1801         } else if (rc) {
1802                 rc = -EIO;
1803         }
1804         return rc;
1805 }
1806
1807 static int bnxt_flash_firmware(struct net_device *dev,
1808                                u16 dir_type,
1809                                const u8 *fw_data,
1810                                size_t fw_size)
1811 {
1812         int     rc = 0;
1813         u16     code_type;
1814         u32     stored_crc;
1815         u32     calculated_crc;
1816         struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1817
1818         switch (dir_type) {
1819         case BNX_DIR_TYPE_BOOTCODE:
1820         case BNX_DIR_TYPE_BOOTCODE_2:
1821                 code_type = CODE_BOOT;
1822                 break;
1823         case BNX_DIR_TYPE_CHIMP_PATCH:
1824                 code_type = CODE_CHIMP_PATCH;
1825                 break;
1826         case BNX_DIR_TYPE_APE_FW:
1827                 code_type = CODE_MCTP_PASSTHRU;
1828                 break;
1829         case BNX_DIR_TYPE_APE_PATCH:
1830                 code_type = CODE_APE_PATCH;
1831                 break;
1832         case BNX_DIR_TYPE_KONG_FW:
1833                 code_type = CODE_KONG_FW;
1834                 break;
1835         case BNX_DIR_TYPE_KONG_PATCH:
1836                 code_type = CODE_KONG_PATCH;
1837                 break;
1838         case BNX_DIR_TYPE_BONO_FW:
1839                 code_type = CODE_BONO_FW;
1840                 break;
1841         case BNX_DIR_TYPE_BONO_PATCH:
1842                 code_type = CODE_BONO_PATCH;
1843                 break;
1844         default:
1845                 netdev_err(dev, "Unsupported directory entry type: %u\n",
1846                            dir_type);
1847                 return -EINVAL;
1848         }
1849         if (fw_size < sizeof(struct bnxt_fw_header)) {
1850                 netdev_err(dev, "Invalid firmware file size: %u\n",
1851                            (unsigned int)fw_size);
1852                 return -EINVAL;
1853         }
1854         if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1855                 netdev_err(dev, "Invalid firmware signature: %08X\n",
1856                            le32_to_cpu(header->signature));
1857                 return -EINVAL;
1858         }
1859         if (header->code_type != code_type) {
1860                 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1861                            code_type, header->code_type);
1862                 return -EINVAL;
1863         }
1864         if (header->device != DEVICE_CUMULUS_FAMILY) {
1865                 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1866                            DEVICE_CUMULUS_FAMILY, header->device);
1867                 return -EINVAL;
1868         }
1869         /* Confirm the CRC32 checksum of the file: */
1870         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1871                                              sizeof(stored_crc)));
1872         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1873         if (calculated_crc != stored_crc) {
1874                 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1875                            (unsigned long)stored_crc,
1876                            (unsigned long)calculated_crc);
1877                 return -EINVAL;
1878         }
1879         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1880                               0, 0, fw_data, fw_size);
1881         if (rc == 0)    /* Firmware update successful */
1882                 rc = bnxt_firmware_reset(dev, dir_type);
1883
1884         return rc;
1885 }
1886
1887 static int bnxt_flash_microcode(struct net_device *dev,
1888                                 u16 dir_type,
1889                                 const u8 *fw_data,
1890                                 size_t fw_size)
1891 {
1892         struct bnxt_ucode_trailer *trailer;
1893         u32 calculated_crc;
1894         u32 stored_crc;
1895         int rc = 0;
1896
1897         if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1898                 netdev_err(dev, "Invalid microcode file size: %u\n",
1899                            (unsigned int)fw_size);
1900                 return -EINVAL;
1901         }
1902         trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1903                                                 sizeof(*trailer)));
1904         if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1905                 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1906                            le32_to_cpu(trailer->sig));
1907                 return -EINVAL;
1908         }
1909         if (le16_to_cpu(trailer->dir_type) != dir_type) {
1910                 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1911                            dir_type, le16_to_cpu(trailer->dir_type));
1912                 return -EINVAL;
1913         }
1914         if (le16_to_cpu(trailer->trailer_length) <
1915                 sizeof(struct bnxt_ucode_trailer)) {
1916                 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1917                            le16_to_cpu(trailer->trailer_length));
1918                 return -EINVAL;
1919         }
1920
1921         /* Confirm the CRC32 checksum of the file: */
1922         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1923                                              sizeof(stored_crc)));
1924         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1925         if (calculated_crc != stored_crc) {
1926                 netdev_err(dev,
1927                            "CRC32 (%08lX) does not match calculated: %08lX\n",
1928                            (unsigned long)stored_crc,
1929                            (unsigned long)calculated_crc);
1930                 return -EINVAL;
1931         }
1932         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1933                               0, 0, fw_data, fw_size);
1934
1935         return rc;
1936 }
1937
1938 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1939 {
1940         switch (dir_type) {
1941         case BNX_DIR_TYPE_CHIMP_PATCH:
1942         case BNX_DIR_TYPE_BOOTCODE:
1943         case BNX_DIR_TYPE_BOOTCODE_2:
1944         case BNX_DIR_TYPE_APE_FW:
1945         case BNX_DIR_TYPE_APE_PATCH:
1946         case BNX_DIR_TYPE_KONG_FW:
1947         case BNX_DIR_TYPE_KONG_PATCH:
1948         case BNX_DIR_TYPE_BONO_FW:
1949         case BNX_DIR_TYPE_BONO_PATCH:
1950                 return true;
1951         }
1952
1953         return false;
1954 }
1955
1956 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
1957 {
1958         switch (dir_type) {
1959         case BNX_DIR_TYPE_AVS:
1960         case BNX_DIR_TYPE_EXP_ROM_MBA:
1961         case BNX_DIR_TYPE_PCIE:
1962         case BNX_DIR_TYPE_TSCF_UCODE:
1963         case BNX_DIR_TYPE_EXT_PHY:
1964         case BNX_DIR_TYPE_CCM:
1965         case BNX_DIR_TYPE_ISCSI_BOOT:
1966         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1967         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1968                 return true;
1969         }
1970
1971         return false;
1972 }
1973
1974 static bool bnxt_dir_type_is_executable(u16 dir_type)
1975 {
1976         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
1977                 bnxt_dir_type_is_other_exec_format(dir_type);
1978 }
1979
1980 static int bnxt_flash_firmware_from_file(struct net_device *dev,
1981                                          u16 dir_type,
1982                                          const char *filename)
1983 {
1984         const struct firmware  *fw;
1985         int                     rc;
1986
1987         rc = request_firmware(&fw, filename, &dev->dev);
1988         if (rc != 0) {
1989                 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1990                            rc, filename);
1991                 return rc;
1992         }
1993         if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1994                 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1995         else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1996                 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1997         else
1998                 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1999                                       0, 0, fw->data, fw->size);
2000         release_firmware(fw);
2001         return rc;
2002 }
2003
2004 static int bnxt_flash_package_from_file(struct net_device *dev,
2005                                         char *filename, u32 install_type)
2006 {
2007         struct bnxt *bp = netdev_priv(dev);
2008         struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
2009         struct hwrm_nvm_install_update_input install = {0};
2010         const struct firmware *fw;
2011         int rc, hwrm_err = 0;
2012         u32 item_len;
2013         u16 index;
2014
2015         bnxt_hwrm_fw_set_time(bp);
2016
2017         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
2018                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2019                                  &index, &item_len, NULL) != 0) {
2020                 netdev_err(dev, "PKG update area not created in nvram\n");
2021                 return -ENOBUFS;
2022         }
2023
2024         rc = request_firmware(&fw, filename, &dev->dev);
2025         if (rc != 0) {
2026                 netdev_err(dev, "PKG error %d requesting file: %s\n",
2027                            rc, filename);
2028                 return rc;
2029         }
2030
2031         if (fw->size > item_len) {
2032                 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
2033                            (unsigned long)fw->size);
2034                 rc = -EFBIG;
2035         } else {
2036                 dma_addr_t dma_handle;
2037                 u8 *kmem;
2038                 struct hwrm_nvm_modify_input modify = {0};
2039
2040                 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
2041
2042                 modify.dir_idx = cpu_to_le16(index);
2043                 modify.len = cpu_to_le32(fw->size);
2044
2045                 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
2046                                           &dma_handle, GFP_KERNEL);
2047                 if (!kmem) {
2048                         netdev_err(dev,
2049                                    "dma_alloc_coherent failure, length = %u\n",
2050                                    (unsigned int)fw->size);
2051                         rc = -ENOMEM;
2052                 } else {
2053                         memcpy(kmem, fw->data, fw->size);
2054                         modify.host_src_addr = cpu_to_le64(dma_handle);
2055
2056                         hwrm_err = hwrm_send_message(bp, &modify,
2057                                                      sizeof(modify),
2058                                                      FLASH_PACKAGE_TIMEOUT);
2059                         dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
2060                                           dma_handle);
2061                 }
2062         }
2063         release_firmware(fw);
2064         if (rc || hwrm_err)
2065                 goto err_exit;
2066
2067         if ((install_type & 0xffff) == 0)
2068                 install_type >>= 16;
2069         bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
2070         install.install_type = cpu_to_le32(install_type);
2071
2072         mutex_lock(&bp->hwrm_cmd_lock);
2073         hwrm_err = _hwrm_send_message(bp, &install, sizeof(install),
2074                                       INSTALL_PACKAGE_TIMEOUT);
2075         if (hwrm_err)
2076                 goto flash_pkg_exit;
2077
2078         if (resp->error_code) {
2079                 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
2080
2081                 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
2082                         install.flags |= cpu_to_le16(
2083                                NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
2084                         hwrm_err = _hwrm_send_message(bp, &install,
2085                                                       sizeof(install),
2086                                                       INSTALL_PACKAGE_TIMEOUT);
2087                         if (hwrm_err)
2088                                 goto flash_pkg_exit;
2089                 }
2090         }
2091
2092         if (resp->result) {
2093                 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
2094                            (s8)resp->result, (int)resp->problem_item);
2095                 rc = -ENOPKG;
2096         }
2097 flash_pkg_exit:
2098         mutex_unlock(&bp->hwrm_cmd_lock);
2099 err_exit:
2100         if (hwrm_err == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
2101                 netdev_info(dev,
2102                             "PF does not have admin privileges to flash the device\n");
2103                 rc = -EACCES;
2104         } else if (hwrm_err) {
2105                 rc = -EOPNOTSUPP;
2106         }
2107         return rc;
2108 }
2109
2110 static int bnxt_flash_device(struct net_device *dev,
2111                              struct ethtool_flash *flash)
2112 {
2113         if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
2114                 netdev_err(dev, "flashdev not supported from a virtual function\n");
2115                 return -EINVAL;
2116         }
2117
2118         if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
2119             flash->region > 0xffff)
2120                 return bnxt_flash_package_from_file(dev, flash->data,
2121                                                     flash->region);
2122
2123         return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
2124 }
2125
2126 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
2127 {
2128         struct bnxt *bp = netdev_priv(dev);
2129         int rc;
2130         struct hwrm_nvm_get_dir_info_input req = {0};
2131         struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
2132
2133         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
2134
2135         mutex_lock(&bp->hwrm_cmd_lock);
2136         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2137         if (!rc) {
2138                 *entries = le32_to_cpu(output->entries);
2139                 *length = le32_to_cpu(output->entry_length);
2140         }
2141         mutex_unlock(&bp->hwrm_cmd_lock);
2142         return rc;
2143 }
2144
2145 static int bnxt_get_eeprom_len(struct net_device *dev)
2146 {
2147         struct bnxt *bp = netdev_priv(dev);
2148
2149         if (BNXT_VF(bp))
2150                 return 0;
2151
2152         /* The -1 return value allows the entire 32-bit range of offsets to be
2153          * passed via the ethtool command-line utility.
2154          */
2155         return -1;
2156 }
2157
2158 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
2159 {
2160         struct bnxt *bp = netdev_priv(dev);
2161         int rc;
2162         u32 dir_entries;
2163         u32 entry_length;
2164         u8 *buf;
2165         size_t buflen;
2166         dma_addr_t dma_handle;
2167         struct hwrm_nvm_get_dir_entries_input req = {0};
2168
2169         rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
2170         if (rc != 0)
2171                 return rc;
2172
2173         /* Insert 2 bytes of directory info (count and size of entries) */
2174         if (len < 2)
2175                 return -EINVAL;
2176
2177         *data++ = dir_entries;
2178         *data++ = entry_length;
2179         len -= 2;
2180         memset(data, 0xff, len);
2181
2182         buflen = dir_entries * entry_length;
2183         buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
2184                                  GFP_KERNEL);
2185         if (!buf) {
2186                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2187                            (unsigned)buflen);
2188                 return -ENOMEM;
2189         }
2190         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
2191         req.host_dest_addr = cpu_to_le64(dma_handle);
2192         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2193         if (rc == 0)
2194                 memcpy(data, buf, len > buflen ? buflen : len);
2195         dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
2196         return rc;
2197 }
2198
2199 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
2200                                u32 length, u8 *data)
2201 {
2202         struct bnxt *bp = netdev_priv(dev);
2203         int rc;
2204         u8 *buf;
2205         dma_addr_t dma_handle;
2206         struct hwrm_nvm_read_input req = {0};
2207
2208         if (!length)
2209                 return -EINVAL;
2210
2211         buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
2212                                  GFP_KERNEL);
2213         if (!buf) {
2214                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2215                            (unsigned)length);
2216                 return -ENOMEM;
2217         }
2218         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
2219         req.host_dest_addr = cpu_to_le64(dma_handle);
2220         req.dir_idx = cpu_to_le16(index);
2221         req.offset = cpu_to_le32(offset);
2222         req.len = cpu_to_le32(length);
2223
2224         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2225         if (rc == 0)
2226                 memcpy(data, buf, length);
2227         dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
2228         return rc;
2229 }
2230
2231 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2232                                 u16 ext, u16 *index, u32 *item_length,
2233                                 u32 *data_length)
2234 {
2235         struct bnxt *bp = netdev_priv(dev);
2236         int rc;
2237         struct hwrm_nvm_find_dir_entry_input req = {0};
2238         struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
2239
2240         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
2241         req.enables = 0;
2242         req.dir_idx = 0;
2243         req.dir_type = cpu_to_le16(type);
2244         req.dir_ordinal = cpu_to_le16(ordinal);
2245         req.dir_ext = cpu_to_le16(ext);
2246         req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
2247         mutex_lock(&bp->hwrm_cmd_lock);
2248         rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2249         if (rc == 0) {
2250                 if (index)
2251                         *index = le16_to_cpu(output->dir_idx);
2252                 if (item_length)
2253                         *item_length = le32_to_cpu(output->dir_item_length);
2254                 if (data_length)
2255                         *data_length = le32_to_cpu(output->dir_data_length);
2256         }
2257         mutex_unlock(&bp->hwrm_cmd_lock);
2258         return rc;
2259 }
2260
2261 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
2262 {
2263         char    *retval = NULL;
2264         char    *p;
2265         char    *value;
2266         int     field = 0;
2267
2268         if (datalen < 1)
2269                 return NULL;
2270         /* null-terminate the log data (removing last '\n'): */
2271         data[datalen - 1] = 0;
2272         for (p = data; *p != 0; p++) {
2273                 field = 0;
2274                 retval = NULL;
2275                 while (*p != 0 && *p != '\n') {
2276                         value = p;
2277                         while (*p != 0 && *p != '\t' && *p != '\n')
2278                                 p++;
2279                         if (field == desired_field)
2280                                 retval = value;
2281                         if (*p != '\t')
2282                                 break;
2283                         *p = 0;
2284                         field++;
2285                         p++;
2286                 }
2287                 if (*p == 0)
2288                         break;
2289                 *p = 0;
2290         }
2291         return retval;
2292 }
2293
2294 static void bnxt_get_pkgver(struct net_device *dev)
2295 {
2296         struct bnxt *bp = netdev_priv(dev);
2297         u16 index = 0;
2298         char *pkgver;
2299         u32 pkglen;
2300         u8 *pkgbuf;
2301         int len;
2302
2303         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2304                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2305                                  &index, NULL, &pkglen) != 0)
2306                 return;
2307
2308         pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2309         if (!pkgbuf) {
2310                 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2311                         pkglen);
2312                 return;
2313         }
2314
2315         if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2316                 goto err;
2317
2318         pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2319                                    pkglen);
2320         if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2321                 len = strlen(bp->fw_ver_str);
2322                 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2323                          "/pkg %s", pkgver);
2324         }
2325 err:
2326         kfree(pkgbuf);
2327 }
2328
2329 static int bnxt_get_eeprom(struct net_device *dev,
2330                            struct ethtool_eeprom *eeprom,
2331                            u8 *data)
2332 {
2333         u32 index;
2334         u32 offset;
2335
2336         if (eeprom->offset == 0) /* special offset value to get directory */
2337                 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2338
2339         index = eeprom->offset >> 24;
2340         offset = eeprom->offset & 0xffffff;
2341
2342         if (index == 0) {
2343                 netdev_err(dev, "unsupported index value: %d\n", index);
2344                 return -EINVAL;
2345         }
2346
2347         return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2348 }
2349
2350 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2351 {
2352         struct bnxt *bp = netdev_priv(dev);
2353         struct hwrm_nvm_erase_dir_entry_input req = {0};
2354
2355         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2356         req.dir_idx = cpu_to_le16(index);
2357         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2358 }
2359
2360 static int bnxt_set_eeprom(struct net_device *dev,
2361                            struct ethtool_eeprom *eeprom,
2362                            u8 *data)
2363 {
2364         struct bnxt *bp = netdev_priv(dev);
2365         u8 index, dir_op;
2366         u16 type, ext, ordinal, attr;
2367
2368         if (!BNXT_PF(bp)) {
2369                 netdev_err(dev, "NVM write not supported from a virtual function\n");
2370                 return -EINVAL;
2371         }
2372
2373         type = eeprom->magic >> 16;
2374
2375         if (type == 0xffff) { /* special value for directory operations */
2376                 index = eeprom->magic & 0xff;
2377                 dir_op = eeprom->magic >> 8;
2378                 if (index == 0)
2379                         return -EINVAL;
2380                 switch (dir_op) {
2381                 case 0x0e: /* erase */
2382                         if (eeprom->offset != ~eeprom->magic)
2383                                 return -EINVAL;
2384                         return bnxt_erase_nvram_directory(dev, index - 1);
2385                 default:
2386                         return -EINVAL;
2387                 }
2388         }
2389
2390         /* Create or re-write an NVM item: */
2391         if (bnxt_dir_type_is_executable(type) == true)
2392                 return -EOPNOTSUPP;
2393         ext = eeprom->magic & 0xffff;
2394         ordinal = eeprom->offset >> 16;
2395         attr = eeprom->offset & 0xffff;
2396
2397         return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2398                                 eeprom->len);
2399 }
2400
2401 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2402 {
2403         struct bnxt *bp = netdev_priv(dev);
2404         struct ethtool_eee *eee = &bp->eee;
2405         struct bnxt_link_info *link_info = &bp->link_info;
2406         u32 advertising =
2407                  _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2408         int rc = 0;
2409
2410         if (!BNXT_SINGLE_PF(bp))
2411                 return -EOPNOTSUPP;
2412
2413         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2414                 return -EOPNOTSUPP;
2415
2416         if (!edata->eee_enabled)
2417                 goto eee_ok;
2418
2419         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2420                 netdev_warn(dev, "EEE requires autoneg\n");
2421                 return -EINVAL;
2422         }
2423         if (edata->tx_lpi_enabled) {
2424                 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2425                                        edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2426                         netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2427                                     bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2428                         return -EINVAL;
2429                 } else if (!bp->lpi_tmr_hi) {
2430                         edata->tx_lpi_timer = eee->tx_lpi_timer;
2431                 }
2432         }
2433         if (!edata->advertised) {
2434                 edata->advertised = advertising & eee->supported;
2435         } else if (edata->advertised & ~advertising) {
2436                 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2437                             edata->advertised, advertising);
2438                 return -EINVAL;
2439         }
2440
2441         eee->advertised = edata->advertised;
2442         eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2443         eee->tx_lpi_timer = edata->tx_lpi_timer;
2444 eee_ok:
2445         eee->eee_enabled = edata->eee_enabled;
2446
2447         if (netif_running(dev))
2448                 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2449
2450         return rc;
2451 }
2452
2453 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2454 {
2455         struct bnxt *bp = netdev_priv(dev);
2456
2457         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2458                 return -EOPNOTSUPP;
2459
2460         *edata = bp->eee;
2461         if (!bp->eee.eee_enabled) {
2462                 /* Preserve tx_lpi_timer so that the last value will be used
2463                  * by default when it is re-enabled.
2464                  */
2465                 edata->advertised = 0;
2466                 edata->tx_lpi_enabled = 0;
2467         }
2468
2469         if (!bp->eee.eee_active)
2470                 edata->lp_advertised = 0;
2471
2472         return 0;
2473 }
2474
2475 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2476                                             u16 page_number, u16 start_addr,
2477                                             u16 data_length, u8 *buf)
2478 {
2479         struct hwrm_port_phy_i2c_read_input req = {0};
2480         struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2481         int rc, byte_offset = 0;
2482
2483         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2484         req.i2c_slave_addr = i2c_addr;
2485         req.page_number = cpu_to_le16(page_number);
2486         req.port_id = cpu_to_le16(bp->pf.port_id);
2487         do {
2488                 u16 xfer_size;
2489
2490                 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2491                 data_length -= xfer_size;
2492                 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2493                 req.data_length = xfer_size;
2494                 req.enables = cpu_to_le32(start_addr + byte_offset ?
2495                                  PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2496                 mutex_lock(&bp->hwrm_cmd_lock);
2497                 rc = _hwrm_send_message(bp, &req, sizeof(req),
2498                                         HWRM_CMD_TIMEOUT);
2499                 if (!rc)
2500                         memcpy(buf + byte_offset, output->data, xfer_size);
2501                 mutex_unlock(&bp->hwrm_cmd_lock);
2502                 byte_offset += xfer_size;
2503         } while (!rc && data_length > 0);
2504
2505         return rc;
2506 }
2507
2508 static int bnxt_get_module_info(struct net_device *dev,
2509                                 struct ethtool_modinfo *modinfo)
2510 {
2511         u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2512         struct bnxt *bp = netdev_priv(dev);
2513         int rc;
2514
2515         /* No point in going further if phy status indicates
2516          * module is not inserted or if it is powered down or
2517          * if it is of type 10GBase-T
2518          */
2519         if (bp->link_info.module_status >
2520                 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2521                 return -EOPNOTSUPP;
2522
2523         /* This feature is not supported in older firmware versions */
2524         if (bp->hwrm_spec_code < 0x10202)
2525                 return -EOPNOTSUPP;
2526
2527         rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2528                                               SFF_DIAG_SUPPORT_OFFSET + 1,
2529                                               data);
2530         if (!rc) {
2531                 u8 module_id = data[0];
2532                 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2533
2534                 switch (module_id) {
2535                 case SFF_MODULE_ID_SFP:
2536                         modinfo->type = ETH_MODULE_SFF_8472;
2537                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2538                         if (!diag_supported)
2539                                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2540                         break;
2541                 case SFF_MODULE_ID_QSFP:
2542                 case SFF_MODULE_ID_QSFP_PLUS:
2543                         modinfo->type = ETH_MODULE_SFF_8436;
2544                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2545                         break;
2546                 case SFF_MODULE_ID_QSFP28:
2547                         modinfo->type = ETH_MODULE_SFF_8636;
2548                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2549                         break;
2550                 default:
2551                         rc = -EOPNOTSUPP;
2552                         break;
2553                 }
2554         }
2555         return rc;
2556 }
2557
2558 static int bnxt_get_module_eeprom(struct net_device *dev,
2559                                   struct ethtool_eeprom *eeprom,
2560                                   u8 *data)
2561 {
2562         struct bnxt *bp = netdev_priv(dev);
2563         u16  start = eeprom->offset, length = eeprom->len;
2564         int rc = 0;
2565
2566         memset(data, 0, eeprom->len);
2567
2568         /* Read A0 portion of the EEPROM */
2569         if (start < ETH_MODULE_SFF_8436_LEN) {
2570                 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2571                         length = ETH_MODULE_SFF_8436_LEN - start;
2572                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2573                                                       start, length, data);
2574                 if (rc)
2575                         return rc;
2576                 start += length;
2577                 data += length;
2578                 length = eeprom->len - length;
2579         }
2580
2581         /* Read A2 portion of the EEPROM */
2582         if (length) {
2583                 start -= ETH_MODULE_SFF_8436_LEN;
2584                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2585                                                       start, length, data);
2586         }
2587         return rc;
2588 }
2589
2590 static int bnxt_nway_reset(struct net_device *dev)
2591 {
2592         int rc = 0;
2593
2594         struct bnxt *bp = netdev_priv(dev);
2595         struct bnxt_link_info *link_info = &bp->link_info;
2596
2597         if (!BNXT_SINGLE_PF(bp))
2598                 return -EOPNOTSUPP;
2599
2600         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2601                 return -EINVAL;
2602
2603         if (netif_running(dev))
2604                 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2605
2606         return rc;
2607 }
2608
2609 static int bnxt_set_phys_id(struct net_device *dev,
2610                             enum ethtool_phys_id_state state)
2611 {
2612         struct hwrm_port_led_cfg_input req = {0};
2613         struct bnxt *bp = netdev_priv(dev);
2614         struct bnxt_pf_info *pf = &bp->pf;
2615         struct bnxt_led_cfg *led_cfg;
2616         u8 led_state;
2617         __le16 duration;
2618         int i, rc;
2619
2620         if (!bp->num_leds || BNXT_VF(bp))
2621                 return -EOPNOTSUPP;
2622
2623         if (state == ETHTOOL_ID_ACTIVE) {
2624                 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2625                 duration = cpu_to_le16(500);
2626         } else if (state == ETHTOOL_ID_INACTIVE) {
2627                 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2628                 duration = cpu_to_le16(0);
2629         } else {
2630                 return -EINVAL;
2631         }
2632         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2633         req.port_id = cpu_to_le16(pf->port_id);
2634         req.num_leds = bp->num_leds;
2635         led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2636         for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2637                 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2638                 led_cfg->led_id = bp->leds[i].led_id;
2639                 led_cfg->led_state = led_state;
2640                 led_cfg->led_blink_on = duration;
2641                 led_cfg->led_blink_off = duration;
2642                 led_cfg->led_group_id = bp->leds[i].led_group_id;
2643         }
2644         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2645         if (rc)
2646                 rc = -EIO;
2647         return rc;
2648 }
2649
2650 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2651 {
2652         struct hwrm_selftest_irq_input req = {0};
2653
2654         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2655         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2656 }
2657
2658 static int bnxt_test_irq(struct bnxt *bp)
2659 {
2660         int i;
2661
2662         for (i = 0; i < bp->cp_nr_rings; i++) {
2663                 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2664                 int rc;
2665
2666                 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2667                 if (rc)
2668                         return rc;
2669         }
2670         return 0;
2671 }
2672
2673 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2674 {
2675         struct hwrm_port_mac_cfg_input req = {0};
2676
2677         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2678
2679         req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2680         if (enable)
2681                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2682         else
2683                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2684         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2685 }
2686
2687 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
2688 {
2689         struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
2690         struct hwrm_port_phy_qcaps_input req = {0};
2691         int rc;
2692
2693         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
2694         mutex_lock(&bp->hwrm_cmd_lock);
2695         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2696         if (!rc)
2697                 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
2698
2699         mutex_unlock(&bp->hwrm_cmd_lock);
2700         return rc;
2701 }
2702
2703 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2704                                     struct hwrm_port_phy_cfg_input *req)
2705 {
2706         struct bnxt_link_info *link_info = &bp->link_info;
2707         u16 fw_advertising;
2708         u16 fw_speed;
2709         int rc;
2710
2711         if (!link_info->autoneg)
2712                 return 0;
2713
2714         rc = bnxt_query_force_speeds(bp, &fw_advertising);
2715         if (rc)
2716                 return rc;
2717
2718         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2719         if (netif_carrier_ok(bp->dev))
2720                 fw_speed = bp->link_info.link_speed;
2721         else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2722                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2723         else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2724                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2725         else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2726                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2727         else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2728                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2729
2730         req->force_link_speed = cpu_to_le16(fw_speed);
2731         req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2732                                   PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2733         rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2734         req->flags = 0;
2735         req->force_link_speed = cpu_to_le16(0);
2736         return rc;
2737 }
2738
2739 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
2740 {
2741         struct hwrm_port_phy_cfg_input req = {0};
2742
2743         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2744
2745         if (enable) {
2746                 bnxt_disable_an_for_lpbk(bp, &req);
2747                 if (ext)
2748                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
2749                 else
2750                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2751         } else {
2752                 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2753         }
2754         req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2755         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2756 }
2757
2758 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2759                             u32 raw_cons, int pkt_size)
2760 {
2761         struct bnxt_napi *bnapi = cpr->bnapi;
2762         struct bnxt_rx_ring_info *rxr;
2763         struct bnxt_sw_rx_bd *rx_buf;
2764         struct rx_cmp *rxcmp;
2765         u16 cp_cons, cons;
2766         u8 *data;
2767         u32 len;
2768         int i;
2769
2770         rxr = bnapi->rx_ring;
2771         cp_cons = RING_CMP(raw_cons);
2772         rxcmp = (struct rx_cmp *)
2773                 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2774         cons = rxcmp->rx_cmp_opaque;
2775         rx_buf = &rxr->rx_buf_ring[cons];
2776         data = rx_buf->data_ptr;
2777         len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2778         if (len != pkt_size)
2779                 return -EIO;
2780         i = ETH_ALEN;
2781         if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2782                 return -EIO;
2783         i += ETH_ALEN;
2784         for (  ; i < pkt_size; i++) {
2785                 if (data[i] != (u8)(i & 0xff))
2786                         return -EIO;
2787         }
2788         return 0;
2789 }
2790
2791 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2792                               int pkt_size)
2793 {
2794         struct tx_cmp *txcmp;
2795         int rc = -EIO;
2796         u32 raw_cons;
2797         u32 cons;
2798         int i;
2799
2800         raw_cons = cpr->cp_raw_cons;
2801         for (i = 0; i < 200; i++) {
2802                 cons = RING_CMP(raw_cons);
2803                 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2804
2805                 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2806                         udelay(5);
2807                         continue;
2808                 }
2809
2810                 /* The valid test of the entry must be done first before
2811                  * reading any further.
2812                  */
2813                 dma_rmb();
2814                 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2815                         rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
2816                         raw_cons = NEXT_RAW_CMP(raw_cons);
2817                         raw_cons = NEXT_RAW_CMP(raw_cons);
2818                         break;
2819                 }
2820                 raw_cons = NEXT_RAW_CMP(raw_cons);
2821         }
2822         cpr->cp_raw_cons = raw_cons;
2823         return rc;
2824 }
2825
2826 static int bnxt_run_loopback(struct bnxt *bp)
2827 {
2828         struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2829         struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
2830         struct bnxt_cp_ring_info *cpr;
2831         int pkt_size, i = 0;
2832         struct sk_buff *skb;
2833         dma_addr_t map;
2834         u8 *data;
2835         int rc;
2836
2837         cpr = &rxr->bnapi->cp_ring;
2838         if (bp->flags & BNXT_FLAG_CHIP_P5)
2839                 cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
2840         pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2841         skb = netdev_alloc_skb(bp->dev, pkt_size);
2842         if (!skb)
2843                 return -ENOMEM;
2844         data = skb_put(skb, pkt_size);
2845         eth_broadcast_addr(data);
2846         i += ETH_ALEN;
2847         ether_addr_copy(&data[i], bp->dev->dev_addr);
2848         i += ETH_ALEN;
2849         for ( ; i < pkt_size; i++)
2850                 data[i] = (u8)(i & 0xff);
2851
2852         map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2853                              PCI_DMA_TODEVICE);
2854         if (dma_mapping_error(&bp->pdev->dev, map)) {
2855                 dev_kfree_skb(skb);
2856                 return -EIO;
2857         }
2858         bnxt_xmit_bd(bp, txr, map, pkt_size);
2859
2860         /* Sync BD data before updating doorbell */
2861         wmb();
2862
2863         bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
2864         rc = bnxt_poll_loopback(bp, cpr, pkt_size);
2865
2866         dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2867         dev_kfree_skb(skb);
2868         return rc;
2869 }
2870
2871 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2872 {
2873         struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2874         struct hwrm_selftest_exec_input req = {0};
2875         int rc;
2876
2877         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2878         mutex_lock(&bp->hwrm_cmd_lock);
2879         resp->test_success = 0;
2880         req.flags = test_mask;
2881         rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2882         *test_results = resp->test_success;
2883         mutex_unlock(&bp->hwrm_cmd_lock);
2884         return rc;
2885 }
2886
2887 #define BNXT_DRV_TESTS                  4
2888 #define BNXT_MACLPBK_TEST_IDX           (bp->num_tests - BNXT_DRV_TESTS)
2889 #define BNXT_PHYLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 1)
2890 #define BNXT_EXTLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 2)
2891 #define BNXT_IRQ_TEST_IDX               (BNXT_MACLPBK_TEST_IDX + 3)
2892
2893 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2894                            u64 *buf)
2895 {
2896         struct bnxt *bp = netdev_priv(dev);
2897         bool do_ext_lpbk = false;
2898         bool offline = false;
2899         u8 test_results = 0;
2900         u8 test_mask = 0;
2901         int rc = 0, i;
2902
2903         if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2904                 return;
2905         memset(buf, 0, sizeof(u64) * bp->num_tests);
2906         if (!netif_running(dev)) {
2907                 etest->flags |= ETH_TEST_FL_FAILED;
2908                 return;
2909         }
2910
2911         if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
2912             (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK))
2913                 do_ext_lpbk = true;
2914
2915         if (etest->flags & ETH_TEST_FL_OFFLINE) {
2916                 if (bp->pf.active_vfs) {
2917                         etest->flags |= ETH_TEST_FL_FAILED;
2918                         netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2919                         return;
2920                 }
2921                 offline = true;
2922         }
2923
2924         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2925                 u8 bit_val = 1 << i;
2926
2927                 if (!(bp->test_info->offline_mask & bit_val))
2928                         test_mask |= bit_val;
2929                 else if (offline)
2930                         test_mask |= bit_val;
2931         }
2932         if (!offline) {
2933                 bnxt_run_fw_tests(bp, test_mask, &test_results);
2934         } else {
2935                 rc = bnxt_close_nic(bp, false, false);
2936                 if (rc)
2937                         return;
2938                 bnxt_run_fw_tests(bp, test_mask, &test_results);
2939
2940                 buf[BNXT_MACLPBK_TEST_IDX] = 1;
2941                 bnxt_hwrm_mac_loopback(bp, true);
2942                 msleep(250);
2943                 rc = bnxt_half_open_nic(bp);
2944                 if (rc) {
2945                         bnxt_hwrm_mac_loopback(bp, false);
2946                         etest->flags |= ETH_TEST_FL_FAILED;
2947                         return;
2948                 }
2949                 if (bnxt_run_loopback(bp))
2950                         etest->flags |= ETH_TEST_FL_FAILED;
2951                 else
2952                         buf[BNXT_MACLPBK_TEST_IDX] = 0;
2953
2954                 bnxt_hwrm_mac_loopback(bp, false);
2955                 bnxt_hwrm_phy_loopback(bp, true, false);
2956                 msleep(1000);
2957                 if (bnxt_run_loopback(bp)) {
2958                         buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2959                         etest->flags |= ETH_TEST_FL_FAILED;
2960                 }
2961                 if (do_ext_lpbk) {
2962                         etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
2963                         bnxt_hwrm_phy_loopback(bp, true, true);
2964                         msleep(1000);
2965                         if (bnxt_run_loopback(bp)) {
2966                                 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
2967                                 etest->flags |= ETH_TEST_FL_FAILED;
2968                         }
2969                 }
2970                 bnxt_hwrm_phy_loopback(bp, false, false);
2971                 bnxt_half_close_nic(bp);
2972                 rc = bnxt_open_nic(bp, false, true);
2973         }
2974         if (rc || bnxt_test_irq(bp)) {
2975                 buf[BNXT_IRQ_TEST_IDX] = 1;
2976                 etest->flags |= ETH_TEST_FL_FAILED;
2977         }
2978         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2979                 u8 bit_val = 1 << i;
2980
2981                 if ((test_mask & bit_val) && !(test_results & bit_val)) {
2982                         buf[i] = 1;
2983                         etest->flags |= ETH_TEST_FL_FAILED;
2984                 }
2985         }
2986 }
2987
2988 static int bnxt_reset(struct net_device *dev, u32 *flags)
2989 {
2990         struct bnxt *bp = netdev_priv(dev);
2991         int rc = 0;
2992
2993         if (!BNXT_PF(bp)) {
2994                 netdev_err(dev, "Reset is not supported from a VF\n");
2995                 return -EOPNOTSUPP;
2996         }
2997
2998         if (pci_vfs_assigned(bp->pdev)) {
2999                 netdev_err(dev,
3000                            "Reset not allowed when VFs are assigned to VMs\n");
3001                 return -EBUSY;
3002         }
3003
3004         if (*flags == ETH_RESET_ALL) {
3005                 /* This feature is not supported in older firmware versions */
3006                 if (bp->hwrm_spec_code < 0x10803)
3007                         return -EOPNOTSUPP;
3008
3009                 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
3010                 if (!rc) {
3011                         netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
3012                         *flags = 0;
3013                 }
3014         } else if (*flags == ETH_RESET_AP) {
3015                 /* This feature is not supported in older firmware versions */
3016                 if (bp->hwrm_spec_code < 0x10803)
3017                         return -EOPNOTSUPP;
3018
3019                 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
3020                 if (!rc) {
3021                         netdev_info(dev, "Reset Application Processor request successful.\n");
3022                         *flags = 0;
3023                 }
3024         } else {
3025                 rc = -EINVAL;
3026         }
3027
3028         return rc;
3029 }
3030
3031 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
3032                                   struct bnxt_hwrm_dbg_dma_info *info)
3033 {
3034         struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
3035         struct hwrm_dbg_cmn_input *cmn_req = msg;
3036         __le16 *seq_ptr = msg + info->seq_off;
3037         u16 seq = 0, len, segs_off;
3038         void *resp = cmn_resp;
3039         dma_addr_t dma_handle;
3040         int rc, off = 0;
3041         void *dma_buf;
3042
3043         dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
3044                                      GFP_KERNEL);
3045         if (!dma_buf)
3046                 return -ENOMEM;
3047
3048         segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
3049                             total_segments);
3050         cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
3051         cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
3052         mutex_lock(&bp->hwrm_cmd_lock);
3053         while (1) {
3054                 *seq_ptr = cpu_to_le16(seq);
3055                 rc = _hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
3056                 if (rc)
3057                         break;
3058
3059                 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off)));
3060                 if (!seq &&
3061                     cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {
3062                         info->segs = le16_to_cpu(*((__le16 *)(resp +
3063                                                               segs_off)));
3064                         if (!info->segs) {
3065                                 rc = -EIO;
3066                                 break;
3067                         }
3068
3069                         info->dest_buf_size = info->segs *
3070                                         sizeof(struct coredump_segment_record);
3071                         info->dest_buf = kmalloc(info->dest_buf_size,
3072                                                  GFP_KERNEL);
3073                         if (!info->dest_buf) {
3074                                 rc = -ENOMEM;
3075                                 break;
3076                         }
3077                 }
3078
3079                 if (info->dest_buf)
3080                         memcpy(info->dest_buf + off, dma_buf, len);
3081
3082                 if (cmn_req->req_type ==
3083                                 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))
3084                         info->dest_buf_size += len;
3085
3086                 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE))
3087                         break;
3088
3089                 seq++;
3090                 off += len;
3091         }
3092         mutex_unlock(&bp->hwrm_cmd_lock);
3093         dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
3094         return rc;
3095 }
3096
3097 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
3098                                        struct bnxt_coredump *coredump)
3099 {
3100         struct hwrm_dbg_coredump_list_input req = {0};
3101         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3102         int rc;
3103
3104         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
3105
3106         info.dma_len = COREDUMP_LIST_BUF_LEN;
3107         info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
3108         info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
3109                                      data_len);
3110
3111         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3112         if (!rc) {
3113                 coredump->data = info.dest_buf;
3114                 coredump->data_size = info.dest_buf_size;
3115                 coredump->total_segs = info.segs;
3116         }
3117         return rc;
3118 }
3119
3120 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
3121                                            u16 segment_id)
3122 {
3123         struct hwrm_dbg_coredump_initiate_input req = {0};
3124
3125         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
3126         req.component_id = cpu_to_le16(component_id);
3127         req.segment_id = cpu_to_le16(segment_id);
3128
3129         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3130 }
3131
3132 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
3133                                            u16 segment_id, u32 *seg_len,
3134                                            void *buf, u32 offset)
3135 {
3136         struct hwrm_dbg_coredump_retrieve_input req = {0};
3137         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3138         int rc;
3139
3140         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
3141         req.component_id = cpu_to_le16(component_id);
3142         req.segment_id = cpu_to_le16(segment_id);
3143
3144         info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
3145         info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
3146                                 seq_no);
3147         info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output,
3148                                      data_len);
3149         if (buf)
3150                 info.dest_buf = buf + offset;
3151
3152         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3153         if (!rc)
3154                 *seg_len = info.dest_buf_size;
3155
3156         return rc;
3157 }
3158
3159 static void
3160 bnxt_fill_coredump_seg_hdr(struct bnxt *bp,
3161                            struct bnxt_coredump_segment_hdr *seg_hdr,
3162                            struct coredump_segment_record *seg_rec, u32 seg_len,
3163                            int status, u32 duration, u32 instance)
3164 {
3165         memset(seg_hdr, 0, sizeof(*seg_hdr));
3166         memcpy(seg_hdr->signature, "sEgM", 4);
3167         if (seg_rec) {
3168                 seg_hdr->component_id = (__force __le32)seg_rec->component_id;
3169                 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id;
3170                 seg_hdr->low_version = seg_rec->version_low;
3171                 seg_hdr->high_version = seg_rec->version_hi;
3172         } else {
3173                 /* For hwrm_ver_get response Component id = 2
3174                  * and Segment id = 0
3175                  */
3176                 seg_hdr->component_id = cpu_to_le32(2);
3177                 seg_hdr->segment_id = 0;
3178         }
3179         seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn);
3180         seg_hdr->length = cpu_to_le32(seg_len);
3181         seg_hdr->status = cpu_to_le32(status);
3182         seg_hdr->duration = cpu_to_le32(duration);
3183         seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr));
3184         seg_hdr->instance = cpu_to_le32(instance);
3185 }
3186
3187 static void
3188 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,
3189                           time64_t start, s16 start_utc, u16 total_segs,
3190                           int status)
3191 {
3192         time64_t end = ktime_get_real_seconds();
3193         u32 os_ver_major = 0, os_ver_minor = 0;
3194         struct tm tm;
3195
3196         time64_to_tm(start, 0, &tm);
3197         memset(record, 0, sizeof(*record));
3198         memcpy(record->signature, "cOrE", 4);
3199         record->flags = 0;
3200         record->low_version = 0;
3201         record->high_version = 1;
3202         record->asic_state = 0;
3203         strlcpy(record->system_name, utsname()->nodename,
3204                 sizeof(record->system_name));
3205         record->year = cpu_to_le16(tm.tm_year + 1900);
3206         record->month = cpu_to_le16(tm.tm_mon + 1);
3207         record->day = cpu_to_le16(tm.tm_mday);
3208         record->hour = cpu_to_le16(tm.tm_hour);
3209         record->minute = cpu_to_le16(tm.tm_min);
3210         record->second = cpu_to_le16(tm.tm_sec);
3211         record->utc_bias = cpu_to_le16(start_utc);
3212         strcpy(record->commandline, "ethtool -w");
3213         record->total_segments = cpu_to_le32(total_segs);
3214
3215         sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor);
3216         record->os_ver_major = cpu_to_le32(os_ver_major);
3217         record->os_ver_minor = cpu_to_le32(os_ver_minor);
3218
3219         strlcpy(record->os_name, utsname()->sysname, 32);
3220         time64_to_tm(end, 0, &tm);
3221         record->end_year = cpu_to_le16(tm.tm_year + 1900);
3222         record->end_month = cpu_to_le16(tm.tm_mon + 1);
3223         record->end_day = cpu_to_le16(tm.tm_mday);
3224         record->end_hour = cpu_to_le16(tm.tm_hour);
3225         record->end_minute = cpu_to_le16(tm.tm_min);
3226         record->end_second = cpu_to_le16(tm.tm_sec);
3227         record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60);
3228         record->asic_id1 = cpu_to_le32(bp->chip_num << 16 |
3229                                        bp->ver_resp.chip_rev << 8 |
3230                                        bp->ver_resp.chip_metal);
3231         record->asic_id2 = 0;
3232         record->coredump_status = cpu_to_le32(status);
3233         record->ioctl_low_version = 0;
3234         record->ioctl_high_version = 0;
3235 }
3236
3237 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)
3238 {
3239         u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);
3240         struct coredump_segment_record *seg_record = NULL;
3241         u32 offset = 0, seg_hdr_len, seg_record_len;
3242         struct bnxt_coredump_segment_hdr seg_hdr;
3243         struct bnxt_coredump coredump = {NULL};
3244         time64_t start_time;
3245         u16 start_utc;
3246         int rc = 0, i;
3247
3248         start_time = ktime_get_real_seconds();
3249         start_utc = sys_tz.tz_minuteswest * 60;
3250         seg_hdr_len = sizeof(seg_hdr);
3251
3252         /* First segment should be hwrm_ver_get response */
3253         *dump_len = seg_hdr_len + ver_get_resp_len;
3254         if (buf) {
3255                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len,
3256                                            0, 0, 0);
3257                 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3258                 offset += seg_hdr_len;
3259                 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len);
3260                 offset += ver_get_resp_len;
3261         }
3262
3263         rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump);
3264         if (rc) {
3265                 netdev_err(bp->dev, "Failed to get coredump segment list\n");
3266                 goto err;
3267         }
3268
3269         *dump_len += seg_hdr_len * coredump.total_segs;
3270
3271         seg_record = (struct coredump_segment_record *)coredump.data;
3272         seg_record_len = sizeof(*seg_record);
3273
3274         for (i = 0; i < coredump.total_segs; i++) {
3275                 u16 comp_id = le16_to_cpu(seg_record->component_id);
3276                 u16 seg_id = le16_to_cpu(seg_record->segment_id);
3277                 u32 duration = 0, seg_len = 0;
3278                 unsigned long start, end;
3279
3280                 start = jiffies;
3281
3282                 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);
3283                 if (rc) {
3284                         netdev_err(bp->dev,
3285                                    "Failed to initiate coredump for seg = %d\n",
3286                                    seg_record->segment_id);
3287                         goto next_seg;
3288                 }
3289
3290                 /* Write segment data into the buffer */
3291                 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id,
3292                                                      &seg_len, buf,
3293                                                      offset + seg_hdr_len);
3294                 if (rc)
3295                         netdev_err(bp->dev,
3296                                    "Failed to retrieve coredump for seg = %d\n",
3297                                    seg_record->segment_id);
3298
3299 next_seg:
3300                 end = jiffies;
3301                 duration = jiffies_to_msecs(end - start);
3302                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len,
3303                                            rc, duration, 0);
3304
3305                 if (buf) {
3306                         /* Write segment header into the buffer */
3307                         memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3308                         offset += seg_hdr_len + seg_len;
3309                 }
3310
3311                 *dump_len += seg_len;
3312                 seg_record =
3313                         (struct coredump_segment_record *)((u8 *)seg_record +
3314                                                            seg_record_len);
3315         }
3316
3317 err:
3318         if (buf)
3319                 bnxt_fill_coredump_record(bp, buf + offset, start_time,
3320                                           start_utc, coredump.total_segs + 1,
3321                                           rc);
3322         kfree(coredump.data);
3323         *dump_len += sizeof(struct bnxt_coredump_record);
3324
3325         return rc;
3326 }
3327
3328 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3329 {
3330         struct bnxt *bp = netdev_priv(dev);
3331
3332         if (bp->hwrm_spec_code < 0x10801)
3333                 return -EOPNOTSUPP;
3334
3335         dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3336                         bp->ver_resp.hwrm_fw_min_8b << 16 |
3337                         bp->ver_resp.hwrm_fw_bld_8b << 8 |
3338                         bp->ver_resp.hwrm_fw_rsvd_8b;
3339
3340         return bnxt_get_coredump(bp, NULL, &dump->len);
3341 }
3342
3343 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3344                               void *buf)
3345 {
3346         struct bnxt *bp = netdev_priv(dev);
3347
3348         if (bp->hwrm_spec_code < 0x10801)
3349                 return -EOPNOTSUPP;
3350
3351         memset(buf, 0, dump->len);
3352
3353         return bnxt_get_coredump(bp, buf, &dump->len);
3354 }
3355
3356 void bnxt_ethtool_init(struct bnxt *bp)
3357 {
3358         struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
3359         struct hwrm_selftest_qlist_input req = {0};
3360         struct bnxt_test_info *test_info;
3361         struct net_device *dev = bp->dev;
3362         int i, rc;
3363
3364         if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
3365                 bnxt_get_pkgver(dev);
3366
3367         if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
3368                 return;
3369
3370         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
3371         mutex_lock(&bp->hwrm_cmd_lock);
3372         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3373         if (rc)
3374                 goto ethtool_init_exit;
3375
3376         test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3377         if (!test_info)
3378                 goto ethtool_init_exit;
3379
3380         bp->test_info = test_info;
3381         bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3382         if (bp->num_tests > BNXT_MAX_TEST)
3383                 bp->num_tests = BNXT_MAX_TEST;
3384
3385         test_info->offline_mask = resp->offline_tests;
3386         test_info->timeout = le16_to_cpu(resp->test_timeout);
3387         if (!test_info->timeout)
3388                 test_info->timeout = HWRM_CMD_TIMEOUT;
3389         for (i = 0; i < bp->num_tests; i++) {
3390                 char *str = test_info->string[i];
3391                 char *fw_str = resp->test0_name + i * 32;
3392
3393                 if (i == BNXT_MACLPBK_TEST_IDX) {
3394                         strcpy(str, "Mac loopback test (offline)");
3395                 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3396                         strcpy(str, "Phy loopback test (offline)");
3397                 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3398                         strcpy(str, "Ext loopback test (offline)");
3399                 } else if (i == BNXT_IRQ_TEST_IDX) {
3400                         strcpy(str, "Interrupt_test (offline)");
3401                 } else {
3402                         strlcpy(str, fw_str, ETH_GSTRING_LEN);
3403                         strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3404                         if (test_info->offline_mask & (1 << i))
3405                                 strncat(str, " (offline)",
3406                                         ETH_GSTRING_LEN - strlen(str));
3407                         else
3408                                 strncat(str, " (online)",
3409                                         ETH_GSTRING_LEN - strlen(str));
3410                 }
3411         }
3412
3413 ethtool_init_exit:
3414         mutex_unlock(&bp->hwrm_cmd_lock);
3415 }
3416
3417 void bnxt_ethtool_free(struct bnxt *bp)
3418 {
3419         kfree(bp->test_info);
3420         bp->test_info = NULL;
3421 }
3422
3423 const struct ethtool_ops bnxt_ethtool_ops = {
3424         .get_link_ksettings     = bnxt_get_link_ksettings,
3425         .set_link_ksettings     = bnxt_set_link_ksettings,
3426         .get_pauseparam         = bnxt_get_pauseparam,
3427         .set_pauseparam         = bnxt_set_pauseparam,
3428         .get_drvinfo            = bnxt_get_drvinfo,
3429         .get_wol                = bnxt_get_wol,
3430         .set_wol                = bnxt_set_wol,
3431         .get_coalesce           = bnxt_get_coalesce,
3432         .set_coalesce           = bnxt_set_coalesce,
3433         .get_msglevel           = bnxt_get_msglevel,
3434         .set_msglevel           = bnxt_set_msglevel,
3435         .get_sset_count         = bnxt_get_sset_count,
3436         .get_strings            = bnxt_get_strings,
3437         .get_ethtool_stats      = bnxt_get_ethtool_stats,
3438         .set_ringparam          = bnxt_set_ringparam,
3439         .get_ringparam          = bnxt_get_ringparam,
3440         .get_channels           = bnxt_get_channels,
3441         .set_channels           = bnxt_set_channels,
3442         .get_rxnfc              = bnxt_get_rxnfc,
3443         .set_rxnfc              = bnxt_set_rxnfc,
3444         .get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
3445         .get_rxfh_key_size      = bnxt_get_rxfh_key_size,
3446         .get_rxfh               = bnxt_get_rxfh,
3447         .flash_device           = bnxt_flash_device,
3448         .get_eeprom_len         = bnxt_get_eeprom_len,
3449         .get_eeprom             = bnxt_get_eeprom,
3450         .set_eeprom             = bnxt_set_eeprom,
3451         .get_link               = bnxt_get_link,
3452         .get_eee                = bnxt_get_eee,
3453         .set_eee                = bnxt_set_eee,
3454         .get_module_info        = bnxt_get_module_info,
3455         .get_module_eeprom      = bnxt_get_module_eeprom,
3456         .nway_reset             = bnxt_nway_reset,
3457         .set_phys_id            = bnxt_set_phys_id,
3458         .self_test              = bnxt_self_test,
3459         .reset                  = bnxt_reset,
3460         .get_dump_flag          = bnxt_get_dump_flag,
3461         .get_dump_data          = bnxt_get_dump_data,
3462 };