drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/delay.h>
  11 #include <linux/of_mdio.h>
  12 #include "hns_dsaf_main.h"
  13 #include "hns_dsaf_mac.h"
  14 #include "hns_dsaf_gmac.h"
  15
  16 static const struct mac_stats_string g_gmac_stats_string[] = {
  17         {"gmac_rx_octets_total_ok", MAC_STATS_FIELD_OFF(rx_good_bytes)},
  18         {"gmac_rx_octets_bad", MAC_STATS_FIELD_OFF(rx_bad_bytes)},
  19         {"gmac_rx_uc_pkts", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
  20         {"gmac_rx_mc_pkts", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
  21         {"gmac_rx_bc_pkts", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
  22         {"gmac_rx_pkts_64octets", MAC_STATS_FIELD_OFF(rx_64bytes)},
  23         {"gmac_rx_pkts_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
  24         {"gmac_rx_pkts_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
  25         {"gmac_rx_pkts_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
  26         {"gmac_rx_pkts_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
  27         {"gmac_rx_pkts_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
  28         {"gmac_rx_pkts_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
  29         {"gmac_rx_fcs_errors", MAC_STATS_FIELD_OFF(rx_fcs_err)},
  30         {"gmac_rx_tagged", MAC_STATS_FIELD_OFF(rx_vlan_pkts)},
  31         {"gmac_rx_data_err", MAC_STATS_FIELD_OFF(rx_data_err)},
  32         {"gmac_rx_align_errors", MAC_STATS_FIELD_OFF(rx_align_err)},
  33         {"gmac_rx_long_errors", MAC_STATS_FIELD_OFF(rx_oversize)},
  34         {"gmac_rx_jabber_errors", MAC_STATS_FIELD_OFF(rx_jabber_err)},
  35         {"gmac_rx_pause_maccontrol", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
  36         {"gmac_rx_unknown_maccontrol", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
  37         {"gmac_rx_very_long_err", MAC_STATS_FIELD_OFF(rx_long_err)},
  38         {"gmac_rx_runt_err", MAC_STATS_FIELD_OFF(rx_minto64)},
  39         {"gmac_rx_short_err", MAC_STATS_FIELD_OFF(rx_under_min)},
  40         {"gmac_rx_filt_pkt", MAC_STATS_FIELD_OFF(rx_filter_pkts)},
  41         {"gmac_rx_octets_total_filt", MAC_STATS_FIELD_OFF(rx_filter_bytes)},
  42         {"gmac_rx_overrun_cnt", MAC_STATS_FIELD_OFF(rx_fifo_overrun_err)},
  43         {"gmac_rx_length_err", MAC_STATS_FIELD_OFF(rx_len_err)},
  44         {"gmac_rx_fail_comma", MAC_STATS_FIELD_OFF(rx_comma_err)},
  45
  46         {"gmac_tx_octets_ok", MAC_STATS_FIELD_OFF(tx_good_bytes)},
  47         {"gmac_tx_octets_bad", MAC_STATS_FIELD_OFF(tx_bad_bytes)},
  48         {"gmac_tx_uc_pkts", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
  49         {"gmac_tx_mc_pkts", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
  50         {"gmac_tx_bc_pkts", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
  51         {"gmac_tx_pkts_64octets", MAC_STATS_FIELD_OFF(tx_64bytes)},
  52         {"gmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
  53         {"gmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
  54         {"gmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
  55         {"gmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
  56         {"gmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
  57         {"gmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
  58         {"gmac_tx_excessive_length_drop", MAC_STATS_FIELD_OFF(tx_jabber_err)},
  59         {"gmac_tx_underrun", MAC_STATS_FIELD_OFF(tx_underrun_err)},
  60         {"gmac_tx_tagged", MAC_STATS_FIELD_OFF(tx_vlan)},
  61         {"gmac_tx_crc_error", MAC_STATS_FIELD_OFF(tx_crc_err)},
  62         {"gmac_tx_pause_frames", MAC_STATS_FIELD_OFF(tx_pfc_tc0)}
  63 };
  64
  65 static void hns_gmac_enable(void *mac_drv, enum mac_commom_mode mode)
  66 {
  67         struct mac_driver *drv = (struct mac_driver *)mac_drv;
  68
  69         /*enable GE rX/tX */
  70         if ((mode == MAC_COMM_MODE_TX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  71                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1);
  72
  73         if ((mode == MAC_COMM_MODE_RX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  74                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1);
  75 }
  76
  77 static void hns_gmac_disable(void *mac_drv, enum mac_commom_mode mode)
  78 {
  79         struct mac_driver *drv = (struct mac_driver *)mac_drv;
  80
  81         /*disable GE rX/tX */
  82         if ((mode == MAC_COMM_MODE_TX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  83                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0);
  84
  85         if ((mode == MAC_COMM_MODE_RX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  86                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0);
  87 }
  88
  89 /* hns_gmac_get_en - get port enable
  90  * @mac_drv:mac device
  91  * @rx:rx enable
  92  * @tx:tx enable
  93  */
  94 static void hns_gmac_get_en(void *mac_drv, u32 *rx, u32 *tx)
  95 {
  96         struct mac_driver *drv = (struct mac_driver *)mac_drv;
  97         u32 porten;
  98
  99         porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
 100         *tx = dsaf_get_bit(porten, GMAC_PORT_TX_EN_B);
 101         *rx = dsaf_get_bit(porten, GMAC_PORT_RX_EN_B);
 102 }
 103
 104 static void hns_gmac_free(void *mac_drv)
 105 {
 106         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 107         struct dsaf_device *dsaf_dev
 108                 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 109
 110         u32 mac_id = drv->mac_id;
 111
 112         dsaf_dev->misc_op->ge_srst(dsaf_dev, mac_id, 0);
 113 }
 114
 115 static void hns_gmac_set_tx_auto_pause_frames(void *mac_drv, u16 newval)
 116 {
 117         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 118
 119         dsaf_set_dev_field(drv, GMAC_FC_TX_TIMER_REG, GMAC_FC_TX_TIMER_M,
 120                            GMAC_FC_TX_TIMER_S, newval);
 121 }
 122
 123 static void hns_gmac_get_tx_auto_pause_frames(void *mac_drv, u16 *newval)
 124 {
 125         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 126
 127         *newval = dsaf_get_dev_field(drv, GMAC_FC_TX_TIMER_REG,
 128                                      GMAC_FC_TX_TIMER_M, GMAC_FC_TX_TIMER_S);
 129 }
 130
 131 static void hns_gmac_set_rx_auto_pause_frames(void *mac_drv, u32 newval)
 132 {
 133         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 134
 135         dsaf_set_dev_bit(drv, GMAC_PAUSE_EN_REG,
 136                          GMAC_PAUSE_EN_RX_FDFC_B, !!newval);
 137 }
 138
 139 static void hns_gmac_config_max_frame_length(void *mac_drv, u16 newval)
 140 {
 141         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 142
 143         dsaf_set_dev_field(drv, GMAC_MAX_FRM_SIZE_REG, GMAC_MAX_FRM_SIZE_M,
 144                            GMAC_MAX_FRM_SIZE_S, newval);
 145
 146         dsaf_set_dev_field(drv, GAMC_RX_MAX_FRAME, GMAC_MAX_FRM_SIZE_M,
 147                            GMAC_MAX_FRM_SIZE_S, newval);
 148 }
 149
 150 static void hns_gmac_config_pad_and_crc(void *mac_drv, u8 newval)
 151 {
 152         u32 tx_ctrl;
 153         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 154
 155         tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 156         dsaf_set_bit(tx_ctrl, GMAC_TX_PAD_EN_B, !!newval);
 157         dsaf_set_bit(tx_ctrl, GMAC_TX_CRC_ADD_B, !!newval);
 158         dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl);
 159 }
 160
 161 static void hns_gmac_config_an_mode(void *mac_drv, u8 newval)
 162 {
 163         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 164
 165         dsaf_set_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
 166                          GMAC_TX_AN_EN_B, !!newval);
 167 }
 168
 169 static void hns_gmac_tx_loop_pkt_dis(void *mac_drv)
 170 {
 171         u32 tx_loop_pkt_pri;
 172         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 173
 174         tx_loop_pkt_pri = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
 175         dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_EN_B, 1);
 176         dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_HIG_PRI_B, 0);
 177         dsaf_write_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG, tx_loop_pkt_pri);
 178 }
 179
 180 static void hns_gmac_set_duplex_type(void *mac_drv, u8 newval)
 181 {
 182         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 183
 184         dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
 185                          GMAC_DUPLEX_TYPE_B, !!newval);
 186 }
 187
 188 static void hns_gmac_get_duplex_type(void *mac_drv,
 189                                      enum hns_gmac_duplex_mdoe *duplex_mode)
 190 {
 191         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 192
 193         *duplex_mode = (enum hns_gmac_duplex_mdoe)dsaf_get_dev_bit(
 194                 drv, GMAC_DUPLEX_TYPE_REG, GMAC_DUPLEX_TYPE_B);
 195 }
 196
 197 static void hns_gmac_get_port_mode(void *mac_drv, enum hns_port_mode *port_mode)
 198 {
 199         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 200
 201         *port_mode = (enum hns_port_mode)dsaf_get_dev_field(
 202                 drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
 203 }
 204
 205 static void hns_gmac_port_mode_get(void *mac_drv,
 206                                    struct hns_gmac_port_mode_cfg *port_mode)
 207 {
 208         u32 tx_ctrl;
 209         u32 recv_ctrl;
 210         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 211
 212         port_mode->port_mode = (enum hns_port_mode)dsaf_get_dev_field(
 213                 drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
 214
 215         tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 216         recv_ctrl = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
 217
 218         port_mode->max_frm_size =
 219                 dsaf_get_dev_field(drv, GMAC_MAX_FRM_SIZE_REG,
 220                                    GMAC_MAX_FRM_SIZE_M, GMAC_MAX_FRM_SIZE_S);
 221         port_mode->short_runts_thr =
 222                 dsaf_get_dev_field(drv, GMAC_SHORT_RUNTS_THR_REG,
 223                                    GMAC_SHORT_RUNTS_THR_M,
 224                                    GMAC_SHORT_RUNTS_THR_S);
 225
 226         port_mode->pad_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_PAD_EN_B);
 227         port_mode->crc_add = dsaf_get_bit(tx_ctrl, GMAC_TX_CRC_ADD_B);
 228         port_mode->an_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_AN_EN_B);
 229
 230         port_mode->runt_pkt_en =
 231                 dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_RUNT_PKT_EN_B);
 232         port_mode->strip_pad_en =
 233                 dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_STRIP_PAD_EN_B);
 234 }
 235
 236 static void hns_gmac_pause_frm_cfg(void *mac_drv, u32 rx_pause_en,
 237                                    u32 tx_pause_en)
 238 {
 239         u32 pause_en;
 240         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 241
 242         pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 243         dsaf_set_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B, !!rx_pause_en);
 244         dsaf_set_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B, !!tx_pause_en);
 245         dsaf_write_dev(drv, GMAC_PAUSE_EN_REG, pause_en);
 246 }
 247
 248 static void hns_gmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_pause_en,
 249                                       u32 *tx_pause_en)
 250 {
 251         u32 pause_en;
 252         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 253
 254         pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 255
 256         *rx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B);
 257         *tx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B);
 258 }
 259
 260 static bool hns_gmac_need_adjust_link(void *mac_drv, enum mac_speed speed,
 261                                       int duplex)
 262 {
 263         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 264         struct hns_mac_cb *mac_cb = drv->mac_cb;
 265
 266         return (mac_cb->speed != speed) ||
 267                 (mac_cb->half_duplex == duplex);
 268 }
 269
 270 static int hns_gmac_adjust_link(void *mac_drv, enum mac_speed speed,
 271                                 u32 full_duplex)
 272 {
 273         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 274
 275         dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
 276                          GMAC_DUPLEX_TYPE_B, !!full_duplex);
 277
 278         switch (speed) {
 279         case MAC_SPEED_10:
 280                 dsaf_set_dev_field(
 281                         drv, GMAC_PORT_MODE_REG,
 282                         GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x6);
 283                 break;
 284         case MAC_SPEED_100:
 285                 dsaf_set_dev_field(
 286                         drv, GMAC_PORT_MODE_REG,
 287                         GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x7);
 288                 break;
 289         case MAC_SPEED_1000:
 290                 dsaf_set_dev_field(
 291                         drv, GMAC_PORT_MODE_REG,
 292                         GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x8);
 293                 break;
 294         default:
 295                 dev_err(drv->dev,
 296                         "hns_gmac_adjust_link fail, speed%d mac%d\n",
 297                         speed, drv->mac_id);
 298                 return -EINVAL;
 299         }
 300
 301         return 0;
 302 }
 303
 304 static void hns_gmac_set_uc_match(void *mac_drv, u16 en)
 305 {
 306         struct mac_driver *drv = mac_drv;
 307
 308         dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG,
 309                          GMAC_UC_MATCH_EN_B, !en);
 310         dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG,
 311                          GMAC_ADDR_EN_B, !en);
 312 }
 313
 314 static void hns_gmac_set_promisc(void *mac_drv, u8 en)
 315 {
 316         struct mac_driver *drv = mac_drv;
 317
 318         if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
 319                 hns_gmac_set_uc_match(mac_drv, en);
 320 }
 321
 322 int hns_gmac_wait_fifo_clean(void *mac_drv)
 323 {
 324         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 325         int wait_cnt;
 326         u32 val;
 327
 328         wait_cnt = 0;
 329         while (wait_cnt++ < HNS_MAX_WAIT_CNT) {
 330                 val = dsaf_read_dev(drv, GMAC_FIFO_STATE_REG);
 331                 /* bit5~bit0 is not send complete pkts */
 332                 if ((val & 0x3f) == 0)
 333                         break;
 334                 usleep_range(100, 200);
 335         }
 336
 337         if (wait_cnt >= HNS_MAX_WAIT_CNT) {
 338                 dev_err(drv->dev,
 339                         "hns ge %d fifo was not idle.\n", drv->mac_id);
 340                 return -EBUSY;
 341         }
 342
 343         return 0;
 344 }
 345
 346 static void hns_gmac_init(void *mac_drv)
 347 {
 348         u32 port;
 349         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 350         struct dsaf_device *dsaf_dev
 351                 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 352
 353         port = drv->mac_id;
 354
 355         dsaf_dev->misc_op->ge_srst(dsaf_dev, port, 0);
 356         mdelay(10);
 357         dsaf_dev->misc_op->ge_srst(dsaf_dev, port, 1);
 358         mdelay(10);
 359         hns_gmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
 360         hns_gmac_tx_loop_pkt_dis(mac_drv);
 361         if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
 362                 hns_gmac_set_uc_match(mac_drv, 0);
 363
 364         hns_gmac_config_pad_and_crc(mac_drv, 1);
 365
 366         dsaf_set_dev_bit(drv, GMAC_MODE_CHANGE_EN_REG,
 367                          GMAC_MODE_CHANGE_EB_B, 1);
 368
 369         /* reduce gmac tx water line to avoid gmac hang-up
 370          * in speed 100M and duplex half.
 371          */
 372         dsaf_set_dev_field(drv, GMAC_TX_WATER_LINE_REG, GMAC_TX_WATER_LINE_MASK,
 373                            GMAC_TX_WATER_LINE_SHIFT, 8);
 374 }
 375
 376 static void hns_gmac_update_stats(void *mac_drv)
 377 {
 378         struct mac_hw_stats *hw_stats = NULL;
 379         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 380
 381         hw_stats = &drv->mac_cb->hw_stats;
 382
 383         /* RX */
 384         hw_stats->rx_good_bytes
 385                 += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
 386         hw_stats->rx_bad_bytes
 387                 += dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
 388         hw_stats->rx_uc_pkts += dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
 389         hw_stats->rx_mc_pkts += dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
 390         hw_stats->rx_bc_pkts += dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
 391         hw_stats->rx_64bytes
 392                 += dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
 393         hw_stats->rx_65to127
 394                 += dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
 395         hw_stats->rx_128to255
 396                 += dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
 397         hw_stats->rx_256to511
 398                 += dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
 399         hw_stats->rx_512to1023
 400                 += dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
 401         hw_stats->rx_1024to1518
 402                 += dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
 403         hw_stats->rx_1519tomax
 404                 += dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
 405         hw_stats->rx_fcs_err += dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
 406         hw_stats->rx_vlan_pkts += dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
 407         hw_stats->rx_data_err += dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
 408         hw_stats->rx_align_err
 409                 += dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
 410         hw_stats->rx_oversize
 411                 += dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
 412         hw_stats->rx_jabber_err
 413                 += dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
 414         hw_stats->rx_pfc_tc0
 415                 += dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
 416         hw_stats->rx_unknown_ctrl
 417                 += dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
 418         hw_stats->rx_long_err
 419                 += dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
 420         hw_stats->rx_minto64
 421                 += dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
 422         hw_stats->rx_under_min
 423                 += dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
 424         hw_stats->rx_filter_pkts
 425                 += dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
 426         hw_stats->rx_filter_bytes
 427                 += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
 428         hw_stats->rx_fifo_overrun_err
 429                 += dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
 430         hw_stats->rx_len_err
 431                 += dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
 432         hw_stats->rx_comma_err
 433                 += dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
 434
 435         /* TX */
 436         hw_stats->tx_good_bytes
 437                 += dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
 438         hw_stats->tx_bad_bytes
 439                 += dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
 440         hw_stats->tx_uc_pkts += dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
 441         hw_stats->tx_mc_pkts += dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
 442         hw_stats->tx_bc_pkts += dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
 443         hw_stats->tx_64bytes
 444                 += dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
 445         hw_stats->tx_65to127
 446                 += dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
 447         hw_stats->tx_128to255
 448                 += dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
 449         hw_stats->tx_256to511
 450                 += dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
 451         hw_stats->tx_512to1023
 452                 += dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
 453         hw_stats->tx_1024to1518
 454                 += dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
 455         hw_stats->tx_1519tomax
 456                 += dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
 457         hw_stats->tx_jabber_err
 458                 += dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
 459         hw_stats->tx_underrun_err
 460                 += dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
 461         hw_stats->tx_vlan += dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
 462         hw_stats->tx_crc_err += dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
 463         hw_stats->tx_pfc_tc0
 464                 += dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
 465 }
 466
 467 static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr)
 468 {
 469         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 470
 471         u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
 472
 473         u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
 474                 | (mac_addr[3] << 16) | (mac_addr[2] << 24);
 475
 476         u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
 477         u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B);
 478
 479         dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
 480         dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
 481                        high_val | (sta_addr_en << GMAC_ADDR_EN_B));
 482 }
 483
 484 static int hns_gmac_config_loopback(void *mac_drv, enum hnae_loop loop_mode,
 485                                     u8 enable)
 486 {
 487         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 488
 489         switch (loop_mode) {
 490         case MAC_INTERNALLOOP_MAC:
 491                 dsaf_set_dev_bit(drv, GMAC_LOOP_REG, GMAC_LP_REG_CF2MI_LP_EN_B,
 492                                  !!enable);
 493                 break;
 494         default:
 495                 dev_err(drv->dev, "loop_mode error\n");
 496                 return -EINVAL;
 497         }
 498
 499         return 0;
 500 }
 501
 502 static void hns_gmac_get_info(void *mac_drv, struct mac_info *mac_info)
 503 {
 504         enum hns_gmac_duplex_mdoe duplex;
 505         enum hns_port_mode speed;
 506         u32 rx_pause;
 507         u32 tx_pause;
 508         u32 rx;
 509         u32 tx;
 510         u16 fc_tx_timer;
 511         struct hns_gmac_port_mode_cfg port_mode = { GMAC_10M_MII, 0 };
 512
 513         hns_gmac_port_mode_get(mac_drv, &port_mode);
 514         mac_info->pad_and_crc_en = port_mode.crc_add && port_mode.pad_enable;
 515         mac_info->auto_neg = port_mode.an_enable;
 516
 517         hns_gmac_get_tx_auto_pause_frames(mac_drv, &fc_tx_timer);
 518         mac_info->tx_pause_time = fc_tx_timer;
 519
 520         hns_gmac_get_en(mac_drv, &rx, &tx);
 521         mac_info->port_en = rx && tx;
 522
 523         hns_gmac_get_duplex_type(mac_drv, &duplex);
 524         mac_info->duplex = duplex;
 525
 526         hns_gmac_get_port_mode(mac_drv, &speed);
 527         switch (speed) {
 528         case GMAC_10M_SGMII:
 529                 mac_info->speed = MAC_SPEED_10;
 530                 break;
 531         case GMAC_100M_SGMII:
 532                 mac_info->speed = MAC_SPEED_100;
 533                 break;
 534         case GMAC_1000M_SGMII:
 535                 mac_info->speed = MAC_SPEED_1000;
 536                 break;
 537         default:
 538                 mac_info->speed = 0;
 539                 break;
 540         }
 541
 542         hns_gmac_get_pausefrm_cfg(mac_drv, &rx_pause, &tx_pause);
 543         mac_info->rx_pause_en = rx_pause;
 544         mac_info->tx_pause_en = tx_pause;
 545 }
 546
 547 static void hns_gmac_autoneg_stat(void *mac_drv, u32 *enable)
 548 {
 549         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 550
 551         *enable = dsaf_get_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
 552                                    GMAC_TX_AN_EN_B);
 553 }
 554
 555 static void hns_gmac_get_link_status(void *mac_drv, u32 *link_stat)
 556 {
 557         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 558
 559         *link_stat = dsaf_get_dev_bit(drv, GMAC_AN_NEG_STATE_REG,
 560                                       GMAC_AN_NEG_STAT_RX_SYNC_OK_B);
 561 }
 562
 563 static void hns_gmac_get_regs(void *mac_drv, void *data)
 564 {
 565         u32 *regs = data;
 566         int i;
 567         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 568
 569         /* base config registers */
 570         regs[0] = dsaf_read_dev(drv, GMAC_DUPLEX_TYPE_REG);
 571         regs[1] = dsaf_read_dev(drv, GMAC_FD_FC_TYPE_REG);
 572         regs[2] = dsaf_read_dev(drv, GMAC_FC_TX_TIMER_REG);
 573         regs[3] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_LOW_REG);
 574         regs[4] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_HIGH_REG);
 575         regs[5] = dsaf_read_dev(drv, GMAC_IPG_TX_TIMER_REG);
 576         regs[6] = dsaf_read_dev(drv, GMAC_PAUSE_THR_REG);
 577         regs[7] = dsaf_read_dev(drv, GMAC_MAX_FRM_SIZE_REG);
 578         regs[8] = dsaf_read_dev(drv, GMAC_PORT_MODE_REG);
 579         regs[9] = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
 580         regs[10] = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 581         regs[11] = dsaf_read_dev(drv, GMAC_SHORT_RUNTS_THR_REG);
 582         regs[12] = dsaf_read_dev(drv, GMAC_AN_NEG_STATE_REG);
 583         regs[13] = dsaf_read_dev(drv, GMAC_TX_LOCAL_PAGE_REG);
 584         regs[14] = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 585         regs[15] = dsaf_read_dev(drv, GMAC_REC_FILT_CONTROL_REG);
 586         regs[16] = dsaf_read_dev(drv, GMAC_PTP_CONFIG_REG);
 587
 588         /* rx static registers */
 589         regs[17] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
 590         regs[18] = dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
 591         regs[19] = dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
 592         regs[20] = dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
 593         regs[21] = dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
 594         regs[22] = dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
 595         regs[23] = dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
 596         regs[24] = dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
 597         regs[25] = dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
 598         regs[26] = dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
 599         regs[27] = dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
 600         regs[28] = dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
 601         regs[29] = dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
 602         regs[30] = dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
 603         regs[31] = dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
 604         regs[32] = dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
 605         regs[33] = dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
 606         regs[34] = dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
 607         regs[35] = dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
 608         regs[36] = dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
 609         regs[37] = dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
 610         regs[38] = dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
 611         regs[39] = dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
 612         regs[40] = dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
 613         regs[41] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
 614
 615         /* tx static registers */
 616         regs[42] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
 617         regs[43] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
 618         regs[44] = dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
 619         regs[45] = dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
 620         regs[46] = dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
 621         regs[47] = dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
 622         regs[48] = dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
 623         regs[49] = dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
 624         regs[50] = dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
 625         regs[51] = dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
 626         regs[52] = dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
 627         regs[53] = dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
 628         regs[54] = dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
 629         regs[55] = dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
 630         regs[56] = dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
 631         regs[57] = dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
 632         regs[58] = dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
 633
 634         regs[59] = dsaf_read_dev(drv, GAMC_RX_MAX_FRAME);
 635         regs[60] = dsaf_read_dev(drv, GMAC_LINE_LOOP_BACK_REG);
 636         regs[61] = dsaf_read_dev(drv, GMAC_CF_CRC_STRIP_REG);
 637         regs[62] = dsaf_read_dev(drv, GMAC_MODE_CHANGE_EN_REG);
 638         regs[63] = dsaf_read_dev(drv, GMAC_SIXTEEN_BIT_CNTR_REG);
 639         regs[64] = dsaf_read_dev(drv, GMAC_LD_LINK_COUNTER_REG);
 640         regs[65] = dsaf_read_dev(drv, GMAC_LOOP_REG);
 641         regs[66] = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
 642         regs[67] = dsaf_read_dev(drv, GMAC_VLAN_CODE_REG);
 643         regs[68] = dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
 644         regs[69] = dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
 645         regs[70] = dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
 646
 647         regs[71] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_0_REG);
 648         regs[72] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_0_REG);
 649         regs[73] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_1_REG);
 650         regs[74] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_1_REG);
 651         regs[75] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_2_REG);
 652         regs[76] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
 653         regs[77] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_3_REG);
 654         regs[78] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_3_REG);
 655         regs[79] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_4_REG);
 656         regs[80] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_4_REG);
 657         regs[81] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_5_REG);
 658         regs[82] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_5_REG);
 659         regs[83] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_0_REG);
 660         regs[84] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_0_REG);
 661         regs[85] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_1_REG);
 662         regs[86] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_1_REG);
 663         regs[87] = dsaf_read_dev(drv, GMAC_MAC_SKIP_LEN_REG);
 664         regs[88] = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
 665
 666         /* mark end of mac regs */
 667         for (i = 89; i < 96; i++)
 668                 regs[i] = 0xaaaaaaaa;
 669 }
 670
 671 static void hns_gmac_get_stats(void *mac_drv, u64 *data)
 672 {
 673         u32 i;
 674         u64 *buf = data;
 675         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 676         struct mac_hw_stats *hw_stats = NULL;
 677
 678         hw_stats = &drv->mac_cb->hw_stats;
 679
 680         for (i = 0; i < ARRAY_SIZE(g_gmac_stats_string); i++) {
 681                 buf[i] = DSAF_STATS_READ(hw_stats,
 682                         g_gmac_stats_string[i].offset);
 683         }
 684 }
 685
 686 static void hns_gmac_get_strings(u32 stringset, u8 *data)
 687 {
 688         char *buff = (char *)data;
 689         u32 i;
 690
 691         if (stringset != ETH_SS_STATS)
 692                 return;
 693
 694         for (i = 0; i < ARRAY_SIZE(g_gmac_stats_string); i++) {
 695                 snprintf(buff, ETH_GSTRING_LEN, "%s",
 696                          g_gmac_stats_string[i].desc);
 697                 buff = buff + ETH_GSTRING_LEN;
 698         }
 699 }
 700
 701 static int hns_gmac_get_sset_count(int stringset)
 702 {
 703         if (stringset == ETH_SS_STATS)
 704                 return ARRAY_SIZE(g_gmac_stats_string);
 705
 706         return 0;
 707 }
 708
 709 static int hns_gmac_get_regs_count(void)
 710 {
 711         return ETH_GMAC_DUMP_NUM;
 712 }
 713
 714 void *hns_gmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
 715 {
 716         struct mac_driver *mac_drv;
 717
 718         mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
 719         if (!mac_drv)
 720                 return NULL;
 721
 722         mac_drv->mac_init = hns_gmac_init;
 723         mac_drv->mac_enable = hns_gmac_enable;
 724         mac_drv->mac_disable = hns_gmac_disable;
 725         mac_drv->mac_free = hns_gmac_free;
 726         mac_drv->adjust_link = hns_gmac_adjust_link;
 727         mac_drv->need_adjust_link = hns_gmac_need_adjust_link;
 728         mac_drv->set_tx_auto_pause_frames = hns_gmac_set_tx_auto_pause_frames;
 729         mac_drv->config_max_frame_length = hns_gmac_config_max_frame_length;
 730         mac_drv->mac_pausefrm_cfg = hns_gmac_pause_frm_cfg;
 731
 732         mac_drv->mac_id = mac_param->mac_id;
 733         mac_drv->mac_mode = mac_param->mac_mode;
 734         mac_drv->io_base = mac_param->vaddr;
 735         mac_drv->dev = mac_param->dev;
 736         mac_drv->mac_cb = mac_cb;
 737
 738         mac_drv->set_mac_addr = hns_gmac_set_mac_addr;
 739         mac_drv->set_an_mode = hns_gmac_config_an_mode;
 740         mac_drv->config_loopback = hns_gmac_config_loopback;
 741         mac_drv->config_pad_and_crc = hns_gmac_config_pad_and_crc;
 742         mac_drv->config_half_duplex = hns_gmac_set_duplex_type;
 743         mac_drv->set_rx_ignore_pause_frames = hns_gmac_set_rx_auto_pause_frames;
 744         mac_drv->get_info = hns_gmac_get_info;
 745         mac_drv->autoneg_stat = hns_gmac_autoneg_stat;
 746         mac_drv->get_pause_enable = hns_gmac_get_pausefrm_cfg;
 747         mac_drv->get_link_status = hns_gmac_get_link_status;
 748         mac_drv->get_regs = hns_gmac_get_regs;
 749         mac_drv->get_regs_count = hns_gmac_get_regs_count;
 750         mac_drv->get_ethtool_stats = hns_gmac_get_stats;
 751         mac_drv->get_sset_count = hns_gmac_get_sset_count;
 752         mac_drv->get_strings = hns_gmac_get_strings;
 753         mac_drv->update_stats = hns_gmac_update_stats;
 754         mac_drv->set_promiscuous = hns_gmac_set_promisc;
 755         mac_drv->wait_fifo_clean = hns_gmac_wait_fifo_clean;
 756
 757         return (void *)mac_drv;
 758 }