1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
5 #include <linux/etherdevice.h>
6 #include <linux/interrupt.h>
7 #include <linux/if_vlan.h>
9 #include <linux/ipv6.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/skbuff.h>
13 #include <linux/sctp.h>
14 #include <linux/vermagic.h>
16 #include <net/pkt_cls.h>
17 #include <net/vxlan.h>
20 #include "hns3_enet.h"
22 static void hns3_clear_all_ring(struct hnae3_handle *h);
23 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h);
25 static const char hns3_driver_name[] = "hns3";
26 const char hns3_driver_version[] = VERMAGIC_STRING;
27 static const char hns3_driver_string[] =
28 "Hisilicon Ethernet Network Driver for Hip08 Family";
29 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
30 static struct hnae3_client client;
32 /* hns3_pci_tbl - PCI Device ID Table
34 * Last entry must be all 0s
36 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
37 * Class, Class Mask, private data (not used) }
39 static const struct pci_device_id hns3_pci_tbl[] = {
40 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
41 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
42 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
43 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
45 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
46 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
47 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
48 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
49 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
50 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
51 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
52 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
53 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
54 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
55 /* required last entry */
58 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
60 static irqreturn_t hns3_irq_handle(int irq, void *vector)
62 struct hns3_enet_tqp_vector *tqp_vector = vector;
64 napi_schedule(&tqp_vector->napi);
69 /* This callback function is used to set affinity changes to the irq affinity
70 * masks when the irq_set_affinity_notifier function is used.
72 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify *notify,
73 const cpumask_t *mask)
75 struct hns3_enet_tqp_vector *tqp_vectors =
76 container_of(notify, struct hns3_enet_tqp_vector,
79 tqp_vectors->affinity_mask = *mask;
82 static void hns3_nic_irq_affinity_release(struct kref *ref)
86 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
88 struct hns3_enet_tqp_vector *tqp_vectors;
91 for (i = 0; i < priv->vector_num; i++) {
92 tqp_vectors = &priv->tqp_vector[i];
94 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
97 /* clear the affinity notifier and affinity mask */
98 irq_set_affinity_notifier(tqp_vectors->vector_irq, NULL);
99 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
101 /* release the irq resource */
102 free_irq(tqp_vectors->vector_irq, tqp_vectors);
103 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
107 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
109 struct hns3_enet_tqp_vector *tqp_vectors;
110 int txrx_int_idx = 0;
116 for (i = 0; i < priv->vector_num; i++) {
117 tqp_vectors = &priv->tqp_vector[i];
119 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
122 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
123 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
124 "%s-%s-%d", priv->netdev->name, "TxRx",
127 } else if (tqp_vectors->rx_group.ring) {
128 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
129 "%s-%s-%d", priv->netdev->name, "Rx",
131 } else if (tqp_vectors->tx_group.ring) {
132 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
133 "%s-%s-%d", priv->netdev->name, "Tx",
136 /* Skip this unused q_vector */
140 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
142 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
146 netdev_err(priv->netdev, "request irq(%d) fail\n",
147 tqp_vectors->vector_irq);
151 tqp_vectors->affinity_notify.notify =
152 hns3_nic_irq_affinity_notify;
153 tqp_vectors->affinity_notify.release =
154 hns3_nic_irq_affinity_release;
155 irq_set_affinity_notifier(tqp_vectors->vector_irq,
156 &tqp_vectors->affinity_notify);
157 irq_set_affinity_hint(tqp_vectors->vector_irq,
158 &tqp_vectors->affinity_mask);
160 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
166 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
169 writel(mask_en, tqp_vector->mask_addr);
172 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
174 napi_enable(&tqp_vector->napi);
177 hns3_mask_vector_irq(tqp_vector, 1);
180 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
183 hns3_mask_vector_irq(tqp_vector, 0);
185 disable_irq(tqp_vector->vector_irq);
186 napi_disable(&tqp_vector->napi);
189 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
192 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
194 /* this defines the configuration for RL (Interrupt Rate Limiter).
195 * Rl defines rate of interrupts i.e. number of interrupts-per-second
196 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
199 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
200 !tqp_vector->rx_group.coal.gl_adapt_enable)
201 /* According to the hardware, the range of rl_reg is
202 * 0-59 and the unit is 4.
204 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
206 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
209 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
212 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
214 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
217 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
220 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
222 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
225 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
226 struct hns3_nic_priv *priv)
228 /* initialize the configuration for interrupt coalescing.
229 * 1. GL (Interrupt Gap Limiter)
230 * 2. RL (Interrupt Rate Limiter)
233 /* Default: enable interrupt coalescing self-adaptive and GL */
234 tqp_vector->tx_group.coal.gl_adapt_enable = 1;
235 tqp_vector->rx_group.coal.gl_adapt_enable = 1;
237 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
238 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
240 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
241 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
242 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
245 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
246 struct hns3_nic_priv *priv)
248 struct hnae3_handle *h = priv->ae_handle;
250 hns3_set_vector_coalesce_tx_gl(tqp_vector,
251 tqp_vector->tx_group.coal.int_gl);
252 hns3_set_vector_coalesce_rx_gl(tqp_vector,
253 tqp_vector->rx_group.coal.int_gl);
254 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
257 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
259 struct hnae3_handle *h = hns3_get_handle(netdev);
260 struct hnae3_knic_private_info *kinfo = &h->kinfo;
261 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
264 if (kinfo->num_tc <= 1) {
265 netdev_reset_tc(netdev);
267 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
270 "netdev_set_num_tc fail, ret=%d!\n", ret);
274 for (i = 0; i < HNAE3_MAX_TC; i++) {
275 if (!kinfo->tc_info[i].enable)
278 netdev_set_tc_queue(netdev,
279 kinfo->tc_info[i].tc,
280 kinfo->tc_info[i].tqp_count,
281 kinfo->tc_info[i].tqp_offset);
285 ret = netif_set_real_num_tx_queues(netdev, queue_size);
288 "netif_set_real_num_tx_queues fail, ret=%d!\n",
293 ret = netif_set_real_num_rx_queues(netdev, queue_size);
296 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
303 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
305 u16 alloc_tqps, max_rss_size, rss_size;
307 h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
308 rss_size = alloc_tqps / h->kinfo.num_tc;
310 return min_t(u16, rss_size, max_rss_size);
313 static int hns3_nic_net_up(struct net_device *netdev)
315 struct hns3_nic_priv *priv = netdev_priv(netdev);
316 struct hnae3_handle *h = priv->ae_handle;
320 ret = hns3_nic_reset_all_ring(h);
324 /* get irq resource for all vectors */
325 ret = hns3_nic_init_irq(priv);
327 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
331 /* enable the vectors */
332 for (i = 0; i < priv->vector_num; i++)
333 hns3_vector_enable(&priv->tqp_vector[i]);
335 /* start the ae_dev */
336 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
340 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
345 for (j = i - 1; j >= 0; j--)
346 hns3_vector_disable(&priv->tqp_vector[j]);
348 hns3_nic_uninit_irq(priv);
353 static int hns3_nic_net_open(struct net_device *netdev)
355 struct hns3_nic_priv *priv = netdev_priv(netdev);
356 struct hnae3_handle *h = hns3_get_handle(netdev);
357 struct hnae3_knic_private_info *kinfo;
360 netif_carrier_off(netdev);
362 ret = hns3_nic_set_real_num_queue(netdev);
366 ret = hns3_nic_net_up(netdev);
369 "hns net up fail, ret=%d!\n", ret);
374 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
375 netdev_set_prio_tc_map(netdev, i,
379 priv->ae_handle->last_reset_time = jiffies;
383 static void hns3_nic_net_down(struct net_device *netdev)
385 struct hns3_nic_priv *priv = netdev_priv(netdev);
386 const struct hnae3_ae_ops *ops;
389 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
392 /* disable vectors */
393 for (i = 0; i < priv->vector_num; i++)
394 hns3_vector_disable(&priv->tqp_vector[i]);
397 ops = priv->ae_handle->ae_algo->ops;
399 ops->stop(priv->ae_handle);
401 /* free irq resources */
402 hns3_nic_uninit_irq(priv);
404 hns3_clear_all_ring(priv->ae_handle);
407 static int hns3_nic_net_stop(struct net_device *netdev)
409 netif_tx_stop_all_queues(netdev);
410 netif_carrier_off(netdev);
412 hns3_nic_net_down(netdev);
417 static int hns3_nic_uc_sync(struct net_device *netdev,
418 const unsigned char *addr)
420 struct hnae3_handle *h = hns3_get_handle(netdev);
422 if (h->ae_algo->ops->add_uc_addr)
423 return h->ae_algo->ops->add_uc_addr(h, addr);
428 static int hns3_nic_uc_unsync(struct net_device *netdev,
429 const unsigned char *addr)
431 struct hnae3_handle *h = hns3_get_handle(netdev);
433 if (h->ae_algo->ops->rm_uc_addr)
434 return h->ae_algo->ops->rm_uc_addr(h, addr);
439 static int hns3_nic_mc_sync(struct net_device *netdev,
440 const unsigned char *addr)
442 struct hnae3_handle *h = hns3_get_handle(netdev);
444 if (h->ae_algo->ops->add_mc_addr)
445 return h->ae_algo->ops->add_mc_addr(h, addr);
450 static int hns3_nic_mc_unsync(struct net_device *netdev,
451 const unsigned char *addr)
453 struct hnae3_handle *h = hns3_get_handle(netdev);
455 if (h->ae_algo->ops->rm_mc_addr)
456 return h->ae_algo->ops->rm_mc_addr(h, addr);
461 static void hns3_nic_set_rx_mode(struct net_device *netdev)
463 struct hnae3_handle *h = hns3_get_handle(netdev);
465 if (h->ae_algo->ops->set_promisc_mode) {
466 if (netdev->flags & IFF_PROMISC)
467 h->ae_algo->ops->set_promisc_mode(h, true, true);
468 else if (netdev->flags & IFF_ALLMULTI)
469 h->ae_algo->ops->set_promisc_mode(h, false, true);
471 h->ae_algo->ops->set_promisc_mode(h, false, false);
473 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
474 netdev_err(netdev, "sync uc address fail\n");
475 if (netdev->flags & IFF_MULTICAST) {
476 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
477 netdev_err(netdev, "sync mc address fail\n");
479 if (h->ae_algo->ops->update_mta_status)
480 h->ae_algo->ops->update_mta_status(h);
484 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
485 u16 *mss, u32 *type_cs_vlan_tso)
487 u32 l4_offset, hdr_len;
488 union l3_hdr_info l3;
489 union l4_hdr_info l4;
493 if (!skb_is_gso(skb))
496 ret = skb_cow_head(skb, 0);
500 l3.hdr = skb_network_header(skb);
501 l4.hdr = skb_transport_header(skb);
503 /* Software should clear the IPv4's checksum field when tso is
506 if (l3.v4->version == 4)
510 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
513 SKB_GSO_UDP_TUNNEL_CSUM)) {
514 if ((!(skb_shinfo(skb)->gso_type &
516 (skb_shinfo(skb)->gso_type &
517 SKB_GSO_UDP_TUNNEL_CSUM)) {
518 /* Software should clear the udp's checksum
519 * field when tso is needed.
523 /* reset l3&l4 pointers from outer to inner headers */
524 l3.hdr = skb_inner_network_header(skb);
525 l4.hdr = skb_inner_transport_header(skb);
527 /* Software should clear the IPv4's checksum field when
530 if (l3.v4->version == 4)
534 /* normal or tunnel packet*/
535 l4_offset = l4.hdr - skb->data;
536 hdr_len = (l4.tcp->doff * 4) + l4_offset;
538 /* remove payload length from inner pseudo checksum when tso*/
539 l4_paylen = skb->len - l4_offset;
540 csum_replace_by_diff(&l4.tcp->check,
541 (__force __wsum)htonl(l4_paylen));
543 /* find the txbd field values */
544 *paylen = skb->len - hdr_len;
545 hnae3_set_bit(*type_cs_vlan_tso,
548 /* get MSS for TSO */
549 *mss = skb_shinfo(skb)->gso_size;
554 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
562 unsigned char *l4_hdr;
563 unsigned char *exthdr;
567 /* find outer header point */
568 l3.hdr = skb_network_header(skb);
569 l4_hdr = skb_transport_header(skb);
571 if (skb->protocol == htons(ETH_P_IPV6)) {
572 exthdr = l3.hdr + sizeof(*l3.v6);
573 l4_proto_tmp = l3.v6->nexthdr;
574 if (l4_hdr != exthdr)
575 ipv6_skip_exthdr(skb, exthdr - skb->data,
576 &l4_proto_tmp, &frag_off);
577 } else if (skb->protocol == htons(ETH_P_IP)) {
578 l4_proto_tmp = l3.v4->protocol;
583 *ol4_proto = l4_proto_tmp;
586 if (!skb->encapsulation) {
591 /* find inner header point */
592 l3.hdr = skb_inner_network_header(skb);
593 l4_hdr = skb_inner_transport_header(skb);
595 if (l3.v6->version == 6) {
596 exthdr = l3.hdr + sizeof(*l3.v6);
597 l4_proto_tmp = l3.v6->nexthdr;
598 if (l4_hdr != exthdr)
599 ipv6_skip_exthdr(skb, exthdr - skb->data,
600 &l4_proto_tmp, &frag_off);
601 } else if (l3.v4->version == 4) {
602 l4_proto_tmp = l3.v4->protocol;
605 *il4_proto = l4_proto_tmp;
610 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
611 u8 il4_proto, u32 *type_cs_vlan_tso,
612 u32 *ol_type_vlan_len_msec)
622 struct gre_base_hdr *gre;
625 unsigned char *l2_hdr;
626 u8 l4_proto = ol4_proto;
633 l3.hdr = skb_network_header(skb);
634 l4.hdr = skb_transport_header(skb);
636 /* compute L2 header size for normal packet, defined in 2 Bytes */
637 l2_len = l3.hdr - skb->data;
638 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
639 HNS3_TXD_L2LEN_S, l2_len >> 1);
642 if (skb->encapsulation) {
643 /* compute OL2 header size, defined in 2 Bytes */
645 hnae3_set_field(*ol_type_vlan_len_msec,
647 HNS3_TXD_L2LEN_S, ol2_len >> 1);
649 /* compute OL3 header size, defined in 4 Bytes */
650 ol3_len = l4.hdr - l3.hdr;
651 hnae3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
652 HNS3_TXD_L3LEN_S, ol3_len >> 2);
654 /* MAC in UDP, MAC in GRE (0x6558)*/
655 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
656 /* switch MAC header ptr from outer to inner header.*/
657 l2_hdr = skb_inner_mac_header(skb);
659 /* compute OL4 header size, defined in 4 Bytes. */
660 ol4_len = l2_hdr - l4.hdr;
661 hnae3_set_field(*ol_type_vlan_len_msec,
662 HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
665 /* switch IP header ptr from outer to inner header */
666 l3.hdr = skb_inner_network_header(skb);
668 /* compute inner l2 header size, defined in 2 Bytes. */
669 l2_len = l3.hdr - l2_hdr;
670 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
671 HNS3_TXD_L2LEN_S, l2_len >> 1);
673 /* skb packet types not supported by hardware,
674 * txbd len fild doesn't be filled.
679 /* switch L4 header pointer from outer to inner */
680 l4.hdr = skb_inner_transport_header(skb);
682 l4_proto = il4_proto;
685 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
686 l3_len = l4.hdr - l3.hdr;
687 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
688 HNS3_TXD_L3LEN_S, l3_len >> 2);
690 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
693 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
694 HNS3_TXD_L4LEN_S, l4.tcp->doff);
697 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
699 (sizeof(struct sctphdr) >> 2));
702 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
704 (sizeof(struct udphdr) >> 2));
707 /* skb packet types not supported by hardware,
708 * txbd len fild doesn't be filled.
714 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
715 * and it is udp packet, which has a dest port as the IANA assigned.
716 * the hardware is expected to do the checksum offload, but the
717 * hardware will not do the checksum offload when udp dest port is
720 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
722 #define IANA_VXLAN_PORT 4789
726 struct gre_base_hdr *gre;
730 l4.hdr = skb_transport_header(skb);
732 if (!(!skb->encapsulation && l4.udp->dest == htons(IANA_VXLAN_PORT)))
735 skb_checksum_help(skb);
740 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
741 u8 il4_proto, u32 *type_cs_vlan_tso,
742 u32 *ol_type_vlan_len_msec)
749 u32 l4_proto = ol4_proto;
751 l3.hdr = skb_network_header(skb);
753 /* define OL3 type and tunnel type(OL4).*/
754 if (skb->encapsulation) {
755 /* define outer network header type.*/
756 if (skb->protocol == htons(ETH_P_IP)) {
758 hnae3_set_field(*ol_type_vlan_len_msec,
761 HNS3_OL3T_IPV4_CSUM);
763 hnae3_set_field(*ol_type_vlan_len_msec,
766 HNS3_OL3T_IPV4_NO_CSUM);
768 } else if (skb->protocol == htons(ETH_P_IPV6)) {
769 hnae3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
770 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
773 /* define tunnel type(OL4).*/
776 hnae3_set_field(*ol_type_vlan_len_msec,
779 HNS3_TUN_MAC_IN_UDP);
782 hnae3_set_field(*ol_type_vlan_len_msec,
788 /* drop the skb tunnel packet if hardware don't support,
789 * because hardware can't calculate csum when TSO.
794 /* the stack computes the IP header already,
795 * driver calculate l4 checksum when not TSO.
797 skb_checksum_help(skb);
801 l3.hdr = skb_inner_network_header(skb);
802 l4_proto = il4_proto;
805 if (l3.v4->version == 4) {
806 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
807 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
809 /* the stack computes the IP header already, the only time we
810 * need the hardware to recompute it is in the case of TSO.
813 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
814 } else if (l3.v6->version == 6) {
815 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
816 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
821 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
822 hnae3_set_field(*type_cs_vlan_tso,
828 if (hns3_tunnel_csum_bug(skb))
831 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
832 hnae3_set_field(*type_cs_vlan_tso,
838 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
839 hnae3_set_field(*type_cs_vlan_tso,
845 /* drop the skb tunnel packet if hardware don't support,
846 * because hardware can't calculate csum when TSO.
851 /* the stack computes the IP header already,
852 * driver calculate l4 checksum when not TSO.
854 skb_checksum_help(skb);
861 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
863 /* Config bd buffer end */
864 hnae3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
865 HNS3_TXD_BDTYPE_S, 0);
866 hnae3_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
867 hnae3_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
868 hnae3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
871 static int hns3_fill_desc_vtags(struct sk_buff *skb,
872 struct hns3_enet_ring *tx_ring,
873 u32 *inner_vlan_flag,
878 #define HNS3_TX_VLAN_PRIO_SHIFT 13
880 if (skb->protocol == htons(ETH_P_8021Q) &&
881 !(tx_ring->tqp->handle->kinfo.netdev->features &
882 NETIF_F_HW_VLAN_CTAG_TX)) {
883 /* When HW VLAN acceleration is turned off, and the stack
884 * sets the protocol to 802.1q, the driver just need to
885 * set the protocol to the encapsulated ethertype.
887 skb->protocol = vlan_get_protocol(skb);
891 if (skb_vlan_tag_present(skb)) {
894 vlan_tag = skb_vlan_tag_get(skb);
895 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
897 /* Based on hw strategy, use out_vtag in two layer tag case,
898 * and use inner_vtag in one tag case.
900 if (skb->protocol == htons(ETH_P_8021Q)) {
901 hnae3_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
902 *out_vtag = vlan_tag;
904 hnae3_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
905 *inner_vtag = vlan_tag;
907 } else if (skb->protocol == htons(ETH_P_8021Q)) {
908 struct vlan_ethhdr *vhdr;
911 rc = skb_cow_head(skb, 0);
914 vhdr = (struct vlan_ethhdr *)skb->data;
915 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
916 << HNS3_TX_VLAN_PRIO_SHIFT);
919 skb->protocol = vlan_get_protocol(skb);
923 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
924 int size, dma_addr_t dma, int frag_end,
925 enum hns_desc_type type)
927 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
928 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
929 u32 ol_type_vlan_len_msec = 0;
930 u16 bdtp_fe_sc_vld_ra_ri = 0;
931 u32 type_cs_vlan_tso = 0;
941 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
942 desc_cb->priv = priv;
943 desc_cb->length = size;
945 desc_cb->type = type;
947 /* now, fill the descriptor */
948 desc->addr = cpu_to_le64(dma);
949 desc->tx.send_size = cpu_to_le16((u16)size);
950 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
951 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
953 if (type == DESC_TYPE_SKB) {
954 skb = (struct sk_buff *)priv;
957 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
958 &ol_type_vlan_len_msec,
959 &inner_vtag, &out_vtag);
963 if (skb->ip_summed == CHECKSUM_PARTIAL) {
964 skb_reset_mac_len(skb);
966 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
969 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
971 &ol_type_vlan_len_msec);
972 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
974 &ol_type_vlan_len_msec);
978 ret = hns3_set_tso(skb, &paylen, &mss,
985 desc->tx.ol_type_vlan_len_msec =
986 cpu_to_le32(ol_type_vlan_len_msec);
987 desc->tx.type_cs_vlan_tso_len =
988 cpu_to_le32(type_cs_vlan_tso);
989 desc->tx.paylen = cpu_to_le32(paylen);
990 desc->tx.mss = cpu_to_le16(mss);
991 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
992 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
995 /* move ring pointer to next.*/
996 ring_ptr_move_fw(ring, next_to_use);
1001 static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
1002 int size, dma_addr_t dma, int frag_end,
1003 enum hns_desc_type type)
1005 unsigned int frag_buf_num;
1010 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
1011 sizeoflast = size % HNS3_MAX_BD_SIZE;
1012 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1014 /* When the frag size is bigger than hardware, split this frag */
1015 for (k = 0; k < frag_buf_num; k++) {
1016 ret = hns3_fill_desc(ring, priv,
1017 (k == frag_buf_num - 1) ?
1018 sizeoflast : HNS3_MAX_BD_SIZE,
1019 dma + HNS3_MAX_BD_SIZE * k,
1020 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
1021 (type == DESC_TYPE_SKB && !k) ?
1022 DESC_TYPE_SKB : DESC_TYPE_PAGE);
1030 static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
1031 struct hns3_enet_ring *ring)
1033 struct sk_buff *skb = *out_skb;
1034 struct skb_frag_struct *frag;
1041 size = skb_headlen(skb);
1042 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
1044 frag_num = skb_shinfo(skb)->nr_frags;
1045 for (i = 0; i < frag_num; i++) {
1046 frag = &skb_shinfo(skb)->frags[i];
1047 size = skb_frag_size(frag);
1049 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
1050 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
1053 buf_num += bdnum_for_frag;
1056 if (buf_num > ring_space(ring))
1063 static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
1064 struct hns3_enet_ring *ring)
1066 struct sk_buff *skb = *out_skb;
1069 /* No. of segments (plus a header) */
1070 buf_num = skb_shinfo(skb)->nr_frags + 1;
1072 if (unlikely(ring_space(ring) < buf_num))
1080 static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
1082 struct device *dev = ring_to_dev(ring);
1085 for (i = 0; i < ring->desc_num; i++) {
1086 /* check if this is where we started */
1087 if (ring->next_to_use == next_to_use_orig)
1090 /* unmap the descriptor dma address */
1091 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1092 dma_unmap_single(dev,
1093 ring->desc_cb[ring->next_to_use].dma,
1094 ring->desc_cb[ring->next_to_use].length,
1098 ring->desc_cb[ring->next_to_use].dma,
1099 ring->desc_cb[ring->next_to_use].length,
1103 ring_ptr_move_bw(ring, next_to_use);
1107 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1109 struct hns3_nic_priv *priv = netdev_priv(netdev);
1110 struct hns3_nic_ring_data *ring_data =
1111 &tx_ring_data(priv, skb->queue_mapping);
1112 struct hns3_enet_ring *ring = ring_data->ring;
1113 struct device *dev = priv->dev;
1114 struct netdev_queue *dev_queue;
1115 struct skb_frag_struct *frag;
1116 int next_to_use_head;
1117 int next_to_use_frag;
1125 /* Prefetch the data used later */
1126 prefetch(skb->data);
1128 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1130 u64_stats_update_begin(&ring->syncp);
1131 ring->stats.tx_busy++;
1132 u64_stats_update_end(&ring->syncp);
1134 goto out_net_tx_busy;
1136 u64_stats_update_begin(&ring->syncp);
1137 ring->stats.sw_err_cnt++;
1138 u64_stats_update_end(&ring->syncp);
1139 netdev_err(netdev, "no memory to xmit!\n");
1146 /* No. of segments (plus a header) */
1147 seg_num = skb_shinfo(skb)->nr_frags + 1;
1148 /* Fill the first part */
1149 size = skb_headlen(skb);
1151 next_to_use_head = ring->next_to_use;
1153 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1154 if (dma_mapping_error(dev, dma)) {
1155 netdev_err(netdev, "TX head DMA map failed\n");
1156 ring->stats.sw_err_cnt++;
1160 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1163 goto head_dma_map_err;
1165 next_to_use_frag = ring->next_to_use;
1166 /* Fill the fragments */
1167 for (i = 1; i < seg_num; i++) {
1168 frag = &skb_shinfo(skb)->frags[i - 1];
1169 size = skb_frag_size(frag);
1170 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1171 if (dma_mapping_error(dev, dma)) {
1172 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1173 ring->stats.sw_err_cnt++;
1174 goto frag_dma_map_err;
1176 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1177 seg_num - 1 == i ? 1 : 0,
1181 goto frag_dma_map_err;
1184 /* Complete translate all packets */
1185 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1186 netdev_tx_sent_queue(dev_queue, skb->len);
1188 wmb(); /* Commit all data before submit */
1190 hnae3_queue_xmit(ring->tqp, buf_num);
1192 return NETDEV_TX_OK;
1195 hns_nic_dma_unmap(ring, next_to_use_frag);
1198 hns_nic_dma_unmap(ring, next_to_use_head);
1201 dev_kfree_skb_any(skb);
1202 return NETDEV_TX_OK;
1205 netif_stop_subqueue(netdev, ring_data->queue_index);
1206 smp_mb(); /* Commit all data before submit */
1208 return NETDEV_TX_BUSY;
1211 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1213 struct hnae3_handle *h = hns3_get_handle(netdev);
1214 struct sockaddr *mac_addr = p;
1217 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1218 return -EADDRNOTAVAIL;
1220 if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1221 netdev_info(netdev, "already using mac address %pM\n",
1226 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1228 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1232 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1237 static int hns3_nic_do_ioctl(struct net_device *netdev,
1238 struct ifreq *ifr, int cmd)
1240 struct hnae3_handle *h = hns3_get_handle(netdev);
1242 if (!netif_running(netdev))
1245 if (!h->ae_algo->ops->do_ioctl)
1248 return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1251 static int hns3_nic_set_features(struct net_device *netdev,
1252 netdev_features_t features)
1254 netdev_features_t changed = netdev->features ^ features;
1255 struct hns3_nic_priv *priv = netdev_priv(netdev);
1256 struct hnae3_handle *h = priv->ae_handle;
1259 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1260 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1261 priv->ops.fill_desc = hns3_fill_desc_tso;
1262 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1264 priv->ops.fill_desc = hns3_fill_desc;
1265 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1269 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1270 h->ae_algo->ops->enable_vlan_filter) {
1271 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1272 h->ae_algo->ops->enable_vlan_filter(h, true);
1274 h->ae_algo->ops->enable_vlan_filter(h, false);
1277 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1278 h->ae_algo->ops->enable_hw_strip_rxvtag) {
1279 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1280 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1282 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1288 netdev->features = features;
1292 static void hns3_nic_get_stats64(struct net_device *netdev,
1293 struct rtnl_link_stats64 *stats)
1295 struct hns3_nic_priv *priv = netdev_priv(netdev);
1296 int queue_num = priv->ae_handle->kinfo.num_tqps;
1297 struct hnae3_handle *handle = priv->ae_handle;
1298 struct hns3_enet_ring *ring;
1308 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1311 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1313 for (idx = 0; idx < queue_num; idx++) {
1314 /* fetch the tx stats */
1315 ring = priv->ring_data[idx].ring;
1317 start = u64_stats_fetch_begin_irq(&ring->syncp);
1318 tx_bytes += ring->stats.tx_bytes;
1319 tx_pkts += ring->stats.tx_pkts;
1320 tx_drop += ring->stats.tx_busy;
1321 tx_drop += ring->stats.sw_err_cnt;
1322 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1324 /* fetch the rx stats */
1325 ring = priv->ring_data[idx + queue_num].ring;
1327 start = u64_stats_fetch_begin_irq(&ring->syncp);
1328 rx_bytes += ring->stats.rx_bytes;
1329 rx_pkts += ring->stats.rx_pkts;
1330 rx_drop += ring->stats.non_vld_descs;
1331 rx_drop += ring->stats.err_pkt_len;
1332 rx_drop += ring->stats.l2_err;
1333 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1336 stats->tx_bytes = tx_bytes;
1337 stats->tx_packets = tx_pkts;
1338 stats->rx_bytes = rx_bytes;
1339 stats->rx_packets = rx_pkts;
1341 stats->rx_errors = netdev->stats.rx_errors;
1342 stats->multicast = netdev->stats.multicast;
1343 stats->rx_length_errors = netdev->stats.rx_length_errors;
1344 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1345 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1347 stats->tx_errors = netdev->stats.tx_errors;
1348 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1349 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
1350 stats->collisions = netdev->stats.collisions;
1351 stats->rx_over_errors = netdev->stats.rx_over_errors;
1352 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1353 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1354 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1355 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1356 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1357 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1358 stats->tx_window_errors = netdev->stats.tx_window_errors;
1359 stats->rx_compressed = netdev->stats.rx_compressed;
1360 stats->tx_compressed = netdev->stats.tx_compressed;
1363 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1365 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1366 struct hnae3_handle *h = hns3_get_handle(netdev);
1367 struct hnae3_knic_private_info *kinfo = &h->kinfo;
1368 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1369 u8 tc = mqprio_qopt->qopt.num_tc;
1370 u16 mode = mqprio_qopt->mode;
1371 u8 hw = mqprio_qopt->qopt.hw;
1375 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1376 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1379 if (tc > HNAE3_MAX_TC)
1385 if_running = netif_running(netdev);
1387 hns3_nic_net_stop(netdev);
1391 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1392 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1396 ret = hns3_nic_set_real_num_queue(netdev);
1400 hns3_nic_net_open(netdev);
1405 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1408 if (type != TC_SETUP_QDISC_MQPRIO)
1411 return hns3_setup_tc(dev, type_data);
1414 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1415 __be16 proto, u16 vid)
1417 struct hnae3_handle *h = hns3_get_handle(netdev);
1418 struct hns3_nic_priv *priv = netdev_priv(netdev);
1421 if (h->ae_algo->ops->set_vlan_filter)
1422 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1425 set_bit(vid, priv->active_vlans);
1430 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1431 __be16 proto, u16 vid)
1433 struct hnae3_handle *h = hns3_get_handle(netdev);
1434 struct hns3_nic_priv *priv = netdev_priv(netdev);
1437 if (h->ae_algo->ops->set_vlan_filter)
1438 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1441 clear_bit(vid, priv->active_vlans);
1446 static void hns3_restore_vlan(struct net_device *netdev)
1448 struct hns3_nic_priv *priv = netdev_priv(netdev);
1452 for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1453 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1455 netdev_warn(netdev, "Restore vlan: %d filter, ret:%d\n",
1460 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1461 u8 qos, __be16 vlan_proto)
1463 struct hnae3_handle *h = hns3_get_handle(netdev);
1466 if (h->ae_algo->ops->set_vf_vlan_filter)
1467 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1473 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1475 struct hnae3_handle *h = hns3_get_handle(netdev);
1476 bool if_running = netif_running(netdev);
1479 if (!h->ae_algo->ops->set_mtu)
1482 /* if this was called with netdev up then bring netdevice down */
1484 (void)hns3_nic_net_stop(netdev);
1488 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1490 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1493 netdev->mtu = new_mtu;
1495 /* if the netdev was running earlier, bring it up again */
1496 if (if_running && hns3_nic_net_open(netdev))
1502 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1504 struct hns3_nic_priv *priv = netdev_priv(ndev);
1505 struct hns3_enet_ring *tx_ring = NULL;
1506 int timeout_queue = 0;
1507 int hw_head, hw_tail;
1510 /* Find the stopped queue the same way the stack does */
1511 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1512 struct netdev_queue *q;
1513 unsigned long trans_start;
1515 q = netdev_get_tx_queue(ndev, i);
1516 trans_start = q->trans_start;
1517 if (netif_xmit_stopped(q) &&
1519 (trans_start + ndev->watchdog_timeo))) {
1525 if (i == ndev->num_tx_queues) {
1527 "no netdev TX timeout queue found, timeout count: %llu\n",
1528 priv->tx_timeout_count);
1532 tx_ring = priv->ring_data[timeout_queue].ring;
1534 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1535 HNS3_RING_TX_RING_HEAD_REG);
1536 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1537 HNS3_RING_TX_RING_TAIL_REG);
1539 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1540 priv->tx_timeout_count,
1542 tx_ring->next_to_use,
1543 tx_ring->next_to_clean,
1546 readl(tx_ring->tqp_vector->mask_addr));
1551 static void hns3_nic_net_timeout(struct net_device *ndev)
1553 struct hns3_nic_priv *priv = netdev_priv(ndev);
1554 struct hnae3_handle *h = priv->ae_handle;
1556 if (!hns3_get_tx_timeo_queue_info(ndev))
1559 priv->tx_timeout_count++;
1561 if (time_before(jiffies, (h->last_reset_time + ndev->watchdog_timeo)))
1564 /* request the reset */
1565 if (h->ae_algo->ops->reset_event)
1566 h->ae_algo->ops->reset_event(h);
1569 static const struct net_device_ops hns3_nic_netdev_ops = {
1570 .ndo_open = hns3_nic_net_open,
1571 .ndo_stop = hns3_nic_net_stop,
1572 .ndo_start_xmit = hns3_nic_net_xmit,
1573 .ndo_tx_timeout = hns3_nic_net_timeout,
1574 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
1575 .ndo_do_ioctl = hns3_nic_do_ioctl,
1576 .ndo_change_mtu = hns3_nic_change_mtu,
1577 .ndo_set_features = hns3_nic_set_features,
1578 .ndo_get_stats64 = hns3_nic_get_stats64,
1579 .ndo_setup_tc = hns3_nic_setup_tc,
1580 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1581 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1582 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1583 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1586 static bool hns3_is_phys_func(struct pci_dev *pdev)
1588 u32 dev_id = pdev->device;
1591 case HNAE3_DEV_ID_GE:
1592 case HNAE3_DEV_ID_25GE:
1593 case HNAE3_DEV_ID_25GE_RDMA:
1594 case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1595 case HNAE3_DEV_ID_50GE_RDMA:
1596 case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1597 case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1599 case HNAE3_DEV_ID_100G_VF:
1600 case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1603 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1610 static void hns3_disable_sriov(struct pci_dev *pdev)
1612 /* If our VFs are assigned we cannot shut down SR-IOV
1613 * without causing issues, so just leave the hardware
1614 * available but disabled
1616 if (pci_vfs_assigned(pdev)) {
1617 dev_warn(&pdev->dev,
1618 "disabling driver while VFs are assigned\n");
1622 pci_disable_sriov(pdev);
1625 static void hns3_get_dev_capability(struct pci_dev *pdev,
1626 struct hnae3_ae_dev *ae_dev)
1628 if (pdev->revision >= 0x21)
1629 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1632 /* hns3_probe - Device initialization routine
1633 * @pdev: PCI device information struct
1634 * @ent: entry in hns3_pci_tbl
1636 * hns3_probe initializes a PF identified by a pci_dev structure.
1637 * The OS initialization, configuring of the PF private structure,
1638 * and a hardware reset occur.
1640 * Returns 0 on success, negative on failure
1642 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1644 struct hnae3_ae_dev *ae_dev;
1647 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1654 ae_dev->pdev = pdev;
1655 ae_dev->flag = ent->driver_data;
1656 ae_dev->dev_type = HNAE3_DEV_KNIC;
1657 hns3_get_dev_capability(pdev, ae_dev);
1658 pci_set_drvdata(pdev, ae_dev);
1660 hnae3_register_ae_dev(ae_dev);
1665 /* hns3_remove - Device removal routine
1666 * @pdev: PCI device information struct
1668 static void hns3_remove(struct pci_dev *pdev)
1670 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1672 if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1673 hns3_disable_sriov(pdev);
1675 hnae3_unregister_ae_dev(ae_dev);
1679 * hns3_pci_sriov_configure
1680 * @pdev: pointer to a pci_dev structure
1681 * @num_vfs: number of VFs to allocate
1683 * Enable or change the number of VFs. Called when the user updates the number
1686 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1690 if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1691 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1696 ret = pci_enable_sriov(pdev, num_vfs);
1698 dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1701 } else if (!pci_vfs_assigned(pdev)) {
1702 pci_disable_sriov(pdev);
1704 dev_warn(&pdev->dev,
1705 "Unable to free VFs because some are assigned to VMs.\n");
1711 static void hns3_shutdown(struct pci_dev *pdev)
1713 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1715 hnae3_unregister_ae_dev(ae_dev);
1716 devm_kfree(&pdev->dev, ae_dev);
1717 pci_set_drvdata(pdev, NULL);
1719 if (system_state == SYSTEM_POWER_OFF)
1720 pci_set_power_state(pdev, PCI_D3hot);
1723 static struct pci_driver hns3_driver = {
1724 .name = hns3_driver_name,
1725 .id_table = hns3_pci_tbl,
1726 .probe = hns3_probe,
1727 .remove = hns3_remove,
1728 .shutdown = hns3_shutdown,
1729 .sriov_configure = hns3_pci_sriov_configure,
1732 /* set default feature to hns3 */
1733 static void hns3_set_default_feature(struct net_device *netdev)
1735 struct hnae3_handle *h = hns3_get_handle(netdev);
1736 struct pci_dev *pdev = h->pdev;
1738 netdev->priv_flags |= IFF_UNICAST_FLT;
1740 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1741 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1742 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1743 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1744 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1746 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1748 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1750 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1751 NETIF_F_HW_VLAN_CTAG_FILTER |
1752 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1753 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1754 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1755 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1756 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1758 netdev->vlan_features |=
1759 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1760 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1761 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1762 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1763 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1765 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1766 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1767 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1768 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1769 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1770 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1772 if (pdev->revision != 0x20)
1773 netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER;
1776 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1777 struct hns3_desc_cb *cb)
1779 unsigned int order = hnae3_page_order(ring);
1782 p = dev_alloc_pages(order);
1787 cb->page_offset = 0;
1789 cb->buf = page_address(p);
1790 cb->length = hnae3_page_size(ring);
1791 cb->type = DESC_TYPE_PAGE;
1796 static void hns3_free_buffer(struct hns3_enet_ring *ring,
1797 struct hns3_desc_cb *cb)
1799 if (cb->type == DESC_TYPE_SKB)
1800 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1801 else if (!HNAE3_IS_TX_RING(ring))
1802 put_page((struct page *)cb->priv);
1803 memset(cb, 0, sizeof(*cb));
1806 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1808 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1809 cb->length, ring_to_dma_dir(ring));
1811 if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
1817 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1818 struct hns3_desc_cb *cb)
1820 if (cb->type == DESC_TYPE_SKB)
1821 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1822 ring_to_dma_dir(ring));
1824 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1825 ring_to_dma_dir(ring));
1828 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1830 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1831 ring->desc[i].addr = 0;
1834 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1836 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1838 if (!ring->desc_cb[i].dma)
1841 hns3_buffer_detach(ring, i);
1842 hns3_free_buffer(ring, cb);
1845 static void hns3_free_buffers(struct hns3_enet_ring *ring)
1849 for (i = 0; i < ring->desc_num; i++)
1850 hns3_free_buffer_detach(ring, i);
1853 /* free desc along with its attached buffer */
1854 static void hns3_free_desc(struct hns3_enet_ring *ring)
1856 int size = ring->desc_num * sizeof(ring->desc[0]);
1858 hns3_free_buffers(ring);
1861 dma_free_coherent(ring_to_dev(ring), size,
1862 ring->desc, ring->desc_dma_addr);
1867 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1869 int size = ring->desc_num * sizeof(ring->desc[0]);
1871 ring->desc = dma_zalloc_coherent(ring_to_dev(ring), size,
1872 &ring->desc_dma_addr,
1880 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1881 struct hns3_desc_cb *cb)
1885 ret = hns3_alloc_buffer(ring, cb);
1889 ret = hns3_map_buffer(ring, cb);
1896 hns3_free_buffer(ring, cb);
1901 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1903 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1908 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1913 /* Allocate memory for raw pkg, and map with dma */
1914 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1918 for (i = 0; i < ring->desc_num; i++) {
1919 ret = hns3_alloc_buffer_attach(ring, i);
1921 goto out_buffer_fail;
1927 for (j = i - 1; j >= 0; j--)
1928 hns3_free_buffer_detach(ring, j);
1932 /* detach a in-used buffer and replace with a reserved one */
1933 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1934 struct hns3_desc_cb *res_cb)
1936 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1937 ring->desc_cb[i] = *res_cb;
1938 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1939 ring->desc[i].rx.bd_base_info = 0;
1942 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1944 ring->desc_cb[i].reuse_flag = 0;
1945 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1946 + ring->desc_cb[i].page_offset);
1947 ring->desc[i].rx.bd_base_info = 0;
1950 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1953 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1955 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1956 (*bytes) += desc_cb->length;
1957 /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
1958 hns3_free_buffer_detach(ring, ring->next_to_clean);
1960 ring_ptr_move_fw(ring, next_to_clean);
1963 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1965 int u = ring->next_to_use;
1966 int c = ring->next_to_clean;
1968 if (unlikely(h > ring->desc_num))
1971 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1974 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
1976 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1977 struct hns3_nic_priv *priv = netdev_priv(netdev);
1978 struct netdev_queue *dev_queue;
1982 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1983 rmb(); /* Make sure head is ready before touch any data */
1985 if (is_ring_empty(ring) || head == ring->next_to_clean)
1986 return; /* no data to poll */
1988 if (unlikely(!is_valid_clean_head(ring, head))) {
1989 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1990 ring->next_to_use, ring->next_to_clean);
1992 u64_stats_update_begin(&ring->syncp);
1993 ring->stats.io_err_cnt++;
1994 u64_stats_update_end(&ring->syncp);
2000 while (head != ring->next_to_clean) {
2001 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
2002 /* Issue prefetch for next Tx descriptor */
2003 prefetch(&ring->desc_cb[ring->next_to_clean]);
2006 ring->tqp_vector->tx_group.total_bytes += bytes;
2007 ring->tqp_vector->tx_group.total_packets += pkts;
2009 u64_stats_update_begin(&ring->syncp);
2010 ring->stats.tx_bytes += bytes;
2011 ring->stats.tx_pkts += pkts;
2012 u64_stats_update_end(&ring->syncp);
2014 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2015 netdev_tx_completed_queue(dev_queue, pkts, bytes);
2017 if (unlikely(pkts && netif_carrier_ok(netdev) &&
2018 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2019 /* Make sure that anybody stopping the queue after this
2020 * sees the new next_to_clean.
2023 if (netif_tx_queue_stopped(dev_queue) &&
2024 !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2025 netif_tx_wake_queue(dev_queue);
2026 ring->stats.restart_queue++;
2031 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2033 int ntc = ring->next_to_clean;
2034 int ntu = ring->next_to_use;
2036 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2040 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
2042 struct hns3_desc_cb *desc_cb;
2043 struct hns3_desc_cb res_cbs;
2046 for (i = 0; i < cleand_count; i++) {
2047 desc_cb = &ring->desc_cb[ring->next_to_use];
2048 if (desc_cb->reuse_flag) {
2049 u64_stats_update_begin(&ring->syncp);
2050 ring->stats.reuse_pg_cnt++;
2051 u64_stats_update_end(&ring->syncp);
2053 hns3_reuse_buffer(ring, ring->next_to_use);
2055 ret = hns3_reserve_buffer_map(ring, &res_cbs);
2057 u64_stats_update_begin(&ring->syncp);
2058 ring->stats.sw_err_cnt++;
2059 u64_stats_update_end(&ring->syncp);
2061 netdev_err(ring->tqp->handle->kinfo.netdev,
2062 "hnae reserve buffer map failed.\n");
2065 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2068 ring_ptr_move_fw(ring, next_to_use);
2071 wmb(); /* Make all data has been write before submit */
2072 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2075 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2076 struct hns3_enet_ring *ring, int pull_len,
2077 struct hns3_desc_cb *desc_cb)
2079 struct hns3_desc *desc;
2085 twobufs = ((PAGE_SIZE < 8192) &&
2086 hnae3_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2088 desc = &ring->desc[ring->next_to_clean];
2089 size = le16_to_cpu(desc->rx.size);
2091 truesize = hnae3_buf_size(ring);
2094 last_offset = hnae3_page_size(ring) - hnae3_buf_size(ring);
2096 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2097 size - pull_len, truesize);
2099 /* Avoid re-using remote pages,flag default unreuse */
2100 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2104 /* If we are only owner of page we can reuse it */
2105 if (likely(page_count(desc_cb->priv) == 1)) {
2106 /* Flip page offset to other buffer */
2107 desc_cb->page_offset ^= truesize;
2109 desc_cb->reuse_flag = 1;
2110 /* bump ref count on page before it is given*/
2111 get_page(desc_cb->priv);
2116 /* Move offset up to the next cache line */
2117 desc_cb->page_offset += truesize;
2119 if (desc_cb->page_offset <= last_offset) {
2120 desc_cb->reuse_flag = 1;
2121 /* Bump ref count on page before it is given*/
2122 get_page(desc_cb->priv);
2126 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2127 struct hns3_desc *desc)
2129 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2130 int l3_type, l4_type;
2135 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2136 l234info = le32_to_cpu(desc->rx.l234_info);
2138 skb->ip_summed = CHECKSUM_NONE;
2140 skb_checksum_none_assert(skb);
2142 if (!(netdev->features & NETIF_F_RXCSUM))
2145 /* check if hardware has done checksum */
2146 if (!hnae3_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2149 if (unlikely(hnae3_get_bit(l234info, HNS3_RXD_L3E_B) ||
2150 hnae3_get_bit(l234info, HNS3_RXD_L4E_B) ||
2151 hnae3_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2152 hnae3_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2153 u64_stats_update_begin(&ring->syncp);
2154 ring->stats.l3l4_csum_err++;
2155 u64_stats_update_end(&ring->syncp);
2160 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2162 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2165 ol4_type = hnae3_get_field(l234info, HNS3_RXD_OL4ID_M,
2168 case HNS3_OL4_TYPE_MAC_IN_UDP:
2169 case HNS3_OL4_TYPE_NVGRE:
2170 skb->csum_level = 1;
2172 case HNS3_OL4_TYPE_NO_TUN:
2173 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2174 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2175 l3_type == HNS3_L3_TYPE_IPV6) &&
2176 (l4_type == HNS3_L4_TYPE_UDP ||
2177 l4_type == HNS3_L4_TYPE_TCP ||
2178 l4_type == HNS3_L4_TYPE_SCTP))
2179 skb->ip_summed = CHECKSUM_UNNECESSARY;
2186 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2188 napi_gro_receive(&ring->tqp_vector->napi, skb);
2191 static u16 hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2192 struct hns3_desc *desc, u32 l234info)
2194 struct pci_dev *pdev = ring->tqp->handle->pdev;
2197 if (pdev->revision == 0x20) {
2198 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2199 if (!(vlan_tag & VLAN_VID_MASK))
2200 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2205 #define HNS3_STRP_OUTER_VLAN 0x1
2206 #define HNS3_STRP_INNER_VLAN 0x2
2208 switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2209 HNS3_RXD_STRP_TAGP_S)) {
2210 case HNS3_STRP_OUTER_VLAN:
2211 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2213 case HNS3_STRP_INNER_VLAN:
2214 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2224 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2225 struct sk_buff **out_skb, int *out_bnum)
2227 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2228 struct hns3_desc_cb *desc_cb;
2229 struct hns3_desc *desc;
2230 struct sk_buff *skb;
2238 desc = &ring->desc[ring->next_to_clean];
2239 desc_cb = &ring->desc_cb[ring->next_to_clean];
2243 length = le16_to_cpu(desc->rx.size);
2244 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2246 /* Check valid BD */
2247 if (unlikely(!hnae3_get_bit(bd_base_info, HNS3_RXD_VLD_B)))
2250 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2252 /* Prefetch first cache line of first page
2253 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2254 * line size is 64B so need to prefetch twice to make it 128B. But in
2255 * actual we can have greater size of caches with 128B Level 1 cache
2256 * lines. In such a case, single fetch would suffice to cache in the
2257 * relevant part of the header.
2260 #if L1_CACHE_BYTES < 128
2261 prefetch(va + L1_CACHE_BYTES);
2264 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2266 if (unlikely(!skb)) {
2267 netdev_err(netdev, "alloc rx skb fail\n");
2269 u64_stats_update_begin(&ring->syncp);
2270 ring->stats.sw_err_cnt++;
2271 u64_stats_update_end(&ring->syncp);
2276 prefetchw(skb->data);
2279 if (length <= HNS3_RX_HEAD_SIZE) {
2280 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2282 /* We can reuse buffer as-is, just make sure it is local */
2283 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2284 desc_cb->reuse_flag = 1;
2285 else /* This page cannot be reused so discard it */
2286 put_page(desc_cb->priv);
2288 ring_ptr_move_fw(ring, next_to_clean);
2290 u64_stats_update_begin(&ring->syncp);
2291 ring->stats.seg_pkt_cnt++;
2292 u64_stats_update_end(&ring->syncp);
2294 pull_len = eth_get_headlen(va, HNS3_RX_HEAD_SIZE);
2296 memcpy(__skb_put(skb, pull_len), va,
2297 ALIGN(pull_len, sizeof(long)));
2299 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2300 ring_ptr_move_fw(ring, next_to_clean);
2302 while (!hnae3_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2303 desc = &ring->desc[ring->next_to_clean];
2304 desc_cb = &ring->desc_cb[ring->next_to_clean];
2305 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2306 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2307 ring_ptr_move_fw(ring, next_to_clean);
2314 l234info = le32_to_cpu(desc->rx.l234_info);
2316 /* Based on hw strategy, the tag offloaded will be stored at
2317 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2318 * in one layer tag case.
2320 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2323 vlan_tag = hns3_parse_vlan_tag(ring, desc, l234info);
2324 if (vlan_tag & VLAN_VID_MASK)
2325 __vlan_hwaccel_put_tag(skb,
2330 if (unlikely(!hnae3_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2331 u64_stats_update_begin(&ring->syncp);
2332 ring->stats.non_vld_descs++;
2333 u64_stats_update_end(&ring->syncp);
2335 dev_kfree_skb_any(skb);
2339 if (unlikely((!desc->rx.pkt_len) ||
2340 hnae3_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2341 u64_stats_update_begin(&ring->syncp);
2342 ring->stats.err_pkt_len++;
2343 u64_stats_update_end(&ring->syncp);
2345 dev_kfree_skb_any(skb);
2349 if (unlikely(hnae3_get_bit(l234info, HNS3_RXD_L2E_B))) {
2350 u64_stats_update_begin(&ring->syncp);
2351 ring->stats.l2_err++;
2352 u64_stats_update_end(&ring->syncp);
2354 dev_kfree_skb_any(skb);
2358 u64_stats_update_begin(&ring->syncp);
2359 ring->stats.rx_pkts++;
2360 ring->stats.rx_bytes += skb->len;
2361 u64_stats_update_end(&ring->syncp);
2363 ring->tqp_vector->rx_group.total_bytes += skb->len;
2365 hns3_rx_checksum(ring, skb, desc);
2369 int hns3_clean_rx_ring(
2370 struct hns3_enet_ring *ring, int budget,
2371 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2373 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2374 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2375 int recv_pkts, recv_bds, clean_count, err;
2376 int unused_count = hns3_desc_unused(ring);
2377 struct sk_buff *skb = NULL;
2380 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2381 rmb(); /* Make sure num taken effect before the other data is touched */
2383 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2384 num -= unused_count;
2386 while (recv_pkts < budget && recv_bds < num) {
2387 /* Reuse or realloc buffers */
2388 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2389 hns3_nic_alloc_rx_buffers(ring,
2390 clean_count + unused_count);
2392 unused_count = hns3_desc_unused(ring);
2396 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2397 if (unlikely(!skb)) /* This fault cannot be repaired */
2401 clean_count += bnum;
2402 if (unlikely(err)) { /* Do jump the err */
2407 /* Do update ip stack process */
2408 skb->protocol = eth_type_trans(skb, netdev);
2415 /* Make all data has been write before submit */
2416 if (clean_count + unused_count > 0)
2417 hns3_nic_alloc_rx_buffers(ring,
2418 clean_count + unused_count);
2423 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2425 struct hns3_enet_tqp_vector *tqp_vector =
2426 ring_group->ring->tqp_vector;
2427 enum hns3_flow_level_range new_flow_level;
2428 int packets_per_msecs;
2429 int bytes_per_msecs;
2433 if (!ring_group->coal.int_gl || !tqp_vector->last_jiffies)
2436 if (ring_group->total_packets == 0) {
2437 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2438 ring_group->coal.flow_level = HNS3_FLOW_LOW;
2442 /* Simple throttlerate management
2443 * 0-10MB/s lower (50000 ints/s)
2444 * 10-20MB/s middle (20000 ints/s)
2445 * 20-1249MB/s high (18000 ints/s)
2446 * > 40000pps ultra (8000 ints/s)
2448 new_flow_level = ring_group->coal.flow_level;
2449 new_int_gl = ring_group->coal.int_gl;
2451 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2453 if (!time_passed_ms)
2456 do_div(ring_group->total_packets, time_passed_ms);
2457 packets_per_msecs = ring_group->total_packets;
2459 do_div(ring_group->total_bytes, time_passed_ms);
2460 bytes_per_msecs = ring_group->total_bytes;
2462 #define HNS3_RX_LOW_BYTE_RATE 10000
2463 #define HNS3_RX_MID_BYTE_RATE 20000
2465 switch (new_flow_level) {
2467 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2468 new_flow_level = HNS3_FLOW_MID;
2471 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
2472 new_flow_level = HNS3_FLOW_HIGH;
2473 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
2474 new_flow_level = HNS3_FLOW_LOW;
2476 case HNS3_FLOW_HIGH:
2477 case HNS3_FLOW_ULTRA:
2479 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
2480 new_flow_level = HNS3_FLOW_MID;
2484 #define HNS3_RX_ULTRA_PACKET_RATE 40
2486 if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2487 &tqp_vector->rx_group == ring_group)
2488 new_flow_level = HNS3_FLOW_ULTRA;
2490 switch (new_flow_level) {
2492 new_int_gl = HNS3_INT_GL_50K;
2495 new_int_gl = HNS3_INT_GL_20K;
2497 case HNS3_FLOW_HIGH:
2498 new_int_gl = HNS3_INT_GL_18K;
2500 case HNS3_FLOW_ULTRA:
2501 new_int_gl = HNS3_INT_GL_8K;
2507 ring_group->total_bytes = 0;
2508 ring_group->total_packets = 0;
2509 ring_group->coal.flow_level = new_flow_level;
2510 if (new_int_gl != ring_group->coal.int_gl) {
2511 ring_group->coal.int_gl = new_int_gl;
2517 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2519 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2520 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2521 bool rx_update, tx_update;
2523 if (tqp_vector->int_adapt_down > 0) {
2524 tqp_vector->int_adapt_down--;
2528 if (rx_group->coal.gl_adapt_enable) {
2529 rx_update = hns3_get_new_int_gl(rx_group);
2531 hns3_set_vector_coalesce_rx_gl(tqp_vector,
2532 rx_group->coal.int_gl);
2535 if (tx_group->coal.gl_adapt_enable) {
2536 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2538 hns3_set_vector_coalesce_tx_gl(tqp_vector,
2539 tx_group->coal.int_gl);
2542 tqp_vector->last_jiffies = jiffies;
2543 tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
2546 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2548 struct hns3_enet_ring *ring;
2549 int rx_pkt_total = 0;
2551 struct hns3_enet_tqp_vector *tqp_vector =
2552 container_of(napi, struct hns3_enet_tqp_vector, napi);
2553 bool clean_complete = true;
2556 /* Since the actual Tx work is minimal, we can give the Tx a larger
2557 * budget and be more aggressive about cleaning up the Tx descriptors.
2559 hns3_for_each_ring(ring, tqp_vector->tx_group)
2560 hns3_clean_tx_ring(ring);
2562 /* make sure rx ring budget not smaller than 1 */
2563 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2565 hns3_for_each_ring(ring, tqp_vector->rx_group) {
2566 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2569 if (rx_cleaned >= rx_budget)
2570 clean_complete = false;
2572 rx_pkt_total += rx_cleaned;
2575 tqp_vector->rx_group.total_packets += rx_pkt_total;
2577 if (!clean_complete)
2580 napi_complete(napi);
2581 hns3_update_new_int_gl(tqp_vector);
2582 hns3_mask_vector_irq(tqp_vector, 1);
2584 return rx_pkt_total;
2587 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2588 struct hnae3_ring_chain_node *head)
2590 struct pci_dev *pdev = tqp_vector->handle->pdev;
2591 struct hnae3_ring_chain_node *cur_chain = head;
2592 struct hnae3_ring_chain_node *chain;
2593 struct hns3_enet_ring *tx_ring;
2594 struct hns3_enet_ring *rx_ring;
2596 tx_ring = tqp_vector->tx_group.ring;
2598 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2599 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2600 HNAE3_RING_TYPE_TX);
2601 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2602 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
2604 cur_chain->next = NULL;
2606 while (tx_ring->next) {
2607 tx_ring = tx_ring->next;
2609 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2614 cur_chain->next = chain;
2615 chain->tqp_index = tx_ring->tqp->tqp_index;
2616 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2617 HNAE3_RING_TYPE_TX);
2618 hnae3_set_field(chain->int_gl_idx,
2619 HNAE3_RING_GL_IDX_M,
2620 HNAE3_RING_GL_IDX_S,
2627 rx_ring = tqp_vector->rx_group.ring;
2628 if (!tx_ring && rx_ring) {
2629 cur_chain->next = NULL;
2630 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2631 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2632 HNAE3_RING_TYPE_RX);
2633 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2634 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2636 rx_ring = rx_ring->next;
2640 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2644 cur_chain->next = chain;
2645 chain->tqp_index = rx_ring->tqp->tqp_index;
2646 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2647 HNAE3_RING_TYPE_RX);
2648 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2649 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2653 rx_ring = rx_ring->next;
2659 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2660 struct hnae3_ring_chain_node *head)
2662 struct pci_dev *pdev = tqp_vector->handle->pdev;
2663 struct hnae3_ring_chain_node *chain_tmp, *chain;
2668 chain_tmp = chain->next;
2669 devm_kfree(&pdev->dev, chain);
2674 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2675 struct hns3_enet_ring *ring)
2677 ring->next = group->ring;
2683 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
2685 struct pci_dev *pdev = priv->ae_handle->pdev;
2686 struct hns3_enet_tqp_vector *tqp_vector;
2687 int num_vectors = priv->vector_num;
2691 numa_node = dev_to_node(&pdev->dev);
2693 for (vector_i = 0; vector_i < num_vectors; vector_i++) {
2694 tqp_vector = &priv->tqp_vector[vector_i];
2695 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
2696 &tqp_vector->affinity_mask);
2700 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2702 struct hnae3_ring_chain_node vector_ring_chain;
2703 struct hnae3_handle *h = priv->ae_handle;
2704 struct hns3_enet_tqp_vector *tqp_vector;
2708 hns3_nic_set_cpumask(priv);
2710 for (i = 0; i < priv->vector_num; i++) {
2711 tqp_vector = &priv->tqp_vector[i];
2712 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
2713 tqp_vector->num_tqps = 0;
2716 for (i = 0; i < h->kinfo.num_tqps; i++) {
2717 u16 vector_i = i % priv->vector_num;
2718 u16 tqp_num = h->kinfo.num_tqps;
2720 tqp_vector = &priv->tqp_vector[vector_i];
2722 hns3_add_ring_to_group(&tqp_vector->tx_group,
2723 priv->ring_data[i].ring);
2725 hns3_add_ring_to_group(&tqp_vector->rx_group,
2726 priv->ring_data[i + tqp_num].ring);
2728 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2729 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2730 tqp_vector->num_tqps++;
2733 for (i = 0; i < priv->vector_num; i++) {
2734 tqp_vector = &priv->tqp_vector[i];
2736 tqp_vector->rx_group.total_bytes = 0;
2737 tqp_vector->rx_group.total_packets = 0;
2738 tqp_vector->tx_group.total_bytes = 0;
2739 tqp_vector->tx_group.total_packets = 0;
2740 tqp_vector->handle = h;
2742 ret = hns3_get_vector_ring_chain(tqp_vector,
2743 &vector_ring_chain);
2747 ret = h->ae_algo->ops->map_ring_to_vector(h,
2748 tqp_vector->vector_irq, &vector_ring_chain);
2750 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2755 netif_napi_add(priv->netdev, &tqp_vector->napi,
2756 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2762 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
2764 struct hnae3_handle *h = priv->ae_handle;
2765 struct hns3_enet_tqp_vector *tqp_vector;
2766 struct hnae3_vector_info *vector;
2767 struct pci_dev *pdev = h->pdev;
2768 u16 tqp_num = h->kinfo.num_tqps;
2773 /* RSS size, cpu online and vector_num should be the same */
2774 /* Should consider 2p/4p later */
2775 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2776 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2781 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2783 priv->vector_num = vector_num;
2784 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2785 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2787 if (!priv->tqp_vector) {
2792 for (i = 0; i < priv->vector_num; i++) {
2793 tqp_vector = &priv->tqp_vector[i];
2794 tqp_vector->idx = i;
2795 tqp_vector->mask_addr = vector[i].io_addr;
2796 tqp_vector->vector_irq = vector[i].vector;
2797 hns3_vector_gl_rl_init(tqp_vector, priv);
2801 devm_kfree(&pdev->dev, vector);
2805 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
2811 static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2813 struct hnae3_ring_chain_node vector_ring_chain;
2814 struct hnae3_handle *h = priv->ae_handle;
2815 struct hns3_enet_tqp_vector *tqp_vector;
2818 for (i = 0; i < priv->vector_num; i++) {
2819 tqp_vector = &priv->tqp_vector[i];
2821 ret = hns3_get_vector_ring_chain(tqp_vector,
2822 &vector_ring_chain);
2826 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2827 tqp_vector->vector_irq, &vector_ring_chain);
2831 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2833 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2834 (void)irq_set_affinity_hint(
2835 priv->tqp_vector[i].vector_irq,
2837 free_irq(priv->tqp_vector[i].vector_irq,
2838 &priv->tqp_vector[i]);
2841 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
2842 hns3_clear_ring_group(&tqp_vector->rx_group);
2843 hns3_clear_ring_group(&tqp_vector->tx_group);
2844 netif_napi_del(&priv->tqp_vector[i].napi);
2850 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
2852 struct hnae3_handle *h = priv->ae_handle;
2853 struct pci_dev *pdev = h->pdev;
2856 for (i = 0; i < priv->vector_num; i++) {
2857 struct hns3_enet_tqp_vector *tqp_vector;
2859 tqp_vector = &priv->tqp_vector[i];
2860 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2865 devm_kfree(&pdev->dev, priv->tqp_vector);
2869 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2872 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2873 int queue_num = priv->ae_handle->kinfo.num_tqps;
2874 struct pci_dev *pdev = priv->ae_handle->pdev;
2875 struct hns3_enet_ring *ring;
2877 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2881 if (ring_type == HNAE3_RING_TYPE_TX) {
2882 ring_data[q->tqp_index].ring = ring;
2883 ring_data[q->tqp_index].queue_index = q->tqp_index;
2884 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2886 ring_data[q->tqp_index + queue_num].ring = ring;
2887 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
2888 ring->io_base = q->io_base;
2891 hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2895 ring->desc_cb = NULL;
2896 ring->dev = priv->dev;
2897 ring->desc_dma_addr = 0;
2898 ring->buf_size = q->buf_size;
2899 ring->desc_num = q->desc_num;
2900 ring->next_to_use = 0;
2901 ring->next_to_clean = 0;
2906 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2907 struct hns3_nic_priv *priv)
2911 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2915 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2922 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2924 struct hnae3_handle *h = priv->ae_handle;
2925 struct pci_dev *pdev = h->pdev;
2928 priv->ring_data = devm_kzalloc(&pdev->dev,
2929 array3_size(h->kinfo.num_tqps,
2930 sizeof(*priv->ring_data),
2933 if (!priv->ring_data)
2936 for (i = 0; i < h->kinfo.num_tqps; i++) {
2937 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2944 devm_kfree(&pdev->dev, priv->ring_data);
2948 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2950 struct hnae3_handle *h = priv->ae_handle;
2953 for (i = 0; i < h->kinfo.num_tqps; i++) {
2954 devm_kfree(priv->dev, priv->ring_data[i].ring);
2955 devm_kfree(priv->dev,
2956 priv->ring_data[i + h->kinfo.num_tqps].ring);
2958 devm_kfree(priv->dev, priv->ring_data);
2961 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2965 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2968 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2970 if (!ring->desc_cb) {
2975 ret = hns3_alloc_desc(ring);
2977 goto out_with_desc_cb;
2979 if (!HNAE3_IS_TX_RING(ring)) {
2980 ret = hns3_alloc_ring_buffers(ring);
2988 hns3_free_desc(ring);
2990 kfree(ring->desc_cb);
2991 ring->desc_cb = NULL;
2996 static void hns3_fini_ring(struct hns3_enet_ring *ring)
2998 hns3_free_desc(ring);
2999 kfree(ring->desc_cb);
3000 ring->desc_cb = NULL;
3001 ring->next_to_clean = 0;
3002 ring->next_to_use = 0;
3005 static int hns3_buf_size2type(u32 buf_size)
3011 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3014 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3017 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3020 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3023 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3026 return bd_size_type;
3029 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3031 dma_addr_t dma = ring->desc_dma_addr;
3032 struct hnae3_queue *q = ring->tqp;
3034 if (!HNAE3_IS_TX_RING(ring)) {
3035 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3037 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3038 (u32)((dma >> 31) >> 1));
3040 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3041 hns3_buf_size2type(ring->buf_size));
3042 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3043 ring->desc_num / 8 - 1);
3046 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3048 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3049 (u32)((dma >> 31) >> 1));
3051 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3052 ring->desc_num / 8 - 1);
3056 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3058 struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3061 for (i = 0; i < HNAE3_MAX_TC; i++) {
3062 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3065 if (!tc_info->enable)
3068 for (j = 0; j < tc_info->tqp_count; j++) {
3069 struct hnae3_queue *q;
3071 q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3072 hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3078 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3080 struct hnae3_handle *h = priv->ae_handle;
3081 int ring_num = h->kinfo.num_tqps * 2;
3085 for (i = 0; i < ring_num; i++) {
3086 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3089 "Alloc ring memory fail! ret=%d\n", ret);
3090 goto out_when_alloc_ring_memory;
3093 u64_stats_init(&priv->ring_data[i].ring->syncp);
3098 out_when_alloc_ring_memory:
3099 for (j = i - 1; j >= 0; j--)
3100 hns3_fini_ring(priv->ring_data[j].ring);
3105 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3107 struct hnae3_handle *h = priv->ae_handle;
3110 for (i = 0; i < h->kinfo.num_tqps; i++) {
3111 if (h->ae_algo->ops->reset_queue)
3112 h->ae_algo->ops->reset_queue(h, i);
3114 hns3_fini_ring(priv->ring_data[i].ring);
3115 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3120 /* Set mac addr if it is configured. or leave it to the AE driver */
3121 static void hns3_init_mac_addr(struct net_device *netdev, bool init)
3123 struct hns3_nic_priv *priv = netdev_priv(netdev);
3124 struct hnae3_handle *h = priv->ae_handle;
3125 u8 mac_addr_temp[ETH_ALEN];
3127 if (h->ae_algo->ops->get_mac_addr && init) {
3128 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3129 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3132 /* Check if the MAC address is valid, if not get a random one */
3133 if (!is_valid_ether_addr(netdev->dev_addr)) {
3134 eth_hw_addr_random(netdev);
3135 dev_warn(priv->dev, "using random MAC address %pM\n",
3139 if (h->ae_algo->ops->set_mac_addr)
3140 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3144 static void hns3_uninit_mac_addr(struct net_device *netdev)
3146 struct hns3_nic_priv *priv = netdev_priv(netdev);
3147 struct hnae3_handle *h = priv->ae_handle;
3149 if (h->ae_algo->ops->rm_uc_addr)
3150 h->ae_algo->ops->rm_uc_addr(h, netdev->dev_addr);
3153 static void hns3_nic_set_priv_ops(struct net_device *netdev)
3155 struct hns3_nic_priv *priv = netdev_priv(netdev);
3157 if ((netdev->features & NETIF_F_TSO) ||
3158 (netdev->features & NETIF_F_TSO6)) {
3159 priv->ops.fill_desc = hns3_fill_desc_tso;
3160 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3162 priv->ops.fill_desc = hns3_fill_desc;
3163 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3167 static int hns3_client_init(struct hnae3_handle *handle)
3169 struct pci_dev *pdev = handle->pdev;
3170 u16 alloc_tqps, max_rss_size;
3171 struct hns3_nic_priv *priv;
3172 struct net_device *netdev;
3175 handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3177 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3181 priv = netdev_priv(netdev);
3182 priv->dev = &pdev->dev;
3183 priv->netdev = netdev;
3184 priv->ae_handle = handle;
3185 priv->ae_handle->last_reset_time = jiffies;
3186 priv->tx_timeout_count = 0;
3188 handle->kinfo.netdev = netdev;
3189 handle->priv = (void *)priv;
3191 hns3_init_mac_addr(netdev, true);
3193 hns3_set_default_feature(netdev);
3195 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3196 netdev->priv_flags |= IFF_UNICAST_FLT;
3197 netdev->netdev_ops = &hns3_nic_netdev_ops;
3198 SET_NETDEV_DEV(netdev, &pdev->dev);
3199 hns3_ethtool_set_ops(netdev);
3200 hns3_nic_set_priv_ops(netdev);
3202 /* Carrier off reporting is important to ethtool even BEFORE open */
3203 netif_carrier_off(netdev);
3205 if (handle->flags & HNAE3_SUPPORT_VF)
3206 handle->reset_level = HNAE3_VF_RESET;
3208 handle->reset_level = HNAE3_FUNC_RESET;
3210 ret = hns3_get_ring_config(priv);
3213 goto out_get_ring_cfg;
3216 ret = hns3_nic_alloc_vector_data(priv);
3219 goto out_alloc_vector_data;
3222 ret = hns3_nic_init_vector_data(priv);
3225 goto out_init_vector_data;
3228 ret = hns3_init_all_ring(priv);
3231 goto out_init_ring_data;
3234 ret = register_netdev(netdev);
3236 dev_err(priv->dev, "probe register netdev fail!\n");
3237 goto out_reg_netdev_fail;
3240 hns3_dcbnl_setup(handle);
3242 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3243 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3247 out_reg_netdev_fail:
3249 (void)hns3_nic_uninit_vector_data(priv);
3250 out_init_vector_data:
3251 hns3_nic_dealloc_vector_data(priv);
3252 out_alloc_vector_data:
3253 priv->ring_data = NULL;
3255 priv->ae_handle = NULL;
3256 free_netdev(netdev);
3260 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3262 struct net_device *netdev = handle->kinfo.netdev;
3263 struct hns3_nic_priv *priv = netdev_priv(netdev);
3266 if (netdev->reg_state != NETREG_UNINITIALIZED)
3267 unregister_netdev(netdev);
3269 hns3_force_clear_all_rx_ring(handle);
3271 ret = hns3_nic_uninit_vector_data(priv);
3273 netdev_err(netdev, "uninit vector error\n");
3275 ret = hns3_nic_dealloc_vector_data(priv);
3277 netdev_err(netdev, "dealloc vector error\n");
3279 ret = hns3_uninit_all_ring(priv);
3281 netdev_err(netdev, "uninit ring error\n");
3283 hns3_put_ring_config(priv);
3285 priv->ring_data = NULL;
3287 hns3_uninit_mac_addr(netdev);
3289 free_netdev(netdev);
3292 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3294 struct net_device *netdev = handle->kinfo.netdev;
3300 netif_carrier_on(netdev);
3301 netif_tx_wake_all_queues(netdev);
3302 netdev_info(netdev, "link up\n");
3304 netif_carrier_off(netdev);
3305 netif_tx_stop_all_queues(netdev);
3306 netdev_info(netdev, "link down\n");
3310 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3312 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3313 struct net_device *ndev = kinfo->netdev;
3317 if (tc > HNAE3_MAX_TC)
3323 if_running = netif_running(ndev);
3326 (void)hns3_nic_net_stop(ndev);
3330 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3331 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3335 ret = hns3_nic_set_real_num_queue(ndev);
3339 (void)hns3_nic_net_open(ndev);
3344 static void hns3_recover_hw_addr(struct net_device *ndev)
3346 struct netdev_hw_addr_list *list;
3347 struct netdev_hw_addr *ha, *tmp;
3349 /* go through and sync uc_addr entries to the device */
3351 list_for_each_entry_safe(ha, tmp, &list->list, list)
3352 hns3_nic_uc_sync(ndev, ha->addr);
3354 /* go through and sync mc_addr entries to the device */
3356 list_for_each_entry_safe(ha, tmp, &list->list, list)
3357 hns3_nic_mc_sync(ndev, ha->addr);
3360 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
3362 while (ring->next_to_clean != ring->next_to_use) {
3363 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
3364 hns3_free_buffer_detach(ring, ring->next_to_clean);
3365 ring_ptr_move_fw(ring, next_to_clean);
3369 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
3371 struct hns3_desc_cb res_cbs;
3374 while (ring->next_to_use != ring->next_to_clean) {
3375 /* When a buffer is not reused, it's memory has been
3376 * freed in hns3_handle_rx_bd or will be freed by
3377 * stack, so we need to replace the buffer here.
3379 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3380 ret = hns3_reserve_buffer_map(ring, &res_cbs);
3382 u64_stats_update_begin(&ring->syncp);
3383 ring->stats.sw_err_cnt++;
3384 u64_stats_update_end(&ring->syncp);
3385 /* if alloc new buffer fail, exit directly
3386 * and reclear in up flow.
3388 netdev_warn(ring->tqp->handle->kinfo.netdev,
3389 "reserve buffer map failed, ret = %d\n",
3393 hns3_replace_buffer(ring, ring->next_to_use,
3396 ring_ptr_move_fw(ring, next_to_use);
3402 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
3404 while (ring->next_to_use != ring->next_to_clean) {
3405 /* When a buffer is not reused, it's memory has been
3406 * freed in hns3_handle_rx_bd or will be freed by
3407 * stack, so only need to unmap the buffer here.
3409 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3410 hns3_unmap_buffer(ring,
3411 &ring->desc_cb[ring->next_to_use]);
3412 ring->desc_cb[ring->next_to_use].dma = 0;
3415 ring_ptr_move_fw(ring, next_to_use);
3419 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h)
3421 struct net_device *ndev = h->kinfo.netdev;
3422 struct hns3_nic_priv *priv = netdev_priv(ndev);
3423 struct hns3_enet_ring *ring;
3426 for (i = 0; i < h->kinfo.num_tqps; i++) {
3427 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3428 hns3_force_clear_rx_ring(ring);
3432 static void hns3_clear_all_ring(struct hnae3_handle *h)
3434 struct net_device *ndev = h->kinfo.netdev;
3435 struct hns3_nic_priv *priv = netdev_priv(ndev);
3438 for (i = 0; i < h->kinfo.num_tqps; i++) {
3439 struct netdev_queue *dev_queue;
3440 struct hns3_enet_ring *ring;
3442 ring = priv->ring_data[i].ring;
3443 hns3_clear_tx_ring(ring);
3444 dev_queue = netdev_get_tx_queue(ndev,
3445 priv->ring_data[i].queue_index);
3446 netdev_tx_reset_queue(dev_queue);
3448 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3449 /* Continue to clear other rings even if clearing some
3452 hns3_clear_rx_ring(ring);
3456 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
3458 struct net_device *ndev = h->kinfo.netdev;
3459 struct hns3_nic_priv *priv = netdev_priv(ndev);
3460 struct hns3_enet_ring *rx_ring;
3464 for (i = 0; i < h->kinfo.num_tqps; i++) {
3465 h->ae_algo->ops->reset_queue(h, i);
3466 hns3_init_ring_hw(priv->ring_data[i].ring);
3468 /* We need to clear tx ring here because self test will
3469 * use the ring and will not run down before up
3471 hns3_clear_tx_ring(priv->ring_data[i].ring);
3472 priv->ring_data[i].ring->next_to_clean = 0;
3473 priv->ring_data[i].ring->next_to_use = 0;
3475 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3476 hns3_init_ring_hw(rx_ring);
3477 ret = hns3_clear_rx_ring(rx_ring);
3481 /* We can not know the hardware head and tail when this
3482 * function is called in reset flow, so we reuse all desc.
3484 for (j = 0; j < rx_ring->desc_num; j++)
3485 hns3_reuse_buffer(rx_ring, j);
3487 rx_ring->next_to_clean = 0;
3488 rx_ring->next_to_use = 0;
3491 hns3_init_tx_ring_tc(priv);
3496 static void hns3_store_coal(struct hns3_nic_priv *priv)
3498 /* ethtool only support setting and querying one coal
3499 * configuation for now, so save the vector 0' coal
3500 * configuation here in order to restore it.
3502 memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
3503 sizeof(struct hns3_enet_coalesce));
3504 memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
3505 sizeof(struct hns3_enet_coalesce));
3508 static void hns3_restore_coal(struct hns3_nic_priv *priv)
3510 u16 vector_num = priv->vector_num;
3513 for (i = 0; i < vector_num; i++) {
3514 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
3515 sizeof(struct hns3_enet_coalesce));
3516 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
3517 sizeof(struct hns3_enet_coalesce));
3521 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3523 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3524 struct net_device *ndev = kinfo->netdev;
3526 if (!netif_running(ndev))
3529 return hns3_nic_net_stop(ndev);
3532 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3534 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3537 if (netif_running(kinfo->netdev)) {
3538 ret = hns3_nic_net_up(kinfo->netdev);
3540 netdev_err(kinfo->netdev,
3541 "hns net up fail, ret=%d!\n", ret);
3544 handle->last_reset_time = jiffies;
3550 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3552 struct net_device *netdev = handle->kinfo.netdev;
3553 struct hns3_nic_priv *priv = netdev_priv(netdev);
3556 hns3_init_mac_addr(netdev, false);
3557 hns3_nic_set_rx_mode(netdev);
3558 hns3_recover_hw_addr(netdev);
3560 /* Hardware table is only clear when pf resets */
3561 if (!(handle->flags & HNAE3_SUPPORT_VF))
3562 hns3_restore_vlan(netdev);
3564 /* Carrier off reporting is important to ethtool even BEFORE open */
3565 netif_carrier_off(netdev);
3567 hns3_restore_coal(priv);
3569 ret = hns3_nic_init_vector_data(priv);
3573 ret = hns3_init_all_ring(priv);
3575 hns3_nic_uninit_vector_data(priv);
3576 priv->ring_data = NULL;
3582 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3584 struct net_device *netdev = handle->kinfo.netdev;
3585 struct hns3_nic_priv *priv = netdev_priv(netdev);
3588 hns3_force_clear_all_rx_ring(handle);
3590 ret = hns3_nic_uninit_vector_data(priv);
3592 netdev_err(netdev, "uninit vector error\n");
3596 hns3_store_coal(priv);
3598 ret = hns3_uninit_all_ring(priv);
3600 netdev_err(netdev, "uninit ring error\n");
3602 hns3_uninit_mac_addr(netdev);
3607 static int hns3_reset_notify(struct hnae3_handle *handle,
3608 enum hnae3_reset_notify_type type)
3613 case HNAE3_UP_CLIENT:
3614 ret = hns3_reset_notify_up_enet(handle);
3616 case HNAE3_DOWN_CLIENT:
3617 ret = hns3_reset_notify_down_enet(handle);
3619 case HNAE3_INIT_CLIENT:
3620 ret = hns3_reset_notify_init_enet(handle);
3622 case HNAE3_UNINIT_CLIENT:
3623 ret = hns3_reset_notify_uninit_enet(handle);
3632 static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num)
3634 struct hns3_nic_priv *priv = netdev_priv(netdev);
3635 struct hnae3_handle *h = hns3_get_handle(netdev);
3638 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3642 ret = hns3_get_ring_config(priv);
3646 ret = hns3_nic_alloc_vector_data(priv);
3648 goto err_alloc_vector;
3650 hns3_restore_coal(priv);
3652 ret = hns3_nic_init_vector_data(priv);
3654 goto err_uninit_vector;
3656 ret = hns3_init_all_ring(priv);
3663 hns3_put_ring_config(priv);
3665 hns3_nic_uninit_vector_data(priv);
3667 hns3_nic_dealloc_vector_data(priv);
3671 static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3673 return (new_tqp_num / num_tc) * num_tc;
3676 int hns3_set_channels(struct net_device *netdev,
3677 struct ethtool_channels *ch)
3679 struct hns3_nic_priv *priv = netdev_priv(netdev);
3680 struct hnae3_handle *h = hns3_get_handle(netdev);
3681 struct hnae3_knic_private_info *kinfo = &h->kinfo;
3682 bool if_running = netif_running(netdev);
3683 u32 new_tqp_num = ch->combined_count;
3687 if (ch->rx_count || ch->tx_count)
3690 if (new_tqp_num > hns3_get_max_available_channels(h) ||
3691 new_tqp_num < kinfo->num_tc) {
3692 dev_err(&netdev->dev,
3693 "Change tqps fail, the tqp range is from %d to %d",
3695 hns3_get_max_available_channels(h));
3699 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3700 if (kinfo->num_tqps == new_tqp_num)
3704 hns3_nic_net_stop(netdev);
3706 ret = hns3_nic_uninit_vector_data(priv);
3708 dev_err(&netdev->dev,
3709 "Unbind vector with tqp fail, nothing is changed");
3713 hns3_store_coal(priv);
3715 hns3_nic_dealloc_vector_data(priv);
3717 hns3_uninit_all_ring(priv);
3718 hns3_put_ring_config(priv);
3720 org_tqp_num = h->kinfo.num_tqps;
3721 ret = hns3_modify_tqp_num(netdev, new_tqp_num);
3723 ret = hns3_modify_tqp_num(netdev, org_tqp_num);
3725 /* If revert to old tqp failed, fatal error occurred */
3726 dev_err(&netdev->dev,
3727 "Revert to old tqp num fail, ret=%d", ret);
3730 dev_info(&netdev->dev,
3731 "Change tqp num fail, Revert to old tqp num");
3736 hns3_nic_net_open(netdev);
3741 static const struct hnae3_client_ops client_ops = {
3742 .init_instance = hns3_client_init,
3743 .uninit_instance = hns3_client_uninit,
3744 .link_status_change = hns3_link_status_change,
3745 .setup_tc = hns3_client_setup_tc,
3746 .reset_notify = hns3_reset_notify,
3749 /* hns3_init_module - Driver registration routine
3750 * hns3_init_module is the first routine called when the driver is
3751 * loaded. All it does is register with the PCI subsystem.
3753 static int __init hns3_init_module(void)
3757 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3758 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3760 client.type = HNAE3_CLIENT_KNIC;
3761 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3764 client.ops = &client_ops;
3766 INIT_LIST_HEAD(&client.node);
3768 ret = hnae3_register_client(&client);
3772 ret = pci_register_driver(&hns3_driver);
3774 hnae3_unregister_client(&client);
3778 module_init(hns3_init_module);
3780 /* hns3_exit_module - Driver exit cleanup routine
3781 * hns3_exit_module is called just before the driver is removed
3784 static void __exit hns3_exit_module(void)
3786 pci_unregister_driver(&hns3_driver);
3787 hnae3_unregister_client(&client);
3789 module_exit(hns3_exit_module);
3791 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3792 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3793 MODULE_LICENSE("GPL");
3794 MODULE_ALIAS("pci:hns-nic");
3795 MODULE_VERSION(HNS3_MOD_VERSION);