drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/ip.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/aer.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/sctp.h>
  18 #include <linux/vermagic.h>
  19 #include <net/gre.h>
  20 #include <net/ip6_checksum.h>
  21 #include <net/pkt_cls.h>
  22 #include <net/tcp.h>
  23 #include <net/vxlan.h>
  24
  25 #include "hnae3.h"
  26 #include "hns3_enet.h"
  27
  28 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  29 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  30
  31 static void hns3_clear_all_ring(struct hnae3_handle *h);
  32 static void hns3_force_clear_all_ring(struct hnae3_handle *h);
  33 static void hns3_remove_hw_addr(struct net_device *netdev);
  34
  35 static const char hns3_driver_name[] = "hns3";
  36 const char hns3_driver_version[] = VERMAGIC_STRING;
  37 static const char hns3_driver_string[] =
  38                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  39 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  40 static struct hnae3_client client;
  41
  42 static int debug = -1;
  43 module_param(debug, int, 0);
  44 MODULE_PARM_DESC(debug, " Network interface message level setting");
  45
  46 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  47                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  48
  49 /* hns3_pci_tbl - PCI Device ID Table
  50  *
  51  * Last entry must be all 0s
  52  *
  53  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  54  *   Class, Class Mask, private data (not used) }
  55  */
  56 static const struct pci_device_id hns3_pci_tbl[] = {
  57         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  58         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  59         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  60          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  61         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  62          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  63         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  64          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  65         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  66          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  67         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  68          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  69         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  70         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  71          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  72         /* required last entry */
  73         {0, }
  74 };
  75 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  76
  77 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  78 {
  79         struct hns3_enet_tqp_vector *tqp_vector = vector;
  80
  81         napi_schedule_irqoff(&tqp_vector->napi);
  82
  83         return IRQ_HANDLED;
  84 }
  85
  86 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
  87 {
  88         struct hns3_enet_tqp_vector *tqp_vectors;
  89         unsigned int i;
  90
  91         for (i = 0; i < priv->vector_num; i++) {
  92                 tqp_vectors = &priv->tqp_vector[i];
  93
  94                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
  95                         continue;
  96
  97                 /* clear the affinity mask */
  98                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
  99
 100                 /* release the irq resource */
 101                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 102                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 103         }
 104 }
 105
 106 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 107 {
 108         struct hns3_enet_tqp_vector *tqp_vectors;
 109         int txrx_int_idx = 0;
 110         int rx_int_idx = 0;
 111         int tx_int_idx = 0;
 112         unsigned int i;
 113         int ret;
 114
 115         for (i = 0; i < priv->vector_num; i++) {
 116                 tqp_vectors = &priv->tqp_vector[i];
 117
 118                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 119                         continue;
 120
 121                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 122                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 123                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 124                                  txrx_int_idx++);
 125                         txrx_int_idx++;
 126                 } else if (tqp_vectors->rx_group.ring) {
 127                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 128                                  "%s-%s-%d", priv->netdev->name, "Rx",
 129                                  rx_int_idx++);
 130                 } else if (tqp_vectors->tx_group.ring) {
 131                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 132                                  "%s-%s-%d", priv->netdev->name, "Tx",
 133                                  tx_int_idx++);
 134                 } else {
 135                         /* Skip this unused q_vector */
 136                         continue;
 137                 }
 138
 139                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 140
 141                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 142                                   tqp_vectors->name, tqp_vectors);
 143                 if (ret) {
 144                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 145                                    tqp_vectors->vector_irq);
 146                         hns3_nic_uninit_irq(priv);
 147                         return ret;
 148                 }
 149
 150                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 151                                       &tqp_vectors->affinity_mask);
 152
 153                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 154         }
 155
 156         return 0;
 157 }
 158
 159 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 160                                  u32 mask_en)
 161 {
 162         writel(mask_en, tqp_vector->mask_addr);
 163 }
 164
 165 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 166 {
 167         napi_enable(&tqp_vector->napi);
 168
 169         /* enable vector */
 170         hns3_mask_vector_irq(tqp_vector, 1);
 171 }
 172
 173 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 174 {
 175         /* disable vector */
 176         hns3_mask_vector_irq(tqp_vector, 0);
 177
 178         disable_irq(tqp_vector->vector_irq);
 179         napi_disable(&tqp_vector->napi);
 180 }
 181
 182 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 183                                  u32 rl_value)
 184 {
 185         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 186
 187         /* this defines the configuration for RL (Interrupt Rate Limiter).
 188          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 189          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 190          */
 191
 192         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 193             !tqp_vector->rx_group.coal.gl_adapt_enable)
 194                 /* According to the hardware, the range of rl_reg is
 195                  * 0-59 and the unit is 4.
 196                  */
 197                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 198
 199         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 200 }
 201
 202 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 203                                     u32 gl_value)
 204 {
 205         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 206
 207         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 208 }
 209
 210 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 211                                     u32 gl_value)
 212 {
 213         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 214
 215         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 216 }
 217
 218 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 219                                    struct hns3_nic_priv *priv)
 220 {
 221         /* initialize the configuration for interrupt coalescing.
 222          * 1. GL (Interrupt Gap Limiter)
 223          * 2. RL (Interrupt Rate Limiter)
 224          */
 225
 226         /* Default: enable interrupt coalescing self-adaptive and GL */
 227         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 228         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 229
 230         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 231         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 232
 233         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 234         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 235 }
 236
 237 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 238                                       struct hns3_nic_priv *priv)
 239 {
 240         struct hnae3_handle *h = priv->ae_handle;
 241
 242         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 243                                        tqp_vector->tx_group.coal.int_gl);
 244         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 245                                        tqp_vector->rx_group.coal.int_gl);
 246         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 247 }
 248
 249 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 250 {
 251         struct hnae3_handle *h = hns3_get_handle(netdev);
 252         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 253         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 254         int i, ret;
 255
 256         if (kinfo->num_tc <= 1) {
 257                 netdev_reset_tc(netdev);
 258         } else {
 259                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 260                 if (ret) {
 261                         netdev_err(netdev,
 262                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 263                         return ret;
 264                 }
 265
 266                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 267                         if (!kinfo->tc_info[i].enable)
 268                                 continue;
 269
 270                         netdev_set_tc_queue(netdev,
 271                                             kinfo->tc_info[i].tc,
 272                                             kinfo->tc_info[i].tqp_count,
 273                                             kinfo->tc_info[i].tqp_offset);
 274                 }
 275         }
 276
 277         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 278         if (ret) {
 279                 netdev_err(netdev,
 280                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 281                 return ret;
 282         }
 283
 284         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 285         if (ret) {
 286                 netdev_err(netdev,
 287                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 288                 return ret;
 289         }
 290
 291         return 0;
 292 }
 293
 294 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 295 {
 296         u16 alloc_tqps, max_rss_size, rss_size;
 297
 298         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 299         rss_size = alloc_tqps / h->kinfo.num_tc;
 300
 301         return min_t(u16, rss_size, max_rss_size);
 302 }
 303
 304 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 305 {
 306         u32 rcb_reg;
 307
 308         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 309         rcb_reg |= BIT(HNS3_RING_EN_B);
 310         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 311 }
 312
 313 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 314 {
 315         u32 rcb_reg;
 316
 317         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 318         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 319         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 320 }
 321
 322 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 323 {
 324 #ifdef CONFIG_RFS_ACCEL
 325         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 326         netdev->rx_cpu_rmap = NULL;
 327 #endif
 328 }
 329
 330 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 331 {
 332 #ifdef CONFIG_RFS_ACCEL
 333         struct hns3_nic_priv *priv = netdev_priv(netdev);
 334         struct hns3_enet_tqp_vector *tqp_vector;
 335         int i, ret;
 336
 337         if (!netdev->rx_cpu_rmap) {
 338                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 339                 if (!netdev->rx_cpu_rmap)
 340                         return -ENOMEM;
 341         }
 342
 343         for (i = 0; i < priv->vector_num; i++) {
 344                 tqp_vector = &priv->tqp_vector[i];
 345                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 346                                        tqp_vector->vector_irq);
 347                 if (ret) {
 348                         hns3_free_rx_cpu_rmap(netdev);
 349                         return ret;
 350                 }
 351         }
 352 #endif
 353         return 0;
 354 }
 355
 356 static int hns3_nic_net_up(struct net_device *netdev)
 357 {
 358         struct hns3_nic_priv *priv = netdev_priv(netdev);
 359         struct hnae3_handle *h = priv->ae_handle;
 360         int i, j;
 361         int ret;
 362
 363         ret = hns3_nic_reset_all_ring(h);
 364         if (ret)
 365                 return ret;
 366
 367         /* the device can work without cpu rmap, only aRFS needs it */
 368         ret = hns3_set_rx_cpu_rmap(netdev);
 369         if (ret)
 370                 netdev_warn(netdev, "set rx cpu rmap fail, ret=%d!\n", ret);
 371
 372         /* get irq resource for all vectors */
 373         ret = hns3_nic_init_irq(priv);
 374         if (ret) {
 375                 netdev_err(netdev, "init irq failed! ret=%d\n", ret);
 376                 goto free_rmap;
 377         }
 378
 379         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 380
 381         /* enable the vectors */
 382         for (i = 0; i < priv->vector_num; i++)
 383                 hns3_vector_enable(&priv->tqp_vector[i]);
 384
 385         /* enable rcb */
 386         for (j = 0; j < h->kinfo.num_tqps; j++)
 387                 hns3_tqp_enable(h->kinfo.tqp[j]);
 388
 389         /* start the ae_dev */
 390         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 391         if (ret)
 392                 goto out_start_err;
 393
 394         return 0;
 395
 396 out_start_err:
 397         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 398         while (j--)
 399                 hns3_tqp_disable(h->kinfo.tqp[j]);
 400
 401         for (j = i - 1; j >= 0; j--)
 402                 hns3_vector_disable(&priv->tqp_vector[j]);
 403
 404         hns3_nic_uninit_irq(priv);
 405 free_rmap:
 406         hns3_free_rx_cpu_rmap(netdev);
 407         return ret;
 408 }
 409
 410 static void hns3_config_xps(struct hns3_nic_priv *priv)
 411 {
 412         int i;
 413
 414         for (i = 0; i < priv->vector_num; i++) {
 415                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 416                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 417
 418                 while (ring) {
 419                         int ret;
 420
 421                         ret = netif_set_xps_queue(priv->netdev,
 422                                                   &tqp_vector->affinity_mask,
 423                                                   ring->tqp->tqp_index);
 424                         if (ret)
 425                                 netdev_warn(priv->netdev,
 426                                             "set xps queue failed: %d", ret);
 427
 428                         ring = ring->next;
 429                 }
 430         }
 431 }
 432
 433 static int hns3_nic_net_open(struct net_device *netdev)
 434 {
 435         struct hns3_nic_priv *priv = netdev_priv(netdev);
 436         struct hnae3_handle *h = hns3_get_handle(netdev);
 437         struct hnae3_knic_private_info *kinfo;
 438         int i, ret;
 439
 440         if (hns3_nic_resetting(netdev))
 441                 return -EBUSY;
 442
 443         netif_carrier_off(netdev);
 444
 445         ret = hns3_nic_set_real_num_queue(netdev);
 446         if (ret)
 447                 return ret;
 448
 449         ret = hns3_nic_net_up(netdev);
 450         if (ret) {
 451                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 452                 return ret;
 453         }
 454
 455         kinfo = &h->kinfo;
 456         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 457                 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
 458
 459         if (h->ae_algo->ops->set_timer_task)
 460                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 461
 462         hns3_config_xps(priv);
 463         return 0;
 464 }
 465
 466 static void hns3_nic_net_down(struct net_device *netdev)
 467 {
 468         struct hns3_nic_priv *priv = netdev_priv(netdev);
 469         struct hnae3_handle *h = hns3_get_handle(netdev);
 470         const struct hnae3_ae_ops *ops;
 471         int i;
 472
 473         /* disable vectors */
 474         for (i = 0; i < priv->vector_num; i++)
 475                 hns3_vector_disable(&priv->tqp_vector[i]);
 476
 477         /* disable rcb */
 478         for (i = 0; i < h->kinfo.num_tqps; i++)
 479                 hns3_tqp_disable(h->kinfo.tqp[i]);
 480
 481         /* stop ae_dev */
 482         ops = priv->ae_handle->ae_algo->ops;
 483         if (ops->stop)
 484                 ops->stop(priv->ae_handle);
 485
 486         hns3_free_rx_cpu_rmap(netdev);
 487
 488         /* free irq resources */
 489         hns3_nic_uninit_irq(priv);
 490
 491         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 492          * during reset process, because driver may not be able
 493          * to disable the ring through firmware when downing the netdev.
 494          */
 495         if (!hns3_nic_resetting(netdev))
 496                 hns3_clear_all_ring(priv->ae_handle);
 497 }
 498
 499 static int hns3_nic_net_stop(struct net_device *netdev)
 500 {
 501         struct hns3_nic_priv *priv = netdev_priv(netdev);
 502         struct hnae3_handle *h = hns3_get_handle(netdev);
 503
 504         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 505                 return 0;
 506
 507         if (h->ae_algo->ops->set_timer_task)
 508                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 509
 510         netif_tx_stop_all_queues(netdev);
 511         netif_carrier_off(netdev);
 512
 513         hns3_nic_net_down(netdev);
 514
 515         return 0;
 516 }
 517
 518 static int hns3_nic_uc_sync(struct net_device *netdev,
 519                             const unsigned char *addr)
 520 {
 521         struct hnae3_handle *h = hns3_get_handle(netdev);
 522
 523         if (h->ae_algo->ops->add_uc_addr)
 524                 return h->ae_algo->ops->add_uc_addr(h, addr);
 525
 526         return 0;
 527 }
 528
 529 static int hns3_nic_uc_unsync(struct net_device *netdev,
 530                               const unsigned char *addr)
 531 {
 532         struct hnae3_handle *h = hns3_get_handle(netdev);
 533
 534         if (h->ae_algo->ops->rm_uc_addr)
 535                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 536
 537         return 0;
 538 }
 539
 540 static int hns3_nic_mc_sync(struct net_device *netdev,
 541                             const unsigned char *addr)
 542 {
 543         struct hnae3_handle *h = hns3_get_handle(netdev);
 544
 545         if (h->ae_algo->ops->add_mc_addr)
 546                 return h->ae_algo->ops->add_mc_addr(h, addr);
 547
 548         return 0;
 549 }
 550
 551 static int hns3_nic_mc_unsync(struct net_device *netdev,
 552                               const unsigned char *addr)
 553 {
 554         struct hnae3_handle *h = hns3_get_handle(netdev);
 555
 556         if (h->ae_algo->ops->rm_mc_addr)
 557                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 558
 559         return 0;
 560 }
 561
 562 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 563 {
 564         u8 flags = 0;
 565
 566         if (netdev->flags & IFF_PROMISC) {
 567                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 568         } else {
 569                 flags |= HNAE3_VLAN_FLTR;
 570                 if (netdev->flags & IFF_ALLMULTI)
 571                         flags |= HNAE3_USER_MPE;
 572         }
 573
 574         return flags;
 575 }
 576
 577 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 578 {
 579         struct hnae3_handle *h = hns3_get_handle(netdev);
 580         u8 new_flags;
 581         int ret;
 582
 583         new_flags = hns3_get_netdev_flags(netdev);
 584
 585         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 586         if (ret) {
 587                 netdev_err(netdev, "sync uc address fail\n");
 588                 if (ret == -ENOSPC)
 589                         new_flags |= HNAE3_OVERFLOW_UPE;
 590         }
 591
 592         if (netdev->flags & IFF_MULTICAST) {
 593                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 594                                     hns3_nic_mc_unsync);
 595                 if (ret) {
 596                         netdev_err(netdev, "sync mc address fail\n");
 597                         if (ret == -ENOSPC)
 598                                 new_flags |= HNAE3_OVERFLOW_MPE;
 599                 }
 600         }
 601
 602         /* User mode Promisc mode enable and vlan filtering is disabled to
 603          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 604          * vlan fitering is enabled
 605          */
 606         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 607         h->netdev_flags = new_flags;
 608         hns3_update_promisc_mode(netdev, new_flags);
 609 }
 610
 611 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 612 {
 613         struct hns3_nic_priv *priv = netdev_priv(netdev);
 614         struct hnae3_handle *h = priv->ae_handle;
 615
 616         if (h->ae_algo->ops->set_promisc_mode) {
 617                 return h->ae_algo->ops->set_promisc_mode(h,
 618                                                 promisc_flags & HNAE3_UPE,
 619                                                 promisc_flags & HNAE3_MPE);
 620         }
 621
 622         return 0;
 623 }
 624
 625 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 626 {
 627         struct hns3_nic_priv *priv = netdev_priv(netdev);
 628         struct hnae3_handle *h = priv->ae_handle;
 629         bool last_state;
 630
 631         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 632                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 633                 if (enable != last_state) {
 634                         netdev_info(netdev,
 635                                     "%s vlan filter\n",
 636                                     enable ? "enable" : "disable");
 637                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 638                 }
 639         }
 640 }
 641
 642 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 643                         u16 *mss, u32 *type_cs_vlan_tso)
 644 {
 645         u32 l4_offset, hdr_len;
 646         union l3_hdr_info l3;
 647         union l4_hdr_info l4;
 648         u32 l4_paylen;
 649         int ret;
 650
 651         if (!skb_is_gso(skb))
 652                 return 0;
 653
 654         ret = skb_cow_head(skb, 0);
 655         if (unlikely(ret))
 656                 return ret;
 657
 658         l3.hdr = skb_network_header(skb);
 659         l4.hdr = skb_transport_header(skb);
 660
 661         /* Software should clear the IPv4's checksum field when tso is
 662          * needed.
 663          */
 664         if (l3.v4->version == 4)
 665                 l3.v4->check = 0;
 666
 667         /* tunnel packet */
 668         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 669                                          SKB_GSO_GRE_CSUM |
 670                                          SKB_GSO_UDP_TUNNEL |
 671                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 672                 if ((!(skb_shinfo(skb)->gso_type &
 673                     SKB_GSO_PARTIAL)) &&
 674                     (skb_shinfo(skb)->gso_type &
 675                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 676                         /* Software should clear the udp's checksum
 677                          * field when tso is needed.
 678                          */
 679                         l4.udp->check = 0;
 680                 }
 681                 /* reset l3&l4 pointers from outer to inner headers */
 682                 l3.hdr = skb_inner_network_header(skb);
 683                 l4.hdr = skb_inner_transport_header(skb);
 684
 685                 /* Software should clear the IPv4's checksum field when
 686                  * tso is needed.
 687                  */
 688                 if (l3.v4->version == 4)
 689                         l3.v4->check = 0;
 690         }
 691
 692         /* normal or tunnel packet */
 693         l4_offset = l4.hdr - skb->data;
 694         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 695
 696         /* remove payload length from inner pseudo checksum when tso */
 697         l4_paylen = skb->len - l4_offset;
 698         csum_replace_by_diff(&l4.tcp->check,
 699                              (__force __wsum)htonl(l4_paylen));
 700
 701         /* find the txbd field values */
 702         *paylen = skb->len - hdr_len;
 703         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 704
 705         /* get MSS for TSO */
 706         *mss = skb_shinfo(skb)->gso_size;
 707
 708         return 0;
 709 }
 710
 711 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 712                                 u8 *il4_proto)
 713 {
 714         union l3_hdr_info l3;
 715         unsigned char *l4_hdr;
 716         unsigned char *exthdr;
 717         u8 l4_proto_tmp;
 718         __be16 frag_off;
 719
 720         /* find outer header point */
 721         l3.hdr = skb_network_header(skb);
 722         l4_hdr = skb_transport_header(skb);
 723
 724         if (skb->protocol == htons(ETH_P_IPV6)) {
 725                 exthdr = l3.hdr + sizeof(*l3.v6);
 726                 l4_proto_tmp = l3.v6->nexthdr;
 727                 if (l4_hdr != exthdr)
 728                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 729                                          &l4_proto_tmp, &frag_off);
 730         } else if (skb->protocol == htons(ETH_P_IP)) {
 731                 l4_proto_tmp = l3.v4->protocol;
 732         } else {
 733                 return -EINVAL;
 734         }
 735
 736         *ol4_proto = l4_proto_tmp;
 737
 738         /* tunnel packet */
 739         if (!skb->encapsulation) {
 740                 *il4_proto = 0;
 741                 return 0;
 742         }
 743
 744         /* find inner header point */
 745         l3.hdr = skb_inner_network_header(skb);
 746         l4_hdr = skb_inner_transport_header(skb);
 747
 748         if (l3.v6->version == 6) {
 749                 exthdr = l3.hdr + sizeof(*l3.v6);
 750                 l4_proto_tmp = l3.v6->nexthdr;
 751                 if (l4_hdr != exthdr)
 752                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 753                                          &l4_proto_tmp, &frag_off);
 754         } else if (l3.v4->version == 4) {
 755                 l4_proto_tmp = l3.v4->protocol;
 756         }
 757
 758         *il4_proto = l4_proto_tmp;
 759
 760         return 0;
 761 }
 762
 763 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 764  * and it is udp packet, which has a dest port as the IANA assigned.
 765  * the hardware is expected to do the checksum offload, but the
 766  * hardware will not do the checksum offload when udp dest port is
 767  * 4789.
 768  */
 769 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 770 {
 771         union l4_hdr_info l4;
 772
 773         l4.hdr = skb_transport_header(skb);
 774
 775         if (!(!skb->encapsulation &&
 776               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 777                 return false;
 778
 779         skb_checksum_help(skb);
 780
 781         return true;
 782 }
 783
 784 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 785                                   u32 *ol_type_vlan_len_msec)
 786 {
 787         u32 l2_len, l3_len, l4_len;
 788         unsigned char *il2_hdr;
 789         union l3_hdr_info l3;
 790         union l4_hdr_info l4;
 791
 792         l3.hdr = skb_network_header(skb);
 793         l4.hdr = skb_transport_header(skb);
 794
 795         /* compute OL2 header size, defined in 2 Bytes */
 796         l2_len = l3.hdr - skb->data;
 797         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 798
 799         /* compute OL3 header size, defined in 4 Bytes */
 800         l3_len = l4.hdr - l3.hdr;
 801         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 802
 803         il2_hdr = skb_inner_mac_header(skb);
 804         /* compute OL4 header size, defined in 4 Bytes */
 805         l4_len = il2_hdr - l4.hdr;
 806         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 807
 808         /* define outer network header type */
 809         if (skb->protocol == htons(ETH_P_IP)) {
 810                 if (skb_is_gso(skb))
 811                         hns3_set_field(*ol_type_vlan_len_msec,
 812                                        HNS3_TXD_OL3T_S,
 813                                        HNS3_OL3T_IPV4_CSUM);
 814                 else
 815                         hns3_set_field(*ol_type_vlan_len_msec,
 816                                        HNS3_TXD_OL3T_S,
 817                                        HNS3_OL3T_IPV4_NO_CSUM);
 818
 819         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 820                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 821                                HNS3_OL3T_IPV6);
 822         }
 823
 824         if (ol4_proto == IPPROTO_UDP)
 825                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 826                                HNS3_TUN_MAC_IN_UDP);
 827         else if (ol4_proto == IPPROTO_GRE)
 828                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 829                                HNS3_TUN_NVGRE);
 830 }
 831
 832 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 833                            u8 il4_proto, u32 *type_cs_vlan_tso,
 834                            u32 *ol_type_vlan_len_msec)
 835 {
 836         unsigned char *l2_hdr = skb->data;
 837         u32 l4_proto = ol4_proto;
 838         union l4_hdr_info l4;
 839         union l3_hdr_info l3;
 840         u32 l2_len, l3_len;
 841
 842         l4.hdr = skb_transport_header(skb);
 843         l3.hdr = skb_network_header(skb);
 844
 845         /* handle encapsulation skb */
 846         if (skb->encapsulation) {
 847                 /* If this is a not UDP/GRE encapsulation skb */
 848                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 849                         /* drop the skb tunnel packet if hardware don't support,
 850                          * because hardware can't calculate csum when TSO.
 851                          */
 852                         if (skb_is_gso(skb))
 853                                 return -EDOM;
 854
 855                         /* the stack computes the IP header already,
 856                          * driver calculate l4 checksum when not TSO.
 857                          */
 858                         skb_checksum_help(skb);
 859                         return 0;
 860                 }
 861
 862                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 863
 864                 /* switch to inner header */
 865                 l2_hdr = skb_inner_mac_header(skb);
 866                 l3.hdr = skb_inner_network_header(skb);
 867                 l4.hdr = skb_inner_transport_header(skb);
 868                 l4_proto = il4_proto;
 869         }
 870
 871         if (l3.v4->version == 4) {
 872                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 873                                HNS3_L3T_IPV4);
 874
 875                 /* the stack computes the IP header already, the only time we
 876                  * need the hardware to recompute it is in the case of TSO.
 877                  */
 878                 if (skb_is_gso(skb))
 879                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 880         } else if (l3.v6->version == 6) {
 881                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 882                                HNS3_L3T_IPV6);
 883         }
 884
 885         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 886         l2_len = l3.hdr - l2_hdr;
 887         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 888
 889         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 890         l3_len = l4.hdr - l3.hdr;
 891         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 892
 893         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 894         switch (l4_proto) {
 895         case IPPROTO_TCP:
 896                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 897                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 898                                HNS3_L4T_TCP);
 899                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 900                                l4.tcp->doff);
 901                 break;
 902         case IPPROTO_UDP:
 903                 if (hns3_tunnel_csum_bug(skb))
 904                         break;
 905
 906                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 907                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 908                                HNS3_L4T_UDP);
 909                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 910                                (sizeof(struct udphdr) >> 2));
 911                 break;
 912         case IPPROTO_SCTP:
 913                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 914                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 915                                HNS3_L4T_SCTP);
 916                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 917                                (sizeof(struct sctphdr) >> 2));
 918                 break;
 919         default:
 920                 /* drop the skb tunnel packet if hardware don't support,
 921                  * because hardware can't calculate csum when TSO.
 922                  */
 923                 if (skb_is_gso(skb))
 924                         return -EDOM;
 925
 926                 /* the stack computes the IP header already,
 927                  * driver calculate l4 checksum when not TSO.
 928                  */
 929                 skb_checksum_help(skb);
 930                 return 0;
 931         }
 932
 933         return 0;
 934 }
 935
 936 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 937 {
 938         /* Config bd buffer end */
 939         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
 940         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
 941 }
 942
 943 static int hns3_fill_desc_vtags(struct sk_buff *skb,
 944                                 struct hns3_enet_ring *tx_ring,
 945                                 u32 *inner_vlan_flag,
 946                                 u32 *out_vlan_flag,
 947                                 u16 *inner_vtag,
 948                                 u16 *out_vtag)
 949 {
 950 #define HNS3_TX_VLAN_PRIO_SHIFT 13
 951
 952         struct hnae3_handle *handle = tx_ring->tqp->handle;
 953
 954         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 955          * header is allowed in skb, otherwise it will cause RAS error.
 956          */
 957         if (unlikely(skb_vlan_tagged_multi(skb) &&
 958                      handle->port_base_vlan_state ==
 959                      HNAE3_PORT_BASE_VLAN_ENABLE))
 960                 return -EINVAL;
 961
 962         if (skb->protocol == htons(ETH_P_8021Q) &&
 963             !(tx_ring->tqp->handle->kinfo.netdev->features &
 964             NETIF_F_HW_VLAN_CTAG_TX)) {
 965                 /* When HW VLAN acceleration is turned off, and the stack
 966                  * sets the protocol to 802.1q, the driver just need to
 967                  * set the protocol to the encapsulated ethertype.
 968                  */
 969                 skb->protocol = vlan_get_protocol(skb);
 970                 return 0;
 971         }
 972
 973         if (skb_vlan_tag_present(skb)) {
 974                 u16 vlan_tag;
 975
 976                 vlan_tag = skb_vlan_tag_get(skb);
 977                 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
 978
 979                 /* Based on hw strategy, use out_vtag in two layer tag case,
 980                  * and use inner_vtag in one tag case.
 981                  */
 982                 if (skb->protocol == htons(ETH_P_8021Q)) {
 983                         if (handle->port_base_vlan_state ==
 984                             HNAE3_PORT_BASE_VLAN_DISABLE){
 985                                 hns3_set_field(*out_vlan_flag,
 986                                                HNS3_TXD_OVLAN_B, 1);
 987                                 *out_vtag = vlan_tag;
 988                         } else {
 989                                 hns3_set_field(*inner_vlan_flag,
 990                                                HNS3_TXD_VLAN_B, 1);
 991                                 *inner_vtag = vlan_tag;
 992                         }
 993                 } else {
 994                         hns3_set_field(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
 995                         *inner_vtag = vlan_tag;
 996                 }
 997         } else if (skb->protocol == htons(ETH_P_8021Q)) {
 998                 struct vlan_ethhdr *vhdr;
 999                 int rc;
1000
1001                 rc = skb_cow_head(skb, 0);
1002                 if (unlikely(rc < 0))
1003                         return rc;
1004                 vhdr = (struct vlan_ethhdr *)skb->data;
1005                 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1006                                         << HNS3_TX_VLAN_PRIO_SHIFT);
1007         }
1008
1009         skb->protocol = vlan_get_protocol(skb);
1010         return 0;
1011 }
1012
1013 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1014                           unsigned int size, int frag_end,
1015                           enum hns_desc_type type)
1016 {
1017         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1018         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1019         struct device *dev = ring_to_dev(ring);
1020         struct skb_frag_struct *frag;
1021         unsigned int frag_buf_num;
1022         int k, sizeoflast;
1023         dma_addr_t dma;
1024
1025         if (type == DESC_TYPE_SKB) {
1026                 struct sk_buff *skb = (struct sk_buff *)priv;
1027                 u32 ol_type_vlan_len_msec = 0;
1028                 u32 type_cs_vlan_tso = 0;
1029                 u32 paylen = skb->len;
1030                 u16 inner_vtag = 0;
1031                 u16 out_vtag = 0;
1032                 u16 mss = 0;
1033                 int ret;
1034
1035                 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1036                                            &ol_type_vlan_len_msec,
1037                                            &inner_vtag, &out_vtag);
1038                 if (unlikely(ret))
1039                         return ret;
1040
1041                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1042                         u8 ol4_proto, il4_proto;
1043
1044                         skb_reset_mac_len(skb);
1045
1046                         ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1047                         if (unlikely(ret))
1048                                 return ret;
1049
1050                         ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1051                                               &type_cs_vlan_tso,
1052                                               &ol_type_vlan_len_msec);
1053                         if (unlikely(ret))
1054                                 return ret;
1055
1056                         ret = hns3_set_tso(skb, &paylen, &mss,
1057                                            &type_cs_vlan_tso);
1058                         if (unlikely(ret))
1059                                 return ret;
1060                 }
1061
1062                 /* Set txbd */
1063                 desc->tx.ol_type_vlan_len_msec =
1064                         cpu_to_le32(ol_type_vlan_len_msec);
1065                 desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1066                 desc->tx.paylen = cpu_to_le32(paylen);
1067                 desc->tx.mss = cpu_to_le16(mss);
1068                 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1069                 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1070
1071                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1072         } else {
1073                 frag = (struct skb_frag_struct *)priv;
1074                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1075         }
1076
1077         if (unlikely(dma_mapping_error(dev, dma))) {
1078                 ring->stats.sw_err_cnt++;
1079                 return -ENOMEM;
1080         }
1081
1082         desc_cb->length = size;
1083
1084         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1085                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1086
1087                 desc_cb->priv = priv;
1088                 desc_cb->dma = dma;
1089                 desc_cb->type = type;
1090                 desc->addr = cpu_to_le64(dma);
1091                 desc->tx.send_size = cpu_to_le16(size);
1092                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1093                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1094                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1095
1096                 ring_ptr_move_fw(ring, next_to_use);
1097                 return 0;
1098         }
1099
1100         frag_buf_num = hns3_tx_bd_count(size);
1101         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1102         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1103
1104         /* When frag size is bigger than hardware limit, split this frag */
1105         for (k = 0; k < frag_buf_num; k++) {
1106                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1107
1108                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1109                 desc_cb->priv = priv;
1110                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1111                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1112                                 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1113
1114                 /* now, fill the descriptor */
1115                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1116                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1117                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1118                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1119                                        frag_end && (k == frag_buf_num - 1) ?
1120                                                 1 : 0);
1121                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1122                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1123
1124                 /* move ring pointer to next */
1125                 ring_ptr_move_fw(ring, next_to_use);
1126
1127                 desc_cb = &ring->desc_cb[ring->next_to_use];
1128                 desc = &ring->desc[ring->next_to_use];
1129         }
1130
1131         return 0;
1132 }
1133
1134 static int hns3_nic_bd_num(struct sk_buff *skb)
1135 {
1136         int size = skb_headlen(skb);
1137         int i, bd_num;
1138
1139         /* if the total len is within the max bd limit */
1140         if (likely(skb->len <= HNS3_MAX_BD_SIZE))
1141                 return skb_shinfo(skb)->nr_frags + 1;
1142
1143         bd_num = hns3_tx_bd_count(size);
1144
1145         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1146                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
1147                 int frag_bd_num;
1148
1149                 size = skb_frag_size(frag);
1150                 frag_bd_num = hns3_tx_bd_count(size);
1151
1152                 if (unlikely(frag_bd_num > HNS3_MAX_BD_PER_FRAG))
1153                         return -ENOMEM;
1154
1155                 bd_num += frag_bd_num;
1156         }
1157
1158         return bd_num;
1159 }
1160
1161 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1162 {
1163         if (!skb->encapsulation)
1164                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1165
1166         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1167 }
1168
1169 /* HW need every continuous 8 buffer data to be larger than MSS,
1170  * we simplify it by ensuring skb_headlen + the first continuous
1171  * 7 frags to to be larger than gso header len + mss, and the remaining
1172  * continuous 7 frags to be larger than MSS except the last 7 frags.
1173  */
1174 static bool hns3_skb_need_linearized(struct sk_buff *skb)
1175 {
1176         int bd_limit = HNS3_MAX_BD_PER_FRAG - 1;
1177         unsigned int tot_len = 0;
1178         int i;
1179
1180         for (i = 0; i < bd_limit; i++)
1181                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i]);
1182
1183         /* ensure headlen + the first 7 frags is greater than mss + header
1184          * and the first 7 frags is greater than mss.
1185          */
1186         if (((tot_len + skb_headlen(skb)) < (skb_shinfo(skb)->gso_size +
1187             hns3_gso_hdr_len(skb))) || (tot_len < skb_shinfo(skb)->gso_size))
1188                 return true;
1189
1190         /* ensure the remaining continuous 7 buffer is greater than mss */
1191         for (i = 0; i < (skb_shinfo(skb)->nr_frags - bd_limit - 1); i++) {
1192                 tot_len -= skb_frag_size(&skb_shinfo(skb)->frags[i]);
1193                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i + bd_limit]);
1194
1195                 if (tot_len < skb_shinfo(skb)->gso_size)
1196                         return true;
1197         }
1198
1199         return false;
1200 }
1201
1202 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1203                                   struct sk_buff **out_skb)
1204 {
1205         struct sk_buff *skb = *out_skb;
1206         int bd_num;
1207
1208         bd_num = hns3_nic_bd_num(skb);
1209         if (bd_num < 0)
1210                 return bd_num;
1211
1212         if (unlikely(bd_num > HNS3_MAX_BD_PER_FRAG)) {
1213                 struct sk_buff *new_skb;
1214
1215                 if (skb_is_gso(skb) && !hns3_skb_need_linearized(skb))
1216                         goto out;
1217
1218                 bd_num = hns3_tx_bd_count(skb->len);
1219                 if (unlikely(ring_space(ring) < bd_num))
1220                         return -EBUSY;
1221                 /* manual split the send packet */
1222                 new_skb = skb_copy(skb, GFP_ATOMIC);
1223                 if (!new_skb)
1224                         return -ENOMEM;
1225                 dev_kfree_skb_any(skb);
1226                 *out_skb = new_skb;
1227
1228                 u64_stats_update_begin(&ring->syncp);
1229                 ring->stats.tx_copy++;
1230                 u64_stats_update_end(&ring->syncp);
1231         }
1232
1233 out:
1234         if (unlikely(ring_space(ring) < bd_num))
1235                 return -EBUSY;
1236
1237         return bd_num;
1238 }
1239
1240 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1241 {
1242         struct device *dev = ring_to_dev(ring);
1243         unsigned int i;
1244
1245         for (i = 0; i < ring->desc_num; i++) {
1246                 /* check if this is where we started */
1247                 if (ring->next_to_use == next_to_use_orig)
1248                         break;
1249
1250                 /* rollback one */
1251                 ring_ptr_move_bw(ring, next_to_use);
1252
1253                 /* unmap the descriptor dma address */
1254                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1255                         dma_unmap_single(dev,
1256                                          ring->desc_cb[ring->next_to_use].dma,
1257                                         ring->desc_cb[ring->next_to_use].length,
1258                                         DMA_TO_DEVICE);
1259                 else if (ring->desc_cb[ring->next_to_use].length)
1260                         dma_unmap_page(dev,
1261                                        ring->desc_cb[ring->next_to_use].dma,
1262                                        ring->desc_cb[ring->next_to_use].length,
1263                                        DMA_TO_DEVICE);
1264
1265                 ring->desc_cb[ring->next_to_use].length = 0;
1266                 ring->desc_cb[ring->next_to_use].dma = 0;
1267         }
1268 }
1269
1270 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1271 {
1272         struct hns3_nic_priv *priv = netdev_priv(netdev);
1273         struct hns3_nic_ring_data *ring_data =
1274                 &tx_ring_data(priv, skb->queue_mapping);
1275         struct hns3_enet_ring *ring = ring_data->ring;
1276         struct netdev_queue *dev_queue;
1277         struct skb_frag_struct *frag;
1278         int next_to_use_head;
1279         int buf_num;
1280         int seg_num;
1281         int size;
1282         int ret;
1283         int i;
1284
1285         /* Prefetch the data used later */
1286         prefetch(skb->data);
1287
1288         buf_num = hns3_nic_maybe_stop_tx(ring, &skb);
1289         if (unlikely(buf_num <= 0)) {
1290                 if (buf_num == -EBUSY) {
1291                         u64_stats_update_begin(&ring->syncp);
1292                         ring->stats.tx_busy++;
1293                         u64_stats_update_end(&ring->syncp);
1294                         goto out_net_tx_busy;
1295                 } else if (buf_num == -ENOMEM) {
1296                         u64_stats_update_begin(&ring->syncp);
1297                         ring->stats.sw_err_cnt++;
1298                         u64_stats_update_end(&ring->syncp);
1299                 }
1300
1301                 if (net_ratelimit())
1302                         netdev_err(netdev, "xmit error: %d!\n", buf_num);
1303
1304                 goto out_err_tx_ok;
1305         }
1306
1307         /* No. of segments (plus a header) */
1308         seg_num = skb_shinfo(skb)->nr_frags + 1;
1309         /* Fill the first part */
1310         size = skb_headlen(skb);
1311
1312         next_to_use_head = ring->next_to_use;
1313
1314         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1315                              DESC_TYPE_SKB);
1316         if (unlikely(ret))
1317                 goto fill_err;
1318
1319         /* Fill the fragments */
1320         for (i = 1; i < seg_num; i++) {
1321                 frag = &skb_shinfo(skb)->frags[i - 1];
1322                 size = skb_frag_size(frag);
1323
1324                 ret = hns3_fill_desc(ring, frag, size,
1325                                      seg_num - 1 == i ? 1 : 0,
1326                                      DESC_TYPE_PAGE);
1327
1328                 if (unlikely(ret))
1329                         goto fill_err;
1330         }
1331
1332         /* Complete translate all packets */
1333         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1334         netdev_tx_sent_queue(dev_queue, skb->len);
1335
1336         wmb(); /* Commit all data before submit */
1337
1338         hnae3_queue_xmit(ring->tqp, buf_num);
1339
1340         return NETDEV_TX_OK;
1341
1342 fill_err:
1343         hns3_clear_desc(ring, next_to_use_head);
1344
1345 out_err_tx_ok:
1346         dev_kfree_skb_any(skb);
1347         return NETDEV_TX_OK;
1348
1349 out_net_tx_busy:
1350         netif_stop_subqueue(netdev, ring_data->queue_index);
1351         smp_mb(); /* Commit all data before submit */
1352
1353         return NETDEV_TX_BUSY;
1354 }
1355
1356 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1357 {
1358         struct hnae3_handle *h = hns3_get_handle(netdev);
1359         struct sockaddr *mac_addr = p;
1360         int ret;
1361
1362         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1363                 return -EADDRNOTAVAIL;
1364
1365         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1366                 netdev_info(netdev, "already using mac address %pM\n",
1367                             mac_addr->sa_data);
1368                 return 0;
1369         }
1370
1371         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1372         if (ret) {
1373                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1374                 return ret;
1375         }
1376
1377         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1378
1379         return 0;
1380 }
1381
1382 static int hns3_nic_do_ioctl(struct net_device *netdev,
1383                              struct ifreq *ifr, int cmd)
1384 {
1385         struct hnae3_handle *h = hns3_get_handle(netdev);
1386
1387         if (!netif_running(netdev))
1388                 return -EINVAL;
1389
1390         if (!h->ae_algo->ops->do_ioctl)
1391                 return -EOPNOTSUPP;
1392
1393         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1394 }
1395
1396 static int hns3_nic_set_features(struct net_device *netdev,
1397                                  netdev_features_t features)
1398 {
1399         netdev_features_t changed = netdev->features ^ features;
1400         struct hns3_nic_priv *priv = netdev_priv(netdev);
1401         struct hnae3_handle *h = priv->ae_handle;
1402         bool enable;
1403         int ret;
1404
1405         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1406                 enable = !!(features & NETIF_F_GRO_HW);
1407                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1408                 if (ret)
1409                         return ret;
1410         }
1411
1412         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1413             h->ae_algo->ops->enable_vlan_filter) {
1414                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1415                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1416         }
1417
1418         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1419             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1420                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1421                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1422                 if (ret)
1423                         return ret;
1424         }
1425
1426         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1427                 enable = !!(features & NETIF_F_NTUPLE);
1428                 h->ae_algo->ops->enable_fd(h, enable);
1429         }
1430
1431         netdev->features = features;
1432         return 0;
1433 }
1434
1435 static void hns3_nic_get_stats64(struct net_device *netdev,
1436                                  struct rtnl_link_stats64 *stats)
1437 {
1438         struct hns3_nic_priv *priv = netdev_priv(netdev);
1439         int queue_num = priv->ae_handle->kinfo.num_tqps;
1440         struct hnae3_handle *handle = priv->ae_handle;
1441         struct hns3_enet_ring *ring;
1442         u64 rx_length_errors = 0;
1443         u64 rx_crc_errors = 0;
1444         u64 rx_multicast = 0;
1445         unsigned int start;
1446         u64 tx_errors = 0;
1447         u64 rx_errors = 0;
1448         unsigned int idx;
1449         u64 tx_bytes = 0;
1450         u64 rx_bytes = 0;
1451         u64 tx_pkts = 0;
1452         u64 rx_pkts = 0;
1453         u64 tx_drop = 0;
1454         u64 rx_drop = 0;
1455
1456         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1457                 return;
1458
1459         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1460
1461         for (idx = 0; idx < queue_num; idx++) {
1462                 /* fetch the tx stats */
1463                 ring = priv->ring_data[idx].ring;
1464                 do {
1465                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1466                         tx_bytes += ring->stats.tx_bytes;
1467                         tx_pkts += ring->stats.tx_pkts;
1468                         tx_drop += ring->stats.sw_err_cnt;
1469                         tx_errors += ring->stats.sw_err_cnt;
1470                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1471
1472                 /* fetch the rx stats */
1473                 ring = priv->ring_data[idx + queue_num].ring;
1474                 do {
1475                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1476                         rx_bytes += ring->stats.rx_bytes;
1477                         rx_pkts += ring->stats.rx_pkts;
1478                         rx_drop += ring->stats.non_vld_descs;
1479                         rx_drop += ring->stats.l2_err;
1480                         rx_errors += ring->stats.non_vld_descs;
1481                         rx_errors += ring->stats.l2_err;
1482                         rx_crc_errors += ring->stats.l2_err;
1483                         rx_crc_errors += ring->stats.l3l4_csum_err;
1484                         rx_multicast += ring->stats.rx_multicast;
1485                         rx_length_errors += ring->stats.err_pkt_len;
1486                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1487         }
1488
1489         stats->tx_bytes = tx_bytes;
1490         stats->tx_packets = tx_pkts;
1491         stats->rx_bytes = rx_bytes;
1492         stats->rx_packets = rx_pkts;
1493
1494         stats->rx_errors = rx_errors;
1495         stats->multicast = rx_multicast;
1496         stats->rx_length_errors = rx_length_errors;
1497         stats->rx_crc_errors = rx_crc_errors;
1498         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1499
1500         stats->tx_errors = tx_errors;
1501         stats->rx_dropped = rx_drop;
1502         stats->tx_dropped = tx_drop;
1503         stats->collisions = netdev->stats.collisions;
1504         stats->rx_over_errors = netdev->stats.rx_over_errors;
1505         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1506         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1507         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1508         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1509         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1510         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1511         stats->tx_window_errors = netdev->stats.tx_window_errors;
1512         stats->rx_compressed = netdev->stats.rx_compressed;
1513         stats->tx_compressed = netdev->stats.tx_compressed;
1514 }
1515
1516 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1517 {
1518         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1519         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1520         struct hnae3_knic_private_info *kinfo;
1521         u8 tc = mqprio_qopt->qopt.num_tc;
1522         u16 mode = mqprio_qopt->mode;
1523         u8 hw = mqprio_qopt->qopt.hw;
1524         struct hnae3_handle *h;
1525
1526         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1527                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1528                 return -EOPNOTSUPP;
1529
1530         if (tc > HNAE3_MAX_TC)
1531                 return -EINVAL;
1532
1533         if (!netdev)
1534                 return -EINVAL;
1535
1536         h = hns3_get_handle(netdev);
1537         kinfo = &h->kinfo;
1538
1539         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1540                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1541 }
1542
1543 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1544                              void *type_data)
1545 {
1546         if (type != TC_SETUP_QDISC_MQPRIO)
1547                 return -EOPNOTSUPP;
1548
1549         return hns3_setup_tc(dev, type_data);
1550 }
1551
1552 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1553                                 __be16 proto, u16 vid)
1554 {
1555         struct hnae3_handle *h = hns3_get_handle(netdev);
1556         int ret = -EIO;
1557
1558         if (h->ae_algo->ops->set_vlan_filter)
1559                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1560
1561         return ret;
1562 }
1563
1564 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1565                                  __be16 proto, u16 vid)
1566 {
1567         struct hnae3_handle *h = hns3_get_handle(netdev);
1568         int ret = -EIO;
1569
1570         if (h->ae_algo->ops->set_vlan_filter)
1571                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1572
1573         return ret;
1574 }
1575
1576 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1577                                 u8 qos, __be16 vlan_proto)
1578 {
1579         struct hnae3_handle *h = hns3_get_handle(netdev);
1580         int ret = -EIO;
1581
1582         if (h->ae_algo->ops->set_vf_vlan_filter)
1583                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1584                                                           qos, vlan_proto);
1585
1586         return ret;
1587 }
1588
1589 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1590 {
1591         struct hnae3_handle *h = hns3_get_handle(netdev);
1592         int ret;
1593
1594         if (hns3_nic_resetting(netdev))
1595                 return -EBUSY;
1596
1597         if (!h->ae_algo->ops->set_mtu)
1598                 return -EOPNOTSUPP;
1599
1600         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1601         if (ret)
1602                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1603                            ret);
1604         else
1605                 netdev->mtu = new_mtu;
1606
1607         return ret;
1608 }
1609
1610 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1611 {
1612         struct hns3_nic_priv *priv = netdev_priv(ndev);
1613         struct hnae3_handle *h = hns3_get_handle(ndev);
1614         struct hns3_enet_ring *tx_ring = NULL;
1615         struct napi_struct *napi;
1616         int timeout_queue = 0;
1617         int hw_head, hw_tail;
1618         int fbd_num, fbd_oft;
1619         int ebd_num, ebd_oft;
1620         int bd_num, bd_err;
1621         int ring_en, tc;
1622         int i;
1623
1624         /* Find the stopped queue the same way the stack does */
1625         for (i = 0; i < ndev->num_tx_queues; i++) {
1626                 struct netdev_queue *q;
1627                 unsigned long trans_start;
1628
1629                 q = netdev_get_tx_queue(ndev, i);
1630                 trans_start = q->trans_start;
1631                 if (netif_xmit_stopped(q) &&
1632                     time_after(jiffies,
1633                                (trans_start + ndev->watchdog_timeo))) {
1634                         timeout_queue = i;
1635                         break;
1636                 }
1637         }
1638
1639         if (i == ndev->num_tx_queues) {
1640                 netdev_info(ndev,
1641                             "no netdev TX timeout queue found, timeout count: %llu\n",
1642                             priv->tx_timeout_count);
1643                 return false;
1644         }
1645
1646         priv->tx_timeout_count++;
1647
1648         tx_ring = priv->ring_data[timeout_queue].ring;
1649         napi = &tx_ring->tqp_vector->napi;
1650
1651         netdev_info(ndev,
1652                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1653                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1654                     tx_ring->next_to_clean, napi->state);
1655
1656         netdev_info(ndev,
1657                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1658                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1659                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1660
1661         netdev_info(ndev,
1662                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1663                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1664                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1665
1666         /* When mac received many pause frames continuous, it's unable to send
1667          * packets, which may cause tx timeout
1668          */
1669         if (h->ae_algo->ops->update_stats &&
1670             h->ae_algo->ops->get_mac_pause_stats) {
1671                 u64 tx_pause_cnt, rx_pause_cnt;
1672
1673                 h->ae_algo->ops->update_stats(h, &ndev->stats);
1674                 h->ae_algo->ops->get_mac_pause_stats(h, &tx_pause_cnt,
1675                                                      &rx_pause_cnt);
1676                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1677                             tx_pause_cnt, rx_pause_cnt);
1678         }
1679
1680         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1681                                 HNS3_RING_TX_RING_HEAD_REG);
1682         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1683                                 HNS3_RING_TX_RING_TAIL_REG);
1684         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1685                                 HNS3_RING_TX_RING_FBDNUM_REG);
1686         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1687                                 HNS3_RING_TX_RING_OFFSET_REG);
1688         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1689                                 HNS3_RING_TX_RING_EBDNUM_REG);
1690         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1691                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1692         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1693                                HNS3_RING_TX_RING_BD_NUM_REG);
1694         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1695                                HNS3_RING_TX_RING_BD_ERR_REG);
1696         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1697         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1698
1699         netdev_info(ndev,
1700                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1701                     bd_num, hw_head, hw_tail, bd_err,
1702                     readl(tx_ring->tqp_vector->mask_addr));
1703         netdev_info(ndev,
1704                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1705                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1706
1707         return true;
1708 }
1709
1710 static void hns3_nic_net_timeout(struct net_device *ndev)
1711 {
1712         struct hns3_nic_priv *priv = netdev_priv(ndev);
1713         struct hnae3_handle *h = priv->ae_handle;
1714
1715         if (!hns3_get_tx_timeo_queue_info(ndev))
1716                 return;
1717
1718         /* request the reset, and let the hclge to determine
1719          * which reset level should be done
1720          */
1721         if (h->ae_algo->ops->reset_event)
1722                 h->ae_algo->ops->reset_event(h->pdev, h);
1723 }
1724
1725 #ifdef CONFIG_RFS_ACCEL
1726 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1727                               u16 rxq_index, u32 flow_id)
1728 {
1729         struct hnae3_handle *h = hns3_get_handle(dev);
1730         struct flow_keys fkeys;
1731
1732         if (!h->ae_algo->ops->add_arfs_entry)
1733                 return -EOPNOTSUPP;
1734
1735         if (skb->encapsulation)
1736                 return -EPROTONOSUPPORT;
1737
1738         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1739                 return -EPROTONOSUPPORT;
1740
1741         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1742              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1743             (fkeys.basic.ip_proto != IPPROTO_TCP &&
1744              fkeys.basic.ip_proto != IPPROTO_UDP))
1745                 return -EPROTONOSUPPORT;
1746
1747         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1748 }
1749 #endif
1750
1751 static const struct net_device_ops hns3_nic_netdev_ops = {
1752         .ndo_open               = hns3_nic_net_open,
1753         .ndo_stop               = hns3_nic_net_stop,
1754         .ndo_start_xmit         = hns3_nic_net_xmit,
1755         .ndo_tx_timeout         = hns3_nic_net_timeout,
1756         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1757         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1758         .ndo_change_mtu         = hns3_nic_change_mtu,
1759         .ndo_set_features       = hns3_nic_set_features,
1760         .ndo_get_stats64        = hns3_nic_get_stats64,
1761         .ndo_setup_tc           = hns3_nic_setup_tc,
1762         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1763         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1764         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1765         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1766 #ifdef CONFIG_RFS_ACCEL
1767         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
1768 #endif
1769
1770 };
1771
1772 bool hns3_is_phys_func(struct pci_dev *pdev)
1773 {
1774         u32 dev_id = pdev->device;
1775
1776         switch (dev_id) {
1777         case HNAE3_DEV_ID_GE:
1778         case HNAE3_DEV_ID_25GE:
1779         case HNAE3_DEV_ID_25GE_RDMA:
1780         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1781         case HNAE3_DEV_ID_50GE_RDMA:
1782         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1783         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1784                 return true;
1785         case HNAE3_DEV_ID_100G_VF:
1786         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1787                 return false;
1788         default:
1789                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1790                          dev_id);
1791         }
1792
1793         return false;
1794 }
1795
1796 static void hns3_disable_sriov(struct pci_dev *pdev)
1797 {
1798         /* If our VFs are assigned we cannot shut down SR-IOV
1799          * without causing issues, so just leave the hardware
1800          * available but disabled
1801          */
1802         if (pci_vfs_assigned(pdev)) {
1803                 dev_warn(&pdev->dev,
1804                          "disabling driver while VFs are assigned\n");
1805                 return;
1806         }
1807
1808         pci_disable_sriov(pdev);
1809 }
1810
1811 static void hns3_get_dev_capability(struct pci_dev *pdev,
1812                                     struct hnae3_ae_dev *ae_dev)
1813 {
1814         if (pdev->revision >= 0x21) {
1815                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1816                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1817         }
1818 }
1819
1820 /* hns3_probe - Device initialization routine
1821  * @pdev: PCI device information struct
1822  * @ent: entry in hns3_pci_tbl
1823  *
1824  * hns3_probe initializes a PF identified by a pci_dev structure.
1825  * The OS initialization, configuring of the PF private structure,
1826  * and a hardware reset occur.
1827  *
1828  * Returns 0 on success, negative on failure
1829  */
1830 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1831 {
1832         struct hnae3_ae_dev *ae_dev;
1833         int ret;
1834
1835         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
1836         if (!ae_dev) {
1837                 ret = -ENOMEM;
1838                 return ret;
1839         }
1840
1841         ae_dev->pdev = pdev;
1842         ae_dev->flag = ent->driver_data;
1843         ae_dev->reset_type = HNAE3_NONE_RESET;
1844         hns3_get_dev_capability(pdev, ae_dev);
1845         pci_set_drvdata(pdev, ae_dev);
1846
1847         ret = hnae3_register_ae_dev(ae_dev);
1848         if (ret) {
1849                 devm_kfree(&pdev->dev, ae_dev);
1850                 pci_set_drvdata(pdev, NULL);
1851         }
1852
1853         return ret;
1854 }
1855
1856 /* hns3_remove - Device removal routine
1857  * @pdev: PCI device information struct
1858  */
1859 static void hns3_remove(struct pci_dev *pdev)
1860 {
1861         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1862
1863         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1864                 hns3_disable_sriov(pdev);
1865
1866         hnae3_unregister_ae_dev(ae_dev);
1867         pci_set_drvdata(pdev, NULL);
1868 }
1869
1870 /**
1871  * hns3_pci_sriov_configure
1872  * @pdev: pointer to a pci_dev structure
1873  * @num_vfs: number of VFs to allocate
1874  *
1875  * Enable or change the number of VFs. Called when the user updates the number
1876  * of VFs in sysfs.
1877  **/
1878 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1879 {
1880         int ret;
1881
1882         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1883                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1884                 return -EINVAL;
1885         }
1886
1887         if (num_vfs) {
1888                 ret = pci_enable_sriov(pdev, num_vfs);
1889                 if (ret)
1890                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1891                 else
1892                         return num_vfs;
1893         } else if (!pci_vfs_assigned(pdev)) {
1894                 pci_disable_sriov(pdev);
1895         } else {
1896                 dev_warn(&pdev->dev,
1897                          "Unable to free VFs because some are assigned to VMs.\n");
1898         }
1899
1900         return 0;
1901 }
1902
1903 static void hns3_shutdown(struct pci_dev *pdev)
1904 {
1905         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1906
1907         hnae3_unregister_ae_dev(ae_dev);
1908         devm_kfree(&pdev->dev, ae_dev);
1909         pci_set_drvdata(pdev, NULL);
1910
1911         if (system_state == SYSTEM_POWER_OFF)
1912                 pci_set_power_state(pdev, PCI_D3hot);
1913 }
1914
1915 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1916                                             pci_channel_state_t state)
1917 {
1918         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1919         pci_ers_result_t ret;
1920
1921         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1922
1923         if (state == pci_channel_io_perm_failure)
1924                 return PCI_ERS_RESULT_DISCONNECT;
1925
1926         if (!ae_dev || !ae_dev->ops) {
1927                 dev_err(&pdev->dev,
1928                         "Can't recover - error happened before device initialized\n");
1929                 return PCI_ERS_RESULT_NONE;
1930         }
1931
1932         if (ae_dev->ops->handle_hw_ras_error)
1933                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1934         else
1935                 return PCI_ERS_RESULT_NONE;
1936
1937         return ret;
1938 }
1939
1940 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1941 {
1942         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1943         const struct hnae3_ae_ops *ops;
1944         enum hnae3_reset_type reset_type;
1945         struct device *dev = &pdev->dev;
1946
1947         if (!ae_dev || !ae_dev->ops)
1948                 return PCI_ERS_RESULT_NONE;
1949
1950         ops = ae_dev->ops;
1951         /* request the reset */
1952         if (ops->reset_event) {
1953                 if (ae_dev->hw_err_reset_req) {
1954                         reset_type = ops->get_reset_level(ae_dev,
1955                                                 &ae_dev->hw_err_reset_req);
1956                         ops->set_default_reset_request(ae_dev, reset_type);
1957                         dev_info(dev, "requesting reset due to PCI error\n");
1958                         ops->reset_event(pdev, NULL);
1959                 }
1960
1961                 return PCI_ERS_RESULT_RECOVERED;
1962         }
1963
1964         return PCI_ERS_RESULT_DISCONNECT;
1965 }
1966
1967 static void hns3_reset_prepare(struct pci_dev *pdev)
1968 {
1969         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1970
1971         dev_info(&pdev->dev, "hns3 flr prepare\n");
1972         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
1973                 ae_dev->ops->flr_prepare(ae_dev);
1974 }
1975
1976 static void hns3_reset_done(struct pci_dev *pdev)
1977 {
1978         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1979
1980         dev_info(&pdev->dev, "hns3 flr done\n");
1981         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
1982                 ae_dev->ops->flr_done(ae_dev);
1983 }
1984
1985 static const struct pci_error_handlers hns3_err_handler = {
1986         .error_detected = hns3_error_detected,
1987         .slot_reset     = hns3_slot_reset,
1988         .reset_prepare  = hns3_reset_prepare,
1989         .reset_done     = hns3_reset_done,
1990 };
1991
1992 static struct pci_driver hns3_driver = {
1993         .name     = hns3_driver_name,
1994         .id_table = hns3_pci_tbl,
1995         .probe    = hns3_probe,
1996         .remove   = hns3_remove,
1997         .shutdown = hns3_shutdown,
1998         .sriov_configure = hns3_pci_sriov_configure,
1999         .err_handler    = &hns3_err_handler,
2000 };
2001
2002 /* set default feature to hns3 */
2003 static void hns3_set_default_feature(struct net_device *netdev)
2004 {
2005         struct hnae3_handle *h = hns3_get_handle(netdev);
2006         struct pci_dev *pdev = h->pdev;
2007
2008         netdev->priv_flags |= IFF_UNICAST_FLT;
2009
2010         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2011                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2012                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2013                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2014                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2015
2016         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
2017
2018         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2019
2020         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2021                 NETIF_F_HW_VLAN_CTAG_FILTER |
2022                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2023                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2024                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2025                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2026                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2027
2028         netdev->vlan_features |=
2029                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2030                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2031                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2032                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2033                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2034
2035         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2036                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2037                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2038                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2039                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2040                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2041
2042         if (pdev->revision >= 0x21) {
2043                 netdev->hw_features |= NETIF_F_GRO_HW;
2044                 netdev->features |= NETIF_F_GRO_HW;
2045
2046                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2047                         netdev->hw_features |= NETIF_F_NTUPLE;
2048                         netdev->features |= NETIF_F_NTUPLE;
2049                 }
2050         }
2051 }
2052
2053 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2054                              struct hns3_desc_cb *cb)
2055 {
2056         unsigned int order = hnae3_page_order(ring);
2057         struct page *p;
2058
2059         p = dev_alloc_pages(order);
2060         if (!p)
2061                 return -ENOMEM;
2062
2063         cb->priv = p;
2064         cb->page_offset = 0;
2065         cb->reuse_flag = 0;
2066         cb->buf  = page_address(p);
2067         cb->length = hnae3_page_size(ring);
2068         cb->type = DESC_TYPE_PAGE;
2069
2070         return 0;
2071 }
2072
2073 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2074                              struct hns3_desc_cb *cb)
2075 {
2076         if (cb->type == DESC_TYPE_SKB)
2077                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2078         else if (!HNAE3_IS_TX_RING(ring))
2079                 put_page((struct page *)cb->priv);
2080         memset(cb, 0, sizeof(*cb));
2081 }
2082
2083 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2084 {
2085         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2086                                cb->length, ring_to_dma_dir(ring));
2087
2088         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2089                 return -EIO;
2090
2091         return 0;
2092 }
2093
2094 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2095                               struct hns3_desc_cb *cb)
2096 {
2097         if (cb->type == DESC_TYPE_SKB)
2098                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2099                                  ring_to_dma_dir(ring));
2100         else if (cb->length)
2101                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2102                                ring_to_dma_dir(ring));
2103 }
2104
2105 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2106 {
2107         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2108         ring->desc[i].addr = 0;
2109 }
2110
2111 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2112 {
2113         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2114
2115         if (!ring->desc_cb[i].dma)
2116                 return;
2117
2118         hns3_buffer_detach(ring, i);
2119         hns3_free_buffer(ring, cb);
2120 }
2121
2122 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2123 {
2124         int i;
2125
2126         for (i = 0; i < ring->desc_num; i++)
2127                 hns3_free_buffer_detach(ring, i);
2128 }
2129
2130 /* free desc along with its attached buffer */
2131 static void hns3_free_desc(struct hns3_enet_ring *ring)
2132 {
2133         int size = ring->desc_num * sizeof(ring->desc[0]);
2134
2135         hns3_free_buffers(ring);
2136
2137         if (ring->desc) {
2138                 dma_free_coherent(ring_to_dev(ring), size,
2139                                   ring->desc, ring->desc_dma_addr);
2140                 ring->desc = NULL;
2141         }
2142 }
2143
2144 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2145 {
2146         int size = ring->desc_num * sizeof(ring->desc[0]);
2147
2148         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2149                                         &ring->desc_dma_addr, GFP_KERNEL);
2150         if (!ring->desc)
2151                 return -ENOMEM;
2152
2153         return 0;
2154 }
2155
2156 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2157                                    struct hns3_desc_cb *cb)
2158 {
2159         int ret;
2160
2161         ret = hns3_alloc_buffer(ring, cb);
2162         if (ret)
2163                 goto out;
2164
2165         ret = hns3_map_buffer(ring, cb);
2166         if (ret)
2167                 goto out_with_buf;
2168
2169         return 0;
2170
2171 out_with_buf:
2172         hns3_free_buffer(ring, cb);
2173 out:
2174         return ret;
2175 }
2176
2177 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2178 {
2179         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2180
2181         if (ret)
2182                 return ret;
2183
2184         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2185
2186         return 0;
2187 }
2188
2189 /* Allocate memory for raw pkg, and map with dma */
2190 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2191 {
2192         int i, j, ret;
2193
2194         for (i = 0; i < ring->desc_num; i++) {
2195                 ret = hns3_alloc_buffer_attach(ring, i);
2196                 if (ret)
2197                         goto out_buffer_fail;
2198         }
2199
2200         return 0;
2201
2202 out_buffer_fail:
2203         for (j = i - 1; j >= 0; j--)
2204                 hns3_free_buffer_detach(ring, j);
2205         return ret;
2206 }
2207
2208 /* detach a in-used buffer and replace with a reserved one */
2209 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2210                                 struct hns3_desc_cb *res_cb)
2211 {
2212         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2213         ring->desc_cb[i] = *res_cb;
2214         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2215         ring->desc[i].rx.bd_base_info = 0;
2216 }
2217
2218 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2219 {
2220         ring->desc_cb[i].reuse_flag = 0;
2221         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2222                                          ring->desc_cb[i].page_offset);
2223         ring->desc[i].rx.bd_base_info = 0;
2224 }
2225
2226 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2227                                   int *bytes, int *pkts)
2228 {
2229         int ntc = ring->next_to_clean;
2230         struct hns3_desc_cb *desc_cb;
2231
2232         while (head != ntc) {
2233                 desc_cb = &ring->desc_cb[ntc];
2234                 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2235                 (*bytes) += desc_cb->length;
2236                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2237                 hns3_free_buffer_detach(ring, ntc);
2238
2239                 if (++ntc == ring->desc_num)
2240                         ntc = 0;
2241
2242                 /* Issue prefetch for next Tx descriptor */
2243                 prefetch(&ring->desc_cb[ntc]);
2244         }
2245
2246         /* This smp_store_release() pairs with smp_load_acquire() in
2247          * ring_space called by hns3_nic_net_xmit.
2248          */
2249         smp_store_release(&ring->next_to_clean, ntc);
2250 }
2251
2252 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2253 {
2254         int u = ring->next_to_use;
2255         int c = ring->next_to_clean;
2256
2257         if (unlikely(h > ring->desc_num))
2258                 return 0;
2259
2260         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2261 }
2262
2263 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2264 {
2265         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2266         struct hns3_nic_priv *priv = netdev_priv(netdev);
2267         struct netdev_queue *dev_queue;
2268         int bytes, pkts;
2269         int head;
2270
2271         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2272         rmb(); /* Make sure head is ready before touch any data */
2273
2274         if (is_ring_empty(ring) || head == ring->next_to_clean)
2275                 return; /* no data to poll */
2276
2277         if (unlikely(!is_valid_clean_head(ring, head))) {
2278                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2279                            ring->next_to_use, ring->next_to_clean);
2280
2281                 u64_stats_update_begin(&ring->syncp);
2282                 ring->stats.io_err_cnt++;
2283                 u64_stats_update_end(&ring->syncp);
2284                 return;
2285         }
2286
2287         bytes = 0;
2288         pkts = 0;
2289         hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2290
2291         ring->tqp_vector->tx_group.total_bytes += bytes;
2292         ring->tqp_vector->tx_group.total_packets += pkts;
2293
2294         u64_stats_update_begin(&ring->syncp);
2295         ring->stats.tx_bytes += bytes;
2296         ring->stats.tx_pkts += pkts;
2297         u64_stats_update_end(&ring->syncp);
2298
2299         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2300         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2301
2302         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2303                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2304                 /* Make sure that anybody stopping the queue after this
2305                  * sees the new next_to_clean.
2306                  */
2307                 smp_mb();
2308                 if (netif_tx_queue_stopped(dev_queue) &&
2309                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2310                         netif_tx_wake_queue(dev_queue);
2311                         ring->stats.restart_queue++;
2312                 }
2313         }
2314 }
2315
2316 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2317 {
2318         int ntc = ring->next_to_clean;
2319         int ntu = ring->next_to_use;
2320
2321         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2322 }
2323
2324 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2325                                       int cleand_count)
2326 {
2327         struct hns3_desc_cb *desc_cb;
2328         struct hns3_desc_cb res_cbs;
2329         int i, ret;
2330
2331         for (i = 0; i < cleand_count; i++) {
2332                 desc_cb = &ring->desc_cb[ring->next_to_use];
2333                 if (desc_cb->reuse_flag) {
2334                         u64_stats_update_begin(&ring->syncp);
2335                         ring->stats.reuse_pg_cnt++;
2336                         u64_stats_update_end(&ring->syncp);
2337
2338                         hns3_reuse_buffer(ring, ring->next_to_use);
2339                 } else {
2340                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2341                         if (ret) {
2342                                 u64_stats_update_begin(&ring->syncp);
2343                                 ring->stats.sw_err_cnt++;
2344                                 u64_stats_update_end(&ring->syncp);
2345
2346                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2347                                            "hnae reserve buffer map failed.\n");
2348                                 break;
2349                         }
2350                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2351
2352                         u64_stats_update_begin(&ring->syncp);
2353                         ring->stats.non_reuse_pg++;
2354                         u64_stats_update_end(&ring->syncp);
2355                 }
2356
2357                 ring_ptr_move_fw(ring, next_to_use);
2358         }
2359
2360         wmb(); /* Make all data has been write before submit */
2361         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2362 }
2363
2364 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2365                                 struct hns3_enet_ring *ring, int pull_len,
2366                                 struct hns3_desc_cb *desc_cb)
2367 {
2368         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2369         int size = le16_to_cpu(desc->rx.size);
2370         u32 truesize = hnae3_buf_size(ring);
2371
2372         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2373                         size - pull_len, truesize);
2374
2375         /* Avoid re-using remote pages, or the stack is still using the page
2376          * when page_offset rollback to zero, flag default unreuse
2377          */
2378         if (unlikely(page_to_nid(desc_cb->priv) != numa_mem_id()) ||
2379             (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2380                 return;
2381
2382         /* Move offset up to the next cache line */
2383         desc_cb->page_offset += truesize;
2384
2385         if (desc_cb->page_offset + truesize <= hnae3_page_size(ring)) {
2386                 desc_cb->reuse_flag = 1;
2387                 /* Bump ref count on page before it is given */
2388                 get_page(desc_cb->priv);
2389         } else if (page_count(desc_cb->priv) == 1) {
2390                 desc_cb->reuse_flag = 1;
2391                 desc_cb->page_offset = 0;
2392                 get_page(desc_cb->priv);
2393         }
2394 }
2395
2396 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2397 {
2398         __be16 type = skb->protocol;
2399         struct tcphdr *th;
2400         int depth = 0;
2401
2402         while (eth_type_vlan(type)) {
2403                 struct vlan_hdr *vh;
2404
2405                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2406                         return -EFAULT;
2407
2408                 vh = (struct vlan_hdr *)(skb->data + depth);
2409                 type = vh->h_vlan_encapsulated_proto;
2410                 depth += VLAN_HLEN;
2411         }
2412
2413         skb_set_network_header(skb, depth);
2414
2415         if (type == htons(ETH_P_IP)) {
2416                 const struct iphdr *iph = ip_hdr(skb);
2417
2418                 depth += sizeof(struct iphdr);
2419                 skb_set_transport_header(skb, depth);
2420                 th = tcp_hdr(skb);
2421                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2422                                           iph->daddr, 0);
2423         } else if (type == htons(ETH_P_IPV6)) {
2424                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2425
2426                 depth += sizeof(struct ipv6hdr);
2427                 skb_set_transport_header(skb, depth);
2428                 th = tcp_hdr(skb);
2429                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2430                                           &iph->daddr, 0);
2431         } else {
2432                 netdev_err(skb->dev,
2433                            "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2434                            be16_to_cpu(type), depth);
2435                 return -EFAULT;
2436         }
2437
2438         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2439         if (th->cwr)
2440                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2441
2442         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2443                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2444
2445         skb->csum_start = (unsigned char *)th - skb->head;
2446         skb->csum_offset = offsetof(struct tcphdr, check);
2447         skb->ip_summed = CHECKSUM_PARTIAL;
2448         return 0;
2449 }
2450
2451 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2452                              u32 l234info, u32 bd_base_info, u32 ol_info)
2453 {
2454         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2455         int l3_type, l4_type;
2456         int ol4_type;
2457
2458         skb->ip_summed = CHECKSUM_NONE;
2459
2460         skb_checksum_none_assert(skb);
2461
2462         if (!(netdev->features & NETIF_F_RXCSUM))
2463                 return;
2464
2465         /* check if hardware has done checksum */
2466         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2467                 return;
2468
2469         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2470                                  BIT(HNS3_RXD_OL3E_B) |
2471                                  BIT(HNS3_RXD_OL4E_B)))) {
2472                 u64_stats_update_begin(&ring->syncp);
2473                 ring->stats.l3l4_csum_err++;
2474                 u64_stats_update_end(&ring->syncp);
2475
2476                 return;
2477         }
2478
2479         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2480                                    HNS3_RXD_OL4ID_S);
2481         switch (ol4_type) {
2482         case HNS3_OL4_TYPE_MAC_IN_UDP:
2483         case HNS3_OL4_TYPE_NVGRE:
2484                 skb->csum_level = 1;
2485                 /* fall through */
2486         case HNS3_OL4_TYPE_NO_TUN:
2487                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2488                                           HNS3_RXD_L3ID_S);
2489                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2490                                           HNS3_RXD_L4ID_S);
2491
2492                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2493                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2494                      l3_type == HNS3_L3_TYPE_IPV6) &&
2495                     (l4_type == HNS3_L4_TYPE_UDP ||
2496                      l4_type == HNS3_L4_TYPE_TCP ||
2497                      l4_type == HNS3_L4_TYPE_SCTP))
2498                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2499                 break;
2500         default:
2501                 break;
2502         }
2503 }
2504
2505 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2506 {
2507         if (skb_has_frag_list(skb))
2508                 napi_gro_flush(&ring->tqp_vector->napi, false);
2509
2510         napi_gro_receive(&ring->tqp_vector->napi, skb);
2511 }
2512
2513 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2514                                 struct hns3_desc *desc, u32 l234info,
2515                                 u16 *vlan_tag)
2516 {
2517         struct hnae3_handle *handle = ring->tqp->handle;
2518         struct pci_dev *pdev = ring->tqp->handle->pdev;
2519
2520         if (pdev->revision == 0x20) {
2521                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2522                 if (!(*vlan_tag & VLAN_VID_MASK))
2523                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2524
2525                 return (*vlan_tag != 0);
2526         }
2527
2528 #define HNS3_STRP_OUTER_VLAN    0x1
2529 #define HNS3_STRP_INNER_VLAN    0x2
2530 #define HNS3_STRP_BOTH          0x3
2531
2532         /* Hardware always insert VLAN tag into RX descriptor when
2533          * remove the tag from packet, driver needs to determine
2534          * reporting which tag to stack.
2535          */
2536         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2537                                 HNS3_RXD_STRP_TAGP_S)) {
2538         case HNS3_STRP_OUTER_VLAN:
2539                 if (handle->port_base_vlan_state !=
2540                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2541                         return false;
2542
2543                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2544                 return true;
2545         case HNS3_STRP_INNER_VLAN:
2546                 if (handle->port_base_vlan_state !=
2547                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2548                         return false;
2549
2550                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2551                 return true;
2552         case HNS3_STRP_BOTH:
2553                 if (handle->port_base_vlan_state ==
2554                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2555                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2556                 else
2557                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2558
2559                 return true;
2560         default:
2561                 return false;
2562         }
2563 }
2564
2565 static int hns3_alloc_skb(struct hns3_enet_ring *ring, int length,
2566                           unsigned char *va)
2567 {
2568 #define HNS3_NEED_ADD_FRAG      1
2569         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2570         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2571         struct sk_buff *skb;
2572
2573         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2574         skb = ring->skb;
2575         if (unlikely(!skb)) {
2576                 netdev_err(netdev, "alloc rx skb fail\n");
2577
2578                 u64_stats_update_begin(&ring->syncp);
2579                 ring->stats.sw_err_cnt++;
2580                 u64_stats_update_end(&ring->syncp);
2581
2582                 return -ENOMEM;
2583         }
2584
2585         prefetchw(skb->data);
2586
2587         ring->pending_buf = 1;
2588         ring->frag_num = 0;
2589         ring->tail_skb = NULL;
2590         if (length <= HNS3_RX_HEAD_SIZE) {
2591                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2592
2593                 /* We can reuse buffer as-is, just make sure it is local */
2594                 if (likely(page_to_nid(desc_cb->priv) == numa_mem_id()))
2595                         desc_cb->reuse_flag = 1;
2596                 else /* This page cannot be reused so discard it */
2597                         put_page(desc_cb->priv);
2598
2599                 ring_ptr_move_fw(ring, next_to_clean);
2600                 return 0;
2601         }
2602         u64_stats_update_begin(&ring->syncp);
2603         ring->stats.seg_pkt_cnt++;
2604         u64_stats_update_end(&ring->syncp);
2605
2606         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2607         __skb_put(skb, ring->pull_len);
2608         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2609                             desc_cb);
2610         ring_ptr_move_fw(ring, next_to_clean);
2611
2612         return HNS3_NEED_ADD_FRAG;
2613 }
2614
2615 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2616                          struct sk_buff **out_skb, bool pending)
2617 {
2618         struct sk_buff *skb = *out_skb;
2619         struct sk_buff *head_skb = *out_skb;
2620         struct sk_buff *new_skb;
2621         struct hns3_desc_cb *desc_cb;
2622         struct hns3_desc *pre_desc;
2623         u32 bd_base_info;
2624         int pre_bd;
2625
2626         /* if there is pending bd, the SW param next_to_clean has moved
2627          * to next and the next is NULL
2628          */
2629         if (pending) {
2630                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2631                          ring->desc_num;
2632                 pre_desc = &ring->desc[pre_bd];
2633                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2634         } else {
2635                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2636         }
2637
2638         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2639                 desc = &ring->desc[ring->next_to_clean];
2640                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2641                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2642                 /* make sure HW write desc complete */
2643                 dma_rmb();
2644                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2645                         return -ENXIO;
2646
2647                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2648                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2649                                                  HNS3_RX_HEAD_SIZE);
2650                         if (unlikely(!new_skb)) {
2651                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2652                                            "alloc rx skb frag fail\n");
2653                                 return -ENXIO;
2654                         }
2655                         ring->frag_num = 0;
2656
2657                         if (ring->tail_skb) {
2658                                 ring->tail_skb->next = new_skb;
2659                                 ring->tail_skb = new_skb;
2660                         } else {
2661                                 skb_shinfo(skb)->frag_list = new_skb;
2662                                 ring->tail_skb = new_skb;
2663                         }
2664                 }
2665
2666                 if (ring->tail_skb) {
2667                         head_skb->truesize += hnae3_buf_size(ring);
2668                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2669                         head_skb->len += le16_to_cpu(desc->rx.size);
2670                         skb = ring->tail_skb;
2671                 }
2672
2673                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2674                 ring_ptr_move_fw(ring, next_to_clean);
2675                 ring->pending_buf++;
2676         }
2677
2678         return 0;
2679 }
2680
2681 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2682                                      struct sk_buff *skb, u32 l234info,
2683                                      u32 bd_base_info, u32 ol_info)
2684 {
2685         u32 l3_type;
2686
2687         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2688                                                     HNS3_RXD_GRO_SIZE_M,
2689                                                     HNS3_RXD_GRO_SIZE_S);
2690         /* if there is no HW GRO, do not set gro params */
2691         if (!skb_shinfo(skb)->gso_size) {
2692                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2693                 return 0;
2694         }
2695
2696         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2697                                                   HNS3_RXD_GRO_COUNT_M,
2698                                                   HNS3_RXD_GRO_COUNT_S);
2699
2700         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2701         if (l3_type == HNS3_L3_TYPE_IPV4)
2702                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2703         else if (l3_type == HNS3_L3_TYPE_IPV6)
2704                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2705         else
2706                 return -EFAULT;
2707
2708         return  hns3_gro_complete(skb, l234info);
2709 }
2710
2711 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2712                                      struct sk_buff *skb, u32 rss_hash)
2713 {
2714         struct hnae3_handle *handle = ring->tqp->handle;
2715         enum pkt_hash_types rss_type;
2716
2717         if (rss_hash)
2718                 rss_type = handle->kinfo.rss_type;
2719         else
2720                 rss_type = PKT_HASH_TYPE_NONE;
2721
2722         skb_set_hash(skb, rss_hash, rss_type);
2723 }
2724
2725 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2726 {
2727         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2728         enum hns3_pkt_l2t_type l2_frame_type;
2729         u32 bd_base_info, l234info, ol_info;
2730         struct hns3_desc *desc;
2731         unsigned int len;
2732         int pre_ntc, ret;
2733
2734         /* bdinfo handled below is only valid on the last BD of the
2735          * current packet, and ring->next_to_clean indicates the first
2736          * descriptor of next packet, so need - 1 below.
2737          */
2738         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2739                                         (ring->desc_num - 1);
2740         desc = &ring->desc[pre_ntc];
2741         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2742         l234info = le32_to_cpu(desc->rx.l234_info);
2743         ol_info = le32_to_cpu(desc->rx.ol_info);
2744
2745         /* Based on hw strategy, the tag offloaded will be stored at
2746          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2747          * in one layer tag case.
2748          */
2749         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2750                 u16 vlan_tag;
2751
2752                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2753                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2754                                                vlan_tag);
2755         }
2756
2757         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B)))) {
2758                 u64_stats_update_begin(&ring->syncp);
2759                 ring->stats.non_vld_descs++;
2760                 u64_stats_update_end(&ring->syncp);
2761
2762                 return -EINVAL;
2763         }
2764
2765         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2766                                   BIT(HNS3_RXD_L2E_B))))) {
2767                 u64_stats_update_begin(&ring->syncp);
2768                 if (l234info & BIT(HNS3_RXD_L2E_B))
2769                         ring->stats.l2_err++;
2770                 else
2771                         ring->stats.err_pkt_len++;
2772                 u64_stats_update_end(&ring->syncp);
2773
2774                 return -EFAULT;
2775         }
2776
2777         len = skb->len;
2778
2779         /* Do update ip stack process */
2780         skb->protocol = eth_type_trans(skb, netdev);
2781
2782         /* This is needed in order to enable forwarding support */
2783         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
2784                                         bd_base_info, ol_info);
2785         if (unlikely(ret)) {
2786                 u64_stats_update_begin(&ring->syncp);
2787                 ring->stats.rx_err_cnt++;
2788                 u64_stats_update_end(&ring->syncp);
2789                 return ret;
2790         }
2791
2792         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2793                                         HNS3_RXD_DMAC_S);
2794
2795         u64_stats_update_begin(&ring->syncp);
2796         ring->stats.rx_pkts++;
2797         ring->stats.rx_bytes += len;
2798
2799         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2800                 ring->stats.rx_multicast++;
2801
2802         u64_stats_update_end(&ring->syncp);
2803
2804         ring->tqp_vector->rx_group.total_bytes += len;
2805
2806         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
2807         return 0;
2808 }
2809
2810 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2811                              struct sk_buff **out_skb)
2812 {
2813         struct sk_buff *skb = ring->skb;
2814         struct hns3_desc_cb *desc_cb;
2815         struct hns3_desc *desc;
2816         u32 bd_base_info;
2817         int length;
2818         int ret;
2819
2820         desc = &ring->desc[ring->next_to_clean];
2821         desc_cb = &ring->desc_cb[ring->next_to_clean];
2822
2823         prefetch(desc);
2824
2825         length = le16_to_cpu(desc->rx.size);
2826         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2827
2828         /* Check valid BD */
2829         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2830                 return -ENXIO;
2831
2832         if (!skb)
2833                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2834
2835         /* Prefetch first cache line of first page
2836          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2837          * line size is 64B so need to prefetch twice to make it 128B. But in
2838          * actual we can have greater size of caches with 128B Level 1 cache
2839          * lines. In such a case, single fetch would suffice to cache in the
2840          * relevant part of the header.
2841          */
2842         prefetch(ring->va);
2843 #if L1_CACHE_BYTES < 128
2844         prefetch(ring->va + L1_CACHE_BYTES);
2845 #endif
2846
2847         if (!skb) {
2848                 ret = hns3_alloc_skb(ring, length, ring->va);
2849                 *out_skb = skb = ring->skb;
2850
2851                 if (ret < 0) /* alloc buffer fail */
2852                         return ret;
2853                 if (ret > 0) { /* need add frag */
2854                         ret = hns3_add_frag(ring, desc, &skb, false);
2855                         if (ret)
2856                                 return ret;
2857
2858                         /* As the head data may be changed when GRO enable, copy
2859                          * the head data in after other data rx completed
2860                          */
2861                         memcpy(skb->data, ring->va,
2862                                ALIGN(ring->pull_len, sizeof(long)));
2863                 }
2864         } else {
2865                 ret = hns3_add_frag(ring, desc, &skb, true);
2866                 if (ret)
2867                         return ret;
2868
2869                 /* As the head data may be changed when GRO enable, copy
2870                  * the head data in after other data rx completed
2871                  */
2872                 memcpy(skb->data, ring->va,
2873                        ALIGN(ring->pull_len, sizeof(long)));
2874         }
2875
2876         ret = hns3_handle_bdinfo(ring, skb);
2877         if (unlikely(ret)) {
2878                 dev_kfree_skb_any(skb);
2879                 return ret;
2880         }
2881
2882         skb_record_rx_queue(skb, ring->tqp->tqp_index);
2883         *out_skb = skb;
2884
2885         return 0;
2886 }
2887
2888 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
2889                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2890 {
2891 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2892         int recv_pkts, recv_bds, clean_count, err;
2893         int unused_count = hns3_desc_unused(ring);
2894         struct sk_buff *skb = ring->skb;
2895         int num;
2896
2897         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2898         rmb(); /* Make sure num taken effect before the other data is touched */
2899
2900         recv_pkts = 0, recv_bds = 0, clean_count = 0;
2901         num -= unused_count;
2902         unused_count -= ring->pending_buf;
2903
2904         while (recv_pkts < budget && recv_bds < num) {
2905                 /* Reuse or realloc buffers */
2906                 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2907                         hns3_nic_alloc_rx_buffers(ring,
2908                                                   clean_count + unused_count);
2909                         clean_count = 0;
2910                         unused_count = hns3_desc_unused(ring) -
2911                                         ring->pending_buf;
2912                 }
2913
2914                 /* Poll one pkt */
2915                 err = hns3_handle_rx_bd(ring, &skb);
2916                 if (unlikely(!skb)) /* This fault cannot be repaired */
2917                         goto out;
2918
2919                 if (err == -ENXIO) { /* Do not get FE for the packet */
2920                         goto out;
2921                 } else if (unlikely(err)) {  /* Do jump the err */
2922                         recv_bds += ring->pending_buf;
2923                         clean_count += ring->pending_buf;
2924                         ring->skb = NULL;
2925                         ring->pending_buf = 0;
2926                         continue;
2927                 }
2928
2929                 rx_fn(ring, skb);
2930                 recv_bds += ring->pending_buf;
2931                 clean_count += ring->pending_buf;
2932                 ring->skb = NULL;
2933                 ring->pending_buf = 0;
2934
2935                 recv_pkts++;
2936         }
2937
2938 out:
2939         /* Make all data has been write before submit */
2940         if (clean_count + unused_count > 0)
2941                 hns3_nic_alloc_rx_buffers(ring, clean_count + unused_count);
2942
2943         return recv_pkts;
2944 }
2945
2946 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
2947 {
2948 #define HNS3_RX_LOW_BYTE_RATE 10000
2949 #define HNS3_RX_MID_BYTE_RATE 20000
2950 #define HNS3_RX_ULTRA_PACKET_RATE 40
2951
2952         enum hns3_flow_level_range new_flow_level;
2953         struct hns3_enet_tqp_vector *tqp_vector;
2954         int packets_per_msecs, bytes_per_msecs;
2955         u32 time_passed_ms;
2956
2957         tqp_vector = ring_group->ring->tqp_vector;
2958         time_passed_ms =
2959                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2960         if (!time_passed_ms)
2961                 return false;
2962
2963         do_div(ring_group->total_packets, time_passed_ms);
2964         packets_per_msecs = ring_group->total_packets;
2965
2966         do_div(ring_group->total_bytes, time_passed_ms);
2967         bytes_per_msecs = ring_group->total_bytes;
2968
2969         new_flow_level = ring_group->coal.flow_level;
2970
2971         /* Simple throttlerate management
2972          * 0-10MB/s   lower     (50000 ints/s)
2973          * 10-20MB/s   middle    (20000 ints/s)
2974          * 20-1249MB/s high      (18000 ints/s)
2975          * > 40000pps  ultra     (8000 ints/s)
2976          */
2977         switch (new_flow_level) {
2978         case HNS3_FLOW_LOW:
2979                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2980                         new_flow_level = HNS3_FLOW_MID;
2981                 break;
2982         case HNS3_FLOW_MID:
2983                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
2984                         new_flow_level = HNS3_FLOW_HIGH;
2985                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
2986                         new_flow_level = HNS3_FLOW_LOW;
2987                 break;
2988         case HNS3_FLOW_HIGH:
2989         case HNS3_FLOW_ULTRA:
2990         default:
2991                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
2992                         new_flow_level = HNS3_FLOW_MID;
2993                 break;
2994         }
2995
2996         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2997             &tqp_vector->rx_group == ring_group)
2998                 new_flow_level = HNS3_FLOW_ULTRA;
2999
3000         ring_group->total_bytes = 0;
3001         ring_group->total_packets = 0;
3002         ring_group->coal.flow_level = new_flow_level;
3003
3004         return true;
3005 }
3006
3007 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3008 {
3009         struct hns3_enet_tqp_vector *tqp_vector;
3010         u16 new_int_gl;
3011
3012         if (!ring_group->ring)
3013                 return false;
3014
3015         tqp_vector = ring_group->ring->tqp_vector;
3016         if (!tqp_vector->last_jiffies)
3017                 return false;
3018
3019         if (ring_group->total_packets == 0) {
3020                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3021                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3022                 return true;
3023         }
3024
3025         if (!hns3_get_new_flow_lvl(ring_group))
3026                 return false;
3027
3028         new_int_gl = ring_group->coal.int_gl;
3029         switch (ring_group->coal.flow_level) {
3030         case HNS3_FLOW_LOW:
3031                 new_int_gl = HNS3_INT_GL_50K;
3032                 break;
3033         case HNS3_FLOW_MID:
3034                 new_int_gl = HNS3_INT_GL_20K;
3035                 break;
3036         case HNS3_FLOW_HIGH:
3037                 new_int_gl = HNS3_INT_GL_18K;
3038                 break;
3039         case HNS3_FLOW_ULTRA:
3040                 new_int_gl = HNS3_INT_GL_8K;
3041                 break;
3042         default:
3043                 break;
3044         }
3045
3046         if (new_int_gl != ring_group->coal.int_gl) {
3047                 ring_group->coal.int_gl = new_int_gl;
3048                 return true;
3049         }
3050         return false;
3051 }
3052
3053 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3054 {
3055         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3056         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3057         bool rx_update, tx_update;
3058
3059         /* update param every 1000ms */
3060         if (time_before(jiffies,
3061                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3062                 return;
3063
3064         if (rx_group->coal.gl_adapt_enable) {
3065                 rx_update = hns3_get_new_int_gl(rx_group);
3066                 if (rx_update)
3067                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3068                                                        rx_group->coal.int_gl);
3069         }
3070
3071         if (tx_group->coal.gl_adapt_enable) {
3072                 tx_update = hns3_get_new_int_gl(tx_group);
3073                 if (tx_update)
3074                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3075                                                        tx_group->coal.int_gl);
3076         }
3077
3078         tqp_vector->last_jiffies = jiffies;
3079 }
3080
3081 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3082 {
3083         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3084         struct hns3_enet_ring *ring;
3085         int rx_pkt_total = 0;
3086
3087         struct hns3_enet_tqp_vector *tqp_vector =
3088                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3089         bool clean_complete = true;
3090         int rx_budget = budget;
3091
3092         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3093                 napi_complete(napi);
3094                 return 0;
3095         }
3096
3097         /* Since the actual Tx work is minimal, we can give the Tx a larger
3098          * budget and be more aggressive about cleaning up the Tx descriptors.
3099          */
3100         hns3_for_each_ring(ring, tqp_vector->tx_group)
3101                 hns3_clean_tx_ring(ring);
3102
3103         /* make sure rx ring budget not smaller than 1 */
3104         if (tqp_vector->num_tqps > 1)
3105                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3106
3107         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3108                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3109                                                     hns3_rx_skb);
3110
3111                 if (rx_cleaned >= rx_budget)
3112                         clean_complete = false;
3113
3114                 rx_pkt_total += rx_cleaned;
3115         }
3116
3117         tqp_vector->rx_group.total_packets += rx_pkt_total;
3118
3119         if (!clean_complete)
3120                 return budget;
3121
3122         if (napi_complete(napi) &&
3123             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3124                 hns3_update_new_int_gl(tqp_vector);
3125                 hns3_mask_vector_irq(tqp_vector, 1);
3126         }
3127
3128         return rx_pkt_total;
3129 }
3130
3131 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3132                                       struct hnae3_ring_chain_node *head)
3133 {
3134         struct pci_dev *pdev = tqp_vector->handle->pdev;
3135         struct hnae3_ring_chain_node *cur_chain = head;
3136         struct hnae3_ring_chain_node *chain;
3137         struct hns3_enet_ring *tx_ring;
3138         struct hns3_enet_ring *rx_ring;
3139
3140         tx_ring = tqp_vector->tx_group.ring;
3141         if (tx_ring) {
3142                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3143                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3144                               HNAE3_RING_TYPE_TX);
3145                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3146                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3147
3148                 cur_chain->next = NULL;
3149
3150                 while (tx_ring->next) {
3151                         tx_ring = tx_ring->next;
3152
3153                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3154                                              GFP_KERNEL);
3155                         if (!chain)
3156                                 goto err_free_chain;
3157
3158                         cur_chain->next = chain;
3159                         chain->tqp_index = tx_ring->tqp->tqp_index;
3160                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3161                                       HNAE3_RING_TYPE_TX);
3162                         hnae3_set_field(chain->int_gl_idx,
3163                                         HNAE3_RING_GL_IDX_M,
3164                                         HNAE3_RING_GL_IDX_S,
3165                                         HNAE3_RING_GL_TX);
3166
3167                         cur_chain = chain;
3168                 }
3169         }
3170
3171         rx_ring = tqp_vector->rx_group.ring;
3172         if (!tx_ring && rx_ring) {
3173                 cur_chain->next = NULL;
3174                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3175                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3176                               HNAE3_RING_TYPE_RX);
3177                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3178                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3179
3180                 rx_ring = rx_ring->next;
3181         }
3182
3183         while (rx_ring) {
3184                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3185                 if (!chain)
3186                         goto err_free_chain;
3187
3188                 cur_chain->next = chain;
3189                 chain->tqp_index = rx_ring->tqp->tqp_index;
3190                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3191                               HNAE3_RING_TYPE_RX);
3192                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3193                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3194
3195                 cur_chain = chain;
3196
3197                 rx_ring = rx_ring->next;
3198         }
3199
3200         return 0;
3201
3202 err_free_chain:
3203         cur_chain = head->next;
3204         while (cur_chain) {
3205                 chain = cur_chain->next;
3206                 devm_kfree(&pdev->dev, cur_chain);
3207                 cur_chain = chain;
3208         }
3209         head->next = NULL;
3210
3211         return -ENOMEM;
3212 }
3213
3214 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3215                                         struct hnae3_ring_chain_node *head)
3216 {
3217         struct pci_dev *pdev = tqp_vector->handle->pdev;
3218         struct hnae3_ring_chain_node *chain_tmp, *chain;
3219
3220         chain = head->next;
3221
3222         while (chain) {
3223                 chain_tmp = chain->next;
3224                 devm_kfree(&pdev->dev, chain);
3225                 chain = chain_tmp;
3226         }
3227 }
3228
3229 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3230                                    struct hns3_enet_ring *ring)
3231 {
3232         ring->next = group->ring;
3233         group->ring = ring;
3234
3235         group->count++;
3236 }
3237
3238 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3239 {
3240         struct pci_dev *pdev = priv->ae_handle->pdev;
3241         struct hns3_enet_tqp_vector *tqp_vector;
3242         int num_vectors = priv->vector_num;
3243         int numa_node;
3244         int vector_i;
3245
3246         numa_node = dev_to_node(&pdev->dev);
3247
3248         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3249                 tqp_vector = &priv->tqp_vector[vector_i];
3250                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3251                                 &tqp_vector->affinity_mask);
3252         }
3253 }
3254
3255 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3256 {
3257         struct hnae3_ring_chain_node vector_ring_chain;
3258         struct hnae3_handle *h = priv->ae_handle;
3259         struct hns3_enet_tqp_vector *tqp_vector;
3260         int ret = 0;
3261         int i;
3262
3263         hns3_nic_set_cpumask(priv);
3264
3265         for (i = 0; i < priv->vector_num; i++) {
3266                 tqp_vector = &priv->tqp_vector[i];
3267                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3268                 tqp_vector->num_tqps = 0;
3269         }
3270
3271         for (i = 0; i < h->kinfo.num_tqps; i++) {
3272                 u16 vector_i = i % priv->vector_num;
3273                 u16 tqp_num = h->kinfo.num_tqps;
3274
3275                 tqp_vector = &priv->tqp_vector[vector_i];
3276
3277                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3278                                        priv->ring_data[i].ring);
3279
3280                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3281                                        priv->ring_data[i + tqp_num].ring);
3282
3283                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3284                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3285                 tqp_vector->num_tqps++;
3286         }
3287
3288         for (i = 0; i < priv->vector_num; i++) {
3289                 tqp_vector = &priv->tqp_vector[i];
3290
3291                 tqp_vector->rx_group.total_bytes = 0;
3292                 tqp_vector->rx_group.total_packets = 0;
3293                 tqp_vector->tx_group.total_bytes = 0;
3294                 tqp_vector->tx_group.total_packets = 0;
3295                 tqp_vector->handle = h;
3296
3297                 ret = hns3_get_vector_ring_chain(tqp_vector,
3298                                                  &vector_ring_chain);
3299                 if (ret)
3300                         goto map_ring_fail;
3301
3302                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3303                         tqp_vector->vector_irq, &vector_ring_chain);
3304
3305                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3306
3307                 if (ret)
3308                         goto map_ring_fail;
3309
3310                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3311                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3312         }
3313
3314         return 0;
3315
3316 map_ring_fail:
3317         while (i--)
3318                 netif_napi_del(&priv->tqp_vector[i].napi);
3319
3320         return ret;
3321 }
3322
3323 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3324 {
3325 #define HNS3_VECTOR_PF_MAX_NUM          64
3326
3327         struct hnae3_handle *h = priv->ae_handle;
3328         struct hns3_enet_tqp_vector *tqp_vector;
3329         struct hnae3_vector_info *vector;
3330         struct pci_dev *pdev = h->pdev;
3331         u16 tqp_num = h->kinfo.num_tqps;
3332         u16 vector_num;
3333         int ret = 0;
3334         u16 i;
3335
3336         /* RSS size, cpu online and vector_num should be the same */
3337         /* Should consider 2p/4p later */
3338         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3339         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3340
3341         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3342                               GFP_KERNEL);
3343         if (!vector)
3344                 return -ENOMEM;
3345
3346         /* save the actual available vector number */
3347         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3348
3349         priv->vector_num = vector_num;
3350         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3351                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3352                              GFP_KERNEL);
3353         if (!priv->tqp_vector) {
3354                 ret = -ENOMEM;
3355                 goto out;
3356         }
3357
3358         for (i = 0; i < priv->vector_num; i++) {
3359                 tqp_vector = &priv->tqp_vector[i];
3360                 tqp_vector->idx = i;
3361                 tqp_vector->mask_addr = vector[i].io_addr;
3362                 tqp_vector->vector_irq = vector[i].vector;
3363                 hns3_vector_gl_rl_init(tqp_vector, priv);
3364         }
3365
3366 out:
3367         devm_kfree(&pdev->dev, vector);
3368         return ret;
3369 }
3370
3371 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3372 {
3373         group->ring = NULL;
3374         group->count = 0;
3375 }
3376
3377 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3378 {
3379         struct hnae3_ring_chain_node vector_ring_chain;
3380         struct hnae3_handle *h = priv->ae_handle;
3381         struct hns3_enet_tqp_vector *tqp_vector;
3382         int i;
3383
3384         for (i = 0; i < priv->vector_num; i++) {
3385                 tqp_vector = &priv->tqp_vector[i];
3386
3387                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3388                         continue;
3389
3390                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3391
3392                 h->ae_algo->ops->unmap_ring_from_vector(h,
3393                         tqp_vector->vector_irq, &vector_ring_chain);
3394
3395                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3396
3397                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3398                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3399                         free_irq(tqp_vector->vector_irq, tqp_vector);
3400                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3401                 }
3402
3403                 hns3_clear_ring_group(&tqp_vector->rx_group);
3404                 hns3_clear_ring_group(&tqp_vector->tx_group);
3405                 netif_napi_del(&priv->tqp_vector[i].napi);
3406         }
3407 }
3408
3409 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3410 {
3411         struct hnae3_handle *h = priv->ae_handle;
3412         struct pci_dev *pdev = h->pdev;
3413         int i, ret;
3414
3415         for (i = 0; i < priv->vector_num; i++) {
3416                 struct hns3_enet_tqp_vector *tqp_vector;
3417
3418                 tqp_vector = &priv->tqp_vector[i];
3419                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3420                 if (ret)
3421                         return ret;
3422         }
3423
3424         devm_kfree(&pdev->dev, priv->tqp_vector);
3425         return 0;
3426 }
3427
3428 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3429                              unsigned int ring_type)
3430 {
3431         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3432         int queue_num = priv->ae_handle->kinfo.num_tqps;
3433         struct pci_dev *pdev = priv->ae_handle->pdev;
3434         struct hns3_enet_ring *ring;
3435         int desc_num;
3436
3437         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3438         if (!ring)
3439                 return -ENOMEM;
3440
3441         if (ring_type == HNAE3_RING_TYPE_TX) {
3442                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3443                 ring_data[q->tqp_index].ring = ring;
3444                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3445                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3446         } else {
3447                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3448                 ring_data[q->tqp_index + queue_num].ring = ring;
3449                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3450                 ring->io_base = q->io_base;
3451         }
3452
3453         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3454
3455         ring->tqp = q;
3456         ring->desc = NULL;
3457         ring->desc_cb = NULL;
3458         ring->dev = priv->dev;
3459         ring->desc_dma_addr = 0;
3460         ring->buf_size = q->buf_size;
3461         ring->desc_num = desc_num;
3462         ring->next_to_use = 0;
3463         ring->next_to_clean = 0;
3464
3465         return 0;
3466 }
3467
3468 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3469                               struct hns3_nic_priv *priv)
3470 {
3471         int ret;
3472
3473         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3474         if (ret)
3475                 return ret;
3476
3477         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3478         if (ret) {
3479                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3480                 return ret;
3481         }
3482
3483         return 0;
3484 }
3485
3486 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3487 {
3488         struct hnae3_handle *h = priv->ae_handle;
3489         struct pci_dev *pdev = h->pdev;
3490         int i, ret;
3491
3492         priv->ring_data =  devm_kzalloc(&pdev->dev,
3493                                         array3_size(h->kinfo.num_tqps,
3494                                                     sizeof(*priv->ring_data),
3495                                                     2),
3496                                         GFP_KERNEL);
3497         if (!priv->ring_data)
3498                 return -ENOMEM;
3499
3500         for (i = 0; i < h->kinfo.num_tqps; i++) {
3501                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3502                 if (ret)
3503                         goto err;
3504         }
3505
3506         return 0;
3507 err:
3508         while (i--) {
3509                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3510                 devm_kfree(priv->dev,
3511                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3512         }
3513
3514         devm_kfree(&pdev->dev, priv->ring_data);
3515         priv->ring_data = NULL;
3516         return ret;
3517 }
3518
3519 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3520 {
3521         struct hnae3_handle *h = priv->ae_handle;
3522         int i;
3523
3524         if (!priv->ring_data)
3525                 return;
3526
3527         for (i = 0; i < h->kinfo.num_tqps; i++) {
3528                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3529                 devm_kfree(priv->dev,
3530                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3531         }
3532         devm_kfree(priv->dev, priv->ring_data);
3533         priv->ring_data = NULL;
3534 }
3535
3536 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3537 {
3538         int ret;
3539
3540         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3541                 return -EINVAL;
3542
3543         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3544                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
3545         if (!ring->desc_cb) {
3546                 ret = -ENOMEM;
3547                 goto out;
3548         }
3549
3550         ret = hns3_alloc_desc(ring);
3551         if (ret)
3552                 goto out_with_desc_cb;
3553
3554         if (!HNAE3_IS_TX_RING(ring)) {
3555                 ret = hns3_alloc_ring_buffers(ring);
3556                 if (ret)
3557                         goto out_with_desc;
3558         }
3559
3560         return 0;
3561
3562 out_with_desc:
3563         hns3_free_desc(ring);
3564 out_with_desc_cb:
3565         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3566         ring->desc_cb = NULL;
3567 out:
3568         return ret;
3569 }
3570
3571 static void hns3_fini_ring(struct hns3_enet_ring *ring)
3572 {
3573         hns3_free_desc(ring);
3574         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3575         ring->desc_cb = NULL;
3576         ring->next_to_clean = 0;
3577         ring->next_to_use = 0;
3578         ring->pending_buf = 0;
3579         if (ring->skb) {
3580                 dev_kfree_skb_any(ring->skb);
3581                 ring->skb = NULL;
3582         }
3583 }
3584
3585 static int hns3_buf_size2type(u32 buf_size)
3586 {
3587         int bd_size_type;
3588
3589         switch (buf_size) {
3590         case 512:
3591                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3592                 break;
3593         case 1024:
3594                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3595                 break;
3596         case 2048:
3597                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3598                 break;
3599         case 4096:
3600                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3601                 break;
3602         default:
3603                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3604         }
3605
3606         return bd_size_type;
3607 }
3608
3609 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3610 {
3611         dma_addr_t dma = ring->desc_dma_addr;
3612         struct hnae3_queue *q = ring->tqp;
3613
3614         if (!HNAE3_IS_TX_RING(ring)) {
3615                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3616                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3617                                (u32)((dma >> 31) >> 1));
3618
3619                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3620                                hns3_buf_size2type(ring->buf_size));
3621                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3622                                ring->desc_num / 8 - 1);
3623
3624         } else {
3625                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3626                                (u32)dma);
3627                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3628                                (u32)((dma >> 31) >> 1));
3629
3630                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3631                                ring->desc_num / 8 - 1);
3632         }
3633 }
3634
3635 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3636 {
3637         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3638         int i;
3639
3640         for (i = 0; i < HNAE3_MAX_TC; i++) {
3641                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3642                 int j;
3643
3644                 if (!tc_info->enable)
3645                         continue;
3646
3647                 for (j = 0; j < tc_info->tqp_count; j++) {
3648                         struct hnae3_queue *q;
3649
3650                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3651                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3652                                        tc_info->tc);
3653                 }
3654         }
3655 }
3656
3657 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3658 {
3659         struct hnae3_handle *h = priv->ae_handle;
3660         int ring_num = h->kinfo.num_tqps * 2;
3661         int i, j;
3662         int ret;
3663
3664         for (i = 0; i < ring_num; i++) {
3665                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3666                 if (ret) {
3667                         dev_err(priv->dev,
3668                                 "Alloc ring memory fail! ret=%d\n", ret);
3669                         goto out_when_alloc_ring_memory;
3670                 }
3671
3672                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3673         }
3674
3675         return 0;
3676
3677 out_when_alloc_ring_memory:
3678         for (j = i - 1; j >= 0; j--)
3679                 hns3_fini_ring(priv->ring_data[j].ring);
3680
3681         return -ENOMEM;
3682 }
3683
3684 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3685 {
3686         struct hnae3_handle *h = priv->ae_handle;
3687         int i;
3688
3689         for (i = 0; i < h->kinfo.num_tqps; i++) {
3690                 hns3_fini_ring(priv->ring_data[i].ring);
3691                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3692         }
3693         return 0;
3694 }
3695
3696 /* Set mac addr if it is configured. or leave it to the AE driver */
3697 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3698 {
3699         struct hns3_nic_priv *priv = netdev_priv(netdev);
3700         struct hnae3_handle *h = priv->ae_handle;
3701         u8 mac_addr_temp[ETH_ALEN];
3702         int ret = 0;
3703
3704         if (h->ae_algo->ops->get_mac_addr && init) {
3705                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3706                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3707         }
3708
3709         /* Check if the MAC address is valid, if not get a random one */
3710         if (!is_valid_ether_addr(netdev->dev_addr)) {
3711                 eth_hw_addr_random(netdev);
3712                 dev_warn(priv->dev, "using random MAC address %pM\n",
3713                          netdev->dev_addr);
3714         }
3715
3716         if (h->ae_algo->ops->set_mac_addr)
3717                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3718
3719         return ret;
3720 }
3721
3722 static int hns3_init_phy(struct net_device *netdev)
3723 {
3724         struct hnae3_handle *h = hns3_get_handle(netdev);
3725         int ret = 0;
3726
3727         if (h->ae_algo->ops->mac_connect_phy)
3728                 ret = h->ae_algo->ops->mac_connect_phy(h);
3729
3730         return ret;
3731 }
3732
3733 static void hns3_uninit_phy(struct net_device *netdev)
3734 {
3735         struct hnae3_handle *h = hns3_get_handle(netdev);
3736
3737         if (h->ae_algo->ops->mac_disconnect_phy)
3738                 h->ae_algo->ops->mac_disconnect_phy(h);
3739 }
3740
3741 static int hns3_restore_fd_rules(struct net_device *netdev)
3742 {
3743         struct hnae3_handle *h = hns3_get_handle(netdev);
3744         int ret = 0;
3745
3746         if (h->ae_algo->ops->restore_fd_rules)
3747                 ret = h->ae_algo->ops->restore_fd_rules(h);
3748
3749         return ret;
3750 }
3751
3752 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3753 {
3754         struct hnae3_handle *h = hns3_get_handle(netdev);
3755
3756         if (h->ae_algo->ops->del_all_fd_entries)
3757                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3758 }
3759
3760 static int hns3_client_start(struct hnae3_handle *handle)
3761 {
3762         if (!handle->ae_algo->ops->client_start)
3763                 return 0;
3764
3765         return handle->ae_algo->ops->client_start(handle);
3766 }
3767
3768 static void hns3_client_stop(struct hnae3_handle *handle)
3769 {
3770         if (!handle->ae_algo->ops->client_stop)
3771                 return;
3772
3773         handle->ae_algo->ops->client_stop(handle);
3774 }
3775
3776 static void hns3_info_show(struct hns3_nic_priv *priv)
3777 {
3778         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3779
3780         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3781         dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3782         dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3783         dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3784         dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3785         dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3786         dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3787         dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3788         dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3789 }
3790
3791 static int hns3_client_init(struct hnae3_handle *handle)
3792 {
3793         struct pci_dev *pdev = handle->pdev;
3794         u16 alloc_tqps, max_rss_size;
3795         struct hns3_nic_priv *priv;
3796         struct net_device *netdev;
3797         int ret;
3798
3799         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3800                                                     &max_rss_size);
3801         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3802         if (!netdev)
3803                 return -ENOMEM;
3804
3805         priv = netdev_priv(netdev);
3806         priv->dev = &pdev->dev;
3807         priv->netdev = netdev;
3808         priv->ae_handle = handle;
3809         priv->tx_timeout_count = 0;
3810         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3811
3812         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3813
3814         handle->kinfo.netdev = netdev;
3815         handle->priv = (void *)priv;
3816
3817         hns3_init_mac_addr(netdev, true);
3818
3819         hns3_set_default_feature(netdev);
3820
3821         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3822         netdev->priv_flags |= IFF_UNICAST_FLT;
3823         netdev->netdev_ops = &hns3_nic_netdev_ops;
3824         SET_NETDEV_DEV(netdev, &pdev->dev);
3825         hns3_ethtool_set_ops(netdev);
3826
3827         /* Carrier off reporting is important to ethtool even BEFORE open */
3828         netif_carrier_off(netdev);
3829
3830         ret = hns3_get_ring_config(priv);
3831         if (ret) {
3832                 ret = -ENOMEM;
3833                 goto out_get_ring_cfg;
3834         }
3835
3836         ret = hns3_nic_alloc_vector_data(priv);
3837         if (ret) {
3838                 ret = -ENOMEM;
3839                 goto out_alloc_vector_data;
3840         }
3841
3842         ret = hns3_nic_init_vector_data(priv);
3843         if (ret) {
3844                 ret = -ENOMEM;
3845                 goto out_init_vector_data;
3846         }
3847
3848         ret = hns3_init_all_ring(priv);
3849         if (ret) {
3850                 ret = -ENOMEM;
3851                 goto out_init_ring_data;
3852         }
3853
3854         ret = hns3_init_phy(netdev);
3855         if (ret)
3856                 goto out_init_phy;
3857
3858         ret = register_netdev(netdev);
3859         if (ret) {
3860                 dev_err(priv->dev, "probe register netdev fail!\n");
3861                 goto out_reg_netdev_fail;
3862         }
3863
3864         ret = hns3_client_start(handle);
3865         if (ret) {
3866                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3867                 goto out_client_start;
3868         }
3869
3870         hns3_dcbnl_setup(handle);
3871
3872         hns3_dbg_init(handle);
3873
3874         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3875         netdev->max_mtu = HNS3_MAX_MTU;
3876
3877         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3878
3879         if (netif_msg_drv(handle))
3880                 hns3_info_show(priv);
3881
3882         return ret;
3883
3884 out_client_start:
3885         unregister_netdev(netdev);
3886 out_reg_netdev_fail:
3887         hns3_uninit_phy(netdev);
3888 out_init_phy:
3889         hns3_uninit_all_ring(priv);
3890 out_init_ring_data:
3891         hns3_nic_uninit_vector_data(priv);
3892 out_init_vector_data:
3893         hns3_nic_dealloc_vector_data(priv);
3894 out_alloc_vector_data:
3895         priv->ring_data = NULL;
3896 out_get_ring_cfg:
3897         priv->ae_handle = NULL;
3898         free_netdev(netdev);
3899         return ret;
3900 }
3901
3902 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3903 {
3904         struct net_device *netdev = handle->kinfo.netdev;
3905         struct hns3_nic_priv *priv = netdev_priv(netdev);
3906         int ret;
3907
3908         hns3_remove_hw_addr(netdev);
3909
3910         if (netdev->reg_state != NETREG_UNINITIALIZED)
3911                 unregister_netdev(netdev);
3912
3913         hns3_client_stop(handle);
3914
3915         hns3_uninit_phy(netdev);
3916
3917         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3918                 netdev_warn(netdev, "already uninitialized\n");
3919                 goto out_netdev_free;
3920         }
3921
3922         hns3_del_all_fd_rules(netdev, true);
3923
3924         hns3_force_clear_all_ring(handle);
3925
3926         hns3_nic_uninit_vector_data(priv);
3927
3928         ret = hns3_nic_dealloc_vector_data(priv);
3929         if (ret)
3930                 netdev_err(netdev, "dealloc vector error\n");
3931
3932         ret = hns3_uninit_all_ring(priv);
3933         if (ret)
3934                 netdev_err(netdev, "uninit ring error\n");
3935
3936         hns3_put_ring_config(priv);
3937
3938         hns3_dbg_uninit(handle);
3939
3940 out_netdev_free:
3941         free_netdev(netdev);
3942 }
3943
3944 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3945 {
3946         struct net_device *netdev = handle->kinfo.netdev;
3947
3948         if (!netdev)
3949                 return;
3950
3951         if (linkup) {
3952                 netif_carrier_on(netdev);
3953                 netif_tx_wake_all_queues(netdev);
3954                 if (netif_msg_link(handle))
3955                         netdev_info(netdev, "link up\n");
3956         } else {
3957                 netif_carrier_off(netdev);
3958                 netif_tx_stop_all_queues(netdev);
3959                 if (netif_msg_link(handle))
3960                         netdev_info(netdev, "link down\n");
3961         }
3962 }
3963
3964 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3965 {
3966         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3967         struct net_device *ndev = kinfo->netdev;
3968
3969         if (tc > HNAE3_MAX_TC)
3970                 return -EINVAL;
3971
3972         if (!ndev)
3973                 return -ENODEV;
3974
3975         return hns3_nic_set_real_num_queue(ndev);
3976 }
3977
3978 static int hns3_recover_hw_addr(struct net_device *ndev)
3979 {
3980         struct netdev_hw_addr_list *list;
3981         struct netdev_hw_addr *ha, *tmp;
3982         int ret = 0;
3983
3984         netif_addr_lock_bh(ndev);
3985         /* go through and sync uc_addr entries to the device */
3986         list = &ndev->uc;
3987         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3988                 ret = hns3_nic_uc_sync(ndev, ha->addr);
3989                 if (ret)
3990                         goto out;
3991         }
3992
3993         /* go through and sync mc_addr entries to the device */
3994         list = &ndev->mc;
3995         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3996                 ret = hns3_nic_mc_sync(ndev, ha->addr);
3997                 if (ret)
3998                         goto out;
3999         }
4000
4001 out:
4002         netif_addr_unlock_bh(ndev);
4003         return ret;
4004 }
4005
4006 static void hns3_remove_hw_addr(struct net_device *netdev)
4007 {
4008         struct netdev_hw_addr_list *list;
4009         struct netdev_hw_addr *ha, *tmp;
4010
4011         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4012
4013         netif_addr_lock_bh(netdev);
4014         /* go through and unsync uc_addr entries to the device */
4015         list = &netdev->uc;
4016         list_for_each_entry_safe(ha, tmp, &list->list, list)
4017                 hns3_nic_uc_unsync(netdev, ha->addr);
4018
4019         /* go through and unsync mc_addr entries to the device */
4020         list = &netdev->mc;
4021         list_for_each_entry_safe(ha, tmp, &list->list, list)
4022                 if (ha->refcount > 1)
4023                         hns3_nic_mc_unsync(netdev, ha->addr);
4024
4025         netif_addr_unlock_bh(netdev);
4026 }
4027
4028 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4029 {
4030         while (ring->next_to_clean != ring->next_to_use) {
4031                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4032                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4033                 ring_ptr_move_fw(ring, next_to_clean);
4034         }
4035 }
4036
4037 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4038 {
4039         struct hns3_desc_cb res_cbs;
4040         int ret;
4041
4042         while (ring->next_to_use != ring->next_to_clean) {
4043                 /* When a buffer is not reused, it's memory has been
4044                  * freed in hns3_handle_rx_bd or will be freed by
4045                  * stack, so we need to replace the buffer here.
4046                  */
4047                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4048                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4049                         if (ret) {
4050                                 u64_stats_update_begin(&ring->syncp);
4051                                 ring->stats.sw_err_cnt++;
4052                                 u64_stats_update_end(&ring->syncp);
4053                                 /* if alloc new buffer fail, exit directly
4054                                  * and reclear in up flow.
4055                                  */
4056                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4057                                             "reserve buffer map failed, ret = %d\n",
4058                                             ret);
4059                                 return ret;
4060                         }
4061                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4062                 }
4063                 ring_ptr_move_fw(ring, next_to_use);
4064         }
4065
4066         /* Free the pending skb in rx ring */
4067         if (ring->skb) {
4068                 dev_kfree_skb_any(ring->skb);
4069                 ring->skb = NULL;
4070                 ring->pending_buf = 0;
4071         }
4072
4073         return 0;
4074 }
4075
4076 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4077 {
4078         while (ring->next_to_use != ring->next_to_clean) {
4079                 /* When a buffer is not reused, it's memory has been
4080                  * freed in hns3_handle_rx_bd or will be freed by
4081                  * stack, so only need to unmap the buffer here.
4082                  */
4083                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4084                         hns3_unmap_buffer(ring,
4085                                           &ring->desc_cb[ring->next_to_use]);
4086                         ring->desc_cb[ring->next_to_use].dma = 0;
4087                 }
4088
4089                 ring_ptr_move_fw(ring, next_to_use);
4090         }
4091 }
4092
4093 static void hns3_force_clear_all_ring(struct hnae3_handle *h)
4094 {
4095         struct net_device *ndev = h->kinfo.netdev;
4096         struct hns3_nic_priv *priv = netdev_priv(ndev);
4097         struct hns3_enet_ring *ring;
4098         u32 i;
4099
4100         for (i = 0; i < h->kinfo.num_tqps; i++) {
4101                 ring = priv->ring_data[i].ring;
4102                 hns3_clear_tx_ring(ring);
4103
4104                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4105                 hns3_force_clear_rx_ring(ring);
4106         }
4107 }
4108
4109 static void hns3_clear_all_ring(struct hnae3_handle *h)
4110 {
4111         struct net_device *ndev = h->kinfo.netdev;
4112         struct hns3_nic_priv *priv = netdev_priv(ndev);
4113         u32 i;
4114
4115         for (i = 0; i < h->kinfo.num_tqps; i++) {
4116                 struct netdev_queue *dev_queue;
4117                 struct hns3_enet_ring *ring;
4118
4119                 ring = priv->ring_data[i].ring;
4120                 hns3_clear_tx_ring(ring);
4121                 dev_queue = netdev_get_tx_queue(ndev,
4122                                                 priv->ring_data[i].queue_index);
4123                 netdev_tx_reset_queue(dev_queue);
4124
4125                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4126                 /* Continue to clear other rings even if clearing some
4127                  * rings failed.
4128                  */
4129                 hns3_clear_rx_ring(ring);
4130         }
4131 }
4132
4133 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4134 {
4135         struct net_device *ndev = h->kinfo.netdev;
4136         struct hns3_nic_priv *priv = netdev_priv(ndev);
4137         struct hns3_enet_ring *rx_ring;
4138         int i, j;
4139         int ret;
4140
4141         for (i = 0; i < h->kinfo.num_tqps; i++) {
4142                 ret = h->ae_algo->ops->reset_queue(h, i);
4143                 if (ret)
4144                         return ret;
4145
4146                 hns3_init_ring_hw(priv->ring_data[i].ring);
4147
4148                 /* We need to clear tx ring here because self test will
4149                  * use the ring and will not run down before up
4150                  */
4151                 hns3_clear_tx_ring(priv->ring_data[i].ring);
4152                 priv->ring_data[i].ring->next_to_clean = 0;
4153                 priv->ring_data[i].ring->next_to_use = 0;
4154
4155                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4156                 hns3_init_ring_hw(rx_ring);
4157                 ret = hns3_clear_rx_ring(rx_ring);
4158                 if (ret)
4159                         return ret;
4160
4161                 /* We can not know the hardware head and tail when this
4162                  * function is called in reset flow, so we reuse all desc.
4163                  */
4164                 for (j = 0; j < rx_ring->desc_num; j++)
4165                         hns3_reuse_buffer(rx_ring, j);
4166
4167                 rx_ring->next_to_clean = 0;
4168                 rx_ring->next_to_use = 0;
4169         }
4170
4171         hns3_init_tx_ring_tc(priv);
4172
4173         return 0;
4174 }
4175
4176 static void hns3_store_coal(struct hns3_nic_priv *priv)
4177 {
4178         /* ethtool only support setting and querying one coal
4179          * configuation for now, so save the vector 0' coal
4180          * configuation here in order to restore it.
4181          */
4182         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4183                sizeof(struct hns3_enet_coalesce));
4184         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4185                sizeof(struct hns3_enet_coalesce));
4186 }
4187
4188 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4189 {
4190         u16 vector_num = priv->vector_num;
4191         int i;
4192
4193         for (i = 0; i < vector_num; i++) {
4194                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4195                        sizeof(struct hns3_enet_coalesce));
4196                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4197                        sizeof(struct hns3_enet_coalesce));
4198         }
4199 }
4200
4201 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4202 {
4203         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4204         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4205         struct net_device *ndev = kinfo->netdev;
4206         struct hns3_nic_priv *priv = netdev_priv(ndev);
4207
4208         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4209                 return 0;
4210
4211         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4212          * from table space. Hence, for function reset software intervention is
4213          * required to delete the entries
4214          */
4215         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4216                 hns3_remove_hw_addr(ndev);
4217                 hns3_del_all_fd_rules(ndev, false);
4218         }
4219
4220         if (!netif_running(ndev))
4221                 return 0;
4222
4223         return hns3_nic_net_stop(ndev);
4224 }
4225
4226 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4227 {
4228         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4229         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4230         int ret = 0;
4231
4232         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4233
4234         if (netif_running(kinfo->netdev)) {
4235                 ret = hns3_nic_net_open(kinfo->netdev);
4236                 if (ret) {
4237                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4238                         netdev_err(kinfo->netdev,
4239                                    "net up fail, ret=%d!\n", ret);
4240                         return ret;
4241                 }
4242         }
4243
4244         return ret;
4245 }
4246
4247 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4248 {
4249         struct net_device *netdev = handle->kinfo.netdev;
4250         struct hns3_nic_priv *priv = netdev_priv(netdev);
4251         int ret;
4252
4253         /* Carrier off reporting is important to ethtool even BEFORE open */
4254         netif_carrier_off(netdev);
4255
4256         ret = hns3_get_ring_config(priv);
4257         if (ret)
4258                 return ret;
4259
4260         ret = hns3_nic_alloc_vector_data(priv);
4261         if (ret)
4262                 goto err_put_ring;
4263
4264         hns3_restore_coal(priv);
4265
4266         ret = hns3_nic_init_vector_data(priv);
4267         if (ret)
4268                 goto err_dealloc_vector;
4269
4270         ret = hns3_init_all_ring(priv);
4271         if (ret)
4272                 goto err_uninit_vector;
4273
4274         ret = hns3_client_start(handle);
4275         if (ret) {
4276                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4277                 goto err_uninit_ring;
4278         }
4279
4280         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4281
4282         return ret;
4283
4284 err_uninit_ring:
4285         hns3_uninit_all_ring(priv);
4286 err_uninit_vector:
4287         hns3_nic_uninit_vector_data(priv);
4288 err_dealloc_vector:
4289         hns3_nic_dealloc_vector_data(priv);
4290 err_put_ring:
4291         hns3_put_ring_config(priv);
4292
4293         return ret;
4294 }
4295
4296 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4297 {
4298         struct net_device *netdev = handle->kinfo.netdev;
4299         bool vlan_filter_enable;
4300         int ret;
4301
4302         ret = hns3_init_mac_addr(netdev, false);
4303         if (ret)
4304                 return ret;
4305
4306         ret = hns3_recover_hw_addr(netdev);
4307         if (ret)
4308                 return ret;
4309
4310         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4311         if (ret)
4312                 return ret;
4313
4314         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4315         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4316
4317         if (handle->ae_algo->ops->restore_vlan_table)
4318                 handle->ae_algo->ops->restore_vlan_table(handle);
4319
4320         return hns3_restore_fd_rules(netdev);
4321 }
4322
4323 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4324 {
4325         struct net_device *netdev = handle->kinfo.netdev;
4326         struct hns3_nic_priv *priv = netdev_priv(netdev);
4327         int ret;
4328
4329         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4330                 netdev_warn(netdev, "already uninitialized\n");
4331                 return 0;
4332         }
4333
4334         hns3_clear_all_ring(handle);
4335         hns3_force_clear_all_ring(handle);
4336
4337         hns3_nic_uninit_vector_data(priv);
4338
4339         hns3_store_coal(priv);
4340
4341         ret = hns3_nic_dealloc_vector_data(priv);
4342         if (ret)
4343                 netdev_err(netdev, "dealloc vector error\n");
4344
4345         ret = hns3_uninit_all_ring(priv);
4346         if (ret)
4347                 netdev_err(netdev, "uninit ring error\n");
4348
4349         hns3_put_ring_config(priv);
4350
4351         return ret;
4352 }
4353
4354 static int hns3_reset_notify(struct hnae3_handle *handle,
4355                              enum hnae3_reset_notify_type type)
4356 {
4357         int ret = 0;
4358
4359         switch (type) {
4360         case HNAE3_UP_CLIENT:
4361                 ret = hns3_reset_notify_up_enet(handle);
4362                 break;
4363         case HNAE3_DOWN_CLIENT:
4364                 ret = hns3_reset_notify_down_enet(handle);
4365                 break;
4366         case HNAE3_INIT_CLIENT:
4367                 ret = hns3_reset_notify_init_enet(handle);
4368                 break;
4369         case HNAE3_UNINIT_CLIENT:
4370                 ret = hns3_reset_notify_uninit_enet(handle);
4371                 break;
4372         case HNAE3_RESTORE_CLIENT:
4373                 ret = hns3_reset_notify_restore_enet(handle);
4374                 break;
4375         default:
4376                 break;
4377         }
4378
4379         return ret;
4380 }
4381
4382 int hns3_set_channels(struct net_device *netdev,
4383                       struct ethtool_channels *ch)
4384 {
4385         struct hnae3_handle *h = hns3_get_handle(netdev);
4386         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4387         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4388         u32 new_tqp_num = ch->combined_count;
4389         u16 org_tqp_num;
4390         int ret;
4391
4392         if (ch->rx_count || ch->tx_count)
4393                 return -EINVAL;
4394
4395         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4396             new_tqp_num < 1) {
4397                 dev_err(&netdev->dev,
4398                         "Change tqps fail, the tqp range is from 1 to %d",
4399                         hns3_get_max_available_channels(h));
4400                 return -EINVAL;
4401         }
4402
4403         if (kinfo->rss_size == new_tqp_num)
4404                 return 0;
4405
4406         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4407         if (ret)
4408                 return ret;
4409
4410         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4411         if (ret)
4412                 return ret;
4413
4414         org_tqp_num = h->kinfo.num_tqps;
4415         ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4416         if (ret) {
4417                 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4418                                                     rxfh_configured);
4419                 if (ret) {
4420                         /* If revert to old tqp failed, fatal error occurred */
4421                         dev_err(&netdev->dev,
4422                                 "Revert to old tqp num fail, ret=%d", ret);
4423                         return ret;
4424                 }
4425                 dev_info(&netdev->dev,
4426                          "Change tqp num fail, Revert to old tqp num");
4427         }
4428         ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4429         if (ret)
4430                 return ret;
4431
4432         return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4433 }
4434
4435 static const struct hnae3_client_ops client_ops = {
4436         .init_instance = hns3_client_init,
4437         .uninit_instance = hns3_client_uninit,
4438         .link_status_change = hns3_link_status_change,
4439         .setup_tc = hns3_client_setup_tc,
4440         .reset_notify = hns3_reset_notify,
4441 };
4442
4443 /* hns3_init_module - Driver registration routine
4444  * hns3_init_module is the first routine called when the driver is
4445  * loaded. All it does is register with the PCI subsystem.
4446  */
4447 static int __init hns3_init_module(void)
4448 {
4449         int ret;
4450
4451         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4452         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4453
4454         client.type = HNAE3_CLIENT_KNIC;
4455         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4456                  hns3_driver_name);
4457
4458         client.ops = &client_ops;
4459
4460         INIT_LIST_HEAD(&client.node);
4461
4462         hns3_dbg_register_debugfs(hns3_driver_name);
4463
4464         ret = hnae3_register_client(&client);
4465         if (ret)
4466                 goto err_reg_client;
4467
4468         ret = pci_register_driver(&hns3_driver);
4469         if (ret)
4470                 goto err_reg_driver;
4471
4472         return ret;
4473
4474 err_reg_driver:
4475         hnae3_unregister_client(&client);
4476 err_reg_client:
4477         hns3_dbg_unregister_debugfs();
4478         return ret;
4479 }
4480 module_init(hns3_init_module);
4481
4482 /* hns3_exit_module - Driver exit cleanup routine
4483  * hns3_exit_module is called just before the driver is removed
4484  * from memory.
4485  */
4486 static void __exit hns3_exit_module(void)
4487 {
4488         pci_unregister_driver(&hns3_driver);
4489         hnae3_unregister_client(&client);
4490         hns3_dbg_unregister_debugfs();
4491 }
4492 module_exit(hns3_exit_module);
4493
4494 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4495 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4496 MODULE_LICENSE("GPL");
4497 MODULE_ALIAS("pci:hns-nic");
4498 MODULE_VERSION(HNS3_MOD_VERSION);