1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
4 #include <linux/types.h>
5 #include <linux/module.h>
9 #include <linux/if_macvlan.h>
10 #include <linux/prefetch.h>
14 #define DRV_VERSION "0.26.1-k"
15 #define DRV_SUMMARY "Intel(R) Ethernet Switch Host Interface Driver"
16 const char fm10k_driver_version[] = DRV_VERSION;
17 char fm10k_driver_name[] = "fm10k";
18 static const char fm10k_driver_string[] = DRV_SUMMARY;
19 static const char fm10k_copyright[] =
20 "Copyright(c) 2013 - 2018 Intel Corporation.";
22 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
23 MODULE_DESCRIPTION(DRV_SUMMARY);
24 MODULE_LICENSE("GPL v2");
25 MODULE_VERSION(DRV_VERSION);
27 /* single workqueue for entire fm10k driver */
28 struct workqueue_struct *fm10k_workqueue;
31 * fm10k_init_module - Driver Registration Routine
33 * fm10k_init_module is the first routine called when the driver is
34 * loaded. All it does is register with the PCI subsystem.
36 static int __init fm10k_init_module(void)
38 pr_info("%s - version %s\n", fm10k_driver_string, fm10k_driver_version);
39 pr_info("%s\n", fm10k_copyright);
41 /* create driver workqueue */
42 fm10k_workqueue = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0,
47 return fm10k_register_pci_driver();
49 module_init(fm10k_init_module);
52 * fm10k_exit_module - Driver Exit Cleanup Routine
54 * fm10k_exit_module is called just before the driver is removed
57 static void __exit fm10k_exit_module(void)
59 fm10k_unregister_pci_driver();
63 /* destroy driver workqueue */
64 destroy_workqueue(fm10k_workqueue);
66 module_exit(fm10k_exit_module);
68 static bool fm10k_alloc_mapped_page(struct fm10k_ring *rx_ring,
69 struct fm10k_rx_buffer *bi)
71 struct page *page = bi->page;
74 /* Only page will be NULL if buffer was consumed */
78 /* alloc new page for storage */
79 page = dev_alloc_page();
80 if (unlikely(!page)) {
81 rx_ring->rx_stats.alloc_failed++;
85 /* map page for use */
86 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
88 /* if mapping failed free memory back to system since
89 * there isn't much point in holding memory we can't use
91 if (dma_mapping_error(rx_ring->dev, dma)) {
94 rx_ring->rx_stats.alloc_failed++;
106 * fm10k_alloc_rx_buffers - Replace used receive buffers
107 * @rx_ring: ring to place buffers on
108 * @cleaned_count: number of buffers to replace
110 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count)
112 union fm10k_rx_desc *rx_desc;
113 struct fm10k_rx_buffer *bi;
114 u16 i = rx_ring->next_to_use;
120 rx_desc = FM10K_RX_DESC(rx_ring, i);
121 bi = &rx_ring->rx_buffer[i];
125 if (!fm10k_alloc_mapped_page(rx_ring, bi))
128 /* Refresh the desc even if buffer_addrs didn't change
129 * because each write-back erases this info.
131 rx_desc->q.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
137 rx_desc = FM10K_RX_DESC(rx_ring, 0);
138 bi = rx_ring->rx_buffer;
142 /* clear the status bits for the next_to_use descriptor */
143 rx_desc->d.staterr = 0;
146 } while (cleaned_count);
150 if (rx_ring->next_to_use != i) {
151 /* record the next descriptor to use */
152 rx_ring->next_to_use = i;
154 /* update next to alloc since we have filled the ring */
155 rx_ring->next_to_alloc = i;
157 /* Force memory writes to complete before letting h/w
158 * know there are new descriptors to fetch. (Only
159 * applicable for weak-ordered memory model archs,
164 /* notify hardware of new descriptors */
165 writel(i, rx_ring->tail);
170 * fm10k_reuse_rx_page - page flip buffer and store it back on the ring
171 * @rx_ring: rx descriptor ring to store buffers on
172 * @old_buff: donor buffer to have page reused
174 * Synchronizes page for reuse by the interface
176 static void fm10k_reuse_rx_page(struct fm10k_ring *rx_ring,
177 struct fm10k_rx_buffer *old_buff)
179 struct fm10k_rx_buffer *new_buff;
180 u16 nta = rx_ring->next_to_alloc;
182 new_buff = &rx_ring->rx_buffer[nta];
184 /* update, and store next to alloc */
186 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
188 /* transfer page from old buffer to new buffer */
189 *new_buff = *old_buff;
191 /* sync the buffer for use by the device */
192 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
193 old_buff->page_offset,
198 static inline bool fm10k_page_is_reserved(struct page *page)
200 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
203 static bool fm10k_can_reuse_rx_page(struct fm10k_rx_buffer *rx_buffer,
205 unsigned int __maybe_unused truesize)
207 /* avoid re-using remote pages */
208 if (unlikely(fm10k_page_is_reserved(page)))
211 #if (PAGE_SIZE < 8192)
212 /* if we are only owner of page we can reuse it */
213 if (unlikely(page_count(page) != 1))
216 /* flip page offset to other buffer */
217 rx_buffer->page_offset ^= FM10K_RX_BUFSZ;
219 /* move offset up to the next cache line */
220 rx_buffer->page_offset += truesize;
222 if (rx_buffer->page_offset > (PAGE_SIZE - FM10K_RX_BUFSZ))
226 /* Even if we own the page, we are not allowed to use atomic_set()
227 * This would break get_page_unless_zero() users.
235 * fm10k_add_rx_frag - Add contents of Rx buffer to sk_buff
236 * @rx_buffer: buffer containing page to add
237 * @size: packet size from rx_desc
238 * @rx_desc: descriptor containing length of buffer written by hardware
239 * @skb: sk_buff to place the data into
241 * This function will add the data contained in rx_buffer->page to the skb.
242 * This is done either through a direct copy if the data in the buffer is
243 * less than the skb header size, otherwise it will just attach the page as
246 * The function will then update the page offset if necessary and return
247 * true if the buffer can be reused by the interface.
249 static bool fm10k_add_rx_frag(struct fm10k_rx_buffer *rx_buffer,
251 union fm10k_rx_desc *rx_desc,
254 struct page *page = rx_buffer->page;
255 unsigned char *va = page_address(page) + rx_buffer->page_offset;
256 #if (PAGE_SIZE < 8192)
257 unsigned int truesize = FM10K_RX_BUFSZ;
259 unsigned int truesize = ALIGN(size, 512);
261 unsigned int pull_len;
263 if (unlikely(skb_is_nonlinear(skb)))
266 if (likely(size <= FM10K_RX_HDR_LEN)) {
267 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
269 /* page is not reserved, we can reuse buffer as-is */
270 if (likely(!fm10k_page_is_reserved(page)))
273 /* this page cannot be reused so discard it */
278 /* we need the header to contain the greater of either ETH_HLEN or
279 * 60 bytes if the skb->len is less than 60 for skb_pad.
281 pull_len = eth_get_headlen(va, FM10K_RX_HDR_LEN);
283 /* align pull length to size of long to optimize memcpy performance */
284 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
286 /* update all of the pointers */
291 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
292 (unsigned long)va & ~PAGE_MASK, size, truesize);
294 return fm10k_can_reuse_rx_page(rx_buffer, page, truesize);
297 static struct sk_buff *fm10k_fetch_rx_buffer(struct fm10k_ring *rx_ring,
298 union fm10k_rx_desc *rx_desc,
301 unsigned int size = le16_to_cpu(rx_desc->w.length);
302 struct fm10k_rx_buffer *rx_buffer;
305 rx_buffer = &rx_ring->rx_buffer[rx_ring->next_to_clean];
306 page = rx_buffer->page;
310 void *page_addr = page_address(page) +
311 rx_buffer->page_offset;
313 /* prefetch first cache line of first page */
315 #if L1_CACHE_BYTES < 128
316 prefetch(page_addr + L1_CACHE_BYTES);
319 /* allocate a skb to store the frags */
320 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
322 if (unlikely(!skb)) {
323 rx_ring->rx_stats.alloc_failed++;
327 /* we will be copying header into skb->data in
328 * pskb_may_pull so it is in our interest to prefetch
329 * it now to avoid a possible cache miss
331 prefetchw(skb->data);
334 /* we are reusing so sync this buffer for CPU use */
335 dma_sync_single_range_for_cpu(rx_ring->dev,
337 rx_buffer->page_offset,
341 /* pull page into skb */
342 if (fm10k_add_rx_frag(rx_buffer, size, rx_desc, skb)) {
343 /* hand second half of page back to the ring */
344 fm10k_reuse_rx_page(rx_ring, rx_buffer);
346 /* we are not reusing the buffer so unmap it */
347 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
348 PAGE_SIZE, DMA_FROM_DEVICE);
351 /* clear contents of rx_buffer */
352 rx_buffer->page = NULL;
357 static inline void fm10k_rx_checksum(struct fm10k_ring *ring,
358 union fm10k_rx_desc *rx_desc,
361 skb_checksum_none_assert(skb);
363 /* Rx checksum disabled via ethtool */
364 if (!(ring->netdev->features & NETIF_F_RXCSUM))
367 /* TCP/UDP checksum error bit is set */
368 if (fm10k_test_staterr(rx_desc,
369 FM10K_RXD_STATUS_L4E |
370 FM10K_RXD_STATUS_L4E2 |
371 FM10K_RXD_STATUS_IPE |
372 FM10K_RXD_STATUS_IPE2)) {
373 ring->rx_stats.csum_err++;
377 /* It must be a TCP or UDP packet with a valid checksum */
378 if (fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS2))
379 skb->encapsulation = true;
380 else if (!fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS))
383 skb->ip_summed = CHECKSUM_UNNECESSARY;
385 ring->rx_stats.csum_good++;
388 #define FM10K_RSS_L4_TYPES_MASK \
389 (BIT(FM10K_RSSTYPE_IPV4_TCP) | \
390 BIT(FM10K_RSSTYPE_IPV4_UDP) | \
391 BIT(FM10K_RSSTYPE_IPV6_TCP) | \
392 BIT(FM10K_RSSTYPE_IPV6_UDP))
394 static inline void fm10k_rx_hash(struct fm10k_ring *ring,
395 union fm10k_rx_desc *rx_desc,
400 if (!(ring->netdev->features & NETIF_F_RXHASH))
403 rss_type = le16_to_cpu(rx_desc->w.pkt_info) & FM10K_RXD_RSSTYPE_MASK;
407 skb_set_hash(skb, le32_to_cpu(rx_desc->d.rss),
408 (BIT(rss_type) & FM10K_RSS_L4_TYPES_MASK) ?
409 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
412 static void fm10k_type_trans(struct fm10k_ring *rx_ring,
413 union fm10k_rx_desc __maybe_unused *rx_desc,
416 struct net_device *dev = rx_ring->netdev;
417 struct fm10k_l2_accel *l2_accel = rcu_dereference_bh(rx_ring->l2_accel);
419 /* check to see if DGLORT belongs to a MACVLAN */
421 u16 idx = le16_to_cpu(FM10K_CB(skb)->fi.w.dglort) - 1;
423 idx -= l2_accel->dglort;
424 if (idx < l2_accel->size && l2_accel->macvlan[idx])
425 dev = l2_accel->macvlan[idx];
430 /* Record Rx queue, or update macvlan statistics */
432 skb_record_rx_queue(skb, rx_ring->queue_index);
434 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
437 skb->protocol = eth_type_trans(skb, dev);
441 * fm10k_process_skb_fields - Populate skb header fields from Rx descriptor
442 * @rx_ring: rx descriptor ring packet is being transacted on
443 * @rx_desc: pointer to the EOP Rx descriptor
444 * @skb: pointer to current skb being populated
446 * This function checks the ring, descriptor, and packet information in
447 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
448 * other fields within the skb.
450 static unsigned int fm10k_process_skb_fields(struct fm10k_ring *rx_ring,
451 union fm10k_rx_desc *rx_desc,
454 unsigned int len = skb->len;
456 fm10k_rx_hash(rx_ring, rx_desc, skb);
458 fm10k_rx_checksum(rx_ring, rx_desc, skb);
460 FM10K_CB(skb)->tstamp = rx_desc->q.timestamp;
462 FM10K_CB(skb)->fi.w.vlan = rx_desc->w.vlan;
464 FM10K_CB(skb)->fi.d.glort = rx_desc->d.glort;
466 if (rx_desc->w.vlan) {
467 u16 vid = le16_to_cpu(rx_desc->w.vlan);
469 if ((vid & VLAN_VID_MASK) != rx_ring->vid)
470 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
471 else if (vid & VLAN_PRIO_MASK)
472 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
473 vid & VLAN_PRIO_MASK);
476 fm10k_type_trans(rx_ring, rx_desc, skb);
482 * fm10k_is_non_eop - process handling of non-EOP buffers
483 * @rx_ring: Rx ring being processed
484 * @rx_desc: Rx descriptor for current buffer
486 * This function updates next to clean. If the buffer is an EOP buffer
487 * this function exits returning false, otherwise it will place the
488 * sk_buff in the next buffer to be chained and return true indicating
489 * that this is in fact a non-EOP buffer.
491 static bool fm10k_is_non_eop(struct fm10k_ring *rx_ring,
492 union fm10k_rx_desc *rx_desc)
494 u32 ntc = rx_ring->next_to_clean + 1;
496 /* fetch, update, and store next to clean */
497 ntc = (ntc < rx_ring->count) ? ntc : 0;
498 rx_ring->next_to_clean = ntc;
500 prefetch(FM10K_RX_DESC(rx_ring, ntc));
502 if (likely(fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_EOP)))
509 * fm10k_cleanup_headers - Correct corrupted or empty headers
510 * @rx_ring: rx descriptor ring packet is being transacted on
511 * @rx_desc: pointer to the EOP Rx descriptor
512 * @skb: pointer to current skb being fixed
514 * Address the case where we are pulling data in on pages only
515 * and as such no data is present in the skb header.
517 * In addition if skb is not at least 60 bytes we need to pad it so that
518 * it is large enough to qualify as a valid Ethernet frame.
520 * Returns true if an error was encountered and skb was freed.
522 static bool fm10k_cleanup_headers(struct fm10k_ring *rx_ring,
523 union fm10k_rx_desc *rx_desc,
526 if (unlikely((fm10k_test_staterr(rx_desc,
527 FM10K_RXD_STATUS_RXE)))) {
528 #define FM10K_TEST_RXD_BIT(rxd, bit) \
529 ((rxd)->w.csum_err & cpu_to_le16(bit))
530 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_SWITCH_ERROR))
531 rx_ring->rx_stats.switch_errors++;
532 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_NO_DESCRIPTOR))
533 rx_ring->rx_stats.drops++;
534 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_PP_ERROR))
535 rx_ring->rx_stats.pp_errors++;
536 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_SWITCH_READY))
537 rx_ring->rx_stats.link_errors++;
538 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_TOO_BIG))
539 rx_ring->rx_stats.length_errors++;
540 dev_kfree_skb_any(skb);
541 rx_ring->rx_stats.errors++;
545 /* if eth_skb_pad returns an error the skb was freed */
546 if (eth_skb_pad(skb))
553 * fm10k_receive_skb - helper function to handle rx indications
554 * @q_vector: structure containing interrupt and ring information
555 * @skb: packet to send up
557 static void fm10k_receive_skb(struct fm10k_q_vector *q_vector,
560 napi_gro_receive(&q_vector->napi, skb);
563 static int fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
564 struct fm10k_ring *rx_ring,
567 struct sk_buff *skb = rx_ring->skb;
568 unsigned int total_bytes = 0, total_packets = 0;
569 u16 cleaned_count = fm10k_desc_unused(rx_ring);
571 while (likely(total_packets < budget)) {
572 union fm10k_rx_desc *rx_desc;
574 /* return some buffers to hardware, one at a time is too slow */
575 if (cleaned_count >= FM10K_RX_BUFFER_WRITE) {
576 fm10k_alloc_rx_buffers(rx_ring, cleaned_count);
580 rx_desc = FM10K_RX_DESC(rx_ring, rx_ring->next_to_clean);
582 if (!rx_desc->d.staterr)
585 /* This memory barrier is needed to keep us from reading
586 * any other fields out of the rx_desc until we know the
587 * descriptor has been written back
591 /* retrieve a buffer from the ring */
592 skb = fm10k_fetch_rx_buffer(rx_ring, rx_desc, skb);
594 /* exit if we failed to retrieve a buffer */
600 /* fetch next buffer in frame if non-eop */
601 if (fm10k_is_non_eop(rx_ring, rx_desc))
604 /* verify the packet layout is correct */
605 if (fm10k_cleanup_headers(rx_ring, rx_desc, skb)) {
610 /* populate checksum, timestamp, VLAN, and protocol */
611 total_bytes += fm10k_process_skb_fields(rx_ring, rx_desc, skb);
613 fm10k_receive_skb(q_vector, skb);
615 /* reset skb pointer */
618 /* update budget accounting */
622 /* place incomplete frames back on ring for completion */
625 u64_stats_update_begin(&rx_ring->syncp);
626 rx_ring->stats.packets += total_packets;
627 rx_ring->stats.bytes += total_bytes;
628 u64_stats_update_end(&rx_ring->syncp);
629 q_vector->rx.total_packets += total_packets;
630 q_vector->rx.total_bytes += total_bytes;
632 return total_packets;
635 #define VXLAN_HLEN (sizeof(struct udphdr) + 8)
636 static struct ethhdr *fm10k_port_is_vxlan(struct sk_buff *skb)
638 struct fm10k_intfc *interface = netdev_priv(skb->dev);
639 struct fm10k_udp_port *vxlan_port;
641 /* we can only offload a vxlan if we recognize it as such */
642 vxlan_port = list_first_entry_or_null(&interface->vxlan_port,
643 struct fm10k_udp_port, list);
647 if (vxlan_port->port != udp_hdr(skb)->dest)
650 /* return offset of udp_hdr plus 8 bytes for VXLAN header */
651 return (struct ethhdr *)(skb_transport_header(skb) + VXLAN_HLEN);
654 #define FM10K_NVGRE_RESERVED0_FLAGS htons(0x9FFF)
655 #define NVGRE_TNI htons(0x2000)
656 struct fm10k_nvgre_hdr {
662 static struct ethhdr *fm10k_gre_is_nvgre(struct sk_buff *skb)
664 struct fm10k_nvgre_hdr *nvgre_hdr;
665 int hlen = ip_hdrlen(skb);
667 /* currently only IPv4 is supported due to hlen above */
668 if (vlan_get_protocol(skb) != htons(ETH_P_IP))
671 /* our transport header should be NVGRE */
672 nvgre_hdr = (struct fm10k_nvgre_hdr *)(skb_network_header(skb) + hlen);
674 /* verify all reserved flags are 0 */
675 if (nvgre_hdr->flags & FM10K_NVGRE_RESERVED0_FLAGS)
678 /* report start of ethernet header */
679 if (nvgre_hdr->flags & NVGRE_TNI)
680 return (struct ethhdr *)(nvgre_hdr + 1);
682 return (struct ethhdr *)(&nvgre_hdr->tni);
685 __be16 fm10k_tx_encap_offload(struct sk_buff *skb)
687 u8 l4_hdr = 0, inner_l4_hdr = 0, inner_l4_hlen;
688 struct ethhdr *eth_hdr;
690 if (skb->inner_protocol_type != ENCAP_TYPE_ETHER ||
691 skb->inner_protocol != htons(ETH_P_TEB))
694 switch (vlan_get_protocol(skb)) {
695 case htons(ETH_P_IP):
696 l4_hdr = ip_hdr(skb)->protocol;
698 case htons(ETH_P_IPV6):
699 l4_hdr = ipv6_hdr(skb)->nexthdr;
707 eth_hdr = fm10k_port_is_vxlan(skb);
710 eth_hdr = fm10k_gre_is_nvgre(skb);
719 switch (eth_hdr->h_proto) {
720 case htons(ETH_P_IP):
721 inner_l4_hdr = inner_ip_hdr(skb)->protocol;
723 case htons(ETH_P_IPV6):
724 inner_l4_hdr = inner_ipv6_hdr(skb)->nexthdr;
730 switch (inner_l4_hdr) {
732 inner_l4_hlen = inner_tcp_hdrlen(skb);
741 /* The hardware allows tunnel offloads only if the combined inner and
742 * outer header is 184 bytes or less
744 if (skb_inner_transport_header(skb) + inner_l4_hlen -
745 skb_mac_header(skb) > FM10K_TUNNEL_HEADER_LENGTH)
748 return eth_hdr->h_proto;
751 static int fm10k_tso(struct fm10k_ring *tx_ring,
752 struct fm10k_tx_buffer *first)
754 struct sk_buff *skb = first->skb;
755 struct fm10k_tx_desc *tx_desc;
759 if (skb->ip_summed != CHECKSUM_PARTIAL)
762 if (!skb_is_gso(skb))
765 /* compute header lengths */
766 if (skb->encapsulation) {
767 if (!fm10k_tx_encap_offload(skb))
769 th = skb_inner_transport_header(skb);
771 th = skb_transport_header(skb);
774 /* compute offset from SOF to transport header and add header len */
775 hdrlen = (th - skb->data) + (((struct tcphdr *)th)->doff << 2);
777 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
779 /* update gso size and bytecount with header size */
780 first->gso_segs = skb_shinfo(skb)->gso_segs;
781 first->bytecount += (first->gso_segs - 1) * hdrlen;
783 /* populate Tx descriptor header size and mss */
784 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
785 tx_desc->hdrlen = hdrlen;
786 tx_desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
791 tx_ring->netdev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
793 netdev_err(tx_ring->netdev,
794 "TSO requested for unsupported tunnel, disabling offload\n");
798 static void fm10k_tx_csum(struct fm10k_ring *tx_ring,
799 struct fm10k_tx_buffer *first)
801 struct sk_buff *skb = first->skb;
802 struct fm10k_tx_desc *tx_desc;
805 struct ipv6hdr *ipv6;
813 if (skb->ip_summed != CHECKSUM_PARTIAL)
816 if (skb->encapsulation) {
817 protocol = fm10k_tx_encap_offload(skb);
819 if (skb_checksum_help(skb)) {
820 dev_warn(tx_ring->dev,
821 "failed to offload encap csum!\n");
822 tx_ring->tx_stats.csum_err++;
826 network_hdr.raw = skb_inner_network_header(skb);
827 transport_hdr = skb_inner_transport_header(skb);
829 protocol = vlan_get_protocol(skb);
830 network_hdr.raw = skb_network_header(skb);
831 transport_hdr = skb_transport_header(skb);
835 case htons(ETH_P_IP):
836 l4_hdr = network_hdr.ipv4->protocol;
838 case htons(ETH_P_IPV6):
839 l4_hdr = network_hdr.ipv6->nexthdr;
840 if (likely((transport_hdr - network_hdr.raw) ==
841 sizeof(struct ipv6hdr)))
843 ipv6_skip_exthdr(skb, network_hdr.raw - skb->data +
844 sizeof(struct ipv6hdr),
846 if (unlikely(frag_off))
847 l4_hdr = NEXTHDR_FRAGMENT;
858 if (skb->encapsulation)
862 if (unlikely(net_ratelimit())) {
863 dev_warn(tx_ring->dev,
864 "partial checksum, version=%d l4 proto=%x\n",
867 skb_checksum_help(skb);
868 tx_ring->tx_stats.csum_err++;
872 /* update TX checksum flag */
873 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
874 tx_ring->tx_stats.csum_good++;
877 /* populate Tx descriptor header size and mss */
878 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
883 #define FM10K_SET_FLAG(_input, _flag, _result) \
884 ((_flag <= _result) ? \
885 ((u32)(_input & _flag) * (_result / _flag)) : \
886 ((u32)(_input & _flag) / (_flag / _result)))
888 static u8 fm10k_tx_desc_flags(struct sk_buff *skb, u32 tx_flags)
890 /* set type for advanced descriptor with frame checksum insertion */
893 /* set checksum offload bits */
894 desc_flags |= FM10K_SET_FLAG(tx_flags, FM10K_TX_FLAGS_CSUM,
895 FM10K_TXD_FLAG_CSUM);
900 static bool fm10k_tx_desc_push(struct fm10k_ring *tx_ring,
901 struct fm10k_tx_desc *tx_desc, u16 i,
902 dma_addr_t dma, unsigned int size, u8 desc_flags)
904 /* set RS and INT for last frame in a cache line */
905 if ((++i & (FM10K_TXD_WB_FIFO_SIZE - 1)) == 0)
906 desc_flags |= FM10K_TXD_FLAG_RS | FM10K_TXD_FLAG_INT;
908 /* record values to descriptor */
909 tx_desc->buffer_addr = cpu_to_le64(dma);
910 tx_desc->flags = desc_flags;
911 tx_desc->buflen = cpu_to_le16(size);
913 /* return true if we just wrapped the ring */
914 return i == tx_ring->count;
917 static int __fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
919 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
921 /* Memory barrier before checking head and tail */
924 /* Check again in a case another CPU has just made room available */
925 if (likely(fm10k_desc_unused(tx_ring) < size))
928 /* A reprieve! - use start_queue because it doesn't call schedule */
929 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
930 ++tx_ring->tx_stats.restart_queue;
934 static inline int fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
936 if (likely(fm10k_desc_unused(tx_ring) >= size))
938 return __fm10k_maybe_stop_tx(tx_ring, size);
941 static void fm10k_tx_map(struct fm10k_ring *tx_ring,
942 struct fm10k_tx_buffer *first)
944 struct sk_buff *skb = first->skb;
945 struct fm10k_tx_buffer *tx_buffer;
946 struct fm10k_tx_desc *tx_desc;
947 struct skb_frag_struct *frag;
950 unsigned int data_len, size;
951 u32 tx_flags = first->tx_flags;
952 u16 i = tx_ring->next_to_use;
953 u8 flags = fm10k_tx_desc_flags(skb, tx_flags);
955 tx_desc = FM10K_TX_DESC(tx_ring, i);
957 /* add HW VLAN tag */
958 if (skb_vlan_tag_present(skb))
959 tx_desc->vlan = cpu_to_le16(skb_vlan_tag_get(skb));
963 size = skb_headlen(skb);
966 dma = dma_map_single(tx_ring->dev, data, size, DMA_TO_DEVICE);
968 data_len = skb->data_len;
971 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
972 if (dma_mapping_error(tx_ring->dev, dma))
975 /* record length, and DMA address */
976 dma_unmap_len_set(tx_buffer, len, size);
977 dma_unmap_addr_set(tx_buffer, dma, dma);
979 while (unlikely(size > FM10K_MAX_DATA_PER_TXD)) {
980 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++, dma,
981 FM10K_MAX_DATA_PER_TXD, flags)) {
982 tx_desc = FM10K_TX_DESC(tx_ring, 0);
986 dma += FM10K_MAX_DATA_PER_TXD;
987 size -= FM10K_MAX_DATA_PER_TXD;
990 if (likely(!data_len))
993 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++,
995 tx_desc = FM10K_TX_DESC(tx_ring, 0);
999 size = skb_frag_size(frag);
1002 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1005 tx_buffer = &tx_ring->tx_buffer[i];
1008 /* write last descriptor with LAST bit set */
1009 flags |= FM10K_TXD_FLAG_LAST;
1011 if (fm10k_tx_desc_push(tx_ring, tx_desc, i++, dma, size, flags))
1014 /* record bytecount for BQL */
1015 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1017 /* record SW timestamp if HW timestamp is not available */
1018 skb_tx_timestamp(first->skb);
1020 /* Force memory writes to complete before letting h/w know there
1021 * are new descriptors to fetch. (Only applicable for weak-ordered
1022 * memory model archs, such as IA-64).
1024 * We also need this memory barrier to make certain all of the
1025 * status bits have been updated before next_to_watch is written.
1029 /* set next_to_watch value indicating a packet is present */
1030 first->next_to_watch = tx_desc;
1032 tx_ring->next_to_use = i;
1034 /* Make sure there is space in the ring for the next send. */
1035 fm10k_maybe_stop_tx(tx_ring, DESC_NEEDED);
1037 /* notify HW of packet */
1038 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
1039 writel(i, tx_ring->tail);
1041 /* we need this if more than one processor can write to our tail
1042 * at a time, it synchronizes IO on IA64/Altix systems
1049 dev_err(tx_ring->dev, "TX DMA map failed\n");
1051 /* clear dma mappings for failed tx_buffer map */
1053 tx_buffer = &tx_ring->tx_buffer[i];
1054 fm10k_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1055 if (tx_buffer == first)
1062 tx_ring->next_to_use = i;
1065 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
1066 struct fm10k_ring *tx_ring)
1068 u16 count = TXD_USE_COUNT(skb_headlen(skb));
1069 struct fm10k_tx_buffer *first;
1074 /* need: 1 descriptor per page * PAGE_SIZE/FM10K_MAX_DATA_PER_TXD,
1075 * + 1 desc for skb_headlen/FM10K_MAX_DATA_PER_TXD,
1076 * + 2 desc gap to keep tail from touching head
1077 * otherwise try next time
1079 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
1080 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
1082 if (fm10k_maybe_stop_tx(tx_ring, count + 3)) {
1083 tx_ring->tx_stats.tx_busy++;
1084 return NETDEV_TX_BUSY;
1087 /* record the location of the first descriptor for this packet */
1088 first = &tx_ring->tx_buffer[tx_ring->next_to_use];
1090 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
1091 first->gso_segs = 1;
1093 /* record initial flags and protocol */
1094 first->tx_flags = tx_flags;
1096 tso = fm10k_tso(tx_ring, first);
1100 fm10k_tx_csum(tx_ring, first);
1102 fm10k_tx_map(tx_ring, first);
1104 return NETDEV_TX_OK;
1107 dev_kfree_skb_any(first->skb);
1110 return NETDEV_TX_OK;
1113 static u64 fm10k_get_tx_completed(struct fm10k_ring *ring)
1115 return ring->stats.packets;
1119 * fm10k_get_tx_pending - how many Tx descriptors not processed
1120 * @ring: the ring structure
1121 * @in_sw: is tx_pending being checked in SW or in HW?
1123 u64 fm10k_get_tx_pending(struct fm10k_ring *ring, bool in_sw)
1125 struct fm10k_intfc *interface = ring->q_vector->interface;
1126 struct fm10k_hw *hw = &interface->hw;
1129 if (likely(in_sw)) {
1130 head = ring->next_to_clean;
1131 tail = ring->next_to_use;
1133 head = fm10k_read_reg(hw, FM10K_TDH(ring->reg_idx));
1134 tail = fm10k_read_reg(hw, FM10K_TDT(ring->reg_idx));
1137 return ((head <= tail) ? tail : tail + ring->count) - head;
1140 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring)
1142 u32 tx_done = fm10k_get_tx_completed(tx_ring);
1143 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1144 u32 tx_pending = fm10k_get_tx_pending(tx_ring, true);
1146 clear_check_for_tx_hang(tx_ring);
1148 /* Check for a hung queue, but be thorough. This verifies
1149 * that a transmit has been completed since the previous
1150 * check AND there is at least one packet pending. By
1151 * requiring this to fail twice we avoid races with
1152 * clearing the ARMED bit and conditions where we
1153 * run the check_tx_hang logic with a transmit completion
1154 * pending but without time to complete it yet.
1156 if (!tx_pending || (tx_done_old != tx_done)) {
1157 /* update completed stats and continue */
1158 tx_ring->tx_stats.tx_done_old = tx_done;
1159 /* reset the countdown */
1160 clear_bit(__FM10K_HANG_CHECK_ARMED, tx_ring->state);
1165 /* make sure it is true for two checks in a row */
1166 return test_and_set_bit(__FM10K_HANG_CHECK_ARMED, tx_ring->state);
1170 * fm10k_tx_timeout_reset - initiate reset due to Tx timeout
1171 * @interface: driver private struct
1173 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface)
1175 /* Do the reset outside of interrupt context */
1176 if (!test_bit(__FM10K_DOWN, interface->state)) {
1177 interface->tx_timeout_count++;
1178 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1179 fm10k_service_event_schedule(interface);
1184 * fm10k_clean_tx_irq - Reclaim resources after transmit completes
1185 * @q_vector: structure containing interrupt and ring information
1186 * @tx_ring: tx ring to clean
1187 * @napi_budget: Used to determine if we are in netpoll
1189 static bool fm10k_clean_tx_irq(struct fm10k_q_vector *q_vector,
1190 struct fm10k_ring *tx_ring, int napi_budget)
1192 struct fm10k_intfc *interface = q_vector->interface;
1193 struct fm10k_tx_buffer *tx_buffer;
1194 struct fm10k_tx_desc *tx_desc;
1195 unsigned int total_bytes = 0, total_packets = 0;
1196 unsigned int budget = q_vector->tx.work_limit;
1197 unsigned int i = tx_ring->next_to_clean;
1199 if (test_bit(__FM10K_DOWN, interface->state))
1202 tx_buffer = &tx_ring->tx_buffer[i];
1203 tx_desc = FM10K_TX_DESC(tx_ring, i);
1204 i -= tx_ring->count;
1207 struct fm10k_tx_desc *eop_desc = tx_buffer->next_to_watch;
1209 /* if next_to_watch is not set then there is no work pending */
1213 /* prevent any other reads prior to eop_desc */
1216 /* if DD is not set pending work has not been completed */
1217 if (!(eop_desc->flags & FM10K_TXD_FLAG_DONE))
1220 /* clear next_to_watch to prevent false hangs */
1221 tx_buffer->next_to_watch = NULL;
1223 /* update the statistics for this packet */
1224 total_bytes += tx_buffer->bytecount;
1225 total_packets += tx_buffer->gso_segs;
1228 napi_consume_skb(tx_buffer->skb, napi_budget);
1230 /* unmap skb header data */
1231 dma_unmap_single(tx_ring->dev,
1232 dma_unmap_addr(tx_buffer, dma),
1233 dma_unmap_len(tx_buffer, len),
1236 /* clear tx_buffer data */
1237 tx_buffer->skb = NULL;
1238 dma_unmap_len_set(tx_buffer, len, 0);
1240 /* unmap remaining buffers */
1241 while (tx_desc != eop_desc) {
1246 i -= tx_ring->count;
1247 tx_buffer = tx_ring->tx_buffer;
1248 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1251 /* unmap any remaining paged data */
1252 if (dma_unmap_len(tx_buffer, len)) {
1253 dma_unmap_page(tx_ring->dev,
1254 dma_unmap_addr(tx_buffer, dma),
1255 dma_unmap_len(tx_buffer, len),
1257 dma_unmap_len_set(tx_buffer, len, 0);
1261 /* move us one more past the eop_desc for start of next pkt */
1266 i -= tx_ring->count;
1267 tx_buffer = tx_ring->tx_buffer;
1268 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1271 /* issue prefetch for next Tx descriptor */
1274 /* update budget accounting */
1276 } while (likely(budget));
1278 i += tx_ring->count;
1279 tx_ring->next_to_clean = i;
1280 u64_stats_update_begin(&tx_ring->syncp);
1281 tx_ring->stats.bytes += total_bytes;
1282 tx_ring->stats.packets += total_packets;
1283 u64_stats_update_end(&tx_ring->syncp);
1284 q_vector->tx.total_bytes += total_bytes;
1285 q_vector->tx.total_packets += total_packets;
1287 if (check_for_tx_hang(tx_ring) && fm10k_check_tx_hang(tx_ring)) {
1288 /* schedule immediate reset if we believe we hung */
1289 struct fm10k_hw *hw = &interface->hw;
1291 netif_err(interface, drv, tx_ring->netdev,
1292 "Detected Tx Unit Hang\n"
1294 " TDH, TDT <%x>, <%x>\n"
1295 " next_to_use <%x>\n"
1296 " next_to_clean <%x>\n",
1297 tx_ring->queue_index,
1298 fm10k_read_reg(hw, FM10K_TDH(tx_ring->reg_idx)),
1299 fm10k_read_reg(hw, FM10K_TDT(tx_ring->reg_idx)),
1300 tx_ring->next_to_use, i);
1302 netif_stop_subqueue(tx_ring->netdev,
1303 tx_ring->queue_index);
1305 netif_info(interface, probe, tx_ring->netdev,
1306 "tx hang %d detected on queue %d, resetting interface\n",
1307 interface->tx_timeout_count + 1,
1308 tx_ring->queue_index);
1310 fm10k_tx_timeout_reset(interface);
1312 /* the netdev is about to reset, no point in enabling stuff */
1316 /* notify netdev of completed buffers */
1317 netdev_tx_completed_queue(txring_txq(tx_ring),
1318 total_packets, total_bytes);
1320 #define TX_WAKE_THRESHOLD min_t(u16, FM10K_MIN_TXD - 1, DESC_NEEDED * 2)
1321 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1322 (fm10k_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1323 /* Make sure that anybody stopping the queue after this
1324 * sees the new next_to_clean.
1327 if (__netif_subqueue_stopped(tx_ring->netdev,
1328 tx_ring->queue_index) &&
1329 !test_bit(__FM10K_DOWN, interface->state)) {
1330 netif_wake_subqueue(tx_ring->netdev,
1331 tx_ring->queue_index);
1332 ++tx_ring->tx_stats.restart_queue;
1340 * fm10k_update_itr - update the dynamic ITR value based on packet size
1342 * Stores a new ITR value based on strictly on packet size. The
1343 * divisors and thresholds used by this function were determined based
1344 * on theoretical maximum wire speed and testing data, in order to
1345 * minimize response time while increasing bulk throughput.
1347 * @ring_container: Container for rings to have ITR updated
1349 static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
1351 unsigned int avg_wire_size, packets, itr_round;
1353 /* Only update ITR if we are using adaptive setting */
1354 if (!ITR_IS_ADAPTIVE(ring_container->itr))
1357 packets = ring_container->total_packets;
1361 avg_wire_size = ring_container->total_bytes / packets;
1363 /* The following is a crude approximation of:
1364 * wmem_default / (size + overhead) = desired_pkts_per_int
1365 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
1366 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
1368 * Assuming wmem_default is 212992 and overhead is 640 bytes per
1369 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
1372 * (34 * (size + 24)) / (size + 640) = ITR
1374 * We first do some math on the packet size and then finally bitshift
1375 * by 8 after rounding up. We also have to account for PCIe link speed
1376 * difference as ITR scales based on this.
1378 if (avg_wire_size <= 360) {
1379 /* Start at 250K ints/sec and gradually drop to 77K ints/sec */
1381 avg_wire_size += 376;
1382 } else if (avg_wire_size <= 1152) {
1383 /* 77K ints/sec to 45K ints/sec */
1385 avg_wire_size += 2176;
1386 } else if (avg_wire_size <= 1920) {
1387 /* 45K ints/sec to 38K ints/sec */
1388 avg_wire_size += 4480;
1390 /* plateau at a limit of 38K ints/sec */
1391 avg_wire_size = 6656;
1394 /* Perform final bitshift for division after rounding up to ensure
1395 * that the calculation will never get below a 1. The bit shift
1396 * accounts for changes in the ITR due to PCIe link speed.
1398 itr_round = READ_ONCE(ring_container->itr_scale) + 8;
1399 avg_wire_size += BIT(itr_round) - 1;
1400 avg_wire_size >>= itr_round;
1402 /* write back value and retain adaptive flag */
1403 ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;
1406 ring_container->total_bytes = 0;
1407 ring_container->total_packets = 0;
1410 static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
1412 /* Enable auto-mask and clear the current mask */
1413 u32 itr = FM10K_ITR_ENABLE;
1416 fm10k_update_itr(&q_vector->tx);
1419 fm10k_update_itr(&q_vector->rx);
1421 /* Store Tx itr in timer slot 0 */
1422 itr |= (q_vector->tx.itr & FM10K_ITR_MAX);
1424 /* Shift Rx itr to timer slot 1 */
1425 itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
1427 /* Write the final value to the ITR register */
1428 writel(itr, q_vector->itr);
1431 static int fm10k_poll(struct napi_struct *napi, int budget)
1433 struct fm10k_q_vector *q_vector =
1434 container_of(napi, struct fm10k_q_vector, napi);
1435 struct fm10k_ring *ring;
1436 int per_ring_budget, work_done = 0;
1437 bool clean_complete = true;
1439 fm10k_for_each_ring(ring, q_vector->tx) {
1440 if (!fm10k_clean_tx_irq(q_vector, ring, budget))
1441 clean_complete = false;
1444 /* Handle case where we are called by netpoll with a budget of 0 */
1448 /* attempt to distribute budget to each queue fairly, but don't
1449 * allow the budget to go below 1 because we'll exit polling
1451 if (q_vector->rx.count > 1)
1452 per_ring_budget = max(budget / q_vector->rx.count, 1);
1454 per_ring_budget = budget;
1456 fm10k_for_each_ring(ring, q_vector->rx) {
1457 int work = fm10k_clean_rx_irq(q_vector, ring, per_ring_budget);
1460 if (work >= per_ring_budget)
1461 clean_complete = false;
1464 /* If all work not completed, return budget and keep polling */
1465 if (!clean_complete)
1468 /* Exit the polling mode, but don't re-enable interrupts if stack might
1469 * poll us due to busy-polling
1471 if (likely(napi_complete_done(napi, work_done)))
1472 fm10k_qv_enable(q_vector);
1474 return min(work_done, budget - 1);
1478 * fm10k_set_qos_queues: Allocate queues for a QOS-enabled device
1479 * @interface: board private structure to initialize
1481 * When QoS (Quality of Service) is enabled, allocate queues for
1482 * each traffic class. If multiqueue isn't available,then abort QoS
1485 * This function handles all combinations of Qos and RSS.
1488 static bool fm10k_set_qos_queues(struct fm10k_intfc *interface)
1490 struct net_device *dev = interface->netdev;
1491 struct fm10k_ring_feature *f;
1495 /* Map queue offset and counts onto allocated tx queues */
1496 pcs = netdev_get_num_tc(dev);
1501 /* set QoS mask and indices */
1502 f = &interface->ring_feature[RING_F_QOS];
1504 f->mask = BIT(fls(pcs - 1)) - 1;
1506 /* determine the upper limit for our current DCB mode */
1507 rss_i = interface->hw.mac.max_queues / pcs;
1508 rss_i = BIT(fls(rss_i) - 1);
1510 /* set RSS mask and indices */
1511 f = &interface->ring_feature[RING_F_RSS];
1512 rss_i = min_t(u16, rss_i, f->limit);
1514 f->mask = BIT(fls(rss_i - 1)) - 1;
1516 /* configure pause class to queue mapping */
1517 for (i = 0; i < pcs; i++)
1518 netdev_set_tc_queue(dev, i, rss_i, rss_i * i);
1520 interface->num_rx_queues = rss_i * pcs;
1521 interface->num_tx_queues = rss_i * pcs;
1527 * fm10k_set_rss_queues: Allocate queues for RSS
1528 * @interface: board private structure to initialize
1530 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
1531 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1534 static bool fm10k_set_rss_queues(struct fm10k_intfc *interface)
1536 struct fm10k_ring_feature *f;
1539 f = &interface->ring_feature[RING_F_RSS];
1540 rss_i = min_t(u16, interface->hw.mac.max_queues, f->limit);
1542 /* record indices and power of 2 mask for RSS */
1544 f->mask = BIT(fls(rss_i - 1)) - 1;
1546 interface->num_rx_queues = rss_i;
1547 interface->num_tx_queues = rss_i;
1553 * fm10k_set_num_queues: Allocate queues for device, feature dependent
1554 * @interface: board private structure to initialize
1556 * This is the top level queue allocation routine. The order here is very
1557 * important, starting with the "most" number of features turned on at once,
1558 * and ending with the smallest set of features. This way large combinations
1559 * can be allocated if they're turned on, and smaller combinations are the
1560 * fallthrough conditions.
1563 static void fm10k_set_num_queues(struct fm10k_intfc *interface)
1565 /* Attempt to setup QoS and RSS first */
1566 if (fm10k_set_qos_queues(interface))
1569 /* If we don't have QoS, just fallback to only RSS. */
1570 fm10k_set_rss_queues(interface);
1574 * fm10k_reset_num_queues - Reset the number of queues to zero
1575 * @interface: board private structure
1577 * This function should be called whenever we need to reset the number of
1578 * queues after an error condition.
1580 static void fm10k_reset_num_queues(struct fm10k_intfc *interface)
1582 interface->num_tx_queues = 0;
1583 interface->num_rx_queues = 0;
1584 interface->num_q_vectors = 0;
1588 * fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
1589 * @interface: board private structure to initialize
1590 * @v_count: q_vectors allocated on interface, used for ring interleaving
1591 * @v_idx: index of vector in interface struct
1592 * @txr_count: total number of Tx rings to allocate
1593 * @txr_idx: index of first Tx ring to allocate
1594 * @rxr_count: total number of Rx rings to allocate
1595 * @rxr_idx: index of first Rx ring to allocate
1597 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1599 static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
1600 unsigned int v_count, unsigned int v_idx,
1601 unsigned int txr_count, unsigned int txr_idx,
1602 unsigned int rxr_count, unsigned int rxr_idx)
1604 struct fm10k_q_vector *q_vector;
1605 struct fm10k_ring *ring;
1608 ring_count = txr_count + rxr_count;
1610 /* allocate q_vector and rings */
1611 q_vector = kzalloc(struct_size(q_vector, ring, ring_count), GFP_KERNEL);
1615 /* initialize NAPI */
1616 netif_napi_add(interface->netdev, &q_vector->napi,
1617 fm10k_poll, NAPI_POLL_WEIGHT);
1619 /* tie q_vector and interface together */
1620 interface->q_vector[v_idx] = q_vector;
1621 q_vector->interface = interface;
1622 q_vector->v_idx = v_idx;
1624 /* initialize pointer to rings */
1625 ring = q_vector->ring;
1627 /* save Tx ring container info */
1628 q_vector->tx.ring = ring;
1629 q_vector->tx.work_limit = FM10K_DEFAULT_TX_WORK;
1630 q_vector->tx.itr = interface->tx_itr;
1631 q_vector->tx.itr_scale = interface->hw.mac.itr_scale;
1632 q_vector->tx.count = txr_count;
1635 /* assign generic ring traits */
1636 ring->dev = &interface->pdev->dev;
1637 ring->netdev = interface->netdev;
1639 /* configure backlink on ring */
1640 ring->q_vector = q_vector;
1642 /* apply Tx specific ring traits */
1643 ring->count = interface->tx_ring_count;
1644 ring->queue_index = txr_idx;
1646 /* assign ring to interface */
1647 interface->tx_ring[txr_idx] = ring;
1649 /* update count and index */
1653 /* push pointer to next ring */
1657 /* save Rx ring container info */
1658 q_vector->rx.ring = ring;
1659 q_vector->rx.itr = interface->rx_itr;
1660 q_vector->rx.itr_scale = interface->hw.mac.itr_scale;
1661 q_vector->rx.count = rxr_count;
1664 /* assign generic ring traits */
1665 ring->dev = &interface->pdev->dev;
1666 ring->netdev = interface->netdev;
1667 rcu_assign_pointer(ring->l2_accel, interface->l2_accel);
1669 /* configure backlink on ring */
1670 ring->q_vector = q_vector;
1672 /* apply Rx specific ring traits */
1673 ring->count = interface->rx_ring_count;
1674 ring->queue_index = rxr_idx;
1676 /* assign ring to interface */
1677 interface->rx_ring[rxr_idx] = ring;
1679 /* update count and index */
1683 /* push pointer to next ring */
1687 fm10k_dbg_q_vector_init(q_vector);
1693 * fm10k_free_q_vector - Free memory allocated for specific interrupt vector
1694 * @interface: board private structure to initialize
1695 * @v_idx: Index of vector to be freed
1697 * This function frees the memory allocated to the q_vector. In addition if
1698 * NAPI is enabled it will delete any references to the NAPI struct prior
1699 * to freeing the q_vector.
1701 static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
1703 struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
1704 struct fm10k_ring *ring;
1706 fm10k_dbg_q_vector_exit(q_vector);
1708 fm10k_for_each_ring(ring, q_vector->tx)
1709 interface->tx_ring[ring->queue_index] = NULL;
1711 fm10k_for_each_ring(ring, q_vector->rx)
1712 interface->rx_ring[ring->queue_index] = NULL;
1714 interface->q_vector[v_idx] = NULL;
1715 netif_napi_del(&q_vector->napi);
1716 kfree_rcu(q_vector, rcu);
1720 * fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
1721 * @interface: board private structure to initialize
1723 * We allocate one q_vector per queue interrupt. If allocation fails we
1726 static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
1728 unsigned int q_vectors = interface->num_q_vectors;
1729 unsigned int rxr_remaining = interface->num_rx_queues;
1730 unsigned int txr_remaining = interface->num_tx_queues;
1731 unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1734 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1735 for (; rxr_remaining; v_idx++) {
1736 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1741 /* update counts and index */
1747 for (; v_idx < q_vectors; v_idx++) {
1748 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1749 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1751 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1758 /* update counts and index */
1759 rxr_remaining -= rqpv;
1760 txr_remaining -= tqpv;
1768 fm10k_reset_num_queues(interface);
1771 fm10k_free_q_vector(interface, v_idx);
1777 * fm10k_free_q_vectors - Free memory allocated for interrupt vectors
1778 * @interface: board private structure to initialize
1780 * This function frees the memory allocated to the q_vectors. In addition if
1781 * NAPI is enabled it will delete any references to the NAPI struct prior
1782 * to freeing the q_vector.
1784 static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
1786 int v_idx = interface->num_q_vectors;
1788 fm10k_reset_num_queues(interface);
1791 fm10k_free_q_vector(interface, v_idx);
1795 * f10k_reset_msix_capability - reset MSI-X capability
1796 * @interface: board private structure to initialize
1798 * Reset the MSI-X capability back to its starting state
1800 static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
1802 pci_disable_msix(interface->pdev);
1803 kfree(interface->msix_entries);
1804 interface->msix_entries = NULL;
1808 * f10k_init_msix_capability - configure MSI-X capability
1809 * @interface: board private structure to initialize
1811 * Attempt to configure the interrupts using the best available
1812 * capabilities of the hardware and the kernel.
1814 static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
1816 struct fm10k_hw *hw = &interface->hw;
1817 int v_budget, vector;
1819 /* It's easy to be greedy for MSI-X vectors, but it really
1820 * doesn't do us much good if we have a lot more vectors
1821 * than CPU's. So let's be conservative and only ask for
1822 * (roughly) the same number of vectors as there are CPU's.
1823 * the default is to use pairs of vectors
1825 v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
1826 v_budget = min_t(u16, v_budget, num_online_cpus());
1828 /* account for vectors not related to queues */
1829 v_budget += NON_Q_VECTORS(hw);
1831 /* At the same time, hardware can only support a maximum of
1832 * hw.mac->max_msix_vectors vectors. With features
1833 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
1834 * descriptor queues supported by our device. Thus, we cap it off in
1835 * those rare cases where the cpu count also exceeds our vector limit.
1837 v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
1839 /* A failure in MSI-X entry allocation is fatal. */
1840 interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
1842 if (!interface->msix_entries)
1845 /* populate entry values */
1846 for (vector = 0; vector < v_budget; vector++)
1847 interface->msix_entries[vector].entry = vector;
1849 /* Attempt to enable MSI-X with requested value */
1850 v_budget = pci_enable_msix_range(interface->pdev,
1851 interface->msix_entries,
1855 kfree(interface->msix_entries);
1856 interface->msix_entries = NULL;
1860 /* record the number of queues available for q_vectors */
1861 interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);
1867 * fm10k_cache_ring_qos - Descriptor ring to register mapping for QoS
1868 * @interface: Interface structure continaining rings and devices
1870 * Cache the descriptor ring offsets for Qos
1872 static bool fm10k_cache_ring_qos(struct fm10k_intfc *interface)
1874 struct net_device *dev = interface->netdev;
1875 int pc, offset, rss_i, i, q_idx;
1876 u16 pc_stride = interface->ring_feature[RING_F_QOS].mask + 1;
1877 u8 num_pcs = netdev_get_num_tc(dev);
1882 rss_i = interface->ring_feature[RING_F_RSS].indices;
1884 for (pc = 0, offset = 0; pc < num_pcs; pc++, offset += rss_i) {
1886 for (i = 0; i < rss_i; i++) {
1887 interface->tx_ring[offset + i]->reg_idx = q_idx;
1888 interface->tx_ring[offset + i]->qos_pc = pc;
1889 interface->rx_ring[offset + i]->reg_idx = q_idx;
1890 interface->rx_ring[offset + i]->qos_pc = pc;
1899 * fm10k_cache_ring_rss - Descriptor ring to register mapping for RSS
1900 * @interface: Interface structure continaining rings and devices
1902 * Cache the descriptor ring offsets for RSS
1904 static void fm10k_cache_ring_rss(struct fm10k_intfc *interface)
1908 for (i = 0; i < interface->num_rx_queues; i++)
1909 interface->rx_ring[i]->reg_idx = i;
1911 for (i = 0; i < interface->num_tx_queues; i++)
1912 interface->tx_ring[i]->reg_idx = i;
1916 * fm10k_assign_rings - Map rings to network devices
1917 * @interface: Interface structure containing rings and devices
1919 * This function is meant to go though and configure both the network
1920 * devices so that they contain rings, and configure the rings so that
1921 * they function with their network devices.
1923 static void fm10k_assign_rings(struct fm10k_intfc *interface)
1925 if (fm10k_cache_ring_qos(interface))
1928 fm10k_cache_ring_rss(interface);
1931 static void fm10k_init_reta(struct fm10k_intfc *interface)
1933 u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
1936 /* If the Rx flow indirection table has been configured manually, we
1937 * need to maintain it when possible.
1939 if (netif_is_rxfh_configured(interface->netdev)) {
1940 for (i = FM10K_RETA_SIZE; i--;) {
1941 reta = interface->reta[i];
1942 if ((((reta << 24) >> 24) < rss_i) &&
1943 (((reta << 16) >> 24) < rss_i) &&
1944 (((reta << 8) >> 24) < rss_i) &&
1945 (((reta) >> 24) < rss_i))
1948 /* this should never happen */
1949 dev_err(&interface->pdev->dev,
1950 "RSS indirection table assigned flows out of queue bounds. Reconfiguring.\n");
1951 goto repopulate_reta;
1954 /* do nothing if all of the elements are in bounds */
1959 fm10k_write_reta(interface, NULL);
1963 * fm10k_init_queueing_scheme - Determine proper queueing scheme
1964 * @interface: board private structure to initialize
1966 * We determine which queueing scheme to use based on...
1967 * - Hardware queue count (num_*_queues)
1968 * - defined by miscellaneous hardware support/features (RSS, etc.)
1970 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
1974 /* Number of supported queues */
1975 fm10k_set_num_queues(interface);
1977 /* Configure MSI-X capability */
1978 err = fm10k_init_msix_capability(interface);
1980 dev_err(&interface->pdev->dev,
1981 "Unable to initialize MSI-X capability\n");
1985 /* Allocate memory for queues */
1986 err = fm10k_alloc_q_vectors(interface);
1988 dev_err(&interface->pdev->dev,
1989 "Unable to allocate queue vectors\n");
1990 goto err_alloc_q_vectors;
1993 /* Map rings to devices, and map devices to physical queues */
1994 fm10k_assign_rings(interface);
1996 /* Initialize RSS redirection table */
1997 fm10k_init_reta(interface);
2001 err_alloc_q_vectors:
2002 fm10k_reset_msix_capability(interface);
2004 fm10k_reset_num_queues(interface);
2009 * fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
2010 * @interface: board private structure to clear queueing scheme on
2012 * We go through and clear queueing specific resources and reset the structure
2013 * to pre-load conditions
2015 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
2017 fm10k_free_q_vectors(interface);
2018 fm10k_reset_msix_capability(interface);