1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
4 #include <linux/etherdevice.h>
5 #include <linux/of_net.h>
11 #include "i40e_diag.h"
13 #include <net/udp_tunnel.h>
14 #include <net/xdp_sock.h>
15 /* All i40e tracepoints are defined by the include below, which
16 * must be included exactly once across the whole kernel with
17 * CREATE_TRACE_POINTS defined
19 #define CREATE_TRACE_POINTS
20 #include "i40e_trace.h"
22 const char i40e_driver_name[] = "i40e";
23 static const char i40e_driver_string[] =
24 "Intel(R) Ethernet Connection XL710 Network Driver";
28 #define DRV_VERSION_MAJOR 2
29 #define DRV_VERSION_MINOR 8
30 #define DRV_VERSION_BUILD 20
31 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
32 __stringify(DRV_VERSION_MINOR) "." \
33 __stringify(DRV_VERSION_BUILD) DRV_KERN
34 const char i40e_driver_version_str[] = DRV_VERSION;
35 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
37 /* a bit of forward declarations */
38 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
39 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
40 static int i40e_add_vsi(struct i40e_vsi *vsi);
41 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
42 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
43 static int i40e_setup_misc_vector(struct i40e_pf *pf);
44 static void i40e_determine_queue_usage(struct i40e_pf *pf);
45 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
46 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired);
47 static int i40e_reset(struct i40e_pf *pf);
48 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
49 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
50 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
51 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
52 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
53 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
54 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
55 static int i40e_get_capabilities(struct i40e_pf *pf,
56 enum i40e_admin_queue_opc list_type);
59 /* i40e_pci_tbl - PCI Device ID Table
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static const struct pci_device_id i40e_pci_tbl[] = {
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
91 /* required last entry */
94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
96 #define I40E_MAX_VF_COUNT 128
97 static int debug = -1;
98 module_param(debug, uint, 0);
99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103 MODULE_LICENSE("GPL v2");
104 MODULE_VERSION(DRV_VERSION);
106 static struct workqueue_struct *i40e_wq;
109 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
110 * @hw: pointer to the HW structure
111 * @mem: ptr to mem struct to fill out
112 * @size: size of memory requested
113 * @alignment: what to align the allocation to
115 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
116 u64 size, u32 alignment)
118 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
120 mem->size = ALIGN(size, alignment);
121 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
130 * i40e_free_dma_mem_d - OS specific memory free for shared code
131 * @hw: pointer to the HW structure
132 * @mem: ptr to mem struct to free
134 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
136 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
138 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
147 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
148 * @hw: pointer to the HW structure
149 * @mem: ptr to mem struct to fill out
150 * @size: size of memory requested
152 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
156 mem->va = kzalloc(size, GFP_KERNEL);
165 * i40e_free_virt_mem_d - OS specific memory free for shared code
166 * @hw: pointer to the HW structure
167 * @mem: ptr to mem struct to free
169 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
171 /* it's ok to kfree a NULL pointer */
180 * i40e_get_lump - find a lump of free generic resource
181 * @pf: board private structure
182 * @pile: the pile of resource to search
183 * @needed: the number of items needed
184 * @id: an owner id to stick on the items assigned
186 * Returns the base item index of the lump, or negative for error
188 * The search_hint trick and lack of advanced fit-finding only work
189 * because we're highly likely to have all the same size lump requests.
190 * Linear search time and any fragmentation should be minimal.
192 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
198 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
199 dev_info(&pf->pdev->dev,
200 "param err: pile=%s needed=%d id=0x%04x\n",
201 pile ? "<valid>" : "<null>", needed, id);
205 /* start the linear search with an imperfect hint */
206 i = pile->search_hint;
207 while (i < pile->num_entries) {
208 /* skip already allocated entries */
209 if (pile->list[i] & I40E_PILE_VALID_BIT) {
214 /* do we have enough in this lump? */
215 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
216 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
221 /* there was enough, so assign it to the requestor */
222 for (j = 0; j < needed; j++)
223 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
225 pile->search_hint = i + j;
229 /* not enough, so skip over it and continue looking */
237 * i40e_put_lump - return a lump of generic resource
238 * @pile: the pile of resource to search
239 * @index: the base item index
240 * @id: the owner id of the items assigned
242 * Returns the count of items in the lump
244 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
246 int valid_id = (id | I40E_PILE_VALID_BIT);
250 if (!pile || index >= pile->num_entries)
254 i < pile->num_entries && pile->list[i] == valid_id;
260 if (count && index < pile->search_hint)
261 pile->search_hint = index;
267 * i40e_find_vsi_from_id - searches for the vsi with the given id
268 * @pf: the pf structure to search for the vsi
269 * @id: id of the vsi it is searching for
271 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
275 for (i = 0; i < pf->num_alloc_vsi; i++)
276 if (pf->vsi[i] && (pf->vsi[i]->id == id))
283 * i40e_service_event_schedule - Schedule the service task to wake up
284 * @pf: board private structure
286 * If not already scheduled, this puts the task into the work queue
288 void i40e_service_event_schedule(struct i40e_pf *pf)
290 if ((!test_bit(__I40E_DOWN, pf->state) &&
291 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
292 test_bit(__I40E_RECOVERY_MODE, pf->state))
293 queue_work(i40e_wq, &pf->service_task);
297 * i40e_tx_timeout - Respond to a Tx Hang
298 * @netdev: network interface device structure
300 * If any port has noticed a Tx timeout, it is likely that the whole
301 * device is munged, not just the one netdev port, so go for the full
304 static void i40e_tx_timeout(struct net_device *netdev)
306 struct i40e_netdev_priv *np = netdev_priv(netdev);
307 struct i40e_vsi *vsi = np->vsi;
308 struct i40e_pf *pf = vsi->back;
309 struct i40e_ring *tx_ring = NULL;
310 unsigned int i, hung_queue = 0;
313 pf->tx_timeout_count++;
315 /* find the stopped queue the same way the stack does */
316 for (i = 0; i < netdev->num_tx_queues; i++) {
317 struct netdev_queue *q;
318 unsigned long trans_start;
320 q = netdev_get_tx_queue(netdev, i);
321 trans_start = q->trans_start;
322 if (netif_xmit_stopped(q) &&
324 (trans_start + netdev->watchdog_timeo))) {
330 if (i == netdev->num_tx_queues) {
331 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
333 /* now that we have an index, find the tx_ring struct */
334 for (i = 0; i < vsi->num_queue_pairs; i++) {
335 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
337 vsi->tx_rings[i]->queue_index) {
338 tx_ring = vsi->tx_rings[i];
345 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
346 pf->tx_timeout_recovery_level = 1; /* reset after some time */
347 else if (time_before(jiffies,
348 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
349 return; /* don't do any new action before the next timeout */
351 /* don't kick off another recovery if one is already pending */
352 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
356 head = i40e_get_head(tx_ring);
357 /* Read interrupt register */
358 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
360 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
361 tx_ring->vsi->base_vector - 1));
363 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
365 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
366 vsi->seid, hung_queue, tx_ring->next_to_clean,
367 head, tx_ring->next_to_use,
368 readl(tx_ring->tail), val);
371 pf->tx_timeout_last_recovery = jiffies;
372 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
373 pf->tx_timeout_recovery_level, hung_queue);
375 switch (pf->tx_timeout_recovery_level) {
377 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
380 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
383 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
386 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
390 i40e_service_event_schedule(pf);
391 pf->tx_timeout_recovery_level++;
395 * i40e_get_vsi_stats_struct - Get System Network Statistics
396 * @vsi: the VSI we care about
398 * Returns the address of the device statistics structure.
399 * The statistics are actually updated from the service task.
401 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
403 return &vsi->net_stats;
407 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
408 * @ring: Tx ring to get statistics from
409 * @stats: statistics entry to be updated
411 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
412 struct rtnl_link_stats64 *stats)
418 start = u64_stats_fetch_begin_irq(&ring->syncp);
419 packets = ring->stats.packets;
420 bytes = ring->stats.bytes;
421 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
423 stats->tx_packets += packets;
424 stats->tx_bytes += bytes;
428 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
429 * @netdev: network interface device structure
430 * @stats: data structure to store statistics
432 * Returns the address of the device statistics structure.
433 * The statistics are actually updated from the service task.
435 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
436 struct rtnl_link_stats64 *stats)
438 struct i40e_netdev_priv *np = netdev_priv(netdev);
439 struct i40e_vsi *vsi = np->vsi;
440 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
441 struct i40e_ring *ring;
444 if (test_bit(__I40E_VSI_DOWN, vsi->state))
451 for (i = 0; i < vsi->num_queue_pairs; i++) {
455 ring = READ_ONCE(vsi->tx_rings[i]);
458 i40e_get_netdev_stats_struct_tx(ring, stats);
460 if (i40e_enabled_xdp_vsi(vsi)) {
462 i40e_get_netdev_stats_struct_tx(ring, stats);
467 start = u64_stats_fetch_begin_irq(&ring->syncp);
468 packets = ring->stats.packets;
469 bytes = ring->stats.bytes;
470 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
472 stats->rx_packets += packets;
473 stats->rx_bytes += bytes;
478 /* following stats updated by i40e_watchdog_subtask() */
479 stats->multicast = vsi_stats->multicast;
480 stats->tx_errors = vsi_stats->tx_errors;
481 stats->tx_dropped = vsi_stats->tx_dropped;
482 stats->rx_errors = vsi_stats->rx_errors;
483 stats->rx_dropped = vsi_stats->rx_dropped;
484 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
485 stats->rx_length_errors = vsi_stats->rx_length_errors;
489 * i40e_vsi_reset_stats - Resets all stats of the given vsi
490 * @vsi: the VSI to have its stats reset
492 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
494 struct rtnl_link_stats64 *ns;
500 ns = i40e_get_vsi_stats_struct(vsi);
501 memset(ns, 0, sizeof(*ns));
502 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
503 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
504 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
505 if (vsi->rx_rings && vsi->rx_rings[0]) {
506 for (i = 0; i < vsi->num_queue_pairs; i++) {
507 memset(&vsi->rx_rings[i]->stats, 0,
508 sizeof(vsi->rx_rings[i]->stats));
509 memset(&vsi->rx_rings[i]->rx_stats, 0,
510 sizeof(vsi->rx_rings[i]->rx_stats));
511 memset(&vsi->tx_rings[i]->stats, 0,
512 sizeof(vsi->tx_rings[i]->stats));
513 memset(&vsi->tx_rings[i]->tx_stats, 0,
514 sizeof(vsi->tx_rings[i]->tx_stats));
517 vsi->stat_offsets_loaded = false;
521 * i40e_pf_reset_stats - Reset all of the stats for the given PF
522 * @pf: the PF to be reset
524 void i40e_pf_reset_stats(struct i40e_pf *pf)
528 memset(&pf->stats, 0, sizeof(pf->stats));
529 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
530 pf->stat_offsets_loaded = false;
532 for (i = 0; i < I40E_MAX_VEB; i++) {
534 memset(&pf->veb[i]->stats, 0,
535 sizeof(pf->veb[i]->stats));
536 memset(&pf->veb[i]->stats_offsets, 0,
537 sizeof(pf->veb[i]->stats_offsets));
538 memset(&pf->veb[i]->tc_stats, 0,
539 sizeof(pf->veb[i]->tc_stats));
540 memset(&pf->veb[i]->tc_stats_offsets, 0,
541 sizeof(pf->veb[i]->tc_stats_offsets));
542 pf->veb[i]->stat_offsets_loaded = false;
545 pf->hw_csum_rx_error = 0;
549 * i40e_stat_update48 - read and update a 48 bit stat from the chip
550 * @hw: ptr to the hardware info
551 * @hireg: the high 32 bit reg to read
552 * @loreg: the low 32 bit reg to read
553 * @offset_loaded: has the initial offset been loaded yet
554 * @offset: ptr to current offset value
555 * @stat: ptr to the stat
557 * Since the device stats are not reset at PFReset, they likely will not
558 * be zeroed when the driver starts. We'll save the first values read
559 * and use them as offsets to be subtracted from the raw values in order
560 * to report stats that count from zero. In the process, we also manage
561 * the potential roll-over.
563 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
564 bool offset_loaded, u64 *offset, u64 *stat)
568 if (hw->device_id == I40E_DEV_ID_QEMU) {
569 new_data = rd32(hw, loreg);
570 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
572 new_data = rd64(hw, loreg);
576 if (likely(new_data >= *offset))
577 *stat = new_data - *offset;
579 *stat = (new_data + BIT_ULL(48)) - *offset;
580 *stat &= 0xFFFFFFFFFFFFULL;
584 * i40e_stat_update32 - read and update a 32 bit stat from the chip
585 * @hw: ptr to the hardware info
586 * @reg: the hw reg to read
587 * @offset_loaded: has the initial offset been loaded yet
588 * @offset: ptr to current offset value
589 * @stat: ptr to the stat
591 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
592 bool offset_loaded, u64 *offset, u64 *stat)
596 new_data = rd32(hw, reg);
599 if (likely(new_data >= *offset))
600 *stat = (u32)(new_data - *offset);
602 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
606 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
607 * @hw: ptr to the hardware info
608 * @reg: the hw reg to read and clear
609 * @stat: ptr to the stat
611 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
613 u32 new_data = rd32(hw, reg);
615 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
620 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
621 * @vsi: the VSI to be updated
623 void i40e_update_eth_stats(struct i40e_vsi *vsi)
625 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
626 struct i40e_pf *pf = vsi->back;
627 struct i40e_hw *hw = &pf->hw;
628 struct i40e_eth_stats *oes;
629 struct i40e_eth_stats *es; /* device's eth stats */
631 es = &vsi->eth_stats;
632 oes = &vsi->eth_stats_offsets;
634 /* Gather up the stats that the hw collects */
635 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_errors, &es->tx_errors);
638 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
639 vsi->stat_offsets_loaded,
640 &oes->rx_discards, &es->rx_discards);
641 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
645 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
646 I40E_GLV_GORCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->rx_bytes, &es->rx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
650 I40E_GLV_UPRCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->rx_unicast, &es->rx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
654 I40E_GLV_MPRCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->rx_multicast, &es->rx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
658 I40E_GLV_BPRCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->rx_broadcast, &es->rx_broadcast);
662 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
663 I40E_GLV_GOTCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->tx_bytes, &es->tx_bytes);
666 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
667 I40E_GLV_UPTCL(stat_idx),
668 vsi->stat_offsets_loaded,
669 &oes->tx_unicast, &es->tx_unicast);
670 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
671 I40E_GLV_MPTCL(stat_idx),
672 vsi->stat_offsets_loaded,
673 &oes->tx_multicast, &es->tx_multicast);
674 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
675 I40E_GLV_BPTCL(stat_idx),
676 vsi->stat_offsets_loaded,
677 &oes->tx_broadcast, &es->tx_broadcast);
678 vsi->stat_offsets_loaded = true;
682 * i40e_update_veb_stats - Update Switch component statistics
683 * @veb: the VEB being updated
685 void i40e_update_veb_stats(struct i40e_veb *veb)
687 struct i40e_pf *pf = veb->pf;
688 struct i40e_hw *hw = &pf->hw;
689 struct i40e_eth_stats *oes;
690 struct i40e_eth_stats *es; /* device's eth stats */
691 struct i40e_veb_tc_stats *veb_oes;
692 struct i40e_veb_tc_stats *veb_es;
695 idx = veb->stats_idx;
697 oes = &veb->stats_offsets;
698 veb_es = &veb->tc_stats;
699 veb_oes = &veb->tc_stats_offsets;
701 /* Gather up the stats that the hw collects */
702 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
703 veb->stat_offsets_loaded,
704 &oes->tx_discards, &es->tx_discards);
705 if (hw->revision_id > 0)
706 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
707 veb->stat_offsets_loaded,
708 &oes->rx_unknown_protocol,
709 &es->rx_unknown_protocol);
710 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
711 veb->stat_offsets_loaded,
712 &oes->rx_bytes, &es->rx_bytes);
713 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
714 veb->stat_offsets_loaded,
715 &oes->rx_unicast, &es->rx_unicast);
716 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
717 veb->stat_offsets_loaded,
718 &oes->rx_multicast, &es->rx_multicast);
719 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
720 veb->stat_offsets_loaded,
721 &oes->rx_broadcast, &es->rx_broadcast);
723 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
724 veb->stat_offsets_loaded,
725 &oes->tx_bytes, &es->tx_bytes);
726 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
727 veb->stat_offsets_loaded,
728 &oes->tx_unicast, &es->tx_unicast);
729 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
730 veb->stat_offsets_loaded,
731 &oes->tx_multicast, &es->tx_multicast);
732 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
733 veb->stat_offsets_loaded,
734 &oes->tx_broadcast, &es->tx_broadcast);
735 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
736 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
737 I40E_GLVEBTC_RPCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_rx_packets[i],
740 &veb_es->tc_rx_packets[i]);
741 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
742 I40E_GLVEBTC_RBCL(i, idx),
743 veb->stat_offsets_loaded,
744 &veb_oes->tc_rx_bytes[i],
745 &veb_es->tc_rx_bytes[i]);
746 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
747 I40E_GLVEBTC_TPCL(i, idx),
748 veb->stat_offsets_loaded,
749 &veb_oes->tc_tx_packets[i],
750 &veb_es->tc_tx_packets[i]);
751 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
752 I40E_GLVEBTC_TBCL(i, idx),
753 veb->stat_offsets_loaded,
754 &veb_oes->tc_tx_bytes[i],
755 &veb_es->tc_tx_bytes[i]);
757 veb->stat_offsets_loaded = true;
761 * i40e_update_vsi_stats - Update the vsi statistics counters.
762 * @vsi: the VSI to be updated
764 * There are a few instances where we store the same stat in a
765 * couple of different structs. This is partly because we have
766 * the netdev stats that need to be filled out, which is slightly
767 * different from the "eth_stats" defined by the chip and used in
768 * VF communications. We sort it out here.
770 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
772 struct i40e_pf *pf = vsi->back;
773 struct rtnl_link_stats64 *ons;
774 struct rtnl_link_stats64 *ns; /* netdev stats */
775 struct i40e_eth_stats *oes;
776 struct i40e_eth_stats *es; /* device's eth stats */
777 u32 tx_restart, tx_busy;
788 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
789 test_bit(__I40E_CONFIG_BUSY, pf->state))
792 ns = i40e_get_vsi_stats_struct(vsi);
793 ons = &vsi->net_stats_offsets;
794 es = &vsi->eth_stats;
795 oes = &vsi->eth_stats_offsets;
797 /* Gather up the netdev and vsi stats that the driver collects
798 * on the fly during packet processing
802 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
806 for (q = 0; q < vsi->num_queue_pairs; q++) {
808 p = READ_ONCE(vsi->tx_rings[q]);
811 start = u64_stats_fetch_begin_irq(&p->syncp);
812 packets = p->stats.packets;
813 bytes = p->stats.bytes;
814 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
817 tx_restart += p->tx_stats.restart_queue;
818 tx_busy += p->tx_stats.tx_busy;
819 tx_linearize += p->tx_stats.tx_linearize;
820 tx_force_wb += p->tx_stats.tx_force_wb;
822 /* Rx queue is part of the same block as Tx queue */
825 start = u64_stats_fetch_begin_irq(&p->syncp);
826 packets = p->stats.packets;
827 bytes = p->stats.bytes;
828 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
831 rx_buf += p->rx_stats.alloc_buff_failed;
832 rx_page += p->rx_stats.alloc_page_failed;
835 vsi->tx_restart = tx_restart;
836 vsi->tx_busy = tx_busy;
837 vsi->tx_linearize = tx_linearize;
838 vsi->tx_force_wb = tx_force_wb;
839 vsi->rx_page_failed = rx_page;
840 vsi->rx_buf_failed = rx_buf;
842 ns->rx_packets = rx_p;
844 ns->tx_packets = tx_p;
847 /* update netdev stats from eth stats */
848 i40e_update_eth_stats(vsi);
849 ons->tx_errors = oes->tx_errors;
850 ns->tx_errors = es->tx_errors;
851 ons->multicast = oes->rx_multicast;
852 ns->multicast = es->rx_multicast;
853 ons->rx_dropped = oes->rx_discards;
854 ns->rx_dropped = es->rx_discards;
855 ons->tx_dropped = oes->tx_discards;
856 ns->tx_dropped = es->tx_discards;
858 /* pull in a couple PF stats if this is the main vsi */
859 if (vsi == pf->vsi[pf->lan_vsi]) {
860 ns->rx_crc_errors = pf->stats.crc_errors;
861 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
862 ns->rx_length_errors = pf->stats.rx_length_errors;
867 * i40e_update_pf_stats - Update the PF statistics counters.
868 * @pf: the PF to be updated
870 static void i40e_update_pf_stats(struct i40e_pf *pf)
872 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
873 struct i40e_hw_port_stats *nsd = &pf->stats;
874 struct i40e_hw *hw = &pf->hw;
878 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
879 I40E_GLPRT_GORCL(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
882 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
883 I40E_GLPRT_GOTCL(hw->port),
884 pf->stat_offsets_loaded,
885 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
886 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
887 pf->stat_offsets_loaded,
888 &osd->eth.rx_discards,
889 &nsd->eth.rx_discards);
890 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
891 I40E_GLPRT_UPRCL(hw->port),
892 pf->stat_offsets_loaded,
893 &osd->eth.rx_unicast,
894 &nsd->eth.rx_unicast);
895 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
896 I40E_GLPRT_MPRCL(hw->port),
897 pf->stat_offsets_loaded,
898 &osd->eth.rx_multicast,
899 &nsd->eth.rx_multicast);
900 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
901 I40E_GLPRT_BPRCL(hw->port),
902 pf->stat_offsets_loaded,
903 &osd->eth.rx_broadcast,
904 &nsd->eth.rx_broadcast);
905 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
906 I40E_GLPRT_UPTCL(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->eth.tx_unicast,
909 &nsd->eth.tx_unicast);
910 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
911 I40E_GLPRT_MPTCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.tx_multicast,
914 &nsd->eth.tx_multicast);
915 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
916 I40E_GLPRT_BPTCL(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->eth.tx_broadcast,
919 &nsd->eth.tx_broadcast);
921 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->tx_dropped_link_down,
924 &nsd->tx_dropped_link_down);
926 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->crc_errors, &nsd->crc_errors);
930 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->illegal_bytes, &nsd->illegal_bytes);
934 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
935 pf->stat_offsets_loaded,
936 &osd->mac_local_faults,
937 &nsd->mac_local_faults);
938 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->mac_remote_faults,
941 &nsd->mac_remote_faults);
943 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->rx_length_errors,
946 &nsd->rx_length_errors);
948 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->link_xon_rx, &nsd->link_xon_rx);
951 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->link_xon_tx, &nsd->link_xon_tx);
954 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
955 pf->stat_offsets_loaded,
956 &osd->link_xoff_rx, &nsd->link_xoff_rx);
957 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->link_xoff_tx, &nsd->link_xoff_tx);
961 for (i = 0; i < 8; i++) {
962 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
963 pf->stat_offsets_loaded,
964 &osd->priority_xoff_rx[i],
965 &nsd->priority_xoff_rx[i]);
966 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
967 pf->stat_offsets_loaded,
968 &osd->priority_xon_rx[i],
969 &nsd->priority_xon_rx[i]);
970 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
971 pf->stat_offsets_loaded,
972 &osd->priority_xon_tx[i],
973 &nsd->priority_xon_tx[i]);
974 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
975 pf->stat_offsets_loaded,
976 &osd->priority_xoff_tx[i],
977 &nsd->priority_xoff_tx[i]);
978 i40e_stat_update32(hw,
979 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
980 pf->stat_offsets_loaded,
981 &osd->priority_xon_2_xoff[i],
982 &nsd->priority_xon_2_xoff[i]);
985 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
986 I40E_GLPRT_PRC64L(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->rx_size_64, &nsd->rx_size_64);
989 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
990 I40E_GLPRT_PRC127L(hw->port),
991 pf->stat_offsets_loaded,
992 &osd->rx_size_127, &nsd->rx_size_127);
993 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
994 I40E_GLPRT_PRC255L(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->rx_size_255, &nsd->rx_size_255);
997 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
998 I40E_GLPRT_PRC511L(hw->port),
999 pf->stat_offsets_loaded,
1000 &osd->rx_size_511, &nsd->rx_size_511);
1001 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1002 I40E_GLPRT_PRC1023L(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->rx_size_1023, &nsd->rx_size_1023);
1005 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1006 I40E_GLPRT_PRC1522L(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->rx_size_1522, &nsd->rx_size_1522);
1009 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1010 I40E_GLPRT_PRC9522L(hw->port),
1011 pf->stat_offsets_loaded,
1012 &osd->rx_size_big, &nsd->rx_size_big);
1014 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1015 I40E_GLPRT_PTC64L(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->tx_size_64, &nsd->tx_size_64);
1018 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1019 I40E_GLPRT_PTC127L(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->tx_size_127, &nsd->tx_size_127);
1022 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1023 I40E_GLPRT_PTC255L(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->tx_size_255, &nsd->tx_size_255);
1026 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1027 I40E_GLPRT_PTC511L(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->tx_size_511, &nsd->tx_size_511);
1030 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1031 I40E_GLPRT_PTC1023L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->tx_size_1023, &nsd->tx_size_1023);
1034 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1035 I40E_GLPRT_PTC1522L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->tx_size_1522, &nsd->tx_size_1522);
1038 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1039 I40E_GLPRT_PTC9522L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->tx_size_big, &nsd->tx_size_big);
1043 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_undersize, &nsd->rx_undersize);
1046 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->rx_fragments, &nsd->rx_fragments);
1049 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->rx_oversize, &nsd->rx_oversize);
1052 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->rx_jabber, &nsd->rx_jabber);
1057 i40e_stat_update_and_clear32(hw,
1058 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1059 &nsd->fd_atr_match);
1060 i40e_stat_update_and_clear32(hw,
1061 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1063 i40e_stat_update_and_clear32(hw,
1064 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1065 &nsd->fd_atr_tunnel_match);
1067 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1068 nsd->tx_lpi_status =
1069 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1070 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1071 nsd->rx_lpi_status =
1072 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1073 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1074 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1075 pf->stat_offsets_loaded,
1076 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1077 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1078 pf->stat_offsets_loaded,
1079 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1081 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1082 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1083 nsd->fd_sb_status = true;
1085 nsd->fd_sb_status = false;
1087 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1088 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1089 nsd->fd_atr_status = true;
1091 nsd->fd_atr_status = false;
1093 pf->stat_offsets_loaded = true;
1097 * i40e_update_stats - Update the various statistics counters.
1098 * @vsi: the VSI to be updated
1100 * Update the various stats for this VSI and its related entities.
1102 void i40e_update_stats(struct i40e_vsi *vsi)
1104 struct i40e_pf *pf = vsi->back;
1106 if (vsi == pf->vsi[pf->lan_vsi])
1107 i40e_update_pf_stats(pf);
1109 i40e_update_vsi_stats(vsi);
1113 * i40e_count_filters - counts VSI mac filters
1114 * @vsi: the VSI to be searched
1116 * Returns count of mac filters
1118 int i40e_count_filters(struct i40e_vsi *vsi)
1120 struct i40e_mac_filter *f;
1121 struct hlist_node *h;
1125 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1132 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1133 * @vsi: the VSI to be searched
1134 * @macaddr: the MAC address
1137 * Returns ptr to the filter object or NULL
1139 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1140 const u8 *macaddr, s16 vlan)
1142 struct i40e_mac_filter *f;
1145 if (!vsi || !macaddr)
1148 key = i40e_addr_to_hkey(macaddr);
1149 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1150 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1158 * i40e_find_mac - Find a mac addr in the macvlan filters list
1159 * @vsi: the VSI to be searched
1160 * @macaddr: the MAC address we are searching for
1162 * Returns the first filter with the provided MAC address or NULL if
1163 * MAC address was not found
1165 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1167 struct i40e_mac_filter *f;
1170 if (!vsi || !macaddr)
1173 key = i40e_addr_to_hkey(macaddr);
1174 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1175 if ((ether_addr_equal(macaddr, f->macaddr)))
1182 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1183 * @vsi: the VSI to be searched
1185 * Returns true if VSI is in vlan mode or false otherwise
1187 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1189 /* If we have a PVID, always operate in VLAN mode */
1193 /* We need to operate in VLAN mode whenever we have any filters with
1194 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1195 * time, incurring search cost repeatedly. However, we can notice two
1198 * 1) the only place where we can gain a VLAN filter is in
1201 * 2) the only place where filters are actually removed is in
1202 * i40e_sync_filters_subtask.
1204 * Thus, we can simply use a boolean value, has_vlan_filters which we
1205 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1206 * we have to perform the full search after deleting filters in
1207 * i40e_sync_filters_subtask, but we already have to search
1208 * filters here and can perform the check at the same time. This
1209 * results in avoiding embedding a loop for VLAN mode inside another
1210 * loop over all the filters, and should maintain correctness as noted
1213 return vsi->has_vlan_filter;
1217 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1218 * @vsi: the VSI to configure
1219 * @tmp_add_list: list of filters ready to be added
1220 * @tmp_del_list: list of filters ready to be deleted
1221 * @vlan_filters: the number of active VLAN filters
1223 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1224 * behave as expected. If we have any active VLAN filters remaining or about
1225 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1226 * so that they only match against untagged traffic. If we no longer have any
1227 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1228 * so that they match against both tagged and untagged traffic. In this way,
1229 * we ensure that we correctly receive the desired traffic. This ensures that
1230 * when we have an active VLAN we will receive only untagged traffic and
1231 * traffic matching active VLANs. If we have no active VLANs then we will
1232 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1234 * Finally, in a similar fashion, this function also corrects filters when
1235 * there is an active PVID assigned to this VSI.
1237 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1239 * This function is only expected to be called from within
1240 * i40e_sync_vsi_filters.
1242 * NOTE: This function expects to be called while under the
1243 * mac_filter_hash_lock
1245 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1246 struct hlist_head *tmp_add_list,
1247 struct hlist_head *tmp_del_list,
1250 s16 pvid = le16_to_cpu(vsi->info.pvid);
1251 struct i40e_mac_filter *f, *add_head;
1252 struct i40e_new_mac_filter *new;
1253 struct hlist_node *h;
1256 /* To determine if a particular filter needs to be replaced we
1257 * have the three following conditions:
1259 * a) if we have a PVID assigned, then all filters which are
1260 * not marked as VLAN=PVID must be replaced with filters that
1262 * b) otherwise, if we have any active VLANS, all filters
1263 * which are marked as VLAN=-1 must be replaced with
1264 * filters marked as VLAN=0
1265 * c) finally, if we do not have any active VLANS, all filters
1266 * which are marked as VLAN=0 must be replaced with filters
1270 /* Update the filters about to be added in place */
1271 hlist_for_each_entry(new, tmp_add_list, hlist) {
1272 if (pvid && new->f->vlan != pvid)
1273 new->f->vlan = pvid;
1274 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1276 else if (!vlan_filters && new->f->vlan == 0)
1277 new->f->vlan = I40E_VLAN_ANY;
1280 /* Update the remaining active filters */
1281 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1282 /* Combine the checks for whether a filter needs to be changed
1283 * and then determine the new VLAN inside the if block, in
1284 * order to avoid duplicating code for adding the new filter
1285 * then deleting the old filter.
1287 if ((pvid && f->vlan != pvid) ||
1288 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1289 (!vlan_filters && f->vlan == 0)) {
1290 /* Determine the new vlan we will be adding */
1293 else if (vlan_filters)
1296 new_vlan = I40E_VLAN_ANY;
1298 /* Create the new filter */
1299 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1303 /* Create a temporary i40e_new_mac_filter */
1304 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1309 new->state = add_head->state;
1311 /* Add the new filter to the tmp list */
1312 hlist_add_head(&new->hlist, tmp_add_list);
1314 /* Put the original filter into the delete list */
1315 f->state = I40E_FILTER_REMOVE;
1316 hash_del(&f->hlist);
1317 hlist_add_head(&f->hlist, tmp_del_list);
1321 vsi->has_vlan_filter = !!vlan_filters;
1327 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1328 * @vsi: the PF Main VSI - inappropriate for any other VSI
1329 * @macaddr: the MAC address
1331 * Remove whatever filter the firmware set up so the driver can manage
1332 * its own filtering intelligently.
1334 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1336 struct i40e_aqc_remove_macvlan_element_data element;
1337 struct i40e_pf *pf = vsi->back;
1339 /* Only appropriate for the PF main VSI */
1340 if (vsi->type != I40E_VSI_MAIN)
1343 memset(&element, 0, sizeof(element));
1344 ether_addr_copy(element.mac_addr, macaddr);
1345 element.vlan_tag = 0;
1346 /* Ignore error returns, some firmware does it this way... */
1347 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1348 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1350 memset(&element, 0, sizeof(element));
1351 ether_addr_copy(element.mac_addr, macaddr);
1352 element.vlan_tag = 0;
1353 /* ...and some firmware does it this way. */
1354 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1355 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1356 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1360 * i40e_add_filter - Add a mac/vlan filter to the VSI
1361 * @vsi: the VSI to be searched
1362 * @macaddr: the MAC address
1365 * Returns ptr to the filter object or NULL when no memory available.
1367 * NOTE: This function is expected to be called with mac_filter_hash_lock
1370 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1371 const u8 *macaddr, s16 vlan)
1373 struct i40e_mac_filter *f;
1376 if (!vsi || !macaddr)
1379 f = i40e_find_filter(vsi, macaddr, vlan);
1381 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1385 /* Update the boolean indicating if we need to function in
1389 vsi->has_vlan_filter = true;
1391 ether_addr_copy(f->macaddr, macaddr);
1393 f->state = I40E_FILTER_NEW;
1394 INIT_HLIST_NODE(&f->hlist);
1396 key = i40e_addr_to_hkey(macaddr);
1397 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1399 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1400 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1403 /* If we're asked to add a filter that has been marked for removal, it
1404 * is safe to simply restore it to active state. __i40e_del_filter
1405 * will have simply deleted any filters which were previously marked
1406 * NEW or FAILED, so if it is currently marked REMOVE it must have
1407 * previously been ACTIVE. Since we haven't yet run the sync filters
1408 * task, just restore this filter to the ACTIVE state so that the
1409 * sync task leaves it in place
1411 if (f->state == I40E_FILTER_REMOVE)
1412 f->state = I40E_FILTER_ACTIVE;
1418 * __i40e_del_filter - Remove a specific filter from the VSI
1419 * @vsi: VSI to remove from
1420 * @f: the filter to remove from the list
1422 * This function should be called instead of i40e_del_filter only if you know
1423 * the exact filter you will remove already, such as via i40e_find_filter or
1426 * NOTE: This function is expected to be called with mac_filter_hash_lock
1428 * ANOTHER NOTE: This function MUST be called from within the context of
1429 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1430 * instead of list_for_each_entry().
1432 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1437 /* If the filter was never added to firmware then we can just delete it
1438 * directly and we don't want to set the status to remove or else an
1439 * admin queue command will unnecessarily fire.
1441 if ((f->state == I40E_FILTER_FAILED) ||
1442 (f->state == I40E_FILTER_NEW)) {
1443 hash_del(&f->hlist);
1446 f->state = I40E_FILTER_REMOVE;
1449 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1450 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1454 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1455 * @vsi: the VSI to be searched
1456 * @macaddr: the MAC address
1459 * NOTE: This function is expected to be called with mac_filter_hash_lock
1461 * ANOTHER NOTE: This function MUST be called from within the context of
1462 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1463 * instead of list_for_each_entry().
1465 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1467 struct i40e_mac_filter *f;
1469 if (!vsi || !macaddr)
1472 f = i40e_find_filter(vsi, macaddr, vlan);
1473 __i40e_del_filter(vsi, f);
1477 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1478 * @vsi: the VSI to be searched
1479 * @macaddr: the mac address to be filtered
1481 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1482 * go through all the macvlan filters and add a macvlan filter for each
1483 * unique vlan that already exists. If a PVID has been assigned, instead only
1484 * add the macaddr to that VLAN.
1486 * Returns last filter added on success, else NULL
1488 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1491 struct i40e_mac_filter *f, *add = NULL;
1492 struct hlist_node *h;
1496 return i40e_add_filter(vsi, macaddr,
1497 le16_to_cpu(vsi->info.pvid));
1499 if (!i40e_is_vsi_in_vlan(vsi))
1500 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1502 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1503 if (f->state == I40E_FILTER_REMOVE)
1505 add = i40e_add_filter(vsi, macaddr, f->vlan);
1514 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1515 * @vsi: the VSI to be searched
1516 * @macaddr: the mac address to be removed
1518 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1521 * Returns 0 for success, or error
1523 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1525 struct i40e_mac_filter *f;
1526 struct hlist_node *h;
1530 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1531 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1532 if (ether_addr_equal(macaddr, f->macaddr)) {
1533 __i40e_del_filter(vsi, f);
1545 * i40e_set_mac - NDO callback to set mac address
1546 * @netdev: network interface device structure
1547 * @p: pointer to an address structure
1549 * Returns 0 on success, negative on failure
1551 static int i40e_set_mac(struct net_device *netdev, void *p)
1553 struct i40e_netdev_priv *np = netdev_priv(netdev);
1554 struct i40e_vsi *vsi = np->vsi;
1555 struct i40e_pf *pf = vsi->back;
1556 struct i40e_hw *hw = &pf->hw;
1557 struct sockaddr *addr = p;
1559 if (!is_valid_ether_addr(addr->sa_data))
1560 return -EADDRNOTAVAIL;
1562 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1563 netdev_info(netdev, "already using mac address %pM\n",
1568 if (test_bit(__I40E_DOWN, pf->state) ||
1569 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1570 return -EADDRNOTAVAIL;
1572 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1573 netdev_info(netdev, "returning to hw mac address %pM\n",
1576 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1578 /* Copy the address first, so that we avoid a possible race with
1580 * - Remove old address from MAC filter
1581 * - Copy new address
1582 * - Add new address to MAC filter
1584 spin_lock_bh(&vsi->mac_filter_hash_lock);
1585 i40e_del_mac_filter(vsi, netdev->dev_addr);
1586 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1587 i40e_add_mac_filter(vsi, netdev->dev_addr);
1588 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1590 if (vsi->type == I40E_VSI_MAIN) {
1593 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1594 addr->sa_data, NULL);
1596 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1597 i40e_stat_str(hw, ret),
1598 i40e_aq_str(hw, hw->aq.asq_last_status));
1601 /* schedule our worker thread which will take care of
1602 * applying the new filter changes
1604 i40e_service_event_schedule(pf);
1609 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1610 * @vsi: vsi structure
1611 * @seed: RSS hash seed
1613 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1614 u8 *lut, u16 lut_size)
1616 struct i40e_pf *pf = vsi->back;
1617 struct i40e_hw *hw = &pf->hw;
1621 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1622 (struct i40e_aqc_get_set_rss_key_data *)seed;
1623 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1625 dev_info(&pf->pdev->dev,
1626 "Cannot set RSS key, err %s aq_err %s\n",
1627 i40e_stat_str(hw, ret),
1628 i40e_aq_str(hw, hw->aq.asq_last_status));
1633 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
1635 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1637 dev_info(&pf->pdev->dev,
1638 "Cannot set RSS lut, err %s aq_err %s\n",
1639 i40e_stat_str(hw, ret),
1640 i40e_aq_str(hw, hw->aq.asq_last_status));
1648 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1649 * @vsi: VSI structure
1651 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1653 struct i40e_pf *pf = vsi->back;
1654 u8 seed[I40E_HKEY_ARRAY_SIZE];
1658 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1661 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1662 vsi->num_queue_pairs);
1665 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1669 /* Use the user configured hash keys and lookup table if there is one,
1670 * otherwise use default
1672 if (vsi->rss_lut_user)
1673 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1675 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1676 if (vsi->rss_hkey_user)
1677 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1679 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1680 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1686 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1687 * @vsi: the VSI being configured,
1688 * @ctxt: VSI context structure
1689 * @enabled_tc: number of traffic classes to enable
1691 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1693 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1694 struct i40e_vsi_context *ctxt,
1697 u16 qcount = 0, max_qcount, qmap, sections = 0;
1698 int i, override_q, pow, num_qps, ret;
1699 u8 netdev_tc = 0, offset = 0;
1701 if (vsi->type != I40E_VSI_MAIN)
1703 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1704 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1705 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1706 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1707 num_qps = vsi->mqprio_qopt.qopt.count[0];
1709 /* find the next higher power-of-2 of num queue pairs */
1710 pow = ilog2(num_qps);
1711 if (!is_power_of_2(num_qps))
1713 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1714 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1716 /* Setup queue offset/count for all TCs for given VSI */
1717 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1719 /* See if the given TC is enabled for the given VSI */
1720 if (vsi->tc_config.enabled_tc & BIT(i)) {
1721 offset = vsi->mqprio_qopt.qopt.offset[i];
1722 qcount = vsi->mqprio_qopt.qopt.count[i];
1723 if (qcount > max_qcount)
1724 max_qcount = qcount;
1725 vsi->tc_config.tc_info[i].qoffset = offset;
1726 vsi->tc_config.tc_info[i].qcount = qcount;
1727 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1729 /* TC is not enabled so set the offset to
1730 * default queue and allocate one queue
1733 vsi->tc_config.tc_info[i].qoffset = 0;
1734 vsi->tc_config.tc_info[i].qcount = 1;
1735 vsi->tc_config.tc_info[i].netdev_tc = 0;
1739 /* Set actual Tx/Rx queue pairs */
1740 vsi->num_queue_pairs = offset + qcount;
1742 /* Setup queue TC[0].qmap for given VSI context */
1743 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1744 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1745 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1746 ctxt->info.valid_sections |= cpu_to_le16(sections);
1748 /* Reconfigure RSS for main VSI with max queue count */
1749 vsi->rss_size = max_qcount;
1750 ret = i40e_vsi_config_rss(vsi);
1752 dev_info(&vsi->back->pdev->dev,
1753 "Failed to reconfig rss for num_queues (%u)\n",
1757 vsi->reconfig_rss = true;
1758 dev_dbg(&vsi->back->pdev->dev,
1759 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1761 /* Find queue count available for channel VSIs and starting offset
1764 override_q = vsi->mqprio_qopt.qopt.count[0];
1765 if (override_q && override_q < vsi->num_queue_pairs) {
1766 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1767 vsi->next_base_queue = override_q;
1773 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1774 * @vsi: the VSI being setup
1775 * @ctxt: VSI context structure
1776 * @enabled_tc: Enabled TCs bitmap
1777 * @is_add: True if called before Add VSI
1779 * Setup VSI queue mapping for enabled traffic classes.
1781 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1782 struct i40e_vsi_context *ctxt,
1786 struct i40e_pf *pf = vsi->back;
1796 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1799 /* Number of queues per enabled TC */
1800 num_tc_qps = vsi->alloc_queue_pairs;
1801 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1802 /* Find numtc from enabled TC bitmap */
1803 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1804 if (enabled_tc & BIT(i)) /* TC is enabled */
1808 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1811 num_tc_qps = num_tc_qps / numtc;
1812 num_tc_qps = min_t(int, num_tc_qps,
1813 i40e_pf_get_max_q_per_tc(pf));
1816 vsi->tc_config.numtc = numtc;
1817 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1819 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1820 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1821 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1823 /* Setup queue offset/count for all TCs for given VSI */
1824 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1825 /* See if the given TC is enabled for the given VSI */
1826 if (vsi->tc_config.enabled_tc & BIT(i)) {
1830 switch (vsi->type) {
1832 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1833 I40E_FLAG_FD_ATR_ENABLED)) ||
1834 vsi->tc_config.enabled_tc != 1) {
1835 qcount = min_t(int, pf->alloc_rss_size,
1841 case I40E_VSI_SRIOV:
1842 case I40E_VSI_VMDQ2:
1844 qcount = num_tc_qps;
1848 vsi->tc_config.tc_info[i].qoffset = offset;
1849 vsi->tc_config.tc_info[i].qcount = qcount;
1851 /* find the next higher power-of-2 of num queue pairs */
1854 while (num_qps && (BIT_ULL(pow) < qcount)) {
1859 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1861 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1862 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1866 /* TC is not enabled so set the offset to
1867 * default queue and allocate one queue
1870 vsi->tc_config.tc_info[i].qoffset = 0;
1871 vsi->tc_config.tc_info[i].qcount = 1;
1872 vsi->tc_config.tc_info[i].netdev_tc = 0;
1876 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1879 /* Set actual Tx/Rx queue pairs */
1880 vsi->num_queue_pairs = offset;
1881 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1882 if (vsi->req_queue_pairs > 0)
1883 vsi->num_queue_pairs = vsi->req_queue_pairs;
1884 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1885 vsi->num_queue_pairs = pf->num_lan_msix;
1888 /* Scheduler section valid can only be set for ADD VSI */
1890 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1892 ctxt->info.up_enable_bits = enabled_tc;
1894 if (vsi->type == I40E_VSI_SRIOV) {
1895 ctxt->info.mapping_flags |=
1896 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1897 for (i = 0; i < vsi->num_queue_pairs; i++)
1898 ctxt->info.queue_mapping[i] =
1899 cpu_to_le16(vsi->base_queue + i);
1901 ctxt->info.mapping_flags |=
1902 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1903 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1905 ctxt->info.valid_sections |= cpu_to_le16(sections);
1909 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1910 * @netdev: the netdevice
1911 * @addr: address to add
1913 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1914 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1916 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1918 struct i40e_netdev_priv *np = netdev_priv(netdev);
1919 struct i40e_vsi *vsi = np->vsi;
1921 if (i40e_add_mac_filter(vsi, addr))
1928 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1929 * @netdev: the netdevice
1930 * @addr: address to add
1932 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1933 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1935 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1937 struct i40e_netdev_priv *np = netdev_priv(netdev);
1938 struct i40e_vsi *vsi = np->vsi;
1940 /* Under some circumstances, we might receive a request to delete
1941 * our own device address from our uc list. Because we store the
1942 * device address in the VSI's MAC/VLAN filter list, we need to ignore
1943 * such requests and not delete our device address from this list.
1945 if (ether_addr_equal(addr, netdev->dev_addr))
1948 i40e_del_mac_filter(vsi, addr);
1954 * i40e_set_rx_mode - NDO callback to set the netdev filters
1955 * @netdev: network interface device structure
1957 static void i40e_set_rx_mode(struct net_device *netdev)
1959 struct i40e_netdev_priv *np = netdev_priv(netdev);
1960 struct i40e_vsi *vsi = np->vsi;
1962 spin_lock_bh(&vsi->mac_filter_hash_lock);
1964 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1965 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1967 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1969 /* check for other flag changes */
1970 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1971 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1972 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1977 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1978 * @vsi: Pointer to VSI struct
1979 * @from: Pointer to list which contains MAC filter entries - changes to
1980 * those entries needs to be undone.
1982 * MAC filter entries from this list were slated for deletion.
1984 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1985 struct hlist_head *from)
1987 struct i40e_mac_filter *f;
1988 struct hlist_node *h;
1990 hlist_for_each_entry_safe(f, h, from, hlist) {
1991 u64 key = i40e_addr_to_hkey(f->macaddr);
1993 /* Move the element back into MAC filter list*/
1994 hlist_del(&f->hlist);
1995 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2000 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2001 * @vsi: Pointer to vsi struct
2002 * @from: Pointer to list which contains MAC filter entries - changes to
2003 * those entries needs to be undone.
2005 * MAC filter entries from this list were slated for addition.
2007 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2008 struct hlist_head *from)
2010 struct i40e_new_mac_filter *new;
2011 struct hlist_node *h;
2013 hlist_for_each_entry_safe(new, h, from, hlist) {
2014 /* We can simply free the wrapper structure */
2015 hlist_del(&new->hlist);
2021 * i40e_next_entry - Get the next non-broadcast filter from a list
2022 * @next: pointer to filter in list
2024 * Returns the next non-broadcast filter in the list. Required so that we
2025 * ignore broadcast filters within the list, since these are not handled via
2026 * the normal firmware update path.
2029 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2031 hlist_for_each_entry_continue(next, hlist) {
2032 if (!is_broadcast_ether_addr(next->f->macaddr))
2040 * i40e_update_filter_state - Update filter state based on return data
2042 * @count: Number of filters added
2043 * @add_list: return data from fw
2044 * @add_head: pointer to first filter in current batch
2046 * MAC filter entries from list were slated to be added to device. Returns
2047 * number of successful filters. Note that 0 does NOT mean success!
2050 i40e_update_filter_state(int count,
2051 struct i40e_aqc_add_macvlan_element_data *add_list,
2052 struct i40e_new_mac_filter *add_head)
2057 for (i = 0; i < count; i++) {
2058 /* Always check status of each filter. We don't need to check
2059 * the firmware return status because we pre-set the filter
2060 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2061 * request to the adminq. Thus, if it no longer matches then
2062 * we know the filter is active.
2064 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2065 add_head->state = I40E_FILTER_FAILED;
2067 add_head->state = I40E_FILTER_ACTIVE;
2071 add_head = i40e_next_filter(add_head);
2080 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2081 * @vsi: ptr to the VSI
2082 * @vsi_name: name to display in messages
2083 * @list: the list of filters to send to firmware
2084 * @num_del: the number of filters to delete
2085 * @retval: Set to -EIO on failure to delete
2087 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2088 * *retval instead of a return value so that success does not force ret_val to
2089 * be set to 0. This ensures that a sequence of calls to this function
2090 * preserve the previous value of *retval on successful delete.
2093 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2094 struct i40e_aqc_remove_macvlan_element_data *list,
2095 int num_del, int *retval)
2097 struct i40e_hw *hw = &vsi->back->hw;
2101 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2102 aq_err = hw->aq.asq_last_status;
2104 /* Explicitly ignore and do not report when firmware returns ENOENT */
2105 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2107 dev_info(&vsi->back->pdev->dev,
2108 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2109 vsi_name, i40e_stat_str(hw, aq_ret),
2110 i40e_aq_str(hw, aq_err));
2115 * i40e_aqc_add_filters - Request firmware to add a set of filters
2116 * @vsi: ptr to the VSI
2117 * @vsi_name: name to display in messages
2118 * @list: the list of filters to send to firmware
2119 * @add_head: Position in the add hlist
2120 * @num_add: the number of filters to add
2122 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2123 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2124 * space for more filters.
2127 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2128 struct i40e_aqc_add_macvlan_element_data *list,
2129 struct i40e_new_mac_filter *add_head,
2132 struct i40e_hw *hw = &vsi->back->hw;
2135 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2136 aq_err = hw->aq.asq_last_status;
2137 fcnt = i40e_update_filter_state(num_add, list, add_head);
2139 if (fcnt != num_add) {
2140 if (vsi->type == I40E_VSI_MAIN) {
2141 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2142 dev_warn(&vsi->back->pdev->dev,
2143 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2144 i40e_aq_str(hw, aq_err), vsi_name);
2145 } else if (vsi->type == I40E_VSI_SRIOV ||
2146 vsi->type == I40E_VSI_VMDQ1 ||
2147 vsi->type == I40E_VSI_VMDQ2) {
2148 dev_warn(&vsi->back->pdev->dev,
2149 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2150 i40e_aq_str(hw, aq_err), vsi_name, vsi_name);
2152 dev_warn(&vsi->back->pdev->dev,
2153 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2154 i40e_aq_str(hw, aq_err), vsi_name, vsi->type);
2160 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2161 * @vsi: pointer to the VSI
2162 * @vsi_name: the VSI name
2165 * This function sets or clears the promiscuous broadcast flags for VLAN
2166 * filters in order to properly receive broadcast frames. Assumes that only
2167 * broadcast filters are passed.
2169 * Returns status indicating success or failure;
2172 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2173 struct i40e_mac_filter *f)
2175 bool enable = f->state == I40E_FILTER_NEW;
2176 struct i40e_hw *hw = &vsi->back->hw;
2179 if (f->vlan == I40E_VLAN_ANY) {
2180 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2185 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2193 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2194 dev_warn(&vsi->back->pdev->dev,
2195 "Error %s, forcing overflow promiscuous on %s\n",
2196 i40e_aq_str(hw, hw->aq.asq_last_status),
2204 * i40e_set_promiscuous - set promiscuous mode
2205 * @pf: board private structure
2206 * @promisc: promisc on or off
2208 * There are different ways of setting promiscuous mode on a PF depending on
2209 * what state/environment we're in. This identifies and sets it appropriately.
2210 * Returns 0 on success.
2212 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2214 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2215 struct i40e_hw *hw = &pf->hw;
2218 if (vsi->type == I40E_VSI_MAIN &&
2219 pf->lan_veb != I40E_NO_VEB &&
2220 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2221 /* set defport ON for Main VSI instead of true promisc
2222 * this way we will get all unicast/multicast and VLAN
2223 * promisc behavior but will not get VF or VMDq traffic
2224 * replicated on the Main VSI.
2227 aq_ret = i40e_aq_set_default_vsi(hw,
2231 aq_ret = i40e_aq_clear_default_vsi(hw,
2235 dev_info(&pf->pdev->dev,
2236 "Set default VSI failed, err %s, aq_err %s\n",
2237 i40e_stat_str(hw, aq_ret),
2238 i40e_aq_str(hw, hw->aq.asq_last_status));
2241 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2247 dev_info(&pf->pdev->dev,
2248 "set unicast promisc failed, err %s, aq_err %s\n",
2249 i40e_stat_str(hw, aq_ret),
2250 i40e_aq_str(hw, hw->aq.asq_last_status));
2252 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2257 dev_info(&pf->pdev->dev,
2258 "set multicast promisc failed, err %s, aq_err %s\n",
2259 i40e_stat_str(hw, aq_ret),
2260 i40e_aq_str(hw, hw->aq.asq_last_status));
2265 pf->cur_promisc = promisc;
2271 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2272 * @vsi: ptr to the VSI
2274 * Push any outstanding VSI filter changes through the AdminQ.
2276 * Returns 0 or error value
2278 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2280 struct hlist_head tmp_add_list, tmp_del_list;
2281 struct i40e_mac_filter *f;
2282 struct i40e_new_mac_filter *new, *add_head = NULL;
2283 struct i40e_hw *hw = &vsi->back->hw;
2284 bool old_overflow, new_overflow;
2285 unsigned int failed_filters = 0;
2286 unsigned int vlan_filters = 0;
2287 char vsi_name[16] = "PF";
2288 int filter_list_len = 0;
2289 i40e_status aq_ret = 0;
2290 u32 changed_flags = 0;
2291 struct hlist_node *h;
2300 /* empty array typed pointers, kcalloc later */
2301 struct i40e_aqc_add_macvlan_element_data *add_list;
2302 struct i40e_aqc_remove_macvlan_element_data *del_list;
2304 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2305 usleep_range(1000, 2000);
2308 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2311 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2312 vsi->current_netdev_flags = vsi->netdev->flags;
2315 INIT_HLIST_HEAD(&tmp_add_list);
2316 INIT_HLIST_HEAD(&tmp_del_list);
2318 if (vsi->type == I40E_VSI_SRIOV)
2319 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2320 else if (vsi->type != I40E_VSI_MAIN)
2321 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2323 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2324 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2326 spin_lock_bh(&vsi->mac_filter_hash_lock);
2327 /* Create a list of filters to delete. */
2328 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2329 if (f->state == I40E_FILTER_REMOVE) {
2330 /* Move the element into temporary del_list */
2331 hash_del(&f->hlist);
2332 hlist_add_head(&f->hlist, &tmp_del_list);
2334 /* Avoid counting removed filters */
2337 if (f->state == I40E_FILTER_NEW) {
2338 /* Create a temporary i40e_new_mac_filter */
2339 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2341 goto err_no_memory_locked;
2343 /* Store pointer to the real filter */
2345 new->state = f->state;
2347 /* Add it to the hash list */
2348 hlist_add_head(&new->hlist, &tmp_add_list);
2351 /* Count the number of active (current and new) VLAN
2352 * filters we have now. Does not count filters which
2353 * are marked for deletion.
2359 retval = i40e_correct_mac_vlan_filters(vsi,
2364 goto err_no_memory_locked;
2366 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2369 /* Now process 'del_list' outside the lock */
2370 if (!hlist_empty(&tmp_del_list)) {
2371 filter_list_len = hw->aq.asq_buf_size /
2372 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2373 list_size = filter_list_len *
2374 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2375 del_list = kzalloc(list_size, GFP_ATOMIC);
2379 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2382 /* handle broadcast filters by updating the broadcast
2383 * promiscuous flag and release filter list.
2385 if (is_broadcast_ether_addr(f->macaddr)) {
2386 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2388 hlist_del(&f->hlist);
2393 /* add to delete list */
2394 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2395 if (f->vlan == I40E_VLAN_ANY) {
2396 del_list[num_del].vlan_tag = 0;
2397 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2399 del_list[num_del].vlan_tag =
2400 cpu_to_le16((u16)(f->vlan));
2403 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2404 del_list[num_del].flags = cmd_flags;
2407 /* flush a full buffer */
2408 if (num_del == filter_list_len) {
2409 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2411 memset(del_list, 0, list_size);
2414 /* Release memory for MAC filter entries which were
2415 * synced up with HW.
2417 hlist_del(&f->hlist);
2422 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2430 if (!hlist_empty(&tmp_add_list)) {
2431 /* Do all the adds now. */
2432 filter_list_len = hw->aq.asq_buf_size /
2433 sizeof(struct i40e_aqc_add_macvlan_element_data);
2434 list_size = filter_list_len *
2435 sizeof(struct i40e_aqc_add_macvlan_element_data);
2436 add_list = kzalloc(list_size, GFP_ATOMIC);
2441 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2442 /* handle broadcast filters by updating the broadcast
2443 * promiscuous flag instead of adding a MAC filter.
2445 if (is_broadcast_ether_addr(new->f->macaddr)) {
2446 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2448 new->state = I40E_FILTER_FAILED;
2450 new->state = I40E_FILTER_ACTIVE;
2454 /* add to add array */
2458 ether_addr_copy(add_list[num_add].mac_addr,
2460 if (new->f->vlan == I40E_VLAN_ANY) {
2461 add_list[num_add].vlan_tag = 0;
2462 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2464 add_list[num_add].vlan_tag =
2465 cpu_to_le16((u16)(new->f->vlan));
2467 add_list[num_add].queue_number = 0;
2468 /* set invalid match method for later detection */
2469 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2470 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2471 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2474 /* flush a full buffer */
2475 if (num_add == filter_list_len) {
2476 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2478 memset(add_list, 0, list_size);
2483 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2486 /* Now move all of the filters from the temp add list back to
2489 spin_lock_bh(&vsi->mac_filter_hash_lock);
2490 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2491 /* Only update the state if we're still NEW */
2492 if (new->f->state == I40E_FILTER_NEW)
2493 new->f->state = new->state;
2494 hlist_del(&new->hlist);
2497 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2502 /* Determine the number of active and failed filters. */
2503 spin_lock_bh(&vsi->mac_filter_hash_lock);
2504 vsi->active_filters = 0;
2505 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2506 if (f->state == I40E_FILTER_ACTIVE)
2507 vsi->active_filters++;
2508 else if (f->state == I40E_FILTER_FAILED)
2511 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2513 /* Check if we are able to exit overflow promiscuous mode. We can
2514 * safely exit if we didn't just enter, we no longer have any failed
2515 * filters, and we have reduced filters below the threshold value.
2517 if (old_overflow && !failed_filters &&
2518 vsi->active_filters < vsi->promisc_threshold) {
2519 dev_info(&pf->pdev->dev,
2520 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2522 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2523 vsi->promisc_threshold = 0;
2526 /* if the VF is not trusted do not do promisc */
2527 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2528 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2532 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2534 /* If we are entering overflow promiscuous, we need to calculate a new
2535 * threshold for when we are safe to exit
2537 if (!old_overflow && new_overflow)
2538 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2540 /* check for changes in promiscuous modes */
2541 if (changed_flags & IFF_ALLMULTI) {
2542 bool cur_multipromisc;
2544 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2545 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2550 retval = i40e_aq_rc_to_posix(aq_ret,
2551 hw->aq.asq_last_status);
2552 dev_info(&pf->pdev->dev,
2553 "set multi promisc failed on %s, err %s aq_err %s\n",
2555 i40e_stat_str(hw, aq_ret),
2556 i40e_aq_str(hw, hw->aq.asq_last_status));
2558 dev_info(&pf->pdev->dev, "%s is %s allmulti mode.\n",
2560 cur_multipromisc ? "entering" : "leaving");
2564 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2567 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2569 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2571 retval = i40e_aq_rc_to_posix(aq_ret,
2572 hw->aq.asq_last_status);
2573 dev_info(&pf->pdev->dev,
2574 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2575 cur_promisc ? "on" : "off",
2577 i40e_stat_str(hw, aq_ret),
2578 i40e_aq_str(hw, hw->aq.asq_last_status));
2582 /* if something went wrong then set the changed flag so we try again */
2584 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2586 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2590 /* Restore elements on the temporary add and delete lists */
2591 spin_lock_bh(&vsi->mac_filter_hash_lock);
2592 err_no_memory_locked:
2593 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2594 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2595 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2597 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2598 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2603 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2604 * @pf: board private structure
2606 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2612 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2614 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state)) {
2615 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2619 for (v = 0; v < pf->num_alloc_vsi; v++) {
2621 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2622 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2625 /* come back and try again later */
2626 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2632 clear_bit(__I40E_VF_DISABLE, pf->state);
2636 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2639 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2641 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2642 return I40E_RXBUFFER_2048;
2644 return I40E_RXBUFFER_3072;
2648 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2649 * @netdev: network interface device structure
2650 * @new_mtu: new value for maximum frame size
2652 * Returns 0 on success, negative on failure
2654 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2656 struct i40e_netdev_priv *np = netdev_priv(netdev);
2657 struct i40e_vsi *vsi = np->vsi;
2658 struct i40e_pf *pf = vsi->back;
2660 if (i40e_enabled_xdp_vsi(vsi)) {
2661 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2663 if (frame_size > i40e_max_xdp_frame_size(vsi))
2667 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2668 netdev->mtu, new_mtu);
2669 netdev->mtu = new_mtu;
2670 if (netif_running(netdev))
2671 i40e_vsi_reinit_locked(vsi);
2672 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2673 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2678 * i40e_ioctl - Access the hwtstamp interface
2679 * @netdev: network interface device structure
2680 * @ifr: interface request data
2681 * @cmd: ioctl command
2683 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2685 struct i40e_netdev_priv *np = netdev_priv(netdev);
2686 struct i40e_pf *pf = np->vsi->back;
2690 return i40e_ptp_get_ts_config(pf, ifr);
2692 return i40e_ptp_set_ts_config(pf, ifr);
2699 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2700 * @vsi: the vsi being adjusted
2702 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2704 struct i40e_vsi_context ctxt;
2707 /* Don't modify stripping options if a port VLAN is active */
2711 if ((vsi->info.valid_sections &
2712 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2713 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2714 return; /* already enabled */
2716 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2717 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2718 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2720 ctxt.seid = vsi->seid;
2721 ctxt.info = vsi->info;
2722 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2724 dev_info(&vsi->back->pdev->dev,
2725 "update vlan stripping failed, err %s aq_err %s\n",
2726 i40e_stat_str(&vsi->back->hw, ret),
2727 i40e_aq_str(&vsi->back->hw,
2728 vsi->back->hw.aq.asq_last_status));
2733 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2734 * @vsi: the vsi being adjusted
2736 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2738 struct i40e_vsi_context ctxt;
2741 /* Don't modify stripping options if a port VLAN is active */
2745 if ((vsi->info.valid_sections &
2746 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2747 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2748 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2749 return; /* already disabled */
2751 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2752 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2753 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2755 ctxt.seid = vsi->seid;
2756 ctxt.info = vsi->info;
2757 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2759 dev_info(&vsi->back->pdev->dev,
2760 "update vlan stripping failed, err %s aq_err %s\n",
2761 i40e_stat_str(&vsi->back->hw, ret),
2762 i40e_aq_str(&vsi->back->hw,
2763 vsi->back->hw.aq.asq_last_status));
2768 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2769 * @vsi: the vsi being configured
2770 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2772 * This is a helper function for adding a new MAC/VLAN filter with the
2773 * specified VLAN for each existing MAC address already in the hash table.
2774 * This function does *not* perform any accounting to update filters based on
2777 * NOTE: this function expects to be called while under the
2778 * mac_filter_hash_lock
2780 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2782 struct i40e_mac_filter *f, *add_f;
2783 struct hlist_node *h;
2786 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2787 if (f->state == I40E_FILTER_REMOVE)
2789 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2791 dev_info(&vsi->back->pdev->dev,
2792 "Could not add vlan filter %d for %pM\n",
2802 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2803 * @vsi: the VSI being configured
2804 * @vid: VLAN id to be added
2806 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2813 /* The network stack will attempt to add VID=0, with the intention to
2814 * receive priority tagged packets with a VLAN of 0. Our HW receives
2815 * these packets by default when configured to receive untagged
2816 * packets, so we don't need to add a filter for this case.
2817 * Additionally, HW interprets adding a VID=0 filter as meaning to
2818 * receive *only* tagged traffic and stops receiving untagged traffic.
2819 * Thus, we do not want to actually add a filter for VID=0
2824 /* Locked once because all functions invoked below iterates list*/
2825 spin_lock_bh(&vsi->mac_filter_hash_lock);
2826 err = i40e_add_vlan_all_mac(vsi, vid);
2827 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2831 /* schedule our worker thread which will take care of
2832 * applying the new filter changes
2834 i40e_service_event_schedule(vsi->back);
2839 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2840 * @vsi: the vsi being configured
2841 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2843 * This function should be used to remove all VLAN filters which match the
2844 * given VID. It does not schedule the service event and does not take the
2845 * mac_filter_hash_lock so it may be combined with other operations under
2846 * a single invocation of the mac_filter_hash_lock.
2848 * NOTE: this function expects to be called while under the
2849 * mac_filter_hash_lock
2851 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2853 struct i40e_mac_filter *f;
2854 struct hlist_node *h;
2857 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2859 __i40e_del_filter(vsi, f);
2864 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2865 * @vsi: the VSI being configured
2866 * @vid: VLAN id to be removed
2868 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2870 if (!vid || vsi->info.pvid)
2873 spin_lock_bh(&vsi->mac_filter_hash_lock);
2874 i40e_rm_vlan_all_mac(vsi, vid);
2875 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2877 /* schedule our worker thread which will take care of
2878 * applying the new filter changes
2880 i40e_service_event_schedule(vsi->back);
2884 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2885 * @netdev: network interface to be adjusted
2886 * @proto: unused protocol value
2887 * @vid: vlan id to be added
2889 * net_device_ops implementation for adding vlan ids
2891 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2892 __always_unused __be16 proto, u16 vid)
2894 struct i40e_netdev_priv *np = netdev_priv(netdev);
2895 struct i40e_vsi *vsi = np->vsi;
2898 if (vid >= VLAN_N_VID)
2901 ret = i40e_vsi_add_vlan(vsi, vid);
2903 set_bit(vid, vsi->active_vlans);
2909 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2910 * @netdev: network interface to be adjusted
2911 * @proto: unused protocol value
2912 * @vid: vlan id to be added
2914 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
2915 __always_unused __be16 proto, u16 vid)
2917 struct i40e_netdev_priv *np = netdev_priv(netdev);
2918 struct i40e_vsi *vsi = np->vsi;
2920 if (vid >= VLAN_N_VID)
2922 set_bit(vid, vsi->active_vlans);
2926 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2927 * @netdev: network interface to be adjusted
2928 * @proto: unused protocol value
2929 * @vid: vlan id to be removed
2931 * net_device_ops implementation for removing vlan ids
2933 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2934 __always_unused __be16 proto, u16 vid)
2936 struct i40e_netdev_priv *np = netdev_priv(netdev);
2937 struct i40e_vsi *vsi = np->vsi;
2939 /* return code is ignored as there is nothing a user
2940 * can do about failure to remove and a log message was
2941 * already printed from the other function
2943 i40e_vsi_kill_vlan(vsi, vid);
2945 clear_bit(vid, vsi->active_vlans);
2951 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2952 * @vsi: the vsi being brought back up
2954 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2961 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2962 i40e_vlan_stripping_enable(vsi);
2964 i40e_vlan_stripping_disable(vsi);
2966 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2967 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
2972 * i40e_vsi_add_pvid - Add pvid for the VSI
2973 * @vsi: the vsi being adjusted
2974 * @vid: the vlan id to set as a PVID
2976 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2978 struct i40e_vsi_context ctxt;
2981 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2982 vsi->info.pvid = cpu_to_le16(vid);
2983 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2984 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2985 I40E_AQ_VSI_PVLAN_EMOD_STR;
2987 ctxt.seid = vsi->seid;
2988 ctxt.info = vsi->info;
2989 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2991 dev_info(&vsi->back->pdev->dev,
2992 "add pvid failed, err %s aq_err %s\n",
2993 i40e_stat_str(&vsi->back->hw, ret),
2994 i40e_aq_str(&vsi->back->hw,
2995 vsi->back->hw.aq.asq_last_status));
3003 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3004 * @vsi: the vsi being adjusted
3006 * Just use the vlan_rx_register() service to put it back to normal
3008 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3012 i40e_vlan_stripping_disable(vsi);
3016 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3017 * @vsi: ptr to the VSI
3019 * If this function returns with an error, then it's possible one or
3020 * more of the rings is populated (while the rest are not). It is the
3021 * callers duty to clean those orphaned rings.
3023 * Return 0 on success, negative on failure
3025 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3029 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3030 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3032 if (!i40e_enabled_xdp_vsi(vsi))
3035 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3036 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3042 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3043 * @vsi: ptr to the VSI
3045 * Free VSI's transmit software resources
3047 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3051 if (vsi->tx_rings) {
3052 for (i = 0; i < vsi->num_queue_pairs; i++)
3053 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3054 i40e_free_tx_resources(vsi->tx_rings[i]);
3057 if (vsi->xdp_rings) {
3058 for (i = 0; i < vsi->num_queue_pairs; i++)
3059 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3060 i40e_free_tx_resources(vsi->xdp_rings[i]);
3065 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3066 * @vsi: ptr to the VSI
3068 * If this function returns with an error, then it's possible one or
3069 * more of the rings is populated (while the rest are not). It is the
3070 * callers duty to clean those orphaned rings.
3072 * Return 0 on success, negative on failure
3074 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3078 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3079 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3084 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3085 * @vsi: ptr to the VSI
3087 * Free all receive software resources
3089 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3096 for (i = 0; i < vsi->num_queue_pairs; i++)
3097 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3098 i40e_free_rx_resources(vsi->rx_rings[i]);
3102 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3103 * @ring: The Tx ring to configure
3105 * This enables/disables XPS for a given Tx descriptor ring
3106 * based on the TCs enabled for the VSI that ring belongs to.
3108 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3112 if (!ring->q_vector || !ring->netdev || ring->ch)
3115 /* We only initialize XPS once, so as not to overwrite user settings */
3116 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3119 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3120 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3125 * i40e_xsk_umem - Retrieve the AF_XDP ZC if XDP and ZC is enabled
3126 * @ring: The Tx or Rx ring
3128 * Returns the UMEM or NULL.
3130 static struct xdp_umem *i40e_xsk_umem(struct i40e_ring *ring)
3132 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3133 int qid = ring->queue_index;
3135 if (ring_is_xdp(ring))
3136 qid -= ring->vsi->alloc_queue_pairs;
3138 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3141 return xdp_get_umem_from_qid(ring->vsi->netdev, qid);
3145 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3146 * @ring: The Tx ring to configure
3148 * Configure the Tx descriptor ring in the HMC context.
3150 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3152 struct i40e_vsi *vsi = ring->vsi;
3153 u16 pf_q = vsi->base_queue + ring->queue_index;
3154 struct i40e_hw *hw = &vsi->back->hw;
3155 struct i40e_hmc_obj_txq tx_ctx;
3156 i40e_status err = 0;
3159 if (ring_is_xdp(ring))
3160 ring->xsk_umem = i40e_xsk_umem(ring);
3162 /* some ATR related tx ring init */
3163 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3164 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3165 ring->atr_count = 0;
3167 ring->atr_sample_rate = 0;
3171 i40e_config_xps_tx_ring(ring);
3173 /* clear the context structure first */
3174 memset(&tx_ctx, 0, sizeof(tx_ctx));
3176 tx_ctx.new_context = 1;
3177 tx_ctx.base = (ring->dma / 128);
3178 tx_ctx.qlen = ring->count;
3179 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3180 I40E_FLAG_FD_ATR_ENABLED));
3181 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3182 /* FDIR VSI tx ring can still use RS bit and writebacks */
3183 if (vsi->type != I40E_VSI_FDIR)
3184 tx_ctx.head_wb_ena = 1;
3185 tx_ctx.head_wb_addr = ring->dma +
3186 (ring->count * sizeof(struct i40e_tx_desc));
3188 /* As part of VSI creation/update, FW allocates certain
3189 * Tx arbitration queue sets for each TC enabled for
3190 * the VSI. The FW returns the handles to these queue
3191 * sets as part of the response buffer to Add VSI,
3192 * Update VSI, etc. AQ commands. It is expected that
3193 * these queue set handles be associated with the Tx
3194 * queues by the driver as part of the TX queue context
3195 * initialization. This has to be done regardless of
3196 * DCB as by default everything is mapped to TC0.
3201 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3204 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3206 tx_ctx.rdylist_act = 0;
3208 /* clear the context in the HMC */
3209 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3211 dev_info(&vsi->back->pdev->dev,
3212 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3213 ring->queue_index, pf_q, err);
3217 /* set the context in the HMC */
3218 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3220 dev_info(&vsi->back->pdev->dev,
3221 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3222 ring->queue_index, pf_q, err);
3226 /* Now associate this queue with this PCI function */
3228 if (ring->ch->type == I40E_VSI_VMDQ2)
3229 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3233 qtx_ctl |= (ring->ch->vsi_number <<
3234 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3235 I40E_QTX_CTL_VFVM_INDX_MASK;
3237 if (vsi->type == I40E_VSI_VMDQ2) {
3238 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3239 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3240 I40E_QTX_CTL_VFVM_INDX_MASK;
3242 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3246 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3247 I40E_QTX_CTL_PF_INDX_MASK);
3248 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3251 /* cache tail off for easier writes later */
3252 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3258 * i40e_configure_rx_ring - Configure a receive ring context
3259 * @ring: The Rx ring to configure
3261 * Configure the Rx descriptor ring in the HMC context.
3263 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3265 struct i40e_vsi *vsi = ring->vsi;
3266 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3267 u16 pf_q = vsi->base_queue + ring->queue_index;
3268 struct i40e_hw *hw = &vsi->back->hw;
3269 struct i40e_hmc_obj_rxq rx_ctx;
3270 i40e_status err = 0;
3274 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3276 /* clear the context structure first */
3277 memset(&rx_ctx, 0, sizeof(rx_ctx));
3279 if (ring->vsi->type == I40E_VSI_MAIN)
3280 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3282 ring->xsk_umem = i40e_xsk_umem(ring);
3283 if (ring->xsk_umem) {
3284 ring->rx_buf_len = ring->xsk_umem->chunk_size_nohr -
3285 XDP_PACKET_HEADROOM;
3286 /* For AF_XDP ZC, we disallow packets to span on
3287 * multiple buffers, thus letting us skip that
3288 * handling in the fast-path.
3291 ring->zca.free = i40e_zca_free;
3292 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3297 dev_info(&vsi->back->pdev->dev,
3298 "Registered XDP mem model MEM_TYPE_ZERO_COPY on Rx ring %d\n",
3302 ring->rx_buf_len = vsi->rx_buf_len;
3303 if (ring->vsi->type == I40E_VSI_MAIN) {
3304 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3305 MEM_TYPE_PAGE_SHARED,
3312 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3313 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3315 rx_ctx.base = (ring->dma / 128);
3316 rx_ctx.qlen = ring->count;
3318 /* use 32 byte descriptors */
3321 /* descriptor type is always zero
3324 rx_ctx.hsplit_0 = 0;
3326 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3327 if (hw->revision_id == 0)
3328 rx_ctx.lrxqthresh = 0;
3330 rx_ctx.lrxqthresh = 1;
3331 rx_ctx.crcstrip = 1;
3333 /* this controls whether VLAN is stripped from inner headers */
3335 /* set the prefena field to 1 because the manual says to */
3338 /* clear the context in the HMC */
3339 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3341 dev_info(&vsi->back->pdev->dev,
3342 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3343 ring->queue_index, pf_q, err);
3347 /* set the context in the HMC */
3348 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3350 dev_info(&vsi->back->pdev->dev,
3351 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3352 ring->queue_index, pf_q, err);
3356 /* configure Rx buffer alignment */
3357 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3358 clear_ring_build_skb_enabled(ring);
3360 set_ring_build_skb_enabled(ring);
3362 /* cache tail for quicker writes, and clear the reg before use */
3363 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3364 writel(0, ring->tail);
3366 ok = ring->xsk_umem ?
3367 i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring)) :
3368 !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3370 /* Log this in case the user has forgotten to give the kernel
3371 * any buffers, even later in the application.
3373 dev_info(&vsi->back->pdev->dev,
3374 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3375 ring->xsk_umem ? "UMEM enabled " : "",
3376 ring->queue_index, pf_q);
3383 * i40e_vsi_configure_tx - Configure the VSI for Tx
3384 * @vsi: VSI structure describing this set of rings and resources
3386 * Configure the Tx VSI for operation.
3388 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3393 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3394 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3396 if (err || !i40e_enabled_xdp_vsi(vsi))
3399 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3400 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3406 * i40e_vsi_configure_rx - Configure the VSI for Rx
3407 * @vsi: the VSI being configured
3409 * Configure the Rx VSI for operation.
3411 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3416 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3417 vsi->max_frame = I40E_MAX_RXBUFFER;
3418 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3419 #if (PAGE_SIZE < 8192)
3420 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3421 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3422 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3423 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3426 vsi->max_frame = I40E_MAX_RXBUFFER;
3427 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3431 /* set up individual rings */
3432 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3433 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3439 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3440 * @vsi: ptr to the VSI
3442 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3444 struct i40e_ring *tx_ring, *rx_ring;
3445 u16 qoffset, qcount;
3448 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3449 /* Reset the TC information */
3450 for (i = 0; i < vsi->num_queue_pairs; i++) {
3451 rx_ring = vsi->rx_rings[i];
3452 tx_ring = vsi->tx_rings[i];
3453 rx_ring->dcb_tc = 0;
3454 tx_ring->dcb_tc = 0;
3459 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3460 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3463 qoffset = vsi->tc_config.tc_info[n].qoffset;
3464 qcount = vsi->tc_config.tc_info[n].qcount;
3465 for (i = qoffset; i < (qoffset + qcount); i++) {
3466 rx_ring = vsi->rx_rings[i];
3467 tx_ring = vsi->tx_rings[i];
3468 rx_ring->dcb_tc = n;
3469 tx_ring->dcb_tc = n;
3475 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3476 * @vsi: ptr to the VSI
3478 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3481 i40e_set_rx_mode(vsi->netdev);
3485 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3486 * @vsi: Pointer to the targeted VSI
3488 * This function replays the hlist on the hw where all the SB Flow Director
3489 * filters were saved.
3491 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3493 struct i40e_fdir_filter *filter;
3494 struct i40e_pf *pf = vsi->back;
3495 struct hlist_node *node;
3497 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3500 /* Reset FDir counters as we're replaying all existing filters */
3501 pf->fd_tcp4_filter_cnt = 0;
3502 pf->fd_udp4_filter_cnt = 0;
3503 pf->fd_sctp4_filter_cnt = 0;
3504 pf->fd_ip4_filter_cnt = 0;
3506 hlist_for_each_entry_safe(filter, node,
3507 &pf->fdir_filter_list, fdir_node) {
3508 i40e_add_del_fdir(vsi, filter, true);
3513 * i40e_vsi_configure - Set up the VSI for action
3514 * @vsi: the VSI being configured
3516 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3520 i40e_set_vsi_rx_mode(vsi);
3521 i40e_restore_vlan(vsi);
3522 i40e_vsi_config_dcb_rings(vsi);
3523 err = i40e_vsi_configure_tx(vsi);
3525 err = i40e_vsi_configure_rx(vsi);
3531 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3532 * @vsi: the VSI being configured
3534 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3536 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3537 struct i40e_pf *pf = vsi->back;
3538 struct i40e_hw *hw = &pf->hw;
3543 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3544 * and PFINT_LNKLSTn registers, e.g.:
3545 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3547 qp = vsi->base_queue;
3548 vector = vsi->base_vector;
3549 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3550 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3552 q_vector->rx.next_update = jiffies + 1;
3553 q_vector->rx.target_itr =
3554 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3555 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3556 q_vector->rx.target_itr >> 1);
3557 q_vector->rx.current_itr = q_vector->rx.target_itr;
3559 q_vector->tx.next_update = jiffies + 1;
3560 q_vector->tx.target_itr =
3561 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3562 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3563 q_vector->tx.target_itr >> 1);
3564 q_vector->tx.current_itr = q_vector->tx.target_itr;
3566 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3567 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3569 /* Linked list for the queuepairs assigned to this vector */
3570 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3571 for (q = 0; q < q_vector->num_ringpairs; q++) {
3572 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3575 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3576 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3577 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3578 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3579 (I40E_QUEUE_TYPE_TX <<
3580 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3582 wr32(hw, I40E_QINT_RQCTL(qp), val);
3585 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3586 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3587 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3588 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3589 (I40E_QUEUE_TYPE_TX <<
3590 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3592 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3595 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3596 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3597 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3598 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3599 (I40E_QUEUE_TYPE_RX <<
3600 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3602 /* Terminate the linked list */
3603 if (q == (q_vector->num_ringpairs - 1))
3604 val |= (I40E_QUEUE_END_OF_LIST <<
3605 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3607 wr32(hw, I40E_QINT_TQCTL(qp), val);
3616 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3617 * @pf: pointer to private device data structure
3619 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3621 struct i40e_hw *hw = &pf->hw;
3624 /* clear things first */
3625 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3626 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3628 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3629 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3630 I40E_PFINT_ICR0_ENA_GRST_MASK |
3631 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3632 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3633 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3634 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3635 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3637 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3638 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3640 if (pf->flags & I40E_FLAG_PTP)
3641 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3643 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3645 /* SW_ITR_IDX = 0, but don't change INTENA */
3646 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3647 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3649 /* OTHER_ITR_IDX = 0 */
3650 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3654 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3655 * @vsi: the VSI being configured
3657 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3659 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3660 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3661 struct i40e_pf *pf = vsi->back;
3662 struct i40e_hw *hw = &pf->hw;
3665 /* set the ITR configuration */
3666 q_vector->rx.next_update = jiffies + 1;
3667 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3668 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3669 q_vector->rx.current_itr = q_vector->rx.target_itr;
3670 q_vector->tx.next_update = jiffies + 1;
3671 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3672 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3673 q_vector->tx.current_itr = q_vector->tx.target_itr;
3675 i40e_enable_misc_int_causes(pf);
3677 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3678 wr32(hw, I40E_PFINT_LNKLST0, 0);
3680 /* Associate the queue pair to the vector and enable the queue int */
3681 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3682 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3683 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3684 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3686 wr32(hw, I40E_QINT_RQCTL(0), val);
3688 if (i40e_enabled_xdp_vsi(vsi)) {
3689 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3690 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3692 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3694 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3697 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3698 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3699 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3701 wr32(hw, I40E_QINT_TQCTL(0), val);
3706 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3707 * @pf: board private structure
3709 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3711 struct i40e_hw *hw = &pf->hw;
3713 wr32(hw, I40E_PFINT_DYN_CTL0,
3714 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3719 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3720 * @pf: board private structure
3722 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3724 struct i40e_hw *hw = &pf->hw;
3727 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3728 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3729 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3731 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3736 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3737 * @irq: interrupt number
3738 * @data: pointer to a q_vector
3740 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3742 struct i40e_q_vector *q_vector = data;
3744 if (!q_vector->tx.ring && !q_vector->rx.ring)
3747 napi_schedule_irqoff(&q_vector->napi);
3753 * i40e_irq_affinity_notify - Callback for affinity changes
3754 * @notify: context as to what irq was changed
3755 * @mask: the new affinity mask
3757 * This is a callback function used by the irq_set_affinity_notifier function
3758 * so that we may register to receive changes to the irq affinity masks.
3760 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3761 const cpumask_t *mask)
3763 struct i40e_q_vector *q_vector =
3764 container_of(notify, struct i40e_q_vector, affinity_notify);
3766 cpumask_copy(&q_vector->affinity_mask, mask);
3770 * i40e_irq_affinity_release - Callback for affinity notifier release
3771 * @ref: internal core kernel usage
3773 * This is a callback function used by the irq_set_affinity_notifier function
3774 * to inform the current notification subscriber that they will no longer
3775 * receive notifications.
3777 static void i40e_irq_affinity_release(struct kref *ref) {}
3780 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3781 * @vsi: the VSI being configured
3782 * @basename: name for the vector
3784 * Allocates MSI-X vectors and requests interrupts from the kernel.
3786 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3788 int q_vectors = vsi->num_q_vectors;
3789 struct i40e_pf *pf = vsi->back;
3790 int base = vsi->base_vector;
3797 for (vector = 0; vector < q_vectors; vector++) {
3798 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3800 irq_num = pf->msix_entries[base + vector].vector;
3802 if (q_vector->tx.ring && q_vector->rx.ring) {
3803 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3804 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3806 } else if (q_vector->rx.ring) {
3807 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3808 "%s-%s-%d", basename, "rx", rx_int_idx++);
3809 } else if (q_vector->tx.ring) {
3810 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3811 "%s-%s-%d", basename, "tx", tx_int_idx++);
3813 /* skip this unused q_vector */
3816 err = request_irq(irq_num,
3822 dev_info(&pf->pdev->dev,
3823 "MSIX request_irq failed, error: %d\n", err);
3824 goto free_queue_irqs;
3827 /* register for affinity change notifications */
3828 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3829 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3830 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3831 /* Spread affinity hints out across online CPUs.
3833 * get_cpu_mask returns a static constant mask with
3834 * a permanent lifetime so it's ok to pass to
3835 * irq_set_affinity_hint without making a copy.
3837 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3838 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3841 vsi->irqs_ready = true;
3847 irq_num = pf->msix_entries[base + vector].vector;
3848 irq_set_affinity_notifier(irq_num, NULL);
3849 irq_set_affinity_hint(irq_num, NULL);
3850 free_irq(irq_num, &vsi->q_vectors[vector]);
3856 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3857 * @vsi: the VSI being un-configured
3859 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3861 struct i40e_pf *pf = vsi->back;
3862 struct i40e_hw *hw = &pf->hw;
3863 int base = vsi->base_vector;
3866 /* disable interrupt causation from each queue */
3867 for (i = 0; i < vsi->num_queue_pairs; i++) {
3870 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3871 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3872 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3874 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3875 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3876 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3878 if (!i40e_enabled_xdp_vsi(vsi))
3880 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3883 /* disable each interrupt */
3884 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3885 for (i = vsi->base_vector;
3886 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3887 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3890 for (i = 0; i < vsi->num_q_vectors; i++)
3891 synchronize_irq(pf->msix_entries[i + base].vector);
3893 /* Legacy and MSI mode - this stops all interrupt handling */
3894 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3895 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3897 synchronize_irq(pf->pdev->irq);
3902 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3903 * @vsi: the VSI being configured
3905 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3907 struct i40e_pf *pf = vsi->back;
3910 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3911 for (i = 0; i < vsi->num_q_vectors; i++)
3912 i40e_irq_dynamic_enable(vsi, i);
3914 i40e_irq_dynamic_enable_icr0(pf);
3917 i40e_flush(&pf->hw);
3922 * i40e_free_misc_vector - Free the vector that handles non-queue events
3923 * @pf: board private structure
3925 static void i40e_free_misc_vector(struct i40e_pf *pf)
3928 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3929 i40e_flush(&pf->hw);
3931 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3932 synchronize_irq(pf->msix_entries[0].vector);
3933 free_irq(pf->msix_entries[0].vector, pf);
3934 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3939 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3940 * @irq: interrupt number
3941 * @data: pointer to a q_vector
3943 * This is the handler used for all MSI/Legacy interrupts, and deals
3944 * with both queue and non-queue interrupts. This is also used in
3945 * MSIX mode to handle the non-queue interrupts.
3947 static irqreturn_t i40e_intr(int irq, void *data)
3949 struct i40e_pf *pf = (struct i40e_pf *)data;
3950 struct i40e_hw *hw = &pf->hw;
3951 irqreturn_t ret = IRQ_NONE;
3952 u32 icr0, icr0_remaining;
3955 icr0 = rd32(hw, I40E_PFINT_ICR0);
3956 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3958 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3959 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3962 /* if interrupt but no bits showing, must be SWINT */
3963 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3964 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3967 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3968 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3969 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3970 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3971 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
3974 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3975 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3976 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3977 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3979 /* We do not have a way to disarm Queue causes while leaving
3980 * interrupt enabled for all other causes, ideally
3981 * interrupt should be disabled while we are in NAPI but
3982 * this is not a performance path and napi_schedule()
3983 * can deal with rescheduling.
3985 if (!test_bit(__I40E_DOWN, pf->state))
3986 napi_schedule_irqoff(&q_vector->napi);
3989 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3990 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3991 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
3992 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3995 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3996 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3997 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4000 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4001 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4002 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4005 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4006 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4007 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4008 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4009 val = rd32(hw, I40E_GLGEN_RSTAT);
4010 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4011 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4012 if (val == I40E_RESET_CORER) {
4014 } else if (val == I40E_RESET_GLOBR) {
4016 } else if (val == I40E_RESET_EMPR) {
4018 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4022 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4023 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4024 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4025 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4026 rd32(hw, I40E_PFHMC_ERRORINFO),
4027 rd32(hw, I40E_PFHMC_ERRORDATA));
4030 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4031 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4033 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
4034 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4035 i40e_ptp_tx_hwtstamp(pf);
4039 /* If a critical error is pending we have no choice but to reset the
4041 * Report and mask out any remaining unexpected interrupts.
4043 icr0_remaining = icr0 & ena_mask;
4044 if (icr0_remaining) {
4045 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4047 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4048 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4049 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4050 dev_info(&pf->pdev->dev, "device will be reset\n");
4051 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4052 i40e_service_event_schedule(pf);
4054 ena_mask &= ~icr0_remaining;
4059 /* re-enable interrupt causes */
4060 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4061 if (!test_bit(__I40E_DOWN, pf->state) ||
4062 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4063 i40e_service_event_schedule(pf);
4064 i40e_irq_dynamic_enable_icr0(pf);
4071 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4072 * @tx_ring: tx ring to clean
4073 * @budget: how many cleans we're allowed
4075 * Returns true if there's any budget left (e.g. the clean is finished)
4077 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4079 struct i40e_vsi *vsi = tx_ring->vsi;
4080 u16 i = tx_ring->next_to_clean;
4081 struct i40e_tx_buffer *tx_buf;
4082 struct i40e_tx_desc *tx_desc;
4084 tx_buf = &tx_ring->tx_bi[i];
4085 tx_desc = I40E_TX_DESC(tx_ring, i);
4086 i -= tx_ring->count;
4089 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4091 /* if next_to_watch is not set then there is no work pending */
4095 /* prevent any other reads prior to eop_desc */
4098 /* if the descriptor isn't done, no work yet to do */
4099 if (!(eop_desc->cmd_type_offset_bsz &
4100 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4103 /* clear next_to_watch to prevent false hangs */
4104 tx_buf->next_to_watch = NULL;
4106 tx_desc->buffer_addr = 0;
4107 tx_desc->cmd_type_offset_bsz = 0;
4108 /* move past filter desc */
4113 i -= tx_ring->count;
4114 tx_buf = tx_ring->tx_bi;
4115 tx_desc = I40E_TX_DESC(tx_ring, 0);
4117 /* unmap skb header data */
4118 dma_unmap_single(tx_ring->dev,
4119 dma_unmap_addr(tx_buf, dma),
4120 dma_unmap_len(tx_buf, len),
4122 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4123 kfree(tx_buf->raw_buf);
4125 tx_buf->raw_buf = NULL;
4126 tx_buf->tx_flags = 0;
4127 tx_buf->next_to_watch = NULL;
4128 dma_unmap_len_set(tx_buf, len, 0);
4129 tx_desc->buffer_addr = 0;
4130 tx_desc->cmd_type_offset_bsz = 0;
4132 /* move us past the eop_desc for start of next FD desc */
4137 i -= tx_ring->count;
4138 tx_buf = tx_ring->tx_bi;
4139 tx_desc = I40E_TX_DESC(tx_ring, 0);
4142 /* update budget accounting */
4144 } while (likely(budget));
4146 i += tx_ring->count;
4147 tx_ring->next_to_clean = i;
4149 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4150 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4156 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4157 * @irq: interrupt number
4158 * @data: pointer to a q_vector
4160 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4162 struct i40e_q_vector *q_vector = data;
4163 struct i40e_vsi *vsi;
4165 if (!q_vector->tx.ring)
4168 vsi = q_vector->tx.ring->vsi;
4169 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4175 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4176 * @vsi: the VSI being configured
4177 * @v_idx: vector index
4178 * @qp_idx: queue pair index
4180 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4182 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4183 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4184 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4186 tx_ring->q_vector = q_vector;
4187 tx_ring->next = q_vector->tx.ring;
4188 q_vector->tx.ring = tx_ring;
4189 q_vector->tx.count++;
4191 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4192 if (i40e_enabled_xdp_vsi(vsi)) {
4193 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4195 xdp_ring->q_vector = q_vector;
4196 xdp_ring->next = q_vector->tx.ring;
4197 q_vector->tx.ring = xdp_ring;
4198 q_vector->tx.count++;
4201 rx_ring->q_vector = q_vector;
4202 rx_ring->next = q_vector->rx.ring;
4203 q_vector->rx.ring = rx_ring;
4204 q_vector->rx.count++;
4208 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4209 * @vsi: the VSI being configured
4211 * This function maps descriptor rings to the queue-specific vectors
4212 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4213 * one vector per queue pair, but on a constrained vector budget, we
4214 * group the queue pairs as "efficiently" as possible.
4216 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4218 int qp_remaining = vsi->num_queue_pairs;
4219 int q_vectors = vsi->num_q_vectors;
4224 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4225 * group them so there are multiple queues per vector.
4226 * It is also important to go through all the vectors available to be
4227 * sure that if we don't use all the vectors, that the remaining vectors
4228 * are cleared. This is especially important when decreasing the
4229 * number of queues in use.
4231 for (; v_start < q_vectors; v_start++) {
4232 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4234 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4236 q_vector->num_ringpairs = num_ringpairs;
4237 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4239 q_vector->rx.count = 0;
4240 q_vector->tx.count = 0;
4241 q_vector->rx.ring = NULL;
4242 q_vector->tx.ring = NULL;
4244 while (num_ringpairs--) {
4245 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4253 * i40e_vsi_request_irq - Request IRQ from the OS
4254 * @vsi: the VSI being configured
4255 * @basename: name for the vector
4257 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4259 struct i40e_pf *pf = vsi->back;
4262 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4263 err = i40e_vsi_request_irq_msix(vsi, basename);
4264 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4265 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4268 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4272 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4277 #ifdef CONFIG_NET_POLL_CONTROLLER
4279 * i40e_netpoll - A Polling 'interrupt' handler
4280 * @netdev: network interface device structure
4282 * This is used by netconsole to send skbs without having to re-enable
4283 * interrupts. It's not called while the normal interrupt routine is executing.
4285 static void i40e_netpoll(struct net_device *netdev)
4287 struct i40e_netdev_priv *np = netdev_priv(netdev);
4288 struct i40e_vsi *vsi = np->vsi;
4289 struct i40e_pf *pf = vsi->back;
4292 /* if interface is down do nothing */
4293 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4296 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4297 for (i = 0; i < vsi->num_q_vectors; i++)
4298 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4300 i40e_intr(pf->pdev->irq, netdev);
4305 #define I40E_QTX_ENA_WAIT_COUNT 50
4308 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4309 * @pf: the PF being configured
4310 * @pf_q: the PF queue
4311 * @enable: enable or disable state of the queue
4313 * This routine will wait for the given Tx queue of the PF to reach the
4314 * enabled or disabled state.
4315 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4316 * multiple retries; else will return 0 in case of success.
4318 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4323 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4324 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4325 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4328 usleep_range(10, 20);
4330 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4337 * i40e_control_tx_q - Start or stop a particular Tx queue
4338 * @pf: the PF structure
4339 * @pf_q: the PF queue to configure
4340 * @enable: start or stop the queue
4342 * This function enables or disables a single queue. Note that any delay
4343 * required after the operation is expected to be handled by the caller of
4346 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4348 struct i40e_hw *hw = &pf->hw;
4352 /* warn the TX unit of coming changes */
4353 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4355 usleep_range(10, 20);
4357 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4358 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4359 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4360 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4362 usleep_range(1000, 2000);
4365 /* Skip if the queue is already in the requested state */
4366 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4369 /* turn on/off the queue */
4371 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4372 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4374 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4377 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4381 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4383 * @pf: the PF structure
4384 * @pf_q: the PF queue to configure
4385 * @is_xdp: true if the queue is used for XDP
4386 * @enable: start or stop the queue
4388 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4389 bool is_xdp, bool enable)
4393 i40e_control_tx_q(pf, pf_q, enable);
4395 /* wait for the change to finish */
4396 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4398 dev_info(&pf->pdev->dev,
4399 "VSI seid %d %sTx ring %d %sable timeout\n",
4400 seid, (is_xdp ? "XDP " : ""), pf_q,
4401 (enable ? "en" : "dis"));
4408 * i40e_vsi_control_tx - Start or stop a VSI's rings
4409 * @vsi: the VSI being configured
4410 * @enable: start or stop the rings
4412 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4414 struct i40e_pf *pf = vsi->back;
4415 int i, pf_q, ret = 0;
4417 pf_q = vsi->base_queue;
4418 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4419 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4421 false /*is xdp*/, enable);
4425 if (!i40e_enabled_xdp_vsi(vsi))
4428 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4429 pf_q + vsi->alloc_queue_pairs,
4430 true /*is xdp*/, enable);
4438 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4439 * @pf: the PF being configured
4440 * @pf_q: the PF queue
4441 * @enable: enable or disable state of the queue
4443 * This routine will wait for the given Rx queue of the PF to reach the
4444 * enabled or disabled state.
4445 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4446 * multiple retries; else will return 0 in case of success.
4448 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4453 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4454 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4455 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4458 usleep_range(10, 20);
4460 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4467 * i40e_control_rx_q - Start or stop a particular Rx queue
4468 * @pf: the PF structure
4469 * @pf_q: the PF queue to configure
4470 * @enable: start or stop the queue
4472 * This function enables or disables a single queue. Note that
4473 * any delay required after the operation is expected to be
4474 * handled by the caller of this function.
4476 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4478 struct i40e_hw *hw = &pf->hw;
4482 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4483 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4484 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4485 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4487 usleep_range(1000, 2000);
4490 /* Skip if the queue is already in the requested state */
4491 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4494 /* turn on/off the queue */
4496 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4498 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4500 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4504 * i40e_control_wait_rx_q
4505 * @pf: the PF structure
4506 * @pf_q: queue being configured
4507 * @enable: start or stop the rings
4509 * This function enables or disables a single queue along with waiting
4510 * for the change to finish. The caller of this function should handle
4511 * the delays needed in the case of disabling queues.
4513 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4517 i40e_control_rx_q(pf, pf_q, enable);
4519 /* wait for the change to finish */
4520 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4528 * i40e_vsi_control_rx - Start or stop a VSI's rings
4529 * @vsi: the VSI being configured
4530 * @enable: start or stop the rings
4532 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4534 struct i40e_pf *pf = vsi->back;
4535 int i, pf_q, ret = 0;
4537 pf_q = vsi->base_queue;
4538 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4539 ret = i40e_control_wait_rx_q(pf, pf_q, enable);
4541 dev_info(&pf->pdev->dev,
4542 "VSI seid %d Rx ring %d %sable timeout\n",
4543 vsi->seid, pf_q, (enable ? "en" : "dis"));
4548 /* Due to HW errata, on Rx disable only, the register can indicate done
4549 * before it really is. Needs 50ms to be sure
4558 * i40e_vsi_start_rings - Start a VSI's rings
4559 * @vsi: the VSI being configured
4561 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4565 /* do rx first for enable and last for disable */
4566 ret = i40e_vsi_control_rx(vsi, true);
4569 ret = i40e_vsi_control_tx(vsi, true);
4575 * i40e_vsi_stop_rings - Stop a VSI's rings
4576 * @vsi: the VSI being configured
4578 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4580 /* When port TX is suspended, don't wait */
4581 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4582 return i40e_vsi_stop_rings_no_wait(vsi);
4584 /* do rx first for enable and last for disable
4585 * Ignore return value, we need to shutdown whatever we can
4587 i40e_vsi_control_tx(vsi, false);
4588 i40e_vsi_control_rx(vsi, false);
4592 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4593 * @vsi: the VSI being shutdown
4595 * This function stops all the rings for a VSI but does not delay to verify
4596 * that rings have been disabled. It is expected that the caller is shutting
4597 * down multiple VSIs at once and will delay together for all the VSIs after
4598 * initiating the shutdown. This is particularly useful for shutting down lots
4599 * of VFs together. Otherwise, a large delay can be incurred while configuring
4600 * each VSI in serial.
4602 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4604 struct i40e_pf *pf = vsi->back;
4607 pf_q = vsi->base_queue;
4608 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4609 i40e_control_tx_q(pf, pf_q, false);
4610 i40e_control_rx_q(pf, pf_q, false);
4615 * i40e_vsi_free_irq - Free the irq association with the OS
4616 * @vsi: the VSI being configured
4618 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4620 struct i40e_pf *pf = vsi->back;
4621 struct i40e_hw *hw = &pf->hw;
4622 int base = vsi->base_vector;
4626 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4627 if (!vsi->q_vectors)
4630 if (!vsi->irqs_ready)
4633 vsi->irqs_ready = false;
4634 for (i = 0; i < vsi->num_q_vectors; i++) {
4639 irq_num = pf->msix_entries[vector].vector;
4641 /* free only the irqs that were actually requested */
4642 if (!vsi->q_vectors[i] ||
4643 !vsi->q_vectors[i]->num_ringpairs)
4646 /* clear the affinity notifier in the IRQ descriptor */
4647 irq_set_affinity_notifier(irq_num, NULL);
4648 /* remove our suggested affinity mask for this IRQ */
4649 irq_set_affinity_hint(irq_num, NULL);
4650 synchronize_irq(irq_num);
4651 free_irq(irq_num, vsi->q_vectors[i]);
4653 /* Tear down the interrupt queue link list
4655 * We know that they come in pairs and always
4656 * the Rx first, then the Tx. To clear the
4657 * link list, stick the EOL value into the
4658 * next_q field of the registers.
4660 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4661 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4662 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4663 val |= I40E_QUEUE_END_OF_LIST
4664 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4665 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4667 while (qp != I40E_QUEUE_END_OF_LIST) {
4670 val = rd32(hw, I40E_QINT_RQCTL(qp));
4672 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4673 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4674 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4675 I40E_QINT_RQCTL_INTEVENT_MASK);
4677 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4678 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4680 wr32(hw, I40E_QINT_RQCTL(qp), val);
4682 val = rd32(hw, I40E_QINT_TQCTL(qp));
4684 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4685 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4687 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4688 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4689 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4690 I40E_QINT_TQCTL_INTEVENT_MASK);
4692 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4693 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4695 wr32(hw, I40E_QINT_TQCTL(qp), val);
4700 free_irq(pf->pdev->irq, pf);
4702 val = rd32(hw, I40E_PFINT_LNKLST0);
4703 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4704 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4705 val |= I40E_QUEUE_END_OF_LIST
4706 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4707 wr32(hw, I40E_PFINT_LNKLST0, val);
4709 val = rd32(hw, I40E_QINT_RQCTL(qp));
4710 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4711 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4712 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4713 I40E_QINT_RQCTL_INTEVENT_MASK);
4715 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4716 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4718 wr32(hw, I40E_QINT_RQCTL(qp), val);
4720 val = rd32(hw, I40E_QINT_TQCTL(qp));
4722 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4723 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4724 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4725 I40E_QINT_TQCTL_INTEVENT_MASK);
4727 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4728 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4730 wr32(hw, I40E_QINT_TQCTL(qp), val);
4735 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4736 * @vsi: the VSI being configured
4737 * @v_idx: Index of vector to be freed
4739 * This function frees the memory allocated to the q_vector. In addition if
4740 * NAPI is enabled it will delete any references to the NAPI struct prior
4741 * to freeing the q_vector.
4743 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4745 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4746 struct i40e_ring *ring;
4751 /* disassociate q_vector from rings */
4752 i40e_for_each_ring(ring, q_vector->tx)
4753 ring->q_vector = NULL;
4755 i40e_for_each_ring(ring, q_vector->rx)
4756 ring->q_vector = NULL;
4758 /* only VSI w/ an associated netdev is set up w/ NAPI */
4760 netif_napi_del(&q_vector->napi);
4762 vsi->q_vectors[v_idx] = NULL;
4764 kfree_rcu(q_vector, rcu);
4768 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4769 * @vsi: the VSI being un-configured
4771 * This frees the memory allocated to the q_vectors and
4772 * deletes references to the NAPI struct.
4774 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4778 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4779 i40e_free_q_vector(vsi, v_idx);
4783 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4784 * @pf: board private structure
4786 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4788 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4789 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4790 pci_disable_msix(pf->pdev);
4791 kfree(pf->msix_entries);
4792 pf->msix_entries = NULL;
4793 kfree(pf->irq_pile);
4794 pf->irq_pile = NULL;
4795 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4796 pci_disable_msi(pf->pdev);
4798 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4802 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4803 * @pf: board private structure
4805 * We go through and clear interrupt specific resources and reset the structure
4806 * to pre-load conditions
4808 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4812 i40e_free_misc_vector(pf);
4814 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4815 I40E_IWARP_IRQ_PILE_ID);
4817 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4818 for (i = 0; i < pf->num_alloc_vsi; i++)
4820 i40e_vsi_free_q_vectors(pf->vsi[i]);
4821 i40e_reset_interrupt_capability(pf);
4825 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4826 * @vsi: the VSI being configured
4828 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4835 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4836 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4838 if (q_vector->rx.ring || q_vector->tx.ring)
4839 napi_enable(&q_vector->napi);
4844 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4845 * @vsi: the VSI being configured
4847 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4854 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4855 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4857 if (q_vector->rx.ring || q_vector->tx.ring)
4858 napi_disable(&q_vector->napi);
4863 * i40e_vsi_close - Shut down a VSI
4864 * @vsi: the vsi to be quelled
4866 static void i40e_vsi_close(struct i40e_vsi *vsi)
4868 struct i40e_pf *pf = vsi->back;
4869 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4871 i40e_vsi_free_irq(vsi);
4872 i40e_vsi_free_tx_resources(vsi);
4873 i40e_vsi_free_rx_resources(vsi);
4874 vsi->current_netdev_flags = 0;
4875 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
4876 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4877 set_bit(__I40E_CLIENT_RESET, pf->state);
4881 * i40e_quiesce_vsi - Pause a given VSI
4882 * @vsi: the VSI being paused
4884 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4886 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4889 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4890 if (vsi->netdev && netif_running(vsi->netdev))
4891 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4893 i40e_vsi_close(vsi);
4897 * i40e_unquiesce_vsi - Resume a given VSI
4898 * @vsi: the VSI being resumed
4900 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4902 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4905 if (vsi->netdev && netif_running(vsi->netdev))
4906 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4908 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4912 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4915 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4919 for (v = 0; v < pf->num_alloc_vsi; v++) {
4921 i40e_quiesce_vsi(pf->vsi[v]);
4926 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4929 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4933 for (v = 0; v < pf->num_alloc_vsi; v++) {
4935 i40e_unquiesce_vsi(pf->vsi[v]);
4940 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4941 * @vsi: the VSI being configured
4943 * Wait until all queues on a given VSI have been disabled.
4945 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4947 struct i40e_pf *pf = vsi->back;
4950 pf_q = vsi->base_queue;
4951 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4952 /* Check and wait for the Tx queue */
4953 ret = i40e_pf_txq_wait(pf, pf_q, false);
4955 dev_info(&pf->pdev->dev,
4956 "VSI seid %d Tx ring %d disable timeout\n",
4961 if (!i40e_enabled_xdp_vsi(vsi))
4964 /* Check and wait for the XDP Tx queue */
4965 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
4968 dev_info(&pf->pdev->dev,
4969 "VSI seid %d XDP Tx ring %d disable timeout\n",
4974 /* Check and wait for the Rx queue */
4975 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4977 dev_info(&pf->pdev->dev,
4978 "VSI seid %d Rx ring %d disable timeout\n",
4987 #ifdef CONFIG_I40E_DCB
4989 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4992 * This function waits for the queues to be in disabled state for all the
4993 * VSIs that are managed by this PF.
4995 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4999 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5001 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5013 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5014 * @pf: pointer to PF
5016 * Get TC map for ISCSI PF type that will include iSCSI TC
5019 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5021 struct i40e_dcb_app_priority_table app;
5022 struct i40e_hw *hw = &pf->hw;
5023 u8 enabled_tc = 1; /* TC0 is always enabled */
5025 /* Get the iSCSI APP TLV */
5026 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5028 for (i = 0; i < dcbcfg->numapps; i++) {
5029 app = dcbcfg->app[i];
5030 if (app.selector == I40E_APP_SEL_TCPIP &&
5031 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5032 tc = dcbcfg->etscfg.prioritytable[app.priority];
5033 enabled_tc |= BIT(tc);
5042 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5043 * @dcbcfg: the corresponding DCBx configuration structure
5045 * Return the number of TCs from given DCBx configuration
5047 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5049 int i, tc_unused = 0;
5053 /* Scan the ETS Config Priority Table to find
5054 * traffic class enabled for a given priority
5055 * and create a bitmask of enabled TCs
5057 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5058 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5060 /* Now scan the bitmask to check for
5061 * contiguous TCs starting with TC0
5063 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5064 if (num_tc & BIT(i)) {
5068 pr_err("Non-contiguous TC - Disabling DCB\n");
5076 /* There is always at least TC0 */
5084 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5085 * @dcbcfg: the corresponding DCBx configuration structure
5087 * Query the current DCB configuration and return the number of
5088 * traffic classes enabled from the given DCBX config
5090 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5092 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5096 for (i = 0; i < num_tc; i++)
5097 enabled_tc |= BIT(i);
5103 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5104 * @pf: PF being queried
5106 * Query the current MQPRIO configuration and return the number of
5107 * traffic classes enabled.
5109 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5111 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5112 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5113 u8 enabled_tc = 1, i;
5115 for (i = 1; i < num_tc; i++)
5116 enabled_tc |= BIT(i);
5121 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5122 * @pf: PF being queried
5124 * Return number of traffic classes enabled for the given PF
5126 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5128 struct i40e_hw *hw = &pf->hw;
5129 u8 i, enabled_tc = 1;
5131 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5133 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5134 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5136 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5137 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5140 /* SFP mode will be enabled for all TCs on port */
5141 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5142 return i40e_dcb_get_num_tc(dcbcfg);
5144 /* MFP mode return count of enabled TCs for this PF */
5145 if (pf->hw.func_caps.iscsi)
5146 enabled_tc = i40e_get_iscsi_tc_map(pf);
5148 return 1; /* Only TC0 */
5150 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5151 if (enabled_tc & BIT(i))
5158 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5159 * @pf: PF being queried
5161 * Return a bitmap for enabled traffic classes for this PF.
5163 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5165 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5166 return i40e_mqprio_get_enabled_tc(pf);
5168 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5171 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5172 return I40E_DEFAULT_TRAFFIC_CLASS;
5174 /* SFP mode we want PF to be enabled for all TCs */
5175 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5176 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5178 /* MFP enabled and iSCSI PF type */
5179 if (pf->hw.func_caps.iscsi)
5180 return i40e_get_iscsi_tc_map(pf);
5182 return I40E_DEFAULT_TRAFFIC_CLASS;
5186 * i40e_vsi_get_bw_info - Query VSI BW Information
5187 * @vsi: the VSI being queried
5189 * Returns 0 on success, negative value on failure
5191 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5193 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5194 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5195 struct i40e_pf *pf = vsi->back;
5196 struct i40e_hw *hw = &pf->hw;
5201 /* Get the VSI level BW configuration */
5202 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5204 dev_info(&pf->pdev->dev,
5205 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5206 i40e_stat_str(&pf->hw, ret),
5207 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5211 /* Get the VSI level BW configuration per TC */
5212 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5215 dev_info(&pf->pdev->dev,
5216 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5217 i40e_stat_str(&pf->hw, ret),
5218 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5222 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5223 dev_info(&pf->pdev->dev,
5224 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5225 bw_config.tc_valid_bits,
5226 bw_ets_config.tc_valid_bits);
5227 /* Still continuing */
5230 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5231 vsi->bw_max_quanta = bw_config.max_bw;
5232 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5233 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5234 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5235 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5236 vsi->bw_ets_limit_credits[i] =
5237 le16_to_cpu(bw_ets_config.credits[i]);
5238 /* 3 bits out of 4 for each TC */
5239 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5246 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5247 * @vsi: the VSI being configured
5248 * @enabled_tc: TC bitmap
5249 * @bw_share: BW shared credits per TC
5251 * Returns 0 on success, negative value on failure
5253 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5256 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5257 struct i40e_pf *pf = vsi->back;
5261 /* There is no need to reset BW when mqprio mode is on. */
5262 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5264 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5265 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5267 dev_info(&pf->pdev->dev,
5268 "Failed to reset tx rate for vsi->seid %u\n",
5272 bw_data.tc_valid_bits = enabled_tc;
5273 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5274 bw_data.tc_bw_credits[i] = bw_share[i];
5276 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5278 dev_info(&pf->pdev->dev,
5279 "AQ command Config VSI BW allocation per TC failed = %d\n",
5280 pf->hw.aq.asq_last_status);
5284 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5285 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5291 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5292 * @vsi: the VSI being configured
5293 * @enabled_tc: TC map to be enabled
5296 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5298 struct net_device *netdev = vsi->netdev;
5299 struct i40e_pf *pf = vsi->back;
5300 struct i40e_hw *hw = &pf->hw;
5303 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5309 netdev_reset_tc(netdev);
5313 /* Set up actual enabled TCs on the VSI */
5314 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5317 /* set per TC queues for the VSI */
5318 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5319 /* Only set TC queues for enabled tcs
5321 * e.g. For a VSI that has TC0 and TC3 enabled the
5322 * enabled_tc bitmap would be 0x00001001; the driver
5323 * will set the numtc for netdev as 2 that will be
5324 * referenced by the netdev layer as TC 0 and 1.
5326 if (vsi->tc_config.enabled_tc & BIT(i))
5327 netdev_set_tc_queue(netdev,
5328 vsi->tc_config.tc_info[i].netdev_tc,
5329 vsi->tc_config.tc_info[i].qcount,
5330 vsi->tc_config.tc_info[i].qoffset);
5333 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5336 /* Assign UP2TC map for the VSI */
5337 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5338 /* Get the actual TC# for the UP */
5339 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5340 /* Get the mapped netdev TC# for the UP */
5341 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5342 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5347 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5348 * @vsi: the VSI being configured
5349 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5351 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5352 struct i40e_vsi_context *ctxt)
5354 /* copy just the sections touched not the entire info
5355 * since not all sections are valid as returned by
5358 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5359 memcpy(&vsi->info.queue_mapping,
5360 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5361 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5362 sizeof(vsi->info.tc_mapping));
5366 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5367 * @vsi: VSI to be configured
5368 * @enabled_tc: TC bitmap
5370 * This configures a particular VSI for TCs that are mapped to the
5371 * given TC bitmap. It uses default bandwidth share for TCs across
5372 * VSIs to configure TC for a particular VSI.
5375 * It is expected that the VSI queues have been quisced before calling
5378 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5380 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5381 struct i40e_pf *pf = vsi->back;
5382 struct i40e_hw *hw = &pf->hw;
5383 struct i40e_vsi_context ctxt;
5387 /* Check if enabled_tc is same as existing or new TCs */
5388 if (vsi->tc_config.enabled_tc == enabled_tc &&
5389 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5392 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5393 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5394 if (enabled_tc & BIT(i))
5398 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5400 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5402 dev_info(&pf->pdev->dev,
5403 "Failed configuring TC map %d for VSI %d\n",
5404 enabled_tc, vsi->seid);
5405 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5408 dev_info(&pf->pdev->dev,
5409 "Failed querying vsi bw info, err %s aq_err %s\n",
5410 i40e_stat_str(hw, ret),
5411 i40e_aq_str(hw, hw->aq.asq_last_status));
5414 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5415 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5418 valid_tc = bw_config.tc_valid_bits;
5419 /* Always enable TC0, no matter what */
5421 dev_info(&pf->pdev->dev,
5422 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5423 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5424 enabled_tc = valid_tc;
5427 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5429 dev_err(&pf->pdev->dev,
5430 "Unable to configure TC map %d for VSI %d\n",
5431 enabled_tc, vsi->seid);
5436 /* Update Queue Pairs Mapping for currently enabled UPs */
5437 ctxt.seid = vsi->seid;
5438 ctxt.pf_num = vsi->back->hw.pf_id;
5440 ctxt.uplink_seid = vsi->uplink_seid;
5441 ctxt.info = vsi->info;
5442 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5443 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5447 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5450 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5453 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5454 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5455 vsi->num_queue_pairs);
5456 ret = i40e_vsi_config_rss(vsi);
5458 dev_info(&vsi->back->pdev->dev,
5459 "Failed to reconfig rss for num_queues\n");
5462 vsi->reconfig_rss = false;
5464 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5465 ctxt.info.valid_sections |=
5466 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5467 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5470 /* Update the VSI after updating the VSI queue-mapping
5473 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5475 dev_info(&pf->pdev->dev,
5476 "Update vsi tc config failed, err %s aq_err %s\n",
5477 i40e_stat_str(hw, ret),
5478 i40e_aq_str(hw, hw->aq.asq_last_status));
5481 /* update the local VSI info with updated queue map */
5482 i40e_vsi_update_queue_map(vsi, &ctxt);
5483 vsi->info.valid_sections = 0;
5485 /* Update current VSI BW information */
5486 ret = i40e_vsi_get_bw_info(vsi);
5488 dev_info(&pf->pdev->dev,
5489 "Failed updating vsi bw info, err %s aq_err %s\n",
5490 i40e_stat_str(hw, ret),
5491 i40e_aq_str(hw, hw->aq.asq_last_status));
5495 /* Update the netdev TC setup */
5496 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5502 * i40e_get_link_speed - Returns link speed for the interface
5503 * @vsi: VSI to be configured
5506 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5508 struct i40e_pf *pf = vsi->back;
5510 switch (pf->hw.phy.link_info.link_speed) {
5511 case I40E_LINK_SPEED_40GB:
5513 case I40E_LINK_SPEED_25GB:
5515 case I40E_LINK_SPEED_20GB:
5517 case I40E_LINK_SPEED_10GB:
5519 case I40E_LINK_SPEED_1GB:
5527 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5528 * @vsi: VSI to be configured
5529 * @seid: seid of the channel/VSI
5530 * @max_tx_rate: max TX rate to be configured as BW limit
5532 * Helper function to set BW limit for a given VSI
5534 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5536 struct i40e_pf *pf = vsi->back;
5541 speed = i40e_get_link_speed(vsi);
5542 if (max_tx_rate > speed) {
5543 dev_err(&pf->pdev->dev,
5544 "Invalid max tx rate %llu specified for VSI seid %d.",
5548 if (max_tx_rate && max_tx_rate < 50) {
5549 dev_warn(&pf->pdev->dev,
5550 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5554 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5555 credits = max_tx_rate;
5556 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5557 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5558 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5560 dev_err(&pf->pdev->dev,
5561 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5562 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5563 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5568 * i40e_remove_queue_channels - Remove queue channels for the TCs
5569 * @vsi: VSI to be configured
5571 * Remove queue channels for the TCs
5573 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5575 enum i40e_admin_queue_err last_aq_status;
5576 struct i40e_cloud_filter *cfilter;
5577 struct i40e_channel *ch, *ch_tmp;
5578 struct i40e_pf *pf = vsi->back;
5579 struct hlist_node *node;
5582 /* Reset rss size that was stored when reconfiguring rss for
5583 * channel VSIs with non-power-of-2 queue count.
5585 vsi->current_rss_size = 0;
5587 /* perform cleanup for channels if they exist */
5588 if (list_empty(&vsi->ch_list))
5591 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5592 struct i40e_vsi *p_vsi;
5594 list_del(&ch->list);
5595 p_vsi = ch->parent_vsi;
5596 if (!p_vsi || !ch->initialized) {
5600 /* Reset queue contexts */
5601 for (i = 0; i < ch->num_queue_pairs; i++) {
5602 struct i40e_ring *tx_ring, *rx_ring;
5605 pf_q = ch->base_queue + i;
5606 tx_ring = vsi->tx_rings[pf_q];
5609 rx_ring = vsi->rx_rings[pf_q];
5613 /* Reset BW configured for this VSI via mqprio */
5614 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5616 dev_info(&vsi->back->pdev->dev,
5617 "Failed to reset tx rate for ch->seid %u\n",
5620 /* delete cloud filters associated with this channel */
5621 hlist_for_each_entry_safe(cfilter, node,
5622 &pf->cloud_filter_list, cloud_node) {
5623 if (cfilter->seid != ch->seid)
5626 hash_del(&cfilter->cloud_node);
5627 if (cfilter->dst_port)
5628 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5632 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5634 last_aq_status = pf->hw.aq.asq_last_status;
5636 dev_info(&pf->pdev->dev,
5637 "Failed to delete cloud filter, err %s aq_err %s\n",
5638 i40e_stat_str(&pf->hw, ret),
5639 i40e_aq_str(&pf->hw, last_aq_status));
5643 /* delete VSI from FW */
5644 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5647 dev_err(&vsi->back->pdev->dev,
5648 "unable to remove channel (%d) for parent VSI(%d)\n",
5649 ch->seid, p_vsi->seid);
5652 INIT_LIST_HEAD(&vsi->ch_list);
5656 * i40e_is_any_channel - channel exist or not
5657 * @vsi: ptr to VSI to which channels are associated with
5659 * Returns true or false if channel(s) exist for associated VSI or not
5661 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5663 struct i40e_channel *ch, *ch_tmp;
5665 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5666 if (ch->initialized)
5674 * i40e_get_max_queues_for_channel
5675 * @vsi: ptr to VSI to which channels are associated with
5677 * Helper function which returns max value among the queue counts set on the
5678 * channels/TCs created.
5680 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5682 struct i40e_channel *ch, *ch_tmp;
5685 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5686 if (!ch->initialized)
5688 if (ch->num_queue_pairs > max)
5689 max = ch->num_queue_pairs;
5696 * i40e_validate_num_queues - validate num_queues w.r.t channel
5697 * @pf: ptr to PF device
5698 * @num_queues: number of queues
5699 * @vsi: the parent VSI
5700 * @reconfig_rss: indicates should the RSS be reconfigured or not
5702 * This function validates number of queues in the context of new channel
5703 * which is being established and determines if RSS should be reconfigured
5704 * or not for parent VSI.
5706 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5707 struct i40e_vsi *vsi, bool *reconfig_rss)
5714 *reconfig_rss = false;
5715 if (vsi->current_rss_size) {
5716 if (num_queues > vsi->current_rss_size) {
5717 dev_dbg(&pf->pdev->dev,
5718 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5719 num_queues, vsi->current_rss_size);
5721 } else if ((num_queues < vsi->current_rss_size) &&
5722 (!is_power_of_2(num_queues))) {
5723 dev_dbg(&pf->pdev->dev,
5724 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5725 num_queues, vsi->current_rss_size);
5730 if (!is_power_of_2(num_queues)) {
5731 /* Find the max num_queues configured for channel if channel
5733 * if channel exist, then enforce 'num_queues' to be more than
5734 * max ever queues configured for channel.
5736 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5737 if (num_queues < max_ch_queues) {
5738 dev_dbg(&pf->pdev->dev,
5739 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5740 num_queues, max_ch_queues);
5743 *reconfig_rss = true;
5750 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5751 * @vsi: the VSI being setup
5752 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5754 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5756 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5758 struct i40e_pf *pf = vsi->back;
5759 u8 seed[I40E_HKEY_ARRAY_SIZE];
5760 struct i40e_hw *hw = &pf->hw;
5768 if (rss_size > vsi->rss_size)
5771 local_rss_size = min_t(int, vsi->rss_size, rss_size);
5772 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5776 /* Ignoring user configured lut if there is one */
5777 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5779 /* Use user configured hash key if there is one, otherwise
5782 if (vsi->rss_hkey_user)
5783 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5785 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5787 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5789 dev_info(&pf->pdev->dev,
5790 "Cannot set RSS lut, err %s aq_err %s\n",
5791 i40e_stat_str(hw, ret),
5792 i40e_aq_str(hw, hw->aq.asq_last_status));
5798 /* Do the update w.r.t. storing rss_size */
5799 if (!vsi->orig_rss_size)
5800 vsi->orig_rss_size = vsi->rss_size;
5801 vsi->current_rss_size = local_rss_size;
5807 * i40e_channel_setup_queue_map - Setup a channel queue map
5808 * @pf: ptr to PF device
5809 * @vsi: the VSI being setup
5810 * @ctxt: VSI context structure
5811 * @ch: ptr to channel structure
5813 * Setup queue map for a specific channel
5815 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5816 struct i40e_vsi_context *ctxt,
5817 struct i40e_channel *ch)
5819 u16 qcount, qmap, sections = 0;
5823 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5824 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5826 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5827 ch->num_queue_pairs = qcount;
5829 /* find the next higher power-of-2 of num queue pairs */
5830 pow = ilog2(qcount);
5831 if (!is_power_of_2(qcount))
5834 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5835 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5837 /* Setup queue TC[0].qmap for given VSI context */
5838 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5840 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5841 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5842 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5843 ctxt->info.valid_sections |= cpu_to_le16(sections);
5847 * i40e_add_channel - add a channel by adding VSI
5848 * @pf: ptr to PF device
5849 * @uplink_seid: underlying HW switching element (VEB) ID
5850 * @ch: ptr to channel structure
5852 * Add a channel (VSI) using add_vsi and queue_map
5854 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5855 struct i40e_channel *ch)
5857 struct i40e_hw *hw = &pf->hw;
5858 struct i40e_vsi_context ctxt;
5859 u8 enabled_tc = 0x1; /* TC0 enabled */
5862 if (ch->type != I40E_VSI_VMDQ2) {
5863 dev_info(&pf->pdev->dev,
5864 "add new vsi failed, ch->type %d\n", ch->type);
5868 memset(&ctxt, 0, sizeof(ctxt));
5869 ctxt.pf_num = hw->pf_id;
5871 ctxt.uplink_seid = uplink_seid;
5872 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5873 if (ch->type == I40E_VSI_VMDQ2)
5874 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5876 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5877 ctxt.info.valid_sections |=
5878 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5879 ctxt.info.switch_id =
5880 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5883 /* Set queue map for a given VSI context */
5884 i40e_channel_setup_queue_map(pf, &ctxt, ch);
5886 /* Now time to create VSI */
5887 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5889 dev_info(&pf->pdev->dev,
5890 "add new vsi failed, err %s aq_err %s\n",
5891 i40e_stat_str(&pf->hw, ret),
5892 i40e_aq_str(&pf->hw,
5893 pf->hw.aq.asq_last_status));
5897 /* Success, update channel, set enabled_tc only if the channel
5900 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
5901 ch->seid = ctxt.seid;
5902 ch->vsi_number = ctxt.vsi_number;
5903 ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx);
5905 /* copy just the sections touched not the entire info
5906 * since not all sections are valid as returned by
5909 ch->info.mapping_flags = ctxt.info.mapping_flags;
5910 memcpy(&ch->info.queue_mapping,
5911 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5912 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5913 sizeof(ctxt.info.tc_mapping));
5918 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5921 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5925 bw_data.tc_valid_bits = ch->enabled_tc;
5926 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5927 bw_data.tc_bw_credits[i] = bw_share[i];
5929 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5932 dev_info(&vsi->back->pdev->dev,
5933 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5934 vsi->back->hw.aq.asq_last_status, ch->seid);
5938 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5939 ch->info.qs_handle[i] = bw_data.qs_handles[i];
5945 * i40e_channel_config_tx_ring - config TX ring associated with new channel
5946 * @pf: ptr to PF device
5947 * @vsi: the VSI being setup
5948 * @ch: ptr to channel structure
5950 * Configure TX rings associated with channel (VSI) since queues are being
5953 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
5954 struct i40e_vsi *vsi,
5955 struct i40e_channel *ch)
5959 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5961 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5962 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5963 if (ch->enabled_tc & BIT(i))
5967 /* configure BW for new VSI */
5968 ret = i40e_channel_config_bw(vsi, ch, bw_share);
5970 dev_info(&vsi->back->pdev->dev,
5971 "Failed configuring TC map %d for channel (seid %u)\n",
5972 ch->enabled_tc, ch->seid);
5976 for (i = 0; i < ch->num_queue_pairs; i++) {
5977 struct i40e_ring *tx_ring, *rx_ring;
5980 pf_q = ch->base_queue + i;
5982 /* Get to TX ring ptr of main VSI, for re-setup TX queue
5985 tx_ring = vsi->tx_rings[pf_q];
5988 /* Get the RX ring ptr */
5989 rx_ring = vsi->rx_rings[pf_q];
5997 * i40e_setup_hw_channel - setup new channel
5998 * @pf: ptr to PF device
5999 * @vsi: the VSI being setup
6000 * @ch: ptr to channel structure
6001 * @uplink_seid: underlying HW switching element (VEB) ID
6002 * @type: type of channel to be created (VMDq2/VF)
6004 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6005 * and configures TX rings accordingly
6007 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6008 struct i40e_vsi *vsi,
6009 struct i40e_channel *ch,
6010 u16 uplink_seid, u8 type)
6014 ch->initialized = false;
6015 ch->base_queue = vsi->next_base_queue;
6018 /* Proceed with creation of channel (VMDq2) VSI */
6019 ret = i40e_add_channel(pf, uplink_seid, ch);
6021 dev_info(&pf->pdev->dev,
6022 "failed to add_channel using uplink_seid %u\n",
6027 /* Mark the successful creation of channel */
6028 ch->initialized = true;
6030 /* Reconfigure TX queues using QTX_CTL register */
6031 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6033 dev_info(&pf->pdev->dev,
6034 "failed to configure TX rings for channel %u\n",
6039 /* update 'next_base_queue' */
6040 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6041 dev_dbg(&pf->pdev->dev,
6042 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6043 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6044 ch->num_queue_pairs,
6045 vsi->next_base_queue);
6050 * i40e_setup_channel - setup new channel using uplink element
6051 * @pf: ptr to PF device
6052 * @type: type of channel to be created (VMDq2/VF)
6053 * @uplink_seid: underlying HW switching element (VEB) ID
6054 * @ch: ptr to channel structure
6056 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6057 * and uplink switching element (uplink_seid)
6059 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6060 struct i40e_channel *ch)
6066 if (vsi->type == I40E_VSI_MAIN) {
6067 vsi_type = I40E_VSI_VMDQ2;
6069 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6074 /* underlying switching element */
6075 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6077 /* create channel (VSI), configure TX rings */
6078 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6080 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6084 return ch->initialized ? true : false;
6088 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6089 * @vsi: ptr to VSI which has PF backing
6091 * Sets up switch mode correctly if it needs to be changed and perform
6092 * what are allowed modes.
6094 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6097 struct i40e_pf *pf = vsi->back;
6098 struct i40e_hw *hw = &pf->hw;
6101 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6105 if (hw->dev_caps.switch_mode) {
6106 /* if switch mode is set, support mode2 (non-tunneled for
6107 * cloud filter) for now
6109 u32 switch_mode = hw->dev_caps.switch_mode &
6110 I40E_SWITCH_MODE_MASK;
6111 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6112 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6114 dev_err(&pf->pdev->dev,
6115 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6116 hw->dev_caps.switch_mode);
6121 /* Set Bit 7 to be valid */
6122 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6124 /* Set L4type for TCP support */
6125 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6127 /* Set cloud filter mode */
6128 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6130 /* Prep mode field for set_switch_config */
6131 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6132 pf->last_sw_conf_valid_flags,
6134 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6135 dev_err(&pf->pdev->dev,
6136 "couldn't set switch config bits, err %s aq_err %s\n",
6137 i40e_stat_str(hw, ret),
6139 hw->aq.asq_last_status));
6145 * i40e_create_queue_channel - function to create channel
6146 * @vsi: VSI to be configured
6147 * @ch: ptr to channel (it contains channel specific params)
6149 * This function creates channel (VSI) using num_queues specified by user,
6150 * reconfigs RSS if needed.
6152 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6153 struct i40e_channel *ch)
6155 struct i40e_pf *pf = vsi->back;
6162 if (!ch->num_queue_pairs) {
6163 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6164 ch->num_queue_pairs);
6168 /* validate user requested num_queues for channel */
6169 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6172 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6173 ch->num_queue_pairs);
6177 /* By default we are in VEPA mode, if this is the first VF/VMDq
6178 * VSI to be added switch to VEB mode.
6180 if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6181 (!i40e_is_any_channel(vsi))) {
6182 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6183 dev_dbg(&pf->pdev->dev,
6184 "Failed to create channel. Override queues (%u) not power of 2\n",
6185 vsi->tc_config.tc_info[0].qcount);
6189 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6190 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6192 if (vsi->type == I40E_VSI_MAIN) {
6193 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6194 i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6197 i40e_do_reset_safe(pf,
6198 I40E_PF_RESET_FLAG);
6201 /* now onwards for main VSI, number of queues will be value
6202 * of TC0's queue count
6206 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6207 * it should be more than num_queues
6209 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6210 dev_dbg(&pf->pdev->dev,
6211 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6212 vsi->cnt_q_avail, ch->num_queue_pairs);
6216 /* reconfig_rss only if vsi type is MAIN_VSI */
6217 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6218 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6220 dev_info(&pf->pdev->dev,
6221 "Error: unable to reconfig rss for num_queues (%u)\n",
6222 ch->num_queue_pairs);
6227 if (!i40e_setup_channel(pf, vsi, ch)) {
6228 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6232 dev_info(&pf->pdev->dev,
6233 "Setup channel (id:%u) utilizing num_queues %d\n",
6234 ch->seid, ch->num_queue_pairs);
6236 /* configure VSI for BW limit */
6237 if (ch->max_tx_rate) {
6238 u64 credits = ch->max_tx_rate;
6240 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6243 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6244 dev_dbg(&pf->pdev->dev,
6245 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6251 /* in case of VF, this will be main SRIOV VSI */
6252 ch->parent_vsi = vsi;
6254 /* and update main_vsi's count for queue_available to use */
6255 vsi->cnt_q_avail -= ch->num_queue_pairs;
6261 * i40e_configure_queue_channels - Add queue channel for the given TCs
6262 * @vsi: VSI to be configured
6264 * Configures queue channel mapping to the given TCs
6266 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6268 struct i40e_channel *ch;
6272 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6273 vsi->tc_seid_map[0] = vsi->seid;
6274 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6275 if (vsi->tc_config.enabled_tc & BIT(i)) {
6276 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6282 INIT_LIST_HEAD(&ch->list);
6283 ch->num_queue_pairs =
6284 vsi->tc_config.tc_info[i].qcount;
6286 vsi->tc_config.tc_info[i].qoffset;
6288 /* Bandwidth limit through tc interface is in bytes/s,
6291 max_rate = vsi->mqprio_qopt.max_rate[i];
6292 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6293 ch->max_tx_rate = max_rate;
6295 list_add_tail(&ch->list, &vsi->ch_list);
6297 ret = i40e_create_queue_channel(vsi, ch);
6299 dev_err(&vsi->back->pdev->dev,
6300 "Failed creating queue channel with TC%d: queues %d\n",
6301 i, ch->num_queue_pairs);
6304 vsi->tc_seid_map[i] = ch->seid;
6310 i40e_remove_queue_channels(vsi);
6315 * i40e_veb_config_tc - Configure TCs for given VEB
6317 * @enabled_tc: TC bitmap
6319 * Configures given TC bitmap for VEB (switching) element
6321 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6323 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6324 struct i40e_pf *pf = veb->pf;
6328 /* No TCs or already enabled TCs just return */
6329 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6332 bw_data.tc_valid_bits = enabled_tc;
6333 /* bw_data.absolute_credits is not set (relative) */
6335 /* Enable ETS TCs with equal BW Share for now */
6336 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6337 if (enabled_tc & BIT(i))
6338 bw_data.tc_bw_share_credits[i] = 1;
6341 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6344 dev_info(&pf->pdev->dev,
6345 "VEB bw config failed, err %s aq_err %s\n",
6346 i40e_stat_str(&pf->hw, ret),
6347 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6351 /* Update the BW information */
6352 ret = i40e_veb_get_bw_info(veb);
6354 dev_info(&pf->pdev->dev,
6355 "Failed getting veb bw config, err %s aq_err %s\n",
6356 i40e_stat_str(&pf->hw, ret),
6357 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6364 #ifdef CONFIG_I40E_DCB
6366 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6369 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6370 * the caller would've quiesce all the VSIs before calling
6373 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6379 /* Enable the TCs available on PF to all VEBs */
6380 tc_map = i40e_pf_get_tc_map(pf);
6381 for (v = 0; v < I40E_MAX_VEB; v++) {
6384 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6386 dev_info(&pf->pdev->dev,
6387 "Failed configuring TC for VEB seid=%d\n",
6389 /* Will try to configure as many components */
6393 /* Update each VSI */
6394 for (v = 0; v < pf->num_alloc_vsi; v++) {
6398 /* - Enable all TCs for the LAN VSI
6399 * - For all others keep them at TC0 for now
6401 if (v == pf->lan_vsi)
6402 tc_map = i40e_pf_get_tc_map(pf);
6404 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6406 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6408 dev_info(&pf->pdev->dev,
6409 "Failed configuring TC for VSI seid=%d\n",
6411 /* Will try to configure as many components */
6413 /* Re-configure VSI vectors based on updated TC map */
6414 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6415 if (pf->vsi[v]->netdev)
6416 i40e_dcbnl_set_all(pf->vsi[v]);
6422 * i40e_resume_port_tx - Resume port Tx
6425 * Resume a port's Tx and issue a PF reset in case of failure to
6428 static int i40e_resume_port_tx(struct i40e_pf *pf)
6430 struct i40e_hw *hw = &pf->hw;
6433 ret = i40e_aq_resume_port_tx(hw, NULL);
6435 dev_info(&pf->pdev->dev,
6436 "Resume Port Tx failed, err %s aq_err %s\n",
6437 i40e_stat_str(&pf->hw, ret),
6438 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6439 /* Schedule PF reset to recover */
6440 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6441 i40e_service_event_schedule(pf);
6448 * i40e_init_pf_dcb - Initialize DCB configuration
6449 * @pf: PF being configured
6451 * Query the current DCB configuration and cache it
6452 * in the hardware structure
6454 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6456 struct i40e_hw *hw = &pf->hw;
6459 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6460 * Also do not enable DCBx if FW LLDP agent is disabled
6462 if ((pf->hw_features & I40E_HW_NO_DCB_SUPPORT) ||
6463 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP)) {
6464 dev_info(&pf->pdev->dev, "DCB is not supported or FW LLDP is disabled\n");
6465 err = I40E_NOT_SUPPORTED;
6469 err = i40e_init_dcb(hw, true);
6471 /* Device/Function is not DCBX capable */
6472 if ((!hw->func_caps.dcb) ||
6473 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6474 dev_info(&pf->pdev->dev,
6475 "DCBX offload is not supported or is disabled for this PF.\n");
6477 /* When status is not DISABLED then DCBX in FW */
6478 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6479 DCB_CAP_DCBX_VER_IEEE;
6481 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6482 /* Enable DCB tagging only when more than one TC
6483 * or explicitly disable if only one TC
6485 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6486 pf->flags |= I40E_FLAG_DCB_ENABLED;
6488 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6489 dev_dbg(&pf->pdev->dev,
6490 "DCBX offload is supported for this PF.\n");
6492 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
6493 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
6494 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
6496 dev_info(&pf->pdev->dev,
6497 "Query for DCB configuration failed, err %s aq_err %s\n",
6498 i40e_stat_str(&pf->hw, err),
6499 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6505 #endif /* CONFIG_I40E_DCB */
6506 #define SPEED_SIZE 14
6509 * i40e_print_link_message - print link up or down
6510 * @vsi: the VSI for which link needs a message
6511 * @isup: true of link is up, false otherwise
6513 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6515 enum i40e_aq_link_speed new_speed;
6516 struct i40e_pf *pf = vsi->back;
6517 char *speed = "Unknown";
6518 char *fc = "Unknown";
6524 new_speed = pf->hw.phy.link_info.link_speed;
6526 new_speed = I40E_LINK_SPEED_UNKNOWN;
6528 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6530 vsi->current_isup = isup;
6531 vsi->current_speed = new_speed;
6533 netdev_info(vsi->netdev, "NIC Link is Down\n");
6537 /* Warn user if link speed on NPAR enabled partition is not at
6540 if (pf->hw.func_caps.npar_enable &&
6541 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6542 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6543 netdev_warn(vsi->netdev,
6544 "The partition detected link speed that is less than 10Gbps\n");
6546 switch (pf->hw.phy.link_info.link_speed) {
6547 case I40E_LINK_SPEED_40GB:
6550 case I40E_LINK_SPEED_20GB:
6553 case I40E_LINK_SPEED_25GB:
6556 case I40E_LINK_SPEED_10GB:
6559 case I40E_LINK_SPEED_5GB:
6562 case I40E_LINK_SPEED_2_5GB:
6565 case I40E_LINK_SPEED_1GB:
6568 case I40E_LINK_SPEED_100MB:
6575 switch (pf->hw.fc.current_mode) {
6579 case I40E_FC_TX_PAUSE:
6582 case I40E_FC_RX_PAUSE:
6590 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6595 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
6598 if (pf->hw.phy.link_info.fec_info &
6599 I40E_AQ_CONFIG_FEC_KR_ENA)
6600 fec = "CL74 FC-FEC/BASE-R";
6601 else if (pf->hw.phy.link_info.fec_info &
6602 I40E_AQ_CONFIG_FEC_RS_ENA)
6603 fec = "CL108 RS-FEC";
6605 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
6606 * both RS and FC are requested
6608 if (vsi->back->hw.phy.link_info.req_fec_info &
6609 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
6610 if (vsi->back->hw.phy.link_info.req_fec_info &
6611 I40E_AQ_REQUEST_FEC_RS)
6612 req_fec = "CL108 RS-FEC";
6614 req_fec = "CL74 FC-FEC/BASE-R";
6616 netdev_info(vsi->netdev,
6617 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
6618 speed, req_fec, fec, an, fc);
6620 netdev_info(vsi->netdev,
6621 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
6628 * i40e_up_complete - Finish the last steps of bringing up a connection
6629 * @vsi: the VSI being configured
6631 static int i40e_up_complete(struct i40e_vsi *vsi)
6633 struct i40e_pf *pf = vsi->back;
6636 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6637 i40e_vsi_configure_msix(vsi);
6639 i40e_configure_msi_and_legacy(vsi);
6642 err = i40e_vsi_start_rings(vsi);
6646 clear_bit(__I40E_VSI_DOWN, vsi->state);
6647 i40e_napi_enable_all(vsi);
6648 i40e_vsi_enable_irq(vsi);
6650 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
6652 i40e_print_link_message(vsi, true);
6653 netif_tx_start_all_queues(vsi->netdev);
6654 netif_carrier_on(vsi->netdev);
6657 /* replay FDIR SB filters */
6658 if (vsi->type == I40E_VSI_FDIR) {
6659 /* reset fd counters */
6662 i40e_fdir_filter_restore(vsi);
6665 /* On the next run of the service_task, notify any clients of the new
6668 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6669 i40e_service_event_schedule(pf);
6675 * i40e_vsi_reinit_locked - Reset the VSI
6676 * @vsi: the VSI being configured
6678 * Rebuild the ring structs after some configuration
6679 * has changed, e.g. MTU size.
6681 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
6683 struct i40e_pf *pf = vsi->back;
6685 WARN_ON(in_interrupt());
6686 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
6687 usleep_range(1000, 2000);
6691 clear_bit(__I40E_CONFIG_BUSY, pf->state);
6695 * i40e_up - Bring the connection back up after being down
6696 * @vsi: the VSI being configured
6698 int i40e_up(struct i40e_vsi *vsi)
6702 err = i40e_vsi_configure(vsi);
6704 err = i40e_up_complete(vsi);
6710 * i40e_force_link_state - Force the link status
6711 * @pf: board private structure
6712 * @is_up: whether the link state should be forced up or down
6714 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
6716 struct i40e_aq_get_phy_abilities_resp abilities;
6717 struct i40e_aq_set_phy_config config = {0};
6718 struct i40e_hw *hw = &pf->hw;
6723 /* Card might've been put in an unstable state by other drivers
6724 * and applications, which causes incorrect speed values being
6725 * set on startup. In order to clear speed registers, we call
6726 * get_phy_capabilities twice, once to get initial state of
6727 * available speeds, and once to get current PHY config.
6729 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
6732 dev_err(&pf->pdev->dev,
6733 "failed to get phy cap., ret = %s last_status = %s\n",
6734 i40e_stat_str(hw, err),
6735 i40e_aq_str(hw, hw->aq.asq_last_status));
6738 speed = abilities.link_speed;
6740 /* Get the current phy config */
6741 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
6744 dev_err(&pf->pdev->dev,
6745 "failed to get phy cap., ret = %s last_status = %s\n",
6746 i40e_stat_str(hw, err),
6747 i40e_aq_str(hw, hw->aq.asq_last_status));
6751 /* If link needs to go up, but was not forced to go down,
6752 * and its speed values are OK, no need for a flap
6754 if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
6755 return I40E_SUCCESS;
6757 /* To force link we need to set bits for all supported PHY types,
6758 * but there are now more than 32, so we need to split the bitmap
6759 * across two fields.
6761 mask = I40E_PHY_TYPES_BITMASK;
6762 config.phy_type = is_up ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
6763 config.phy_type_ext = is_up ? (u8)((mask >> 32) & 0xff) : 0;
6764 /* Copy the old settings, except of phy_type */
6765 config.abilities = abilities.abilities;
6766 if (abilities.link_speed != 0)
6767 config.link_speed = abilities.link_speed;
6769 config.link_speed = speed;
6770 config.eee_capability = abilities.eee_capability;
6771 config.eeer = abilities.eeer_val;
6772 config.low_power_ctrl = abilities.d3_lpan;
6773 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
6774 I40E_AQ_PHY_FEC_CONFIG_MASK;
6775 err = i40e_aq_set_phy_config(hw, &config, NULL);
6778 dev_err(&pf->pdev->dev,
6779 "set phy config ret = %s last_status = %s\n",
6780 i40e_stat_str(&pf->hw, err),
6781 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6785 /* Update the link info */
6786 err = i40e_update_link_info(hw);
6788 /* Wait a little bit (on 40G cards it sometimes takes a really
6789 * long time for link to come back from the atomic reset)
6793 i40e_update_link_info(hw);
6796 i40e_aq_set_link_restart_an(hw, true, NULL);
6798 return I40E_SUCCESS;
6802 * i40e_down - Shutdown the connection processing
6803 * @vsi: the VSI being stopped
6805 void i40e_down(struct i40e_vsi *vsi)
6809 /* It is assumed that the caller of this function
6810 * sets the vsi->state __I40E_VSI_DOWN bit.
6813 netif_carrier_off(vsi->netdev);
6814 netif_tx_disable(vsi->netdev);
6816 i40e_vsi_disable_irq(vsi);
6817 i40e_vsi_stop_rings(vsi);
6818 if (vsi->type == I40E_VSI_MAIN &&
6819 vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED)
6820 i40e_force_link_state(vsi->back, false);
6821 i40e_napi_disable_all(vsi);
6823 for (i = 0; i < vsi->num_queue_pairs; i++) {
6824 i40e_clean_tx_ring(vsi->tx_rings[i]);
6825 if (i40e_enabled_xdp_vsi(vsi)) {
6826 /* Make sure that in-progress ndo_xdp_xmit
6827 * calls are completed.
6830 i40e_clean_tx_ring(vsi->xdp_rings[i]);
6832 i40e_clean_rx_ring(vsi->rx_rings[i]);
6838 * i40e_validate_mqprio_qopt- validate queue mapping info
6839 * @vsi: the VSI being configured
6840 * @mqprio_qopt: queue parametrs
6842 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
6843 struct tc_mqprio_qopt_offload *mqprio_qopt)
6845 u64 sum_max_rate = 0;
6849 if (mqprio_qopt->qopt.offset[0] != 0 ||
6850 mqprio_qopt->qopt.num_tc < 1 ||
6851 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
6853 for (i = 0; ; i++) {
6854 if (!mqprio_qopt->qopt.count[i])
6856 if (mqprio_qopt->min_rate[i]) {
6857 dev_err(&vsi->back->pdev->dev,
6858 "Invalid min tx rate (greater than 0) specified\n");
6861 max_rate = mqprio_qopt->max_rate[i];
6862 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6863 sum_max_rate += max_rate;
6865 if (i >= mqprio_qopt->qopt.num_tc - 1)
6867 if (mqprio_qopt->qopt.offset[i + 1] !=
6868 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
6871 if (vsi->num_queue_pairs <
6872 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
6875 if (sum_max_rate > i40e_get_link_speed(vsi)) {
6876 dev_err(&vsi->back->pdev->dev,
6877 "Invalid max tx rate specified\n");
6884 * i40e_vsi_set_default_tc_config - set default values for tc configuration
6885 * @vsi: the VSI being configured
6887 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
6892 /* Only TC0 is enabled */
6893 vsi->tc_config.numtc = 1;
6894 vsi->tc_config.enabled_tc = 1;
6895 qcount = min_t(int, vsi->alloc_queue_pairs,
6896 i40e_pf_get_max_q_per_tc(vsi->back));
6897 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6898 /* For the TC that is not enabled set the offset to to default
6899 * queue and allocate one queue for the given TC.
6901 vsi->tc_config.tc_info[i].qoffset = 0;
6903 vsi->tc_config.tc_info[i].qcount = qcount;
6905 vsi->tc_config.tc_info[i].qcount = 1;
6906 vsi->tc_config.tc_info[i].netdev_tc = 0;
6911 * i40e_del_macvlan_filter
6912 * @hw: pointer to the HW structure
6913 * @seid: seid of the channel VSI
6914 * @macaddr: the mac address to apply as a filter
6915 * @aq_err: store the admin Q error
6917 * This function deletes a mac filter on the channel VSI which serves as the
6918 * macvlan. Returns 0 on success.
6920 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
6921 const u8 *macaddr, int *aq_err)
6923 struct i40e_aqc_remove_macvlan_element_data element;
6926 memset(&element, 0, sizeof(element));
6927 ether_addr_copy(element.mac_addr, macaddr);
6928 element.vlan_tag = 0;
6929 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
6930 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
6931 *aq_err = hw->aq.asq_last_status;
6937 * i40e_add_macvlan_filter
6938 * @hw: pointer to the HW structure
6939 * @seid: seid of the channel VSI
6940 * @macaddr: the mac address to apply as a filter
6941 * @aq_err: store the admin Q error
6943 * This function adds a mac filter on the channel VSI which serves as the
6944 * macvlan. Returns 0 on success.
6946 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
6947 const u8 *macaddr, int *aq_err)
6949 struct i40e_aqc_add_macvlan_element_data element;
6953 ether_addr_copy(element.mac_addr, macaddr);
6954 element.vlan_tag = 0;
6955 element.queue_number = 0;
6956 element.match_method = I40E_AQC_MM_ERR_NO_RES;
6957 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
6958 element.flags = cpu_to_le16(cmd_flags);
6959 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
6960 *aq_err = hw->aq.asq_last_status;
6966 * i40e_reset_ch_rings - Reset the queue contexts in a channel
6967 * @vsi: the VSI we want to access
6968 * @ch: the channel we want to access
6970 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
6972 struct i40e_ring *tx_ring, *rx_ring;
6976 for (i = 0; i < ch->num_queue_pairs; i++) {
6977 pf_q = ch->base_queue + i;
6978 tx_ring = vsi->tx_rings[pf_q];
6980 rx_ring = vsi->rx_rings[pf_q];
6986 * i40e_free_macvlan_channels
6987 * @vsi: the VSI we want to access
6989 * This function frees the Qs of the channel VSI from
6990 * the stack and also deletes the channel VSIs which
6991 * serve as macvlans.
6993 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
6995 struct i40e_channel *ch, *ch_tmp;
6998 if (list_empty(&vsi->macvlan_list))
7001 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7002 struct i40e_vsi *parent_vsi;
7004 if (i40e_is_channel_macvlan(ch)) {
7005 i40e_reset_ch_rings(vsi, ch);
7006 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7007 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7008 netdev_set_sb_channel(ch->fwd->netdev, 0);
7013 list_del(&ch->list);
7014 parent_vsi = ch->parent_vsi;
7015 if (!parent_vsi || !ch->initialized) {
7020 /* remove the VSI */
7021 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7024 dev_err(&vsi->back->pdev->dev,
7025 "unable to remove channel (%d) for parent VSI(%d)\n",
7026 ch->seid, parent_vsi->seid);
7029 vsi->macvlan_cnt = 0;
7033 * i40e_fwd_ring_up - bring the macvlan device up
7034 * @vsi: the VSI we want to access
7035 * @vdev: macvlan netdevice
7036 * @fwd: the private fwd structure
7038 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7039 struct i40e_fwd_adapter *fwd)
7041 int ret = 0, num_tc = 1, i, aq_err;
7042 struct i40e_channel *ch, *ch_tmp;
7043 struct i40e_pf *pf = vsi->back;
7044 struct i40e_hw *hw = &pf->hw;
7046 if (list_empty(&vsi->macvlan_list))
7049 /* Go through the list and find an available channel */
7050 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7051 if (!i40e_is_channel_macvlan(ch)) {
7053 /* record configuration for macvlan interface in vdev */
7054 for (i = 0; i < num_tc; i++)
7055 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7057 ch->num_queue_pairs,
7059 for (i = 0; i < ch->num_queue_pairs; i++) {
7060 struct i40e_ring *tx_ring, *rx_ring;
7063 pf_q = ch->base_queue + i;
7065 /* Get to TX ring ptr */
7066 tx_ring = vsi->tx_rings[pf_q];
7069 /* Get the RX ring ptr */
7070 rx_ring = vsi->rx_rings[pf_q];
7077 /* Guarantee all rings are updated before we update the
7078 * MAC address filter.
7082 /* Add a mac filter */
7083 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7085 /* if we cannot add the MAC rule then disable the offload */
7086 macvlan_release_l2fw_offload(vdev);
7087 for (i = 0; i < ch->num_queue_pairs; i++) {
7088 struct i40e_ring *rx_ring;
7091 pf_q = ch->base_queue + i;
7092 rx_ring = vsi->rx_rings[pf_q];
7093 rx_ring->netdev = NULL;
7095 dev_info(&pf->pdev->dev,
7096 "Error adding mac filter on macvlan err %s, aq_err %s\n",
7097 i40e_stat_str(hw, ret),
7098 i40e_aq_str(hw, aq_err));
7099 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7106 * i40e_setup_macvlans - create the channels which will be macvlans
7107 * @vsi: the VSI we want to access
7108 * @macvlan_cnt: no. of macvlans to be setup
7109 * @qcnt: no. of Qs per macvlan
7110 * @vdev: macvlan netdevice
7112 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7113 struct net_device *vdev)
7115 struct i40e_pf *pf = vsi->back;
7116 struct i40e_hw *hw = &pf->hw;
7117 struct i40e_vsi_context ctxt;
7118 u16 sections, qmap, num_qps;
7119 struct i40e_channel *ch;
7120 int i, pow, ret = 0;
7123 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7126 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7128 /* find the next higher power-of-2 of num queue pairs */
7129 pow = fls(roundup_pow_of_two(num_qps) - 1);
7131 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7132 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7134 /* Setup context bits for the main VSI */
7135 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7136 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7137 memset(&ctxt, 0, sizeof(ctxt));
7138 ctxt.seid = vsi->seid;
7139 ctxt.pf_num = vsi->back->hw.pf_id;
7141 ctxt.uplink_seid = vsi->uplink_seid;
7142 ctxt.info = vsi->info;
7143 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7144 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7145 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7146 ctxt.info.valid_sections |= cpu_to_le16(sections);
7148 /* Reconfigure RSS for main VSI with new max queue count */
7149 vsi->rss_size = max_t(u16, num_qps, qcnt);
7150 ret = i40e_vsi_config_rss(vsi);
7152 dev_info(&pf->pdev->dev,
7153 "Failed to reconfig RSS for num_queues (%u)\n",
7157 vsi->reconfig_rss = true;
7158 dev_dbg(&vsi->back->pdev->dev,
7159 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7160 vsi->next_base_queue = num_qps;
7161 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7163 /* Update the VSI after updating the VSI queue-mapping
7166 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7168 dev_info(&pf->pdev->dev,
7169 "Update vsi tc config failed, err %s aq_err %s\n",
7170 i40e_stat_str(hw, ret),
7171 i40e_aq_str(hw, hw->aq.asq_last_status));
7174 /* update the local VSI info with updated queue map */
7175 i40e_vsi_update_queue_map(vsi, &ctxt);
7176 vsi->info.valid_sections = 0;
7178 /* Create channels for macvlans */
7179 INIT_LIST_HEAD(&vsi->macvlan_list);
7180 for (i = 0; i < macvlan_cnt; i++) {
7181 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7186 INIT_LIST_HEAD(&ch->list);
7187 ch->num_queue_pairs = qcnt;
7188 if (!i40e_setup_channel(pf, vsi, ch)) {
7193 ch->parent_vsi = vsi;
7194 vsi->cnt_q_avail -= ch->num_queue_pairs;
7196 list_add_tail(&ch->list, &vsi->macvlan_list);
7202 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7203 i40e_free_macvlan_channels(vsi);
7209 * i40e_fwd_add - configure macvlans
7210 * @netdev: net device to configure
7211 * @vdev: macvlan netdevice
7213 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7215 struct i40e_netdev_priv *np = netdev_priv(netdev);
7216 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7217 struct i40e_vsi *vsi = np->vsi;
7218 struct i40e_pf *pf = vsi->back;
7219 struct i40e_fwd_adapter *fwd;
7220 int avail_macvlan, ret;
7222 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7223 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7224 return ERR_PTR(-EINVAL);
7226 if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7227 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7228 return ERR_PTR(-EINVAL);
7230 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7231 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7232 return ERR_PTR(-EINVAL);
7235 /* The macvlan device has to be a single Q device so that the
7236 * tc_to_txq field can be reused to pick the tx queue.
7238 if (netif_is_multiqueue(vdev))
7239 return ERR_PTR(-ERANGE);
7241 if (!vsi->macvlan_cnt) {
7242 /* reserve bit 0 for the pf device */
7243 set_bit(0, vsi->fwd_bitmask);
7245 /* Try to reserve as many queues as possible for macvlans. First
7246 * reserve 3/4th of max vectors, then half, then quarter and
7247 * calculate Qs per macvlan as you go
7249 vectors = pf->num_lan_msix;
7250 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7251 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7253 macvlan_cnt = (vectors - 32) / 4;
7254 } else if (vectors <= 64 && vectors > 32) {
7255 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7257 macvlan_cnt = (vectors - 16) / 2;
7258 } else if (vectors <= 32 && vectors > 16) {
7259 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7261 macvlan_cnt = vectors - 16;
7262 } else if (vectors <= 16 && vectors > 8) {
7263 /* allocate 1 Q per macvlan and 8 Qs to the PF */
7265 macvlan_cnt = vectors - 8;
7267 /* allocate 1 Q per macvlan and 1 Q to the PF */
7269 macvlan_cnt = vectors - 1;
7272 if (macvlan_cnt == 0)
7273 return ERR_PTR(-EBUSY);
7275 /* Quiesce VSI queues */
7276 i40e_quiesce_vsi(vsi);
7278 /* sets up the macvlans but does not "enable" them */
7279 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7282 return ERR_PTR(ret);
7285 i40e_unquiesce_vsi(vsi);
7287 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7289 if (avail_macvlan >= I40E_MAX_MACVLANS)
7290 return ERR_PTR(-EBUSY);
7292 /* create the fwd struct */
7293 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7295 return ERR_PTR(-ENOMEM);
7297 set_bit(avail_macvlan, vsi->fwd_bitmask);
7298 fwd->bit_no = avail_macvlan;
7299 netdev_set_sb_channel(vdev, avail_macvlan);
7302 if (!netif_running(netdev))
7305 /* Set fwd ring up */
7306 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7308 /* unbind the queues and drop the subordinate channel config */
7309 netdev_unbind_sb_channel(netdev, vdev);
7310 netdev_set_sb_channel(vdev, 0);
7313 return ERR_PTR(-EINVAL);
7320 * i40e_del_all_macvlans - Delete all the mac filters on the channels
7321 * @vsi: the VSI we want to access
7323 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7325 struct i40e_channel *ch, *ch_tmp;
7326 struct i40e_pf *pf = vsi->back;
7327 struct i40e_hw *hw = &pf->hw;
7328 int aq_err, ret = 0;
7330 if (list_empty(&vsi->macvlan_list))
7333 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7334 if (i40e_is_channel_macvlan(ch)) {
7335 ret = i40e_del_macvlan_filter(hw, ch->seid,
7336 i40e_channel_mac(ch),
7339 /* Reset queue contexts */
7340 i40e_reset_ch_rings(vsi, ch);
7341 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7342 netdev_unbind_sb_channel(vsi->netdev,
7344 netdev_set_sb_channel(ch->fwd->netdev, 0);
7353 * i40e_fwd_del - delete macvlan interfaces
7354 * @netdev: net device to configure
7355 * @vdev: macvlan netdevice
7357 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7359 struct i40e_netdev_priv *np = netdev_priv(netdev);
7360 struct i40e_fwd_adapter *fwd = vdev;
7361 struct i40e_channel *ch, *ch_tmp;
7362 struct i40e_vsi *vsi = np->vsi;
7363 struct i40e_pf *pf = vsi->back;
7364 struct i40e_hw *hw = &pf->hw;
7365 int aq_err, ret = 0;
7367 /* Find the channel associated with the macvlan and del mac filter */
7368 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7369 if (i40e_is_channel_macvlan(ch) &&
7370 ether_addr_equal(i40e_channel_mac(ch),
7371 fwd->netdev->dev_addr)) {
7372 ret = i40e_del_macvlan_filter(hw, ch->seid,
7373 i40e_channel_mac(ch),
7376 /* Reset queue contexts */
7377 i40e_reset_ch_rings(vsi, ch);
7378 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7379 netdev_unbind_sb_channel(netdev, fwd->netdev);
7380 netdev_set_sb_channel(fwd->netdev, 0);
7384 dev_info(&pf->pdev->dev,
7385 "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7386 i40e_stat_str(hw, ret),
7387 i40e_aq_str(hw, aq_err));
7395 * i40e_setup_tc - configure multiple traffic classes
7396 * @netdev: net device to configure
7397 * @type_data: tc offload data
7399 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7401 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7402 struct i40e_netdev_priv *np = netdev_priv(netdev);
7403 struct i40e_vsi *vsi = np->vsi;
7404 struct i40e_pf *pf = vsi->back;
7405 u8 enabled_tc = 0, num_tc, hw;
7406 bool need_reset = false;
7407 int old_queue_pairs;
7412 old_queue_pairs = vsi->num_queue_pairs;
7413 num_tc = mqprio_qopt->qopt.num_tc;
7414 hw = mqprio_qopt->qopt.hw;
7415 mode = mqprio_qopt->mode;
7417 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7418 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
7422 /* Check if MFP enabled */
7423 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7425 "Configuring TC not supported in MFP mode\n");
7429 case TC_MQPRIO_MODE_DCB:
7430 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7432 /* Check if DCB enabled to continue */
7433 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7435 "DCB is not enabled for adapter\n");
7439 /* Check whether tc count is within enabled limit */
7440 if (num_tc > i40e_pf_get_num_tc(pf)) {
7442 "TC count greater than enabled on link for adapter\n");
7446 case TC_MQPRIO_MODE_CHANNEL:
7447 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
7449 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
7452 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7454 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
7457 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
7458 sizeof(*mqprio_qopt));
7459 pf->flags |= I40E_FLAG_TC_MQPRIO;
7460 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7467 /* Generate TC map for number of tc requested */
7468 for (i = 0; i < num_tc; i++)
7469 enabled_tc |= BIT(i);
7471 /* Requesting same TC configuration as already enabled */
7472 if (enabled_tc == vsi->tc_config.enabled_tc &&
7473 mode != TC_MQPRIO_MODE_CHANNEL)
7476 /* Quiesce VSI queues */
7477 i40e_quiesce_vsi(vsi);
7479 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
7480 i40e_remove_queue_channels(vsi);
7482 /* Configure VSI for enabled TCs */
7483 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7485 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
7490 dev_info(&vsi->back->pdev->dev,
7491 "Setup channel (id:%u) utilizing num_queues %d\n",
7492 vsi->seid, vsi->tc_config.tc_info[0].qcount);
7495 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
7496 if (vsi->mqprio_qopt.max_rate[0]) {
7497 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
7499 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
7500 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
7502 u64 credits = max_tx_rate;
7504 do_div(credits, I40E_BW_CREDIT_DIVISOR);
7505 dev_dbg(&vsi->back->pdev->dev,
7506 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
7515 ret = i40e_configure_queue_channels(vsi);
7517 vsi->num_queue_pairs = old_queue_pairs;
7519 "Failed configuring queue channels\n");
7526 /* Reset the configuration data to defaults, only TC0 is enabled */
7528 i40e_vsi_set_default_tc_config(vsi);
7533 i40e_unquiesce_vsi(vsi);
7538 * i40e_set_cld_element - sets cloud filter element data
7539 * @filter: cloud filter rule
7540 * @cld: ptr to cloud filter element data
7542 * This is helper function to copy data into cloud filter element
7545 i40e_set_cld_element(struct i40e_cloud_filter *filter,
7546 struct i40e_aqc_cloud_filters_element_data *cld)
7551 memset(cld, 0, sizeof(*cld));
7552 ether_addr_copy(cld->outer_mac, filter->dst_mac);
7553 ether_addr_copy(cld->inner_mac, filter->src_mac);
7555 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
7558 if (filter->n_proto == ETH_P_IPV6) {
7559 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
7560 for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);
7562 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
7563 ipa = cpu_to_le32(ipa);
7564 memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));
7567 ipa = be32_to_cpu(filter->dst_ipv4);
7568 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
7571 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
7573 /* tenant_id is not supported by FW now, once the support is enabled
7574 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
7576 if (filter->tenant_id)
7581 * i40e_add_del_cloud_filter - Add/del cloud filter
7582 * @vsi: pointer to VSI
7583 * @filter: cloud filter rule
7584 * @add: if true, add, if false, delete
7586 * Add or delete a cloud filter for a specific flow spec.
7587 * Returns 0 if the filter were successfully added.
7589 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
7590 struct i40e_cloud_filter *filter, bool add)
7592 struct i40e_aqc_cloud_filters_element_data cld_filter;
7593 struct i40e_pf *pf = vsi->back;
7595 static const u16 flag_table[128] = {
7596 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
7597 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
7598 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
7599 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
7600 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
7601 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
7602 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
7603 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
7604 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
7605 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
7606 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
7607 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
7608 [I40E_CLOUD_FILTER_FLAGS_IIP] =
7609 I40E_AQC_ADD_CLOUD_FILTER_IIP,
7612 if (filter->flags >= ARRAY_SIZE(flag_table))
7613 return I40E_ERR_CONFIG;
7615 /* copy element needed to add cloud filter from filter */
7616 i40e_set_cld_element(filter, &cld_filter);
7618 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
7619 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
7620 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
7622 if (filter->n_proto == ETH_P_IPV6)
7623 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
7624 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7626 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
7627 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7630 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
7633 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
7636 dev_dbg(&pf->pdev->dev,
7637 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
7638 add ? "add" : "delete", filter->dst_port, ret,
7639 pf->hw.aq.asq_last_status);
7641 dev_info(&pf->pdev->dev,
7642 "%s cloud filter for VSI: %d\n",
7643 add ? "Added" : "Deleted", filter->seid);
7648 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
7649 * @vsi: pointer to VSI
7650 * @filter: cloud filter rule
7651 * @add: if true, add, if false, delete
7653 * Add or delete a cloud filter for a specific flow spec using big buffer.
7654 * Returns 0 if the filter were successfully added.
7656 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
7657 struct i40e_cloud_filter *filter,
7660 struct i40e_aqc_cloud_filters_element_bb cld_filter;
7661 struct i40e_pf *pf = vsi->back;
7664 /* Both (src/dst) valid mac_addr are not supported */
7665 if ((is_valid_ether_addr(filter->dst_mac) &&
7666 is_valid_ether_addr(filter->src_mac)) ||
7667 (is_multicast_ether_addr(filter->dst_mac) &&
7668 is_multicast_ether_addr(filter->src_mac)))
7671 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
7672 * ports are not supported via big buffer now.
7674 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
7677 /* adding filter using src_port/src_ip is not supported at this stage */
7678 if (filter->src_port || filter->src_ipv4 ||
7679 !ipv6_addr_any(&filter->ip.v6.src_ip6))
7682 /* copy element needed to add cloud filter from filter */
7683 i40e_set_cld_element(filter, &cld_filter.element);
7685 if (is_valid_ether_addr(filter->dst_mac) ||
7686 is_valid_ether_addr(filter->src_mac) ||
7687 is_multicast_ether_addr(filter->dst_mac) ||
7688 is_multicast_ether_addr(filter->src_mac)) {
7689 /* MAC + IP : unsupported mode */
7690 if (filter->dst_ipv4)
7693 /* since we validated that L4 port must be valid before
7694 * we get here, start with respective "flags" value
7695 * and update if vlan is present or not
7697 cld_filter.element.flags =
7698 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
7700 if (filter->vlan_id) {
7701 cld_filter.element.flags =
7702 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
7705 } else if (filter->dst_ipv4 ||
7706 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
7707 cld_filter.element.flags =
7708 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
7709 if (filter->n_proto == ETH_P_IPV6)
7710 cld_filter.element.flags |=
7711 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7713 cld_filter.element.flags |=
7714 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7716 dev_err(&pf->pdev->dev,
7717 "either mac or ip has to be valid for cloud filter\n");
7721 /* Now copy L4 port in Byte 6..7 in general fields */
7722 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
7723 be16_to_cpu(filter->dst_port);
7726 /* Validate current device switch mode, change if necessary */
7727 ret = i40e_validate_and_set_switch_mode(vsi);
7729 dev_err(&pf->pdev->dev,
7730 "failed to set switch mode, ret %d\n",
7735 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
7738 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
7743 dev_dbg(&pf->pdev->dev,
7744 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
7745 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
7747 dev_info(&pf->pdev->dev,
7748 "%s cloud filter for VSI: %d, L4 port: %d\n",
7749 add ? "add" : "delete", filter->seid,
7750 ntohs(filter->dst_port));
7755 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
7756 * @vsi: Pointer to VSI
7757 * @cls_flower: Pointer to struct flow_cls_offload
7758 * @filter: Pointer to cloud filter structure
7761 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
7762 struct flow_cls_offload *f,
7763 struct i40e_cloud_filter *filter)
7765 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
7766 struct flow_dissector *dissector = rule->match.dissector;
7767 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
7768 struct i40e_pf *pf = vsi->back;
7771 if (dissector->used_keys &
7772 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
7773 BIT(FLOW_DISSECTOR_KEY_BASIC) |
7774 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
7775 BIT(FLOW_DISSECTOR_KEY_VLAN) |
7776 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
7777 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
7778 BIT(FLOW_DISSECTOR_KEY_PORTS) |
7779 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
7780 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
7781 dissector->used_keys);
7785 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
7786 struct flow_match_enc_keyid match;
7788 flow_rule_match_enc_keyid(rule, &match);
7789 if (match.mask->keyid != 0)
7790 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
7792 filter->tenant_id = be32_to_cpu(match.key->keyid);
7795 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
7796 struct flow_match_basic match;
7798 flow_rule_match_basic(rule, &match);
7799 n_proto_key = ntohs(match.key->n_proto);
7800 n_proto_mask = ntohs(match.mask->n_proto);
7802 if (n_proto_key == ETH_P_ALL) {
7806 filter->n_proto = n_proto_key & n_proto_mask;
7807 filter->ip_proto = match.key->ip_proto;
7810 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
7811 struct flow_match_eth_addrs match;
7813 flow_rule_match_eth_addrs(rule, &match);
7815 /* use is_broadcast and is_zero to check for all 0xf or 0 */
7816 if (!is_zero_ether_addr(match.mask->dst)) {
7817 if (is_broadcast_ether_addr(match.mask->dst)) {
7818 field_flags |= I40E_CLOUD_FIELD_OMAC;
7820 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
7822 return I40E_ERR_CONFIG;
7826 if (!is_zero_ether_addr(match.mask->src)) {
7827 if (is_broadcast_ether_addr(match.mask->src)) {
7828 field_flags |= I40E_CLOUD_FIELD_IMAC;
7830 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
7832 return I40E_ERR_CONFIG;
7835 ether_addr_copy(filter->dst_mac, match.key->dst);
7836 ether_addr_copy(filter->src_mac, match.key->src);
7839 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
7840 struct flow_match_vlan match;
7842 flow_rule_match_vlan(rule, &match);
7843 if (match.mask->vlan_id) {
7844 if (match.mask->vlan_id == VLAN_VID_MASK) {
7845 field_flags |= I40E_CLOUD_FIELD_IVLAN;
7848 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
7849 match.mask->vlan_id);
7850 return I40E_ERR_CONFIG;
7854 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
7857 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
7858 struct flow_match_control match;
7860 flow_rule_match_control(rule, &match);
7861 addr_type = match.key->addr_type;
7864 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
7865 struct flow_match_ipv4_addrs match;
7867 flow_rule_match_ipv4_addrs(rule, &match);
7868 if (match.mask->dst) {
7869 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
7870 field_flags |= I40E_CLOUD_FIELD_IIP;
7872 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
7874 return I40E_ERR_CONFIG;
7878 if (match.mask->src) {
7879 if (match.mask->src == cpu_to_be32(0xffffffff)) {
7880 field_flags |= I40E_CLOUD_FIELD_IIP;
7882 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
7884 return I40E_ERR_CONFIG;
7888 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
7889 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
7890 return I40E_ERR_CONFIG;
7892 filter->dst_ipv4 = match.key->dst;
7893 filter->src_ipv4 = match.key->src;
7896 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
7897 struct flow_match_ipv6_addrs match;
7899 flow_rule_match_ipv6_addrs(rule, &match);
7901 /* src and dest IPV6 address should not be LOOPBACK
7902 * (0:0:0:0:0:0:0:1), which can be represented as ::1
7904 if (ipv6_addr_loopback(&match.key->dst) ||
7905 ipv6_addr_loopback(&match.key->src)) {
7906 dev_err(&pf->pdev->dev,
7907 "Bad ipv6, addr is LOOPBACK\n");
7908 return I40E_ERR_CONFIG;
7910 if (!ipv6_addr_any(&match.mask->dst) ||
7911 !ipv6_addr_any(&match.mask->src))
7912 field_flags |= I40E_CLOUD_FIELD_IIP;
7914 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
7915 sizeof(filter->src_ipv6));
7916 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
7917 sizeof(filter->dst_ipv6));
7920 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
7921 struct flow_match_ports match;
7923 flow_rule_match_ports(rule, &match);
7924 if (match.mask->src) {
7925 if (match.mask->src == cpu_to_be16(0xffff)) {
7926 field_flags |= I40E_CLOUD_FIELD_IIP;
7928 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
7929 be16_to_cpu(match.mask->src));
7930 return I40E_ERR_CONFIG;
7934 if (match.mask->dst) {
7935 if (match.mask->dst == cpu_to_be16(0xffff)) {
7936 field_flags |= I40E_CLOUD_FIELD_IIP;
7938 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
7939 be16_to_cpu(match.mask->dst));
7940 return I40E_ERR_CONFIG;
7944 filter->dst_port = match.key->dst;
7945 filter->src_port = match.key->src;
7947 switch (filter->ip_proto) {
7952 dev_err(&pf->pdev->dev,
7953 "Only UDP and TCP transport are supported\n");
7957 filter->flags = field_flags;
7962 * i40e_handle_tclass: Forward to a traffic class on the device
7963 * @vsi: Pointer to VSI
7964 * @tc: traffic class index on the device
7965 * @filter: Pointer to cloud filter structure
7968 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
7969 struct i40e_cloud_filter *filter)
7971 struct i40e_channel *ch, *ch_tmp;
7973 /* direct to a traffic class on the same device */
7975 filter->seid = vsi->seid;
7977 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
7978 if (!filter->dst_port) {
7979 dev_err(&vsi->back->pdev->dev,
7980 "Specify destination port to direct to traffic class that is not default\n");
7983 if (list_empty(&vsi->ch_list))
7985 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
7987 if (ch->seid == vsi->tc_seid_map[tc])
7988 filter->seid = ch->seid;
7992 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
7997 * i40e_configure_clsflower - Configure tc flower filters
7998 * @vsi: Pointer to VSI
7999 * @cls_flower: Pointer to struct flow_cls_offload
8002 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8003 struct flow_cls_offload *cls_flower)
8005 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8006 struct i40e_cloud_filter *filter = NULL;
8007 struct i40e_pf *pf = vsi->back;
8011 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8015 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8016 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8019 if (pf->fdir_pf_active_filters ||
8020 (!hlist_empty(&pf->fdir_filter_list))) {
8021 dev_err(&vsi->back->pdev->dev,
8022 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8026 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8027 dev_err(&vsi->back->pdev->dev,
8028 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8029 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8030 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8033 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8037 filter->cookie = cls_flower->cookie;
8039 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8043 err = i40e_handle_tclass(vsi, tc, filter);
8047 /* Add cloud filter */
8048 if (filter->dst_port)
8049 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8051 err = i40e_add_del_cloud_filter(vsi, filter, true);
8054 dev_err(&pf->pdev->dev,
8055 "Failed to add cloud filter, err %s\n",
8056 i40e_stat_str(&pf->hw, err));
8060 /* add filter to the ordered list */
8061 INIT_HLIST_NODE(&filter->cloud_node);
8063 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8065 pf->num_cloud_filters++;
8074 * i40e_find_cloud_filter - Find the could filter in the list
8075 * @vsi: Pointer to VSI
8076 * @cookie: filter specific cookie
8079 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8080 unsigned long *cookie)
8082 struct i40e_cloud_filter *filter = NULL;
8083 struct hlist_node *node2;
8085 hlist_for_each_entry_safe(filter, node2,
8086 &vsi->back->cloud_filter_list, cloud_node)
8087 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8093 * i40e_delete_clsflower - Remove tc flower filters
8094 * @vsi: Pointer to VSI
8095 * @cls_flower: Pointer to struct flow_cls_offload
8098 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8099 struct flow_cls_offload *cls_flower)
8101 struct i40e_cloud_filter *filter = NULL;
8102 struct i40e_pf *pf = vsi->back;
8105 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8110 hash_del(&filter->cloud_node);
8112 if (filter->dst_port)
8113 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8115 err = i40e_add_del_cloud_filter(vsi, filter, false);
8119 dev_err(&pf->pdev->dev,
8120 "Failed to delete cloud filter, err %s\n",
8121 i40e_stat_str(&pf->hw, err));
8122 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8125 pf->num_cloud_filters--;
8126 if (!pf->num_cloud_filters)
8127 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8128 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8129 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8130 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8131 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8137 * i40e_setup_tc_cls_flower - flower classifier offloads
8138 * @netdev: net device to configure
8139 * @type_data: offload data
8141 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8142 struct flow_cls_offload *cls_flower)
8144 struct i40e_vsi *vsi = np->vsi;
8146 switch (cls_flower->command) {
8147 case FLOW_CLS_REPLACE:
8148 return i40e_configure_clsflower(vsi, cls_flower);
8149 case FLOW_CLS_DESTROY:
8150 return i40e_delete_clsflower(vsi, cls_flower);
8151 case FLOW_CLS_STATS:
8158 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8161 struct i40e_netdev_priv *np = cb_priv;
8163 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8167 case TC_SETUP_CLSFLOWER:
8168 return i40e_setup_tc_cls_flower(np, type_data);
8175 static LIST_HEAD(i40e_block_cb_list);
8177 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8180 struct i40e_netdev_priv *np = netdev_priv(netdev);
8183 case TC_SETUP_QDISC_MQPRIO:
8184 return i40e_setup_tc(netdev, type_data);
8185 case TC_SETUP_BLOCK:
8186 return flow_block_cb_setup_simple(type_data,
8187 &i40e_block_cb_list,
8188 i40e_setup_tc_block_cb,
8196 * i40e_open - Called when a network interface is made active
8197 * @netdev: network interface device structure
8199 * The open entry point is called when a network interface is made
8200 * active by the system (IFF_UP). At this point all resources needed
8201 * for transmit and receive operations are allocated, the interrupt
8202 * handler is registered with the OS, the netdev watchdog subtask is
8203 * enabled, and the stack is notified that the interface is ready.
8205 * Returns 0 on success, negative value on failure
8207 int i40e_open(struct net_device *netdev)
8209 struct i40e_netdev_priv *np = netdev_priv(netdev);
8210 struct i40e_vsi *vsi = np->vsi;
8211 struct i40e_pf *pf = vsi->back;
8214 /* disallow open during test or if eeprom is broken */
8215 if (test_bit(__I40E_TESTING, pf->state) ||
8216 test_bit(__I40E_BAD_EEPROM, pf->state))
8219 netif_carrier_off(netdev);
8221 if (i40e_force_link_state(pf, true))
8224 err = i40e_vsi_open(vsi);
8228 /* configure global TSO hardware offload settings */
8229 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8230 TCP_FLAG_FIN) >> 16);
8231 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8233 TCP_FLAG_CWR) >> 16);
8234 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8236 udp_tunnel_get_rx_info(netdev);
8243 * @vsi: the VSI to open
8245 * Finish initialization of the VSI.
8247 * Returns 0 on success, negative value on failure
8249 * Note: expects to be called while under rtnl_lock()
8251 int i40e_vsi_open(struct i40e_vsi *vsi)
8253 struct i40e_pf *pf = vsi->back;
8254 char int_name[I40E_INT_NAME_STR_LEN];
8257 /* allocate descriptors */
8258 err = i40e_vsi_setup_tx_resources(vsi);
8261 err = i40e_vsi_setup_rx_resources(vsi);
8265 err = i40e_vsi_configure(vsi);
8270 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8271 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8272 err = i40e_vsi_request_irq(vsi, int_name);
8276 /* Notify the stack of the actual queue counts. */
8277 err = netif_set_real_num_tx_queues(vsi->netdev,
8278 vsi->num_queue_pairs);
8280 goto err_set_queues;
8282 err = netif_set_real_num_rx_queues(vsi->netdev,
8283 vsi->num_queue_pairs);
8285 goto err_set_queues;
8287 } else if (vsi->type == I40E_VSI_FDIR) {
8288 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8289 dev_driver_string(&pf->pdev->dev),
8290 dev_name(&pf->pdev->dev));
8291 err = i40e_vsi_request_irq(vsi, int_name);
8298 err = i40e_up_complete(vsi);
8300 goto err_up_complete;
8307 i40e_vsi_free_irq(vsi);
8309 i40e_vsi_free_rx_resources(vsi);
8311 i40e_vsi_free_tx_resources(vsi);
8312 if (vsi == pf->vsi[pf->lan_vsi])
8313 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8319 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8320 * @pf: Pointer to PF
8322 * This function destroys the hlist where all the Flow Director
8323 * filters were saved.
8325 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8327 struct i40e_fdir_filter *filter;
8328 struct i40e_flex_pit *pit_entry, *tmp;
8329 struct hlist_node *node2;
8331 hlist_for_each_entry_safe(filter, node2,
8332 &pf->fdir_filter_list, fdir_node) {
8333 hlist_del(&filter->fdir_node);
8337 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8338 list_del(&pit_entry->list);
8341 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8343 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8344 list_del(&pit_entry->list);
8347 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8349 pf->fdir_pf_active_filters = 0;
8350 pf->fd_tcp4_filter_cnt = 0;
8351 pf->fd_udp4_filter_cnt = 0;
8352 pf->fd_sctp4_filter_cnt = 0;
8353 pf->fd_ip4_filter_cnt = 0;
8355 /* Reprogram the default input set for TCP/IPv4 */
8356 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8357 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8358 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8360 /* Reprogram the default input set for UDP/IPv4 */
8361 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8362 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8363 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8365 /* Reprogram the default input set for SCTP/IPv4 */
8366 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8367 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8368 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8370 /* Reprogram the default input set for Other/IPv4 */
8371 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
8372 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8374 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
8375 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8379 * i40e_cloud_filter_exit - Cleans up the cloud filters
8380 * @pf: Pointer to PF
8382 * This function destroys the hlist where all the cloud filters
8385 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
8387 struct i40e_cloud_filter *cfilter;
8388 struct hlist_node *node;
8390 hlist_for_each_entry_safe(cfilter, node,
8391 &pf->cloud_filter_list, cloud_node) {
8392 hlist_del(&cfilter->cloud_node);
8395 pf->num_cloud_filters = 0;
8397 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8398 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8399 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8400 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8401 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8406 * i40e_close - Disables a network interface
8407 * @netdev: network interface device structure
8409 * The close entry point is called when an interface is de-activated
8410 * by the OS. The hardware is still under the driver's control, but
8411 * this netdev interface is disabled.
8413 * Returns 0, this is not allowed to fail
8415 int i40e_close(struct net_device *netdev)
8417 struct i40e_netdev_priv *np = netdev_priv(netdev);
8418 struct i40e_vsi *vsi = np->vsi;
8420 i40e_vsi_close(vsi);
8426 * i40e_do_reset - Start a PF or Core Reset sequence
8427 * @pf: board private structure
8428 * @reset_flags: which reset is requested
8429 * @lock_acquired: indicates whether or not the lock has been acquired
8430 * before this function was called.
8432 * The essential difference in resets is that the PF Reset
8433 * doesn't clear the packet buffers, doesn't reset the PE
8434 * firmware, and doesn't bother the other PFs on the chip.
8436 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
8440 WARN_ON(in_interrupt());
8443 /* do the biggest reset indicated */
8444 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
8446 /* Request a Global Reset
8448 * This will start the chip's countdown to the actual full
8449 * chip reset event, and a warning interrupt to be sent
8450 * to all PFs, including the requestor. Our handler
8451 * for the warning interrupt will deal with the shutdown
8452 * and recovery of the switch setup.
8454 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
8455 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8456 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
8457 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8459 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
8461 /* Request a Core Reset
8463 * Same as Global Reset, except does *not* include the MAC/PHY
8465 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
8466 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8467 val |= I40E_GLGEN_RTRIG_CORER_MASK;
8468 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8469 i40e_flush(&pf->hw);
8471 } else if (reset_flags & I40E_PF_RESET_FLAG) {
8473 /* Request a PF Reset
8475 * Resets only the PF-specific registers
8477 * This goes directly to the tear-down and rebuild of
8478 * the switch, since we need to do all the recovery as
8479 * for the Core Reset.
8481 dev_dbg(&pf->pdev->dev, "PFR requested\n");
8482 i40e_handle_reset_warning(pf, lock_acquired);
8484 dev_info(&pf->pdev->dev,
8485 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
8486 "FW LLDP is disabled\n" :
8487 "FW LLDP is enabled\n");
8489 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
8492 /* Find the VSI(s) that requested a re-init */
8493 dev_info(&pf->pdev->dev,
8494 "VSI reinit requested\n");
8495 for (v = 0; v < pf->num_alloc_vsi; v++) {
8496 struct i40e_vsi *vsi = pf->vsi[v];
8499 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
8501 i40e_vsi_reinit_locked(pf->vsi[v]);
8503 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
8506 /* Find the VSI(s) that needs to be brought down */
8507 dev_info(&pf->pdev->dev, "VSI down requested\n");
8508 for (v = 0; v < pf->num_alloc_vsi; v++) {
8509 struct i40e_vsi *vsi = pf->vsi[v];
8512 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
8514 set_bit(__I40E_VSI_DOWN, vsi->state);
8519 dev_info(&pf->pdev->dev,
8520 "bad reset request 0x%08x\n", reset_flags);
8524 #ifdef CONFIG_I40E_DCB
8526 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
8527 * @pf: board private structure
8528 * @old_cfg: current DCB config
8529 * @new_cfg: new DCB config
8531 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
8532 struct i40e_dcbx_config *old_cfg,
8533 struct i40e_dcbx_config *new_cfg)
8535 bool need_reconfig = false;
8537 /* Check if ETS configuration has changed */
8538 if (memcmp(&new_cfg->etscfg,
8540 sizeof(new_cfg->etscfg))) {
8541 /* If Priority Table has changed reconfig is needed */
8542 if (memcmp(&new_cfg->etscfg.prioritytable,
8543 &old_cfg->etscfg.prioritytable,
8544 sizeof(new_cfg->etscfg.prioritytable))) {
8545 need_reconfig = true;
8546 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
8549 if (memcmp(&new_cfg->etscfg.tcbwtable,
8550 &old_cfg->etscfg.tcbwtable,
8551 sizeof(new_cfg->etscfg.tcbwtable)))
8552 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
8554 if (memcmp(&new_cfg->etscfg.tsatable,
8555 &old_cfg->etscfg.tsatable,
8556 sizeof(new_cfg->etscfg.tsatable)))
8557 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
8560 /* Check if PFC configuration has changed */
8561 if (memcmp(&new_cfg->pfc,
8563 sizeof(new_cfg->pfc))) {
8564 need_reconfig = true;
8565 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
8568 /* Check if APP Table has changed */
8569 if (memcmp(&new_cfg->app,
8571 sizeof(new_cfg->app))) {
8572 need_reconfig = true;
8573 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
8576 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
8577 return need_reconfig;
8581 * i40e_handle_lldp_event - Handle LLDP Change MIB event
8582 * @pf: board private structure
8583 * @e: event info posted on ARQ
8585 static int i40e_handle_lldp_event(struct i40e_pf *pf,
8586 struct i40e_arq_event_info *e)
8588 struct i40e_aqc_lldp_get_mib *mib =
8589 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
8590 struct i40e_hw *hw = &pf->hw;
8591 struct i40e_dcbx_config tmp_dcbx_cfg;
8592 bool need_reconfig = false;
8596 /* Not DCB capable or capability disabled */
8597 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
8600 /* Ignore if event is not for Nearest Bridge */
8601 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
8602 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
8603 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
8604 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
8607 /* Check MIB Type and return if event for Remote MIB update */
8608 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
8609 dev_dbg(&pf->pdev->dev,
8610 "LLDP event mib type %s\n", type ? "remote" : "local");
8611 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
8612 /* Update the remote cached instance and return */
8613 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
8614 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
8615 &hw->remote_dcbx_config);
8619 /* Store the old configuration */
8620 tmp_dcbx_cfg = hw->local_dcbx_config;
8622 /* Reset the old DCBx configuration data */
8623 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
8624 /* Get updated DCBX data from firmware */
8625 ret = i40e_get_dcb_config(&pf->hw);
8627 dev_info(&pf->pdev->dev,
8628 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
8629 i40e_stat_str(&pf->hw, ret),
8630 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8634 /* No change detected in DCBX configs */
8635 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
8636 sizeof(tmp_dcbx_cfg))) {
8637 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
8641 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
8642 &hw->local_dcbx_config);
8644 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
8649 /* Enable DCB tagging only when more than one TC */
8650 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
8651 pf->flags |= I40E_FLAG_DCB_ENABLED;
8653 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8655 set_bit(__I40E_PORT_SUSPENDED, pf->state);
8656 /* Reconfiguration needed quiesce all VSIs */
8657 i40e_pf_quiesce_all_vsi(pf);
8659 /* Changes in configuration update VEB/VSI */
8660 i40e_dcb_reconfigure(pf);
8662 ret = i40e_resume_port_tx(pf);
8664 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
8665 /* In case of error no point in resuming VSIs */
8669 /* Wait for the PF's queues to be disabled */
8670 ret = i40e_pf_wait_queues_disabled(pf);
8672 /* Schedule PF reset to recover */
8673 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
8674 i40e_service_event_schedule(pf);
8676 i40e_pf_unquiesce_all_vsi(pf);
8677 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
8678 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
8684 #endif /* CONFIG_I40E_DCB */
8687 * i40e_do_reset_safe - Protected reset path for userland calls.
8688 * @pf: board private structure
8689 * @reset_flags: which reset is requested
8692 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
8695 i40e_do_reset(pf, reset_flags, true);
8700 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
8701 * @pf: board private structure
8702 * @e: event info posted on ARQ
8704 * Handler for LAN Queue Overflow Event generated by the firmware for PF
8707 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
8708 struct i40e_arq_event_info *e)
8710 struct i40e_aqc_lan_overflow *data =
8711 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
8712 u32 queue = le32_to_cpu(data->prtdcb_rupto);
8713 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
8714 struct i40e_hw *hw = &pf->hw;
8718 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
8721 /* Queue belongs to VF, find the VF and issue VF reset */
8722 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
8723 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
8724 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
8725 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
8726 vf_id -= hw->func_caps.vf_base_id;
8727 vf = &pf->vf[vf_id];
8728 i40e_vc_notify_vf_reset(vf);
8729 /* Allow VF to process pending reset notification */
8731 i40e_reset_vf(vf, false);
8736 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
8737 * @pf: board private structure
8739 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
8743 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8744 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
8749 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
8750 * @pf: board private structure
8752 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
8756 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8757 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
8758 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
8759 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
8764 * i40e_get_global_fd_count - Get total FD filters programmed on device
8765 * @pf: board private structure
8767 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
8771 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
8772 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
8773 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
8774 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
8779 * i40e_reenable_fdir_sb - Restore FDir SB capability
8780 * @pf: board private structure
8782 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
8784 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
8785 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8786 (I40E_DEBUG_FD & pf->hw.debug_mask))
8787 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
8791 * i40e_reenable_fdir_atr - Restore FDir ATR capability
8792 * @pf: board private structure
8794 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
8796 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
8797 /* ATR uses the same filtering logic as SB rules. It only
8798 * functions properly if the input set mask is at the default
8799 * settings. It is safe to restore the default input set
8800 * because there are no active TCPv4 filter rules.
8802 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8803 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8804 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8806 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8807 (I40E_DEBUG_FD & pf->hw.debug_mask))
8808 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
8813 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
8814 * @pf: board private structure
8815 * @filter: FDir filter to remove
8817 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
8818 struct i40e_fdir_filter *filter)
8820 /* Update counters */
8821 pf->fdir_pf_active_filters--;
8824 switch (filter->flow_type) {
8826 pf->fd_tcp4_filter_cnt--;
8829 pf->fd_udp4_filter_cnt--;
8832 pf->fd_sctp4_filter_cnt--;
8835 switch (filter->ip4_proto) {
8837 pf->fd_tcp4_filter_cnt--;
8840 pf->fd_udp4_filter_cnt--;
8843 pf->fd_sctp4_filter_cnt--;
8846 pf->fd_ip4_filter_cnt--;
8852 /* Remove the filter from the list and free memory */
8853 hlist_del(&filter->fdir_node);
8858 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
8859 * @pf: board private structure
8861 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
8863 struct i40e_fdir_filter *filter;
8864 u32 fcnt_prog, fcnt_avail;
8865 struct hlist_node *node;
8867 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8870 /* Check if we have enough room to re-enable FDir SB capability. */
8871 fcnt_prog = i40e_get_global_fd_count(pf);
8872 fcnt_avail = pf->fdir_pf_filter_count;
8873 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
8874 (pf->fd_add_err == 0) ||
8875 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
8876 i40e_reenable_fdir_sb(pf);
8878 /* We should wait for even more space before re-enabling ATR.
8879 * Additionally, we cannot enable ATR as long as we still have TCP SB
8882 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
8883 (pf->fd_tcp4_filter_cnt == 0))
8884 i40e_reenable_fdir_atr(pf);
8886 /* if hw had a problem adding a filter, delete it */
8887 if (pf->fd_inv > 0) {
8888 hlist_for_each_entry_safe(filter, node,
8889 &pf->fdir_filter_list, fdir_node)
8890 if (filter->fd_id == pf->fd_inv)
8891 i40e_delete_invalid_filter(pf, filter);
8895 #define I40E_MIN_FD_FLUSH_INTERVAL 10
8896 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
8898 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
8899 * @pf: board private structure
8901 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
8903 unsigned long min_flush_time;
8904 int flush_wait_retry = 50;
8905 bool disable_atr = false;
8909 if (!time_after(jiffies, pf->fd_flush_timestamp +
8910 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
8913 /* If the flush is happening too quick and we have mostly SB rules we
8914 * should not re-enable ATR for some time.
8916 min_flush_time = pf->fd_flush_timestamp +
8917 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
8918 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
8920 if (!(time_after(jiffies, min_flush_time)) &&
8921 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
8922 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8923 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
8927 pf->fd_flush_timestamp = jiffies;
8928 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
8929 /* flush all filters */
8930 wr32(&pf->hw, I40E_PFQF_CTL_1,
8931 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
8932 i40e_flush(&pf->hw);
8936 /* Check FD flush status every 5-6msec */
8937 usleep_range(5000, 6000);
8938 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
8939 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
8941 } while (flush_wait_retry--);
8942 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
8943 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
8945 /* replay sideband filters */
8946 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
8947 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
8948 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
8949 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
8950 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8951 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
8956 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
8957 * @pf: board private structure
8959 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
8961 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
8964 /* We can see up to 256 filter programming desc in transit if the filters are
8965 * being applied really fast; before we see the first
8966 * filter miss error on Rx queue 0. Accumulating enough error messages before
8967 * reacting will make sure we don't cause flush too often.
8969 #define I40E_MAX_FD_PROGRAM_ERROR 256
8972 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
8973 * @pf: board private structure
8975 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
8978 /* if interface is down do nothing */
8979 if (test_bit(__I40E_DOWN, pf->state))
8982 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8983 i40e_fdir_flush_and_replay(pf);
8985 i40e_fdir_check_and_reenable(pf);
8990 * i40e_vsi_link_event - notify VSI of a link event
8991 * @vsi: vsi to be notified
8992 * @link_up: link up or down
8994 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
8996 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
8999 switch (vsi->type) {
9001 if (!vsi->netdev || !vsi->netdev_registered)
9005 netif_carrier_on(vsi->netdev);
9006 netif_tx_wake_all_queues(vsi->netdev);
9008 netif_carrier_off(vsi->netdev);
9009 netif_tx_stop_all_queues(vsi->netdev);
9013 case I40E_VSI_SRIOV:
9014 case I40E_VSI_VMDQ2:
9016 case I40E_VSI_IWARP:
9017 case I40E_VSI_MIRROR:
9019 /* there is no notification for other VSIs */
9025 * i40e_veb_link_event - notify elements on the veb of a link event
9026 * @veb: veb to be notified
9027 * @link_up: link up or down
9029 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9034 if (!veb || !veb->pf)
9038 /* depth first... */
9039 for (i = 0; i < I40E_MAX_VEB; i++)
9040 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9041 i40e_veb_link_event(pf->veb[i], link_up);
9043 /* ... now the local VSIs */
9044 for (i = 0; i < pf->num_alloc_vsi; i++)
9045 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9046 i40e_vsi_link_event(pf->vsi[i], link_up);
9050 * i40e_link_event - Update netif_carrier status
9051 * @pf: board private structure
9053 static void i40e_link_event(struct i40e_pf *pf)
9055 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9056 u8 new_link_speed, old_link_speed;
9058 bool new_link, old_link;
9060 /* set this to force the get_link_status call to refresh state */
9061 pf->hw.phy.get_link_info = true;
9062 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9063 status = i40e_get_link_status(&pf->hw, &new_link);
9065 /* On success, disable temp link polling */
9066 if (status == I40E_SUCCESS) {
9067 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9069 /* Enable link polling temporarily until i40e_get_link_status
9070 * returns I40E_SUCCESS
9072 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9073 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9078 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9079 new_link_speed = pf->hw.phy.link_info.link_speed;
9081 if (new_link == old_link &&
9082 new_link_speed == old_link_speed &&
9083 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9084 new_link == netif_carrier_ok(vsi->netdev)))
9087 i40e_print_link_message(vsi, new_link);
9089 /* Notify the base of the switch tree connected to
9090 * the link. Floating VEBs are not notified.
9092 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9093 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9095 i40e_vsi_link_event(vsi, new_link);
9098 i40e_vc_notify_link_state(pf);
9100 if (pf->flags & I40E_FLAG_PTP)
9101 i40e_ptp_set_increment(pf);
9105 * i40e_watchdog_subtask - periodic checks not using event driven response
9106 * @pf: board private structure
9108 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9112 /* if interface is down do nothing */
9113 if (test_bit(__I40E_DOWN, pf->state) ||
9114 test_bit(__I40E_CONFIG_BUSY, pf->state))
9117 /* make sure we don't do these things too often */
9118 if (time_before(jiffies, (pf->service_timer_previous +
9119 pf->service_timer_period)))
9121 pf->service_timer_previous = jiffies;
9123 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9124 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9125 i40e_link_event(pf);
9127 /* Update the stats for active netdevs so the network stack
9128 * can look at updated numbers whenever it cares to
9130 for (i = 0; i < pf->num_alloc_vsi; i++)
9131 if (pf->vsi[i] && pf->vsi[i]->netdev)
9132 i40e_update_stats(pf->vsi[i]);
9134 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9135 /* Update the stats for the active switching components */
9136 for (i = 0; i < I40E_MAX_VEB; i++)
9138 i40e_update_veb_stats(pf->veb[i]);
9141 i40e_ptp_rx_hang(pf);
9142 i40e_ptp_tx_hang(pf);
9146 * i40e_reset_subtask - Set up for resetting the device and driver
9147 * @pf: board private structure
9149 static void i40e_reset_subtask(struct i40e_pf *pf)
9151 u32 reset_flags = 0;
9153 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9154 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9155 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9157 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9158 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9159 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9161 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9162 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9163 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9165 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9166 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9167 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9169 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9170 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9171 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9174 /* If there's a recovery already waiting, it takes
9175 * precedence before starting a new reset sequence.
9177 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9178 i40e_prep_for_reset(pf, false);
9180 i40e_rebuild(pf, false, false);
9183 /* If we're already down or resetting, just bail */
9185 !test_bit(__I40E_DOWN, pf->state) &&
9186 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9187 i40e_do_reset(pf, reset_flags, false);
9192 * i40e_handle_link_event - Handle link event
9193 * @pf: board private structure
9194 * @e: event info posted on ARQ
9196 static void i40e_handle_link_event(struct i40e_pf *pf,
9197 struct i40e_arq_event_info *e)
9199 struct i40e_aqc_get_link_status *status =
9200 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9202 /* Do a new status request to re-enable LSE reporting
9203 * and load new status information into the hw struct
9204 * This completely ignores any state information
9205 * in the ARQ event info, instead choosing to always
9206 * issue the AQ update link status command.
9208 i40e_link_event(pf);
9210 /* Check if module meets thermal requirements */
9211 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9212 dev_err(&pf->pdev->dev,
9213 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9214 dev_err(&pf->pdev->dev,
9215 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9217 /* check for unqualified module, if link is down, suppress
9218 * the message if link was forced to be down.
9220 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9221 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9222 (!(status->link_info & I40E_AQ_LINK_UP)) &&
9223 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9224 dev_err(&pf->pdev->dev,
9225 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9226 dev_err(&pf->pdev->dev,
9227 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9233 * i40e_clean_adminq_subtask - Clean the AdminQ rings
9234 * @pf: board private structure
9236 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9238 struct i40e_arq_event_info event;
9239 struct i40e_hw *hw = &pf->hw;
9246 /* Do not run clean AQ when PF reset fails */
9247 if (test_bit(__I40E_RESET_FAILED, pf->state))
9250 /* check for error indications */
9251 val = rd32(&pf->hw, pf->hw.aq.arq.len);
9253 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9254 if (hw->debug_mask & I40E_DEBUG_AQ)
9255 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9256 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9258 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9259 if (hw->debug_mask & I40E_DEBUG_AQ)
9260 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9261 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9262 pf->arq_overflows++;
9264 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9265 if (hw->debug_mask & I40E_DEBUG_AQ)
9266 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9267 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9270 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9272 val = rd32(&pf->hw, pf->hw.aq.asq.len);
9274 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9275 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9276 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9277 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9279 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9280 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9281 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9282 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9284 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9285 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9286 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9287 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
9290 wr32(&pf->hw, pf->hw.aq.asq.len, val);
9292 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
9293 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
9298 ret = i40e_clean_arq_element(hw, &event, &pending);
9299 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
9302 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
9306 opcode = le16_to_cpu(event.desc.opcode);
9309 case i40e_aqc_opc_get_link_status:
9310 i40e_handle_link_event(pf, &event);
9312 case i40e_aqc_opc_send_msg_to_pf:
9313 ret = i40e_vc_process_vf_msg(pf,
9314 le16_to_cpu(event.desc.retval),
9315 le32_to_cpu(event.desc.cookie_high),
9316 le32_to_cpu(event.desc.cookie_low),
9320 case i40e_aqc_opc_lldp_update_mib:
9321 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
9322 #ifdef CONFIG_I40E_DCB
9324 ret = i40e_handle_lldp_event(pf, &event);
9326 #endif /* CONFIG_I40E_DCB */
9328 case i40e_aqc_opc_event_lan_overflow:
9329 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
9330 i40e_handle_lan_overflow_event(pf, &event);
9332 case i40e_aqc_opc_send_msg_to_peer:
9333 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
9335 case i40e_aqc_opc_nvm_erase:
9336 case i40e_aqc_opc_nvm_update:
9337 case i40e_aqc_opc_oem_post_update:
9338 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
9339 "ARQ NVM operation 0x%04x completed\n",
9343 dev_info(&pf->pdev->dev,
9344 "ARQ: Unknown event 0x%04x ignored\n",
9348 } while (i++ < pf->adminq_work_limit);
9350 if (i < pf->adminq_work_limit)
9351 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
9353 /* re-enable Admin queue interrupt cause */
9354 val = rd32(hw, I40E_PFINT_ICR0_ENA);
9355 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
9356 wr32(hw, I40E_PFINT_ICR0_ENA, val);
9359 kfree(event.msg_buf);
9363 * i40e_verify_eeprom - make sure eeprom is good to use
9364 * @pf: board private structure
9366 static void i40e_verify_eeprom(struct i40e_pf *pf)
9370 err = i40e_diag_eeprom_test(&pf->hw);
9372 /* retry in case of garbage read */
9373 err = i40e_diag_eeprom_test(&pf->hw);
9375 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
9377 set_bit(__I40E_BAD_EEPROM, pf->state);
9381 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
9382 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
9383 clear_bit(__I40E_BAD_EEPROM, pf->state);
9388 * i40e_enable_pf_switch_lb
9389 * @pf: pointer to the PF structure
9391 * enable switch loop back or die - no point in a return value
9393 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
9395 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9396 struct i40e_vsi_context ctxt;
9399 ctxt.seid = pf->main_vsi_seid;
9400 ctxt.pf_num = pf->hw.pf_id;
9402 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9404 dev_info(&pf->pdev->dev,
9405 "couldn't get PF vsi config, err %s aq_err %s\n",
9406 i40e_stat_str(&pf->hw, ret),
9407 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9410 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9411 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9412 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9414 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9416 dev_info(&pf->pdev->dev,
9417 "update vsi switch failed, err %s aq_err %s\n",
9418 i40e_stat_str(&pf->hw, ret),
9419 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9424 * i40e_disable_pf_switch_lb
9425 * @pf: pointer to the PF structure
9427 * disable switch loop back or die - no point in a return value
9429 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
9431 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9432 struct i40e_vsi_context ctxt;
9435 ctxt.seid = pf->main_vsi_seid;
9436 ctxt.pf_num = pf->hw.pf_id;
9438 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9440 dev_info(&pf->pdev->dev,
9441 "couldn't get PF vsi config, err %s aq_err %s\n",
9442 i40e_stat_str(&pf->hw, ret),
9443 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9446 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9447 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9448 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9450 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9452 dev_info(&pf->pdev->dev,
9453 "update vsi switch failed, err %s aq_err %s\n",
9454 i40e_stat_str(&pf->hw, ret),
9455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9460 * i40e_config_bridge_mode - Configure the HW bridge mode
9461 * @veb: pointer to the bridge instance
9463 * Configure the loop back mode for the LAN VSI that is downlink to the
9464 * specified HW bridge instance. It is expected this function is called
9465 * when a new HW bridge is instantiated.
9467 static void i40e_config_bridge_mode(struct i40e_veb *veb)
9469 struct i40e_pf *pf = veb->pf;
9471 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
9472 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
9473 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9474 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
9475 i40e_disable_pf_switch_lb(pf);
9477 i40e_enable_pf_switch_lb(pf);
9481 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
9482 * @veb: pointer to the VEB instance
9484 * This is a recursive function that first builds the attached VSIs then
9485 * recurses in to build the next layer of VEB. We track the connections
9486 * through our own index numbers because the seid's from the HW could
9487 * change across the reset.
9489 static int i40e_reconstitute_veb(struct i40e_veb *veb)
9491 struct i40e_vsi *ctl_vsi = NULL;
9492 struct i40e_pf *pf = veb->pf;
9496 /* build VSI that owns this VEB, temporarily attached to base VEB */
9497 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
9499 pf->vsi[v]->veb_idx == veb->idx &&
9500 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
9501 ctl_vsi = pf->vsi[v];
9506 dev_info(&pf->pdev->dev,
9507 "missing owner VSI for veb_idx %d\n", veb->idx);
9509 goto end_reconstitute;
9511 if (ctl_vsi != pf->vsi[pf->lan_vsi])
9512 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9513 ret = i40e_add_vsi(ctl_vsi);
9515 dev_info(&pf->pdev->dev,
9516 "rebuild of veb_idx %d owner VSI failed: %d\n",
9518 goto end_reconstitute;
9520 i40e_vsi_reset_stats(ctl_vsi);
9522 /* create the VEB in the switch and move the VSI onto the VEB */
9523 ret = i40e_add_veb(veb, ctl_vsi);
9525 goto end_reconstitute;
9527 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
9528 veb->bridge_mode = BRIDGE_MODE_VEB;
9530 veb->bridge_mode = BRIDGE_MODE_VEPA;
9531 i40e_config_bridge_mode(veb);
9533 /* create the remaining VSIs attached to this VEB */
9534 for (v = 0; v < pf->num_alloc_vsi; v++) {
9535 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
9538 if (pf->vsi[v]->veb_idx == veb->idx) {
9539 struct i40e_vsi *vsi = pf->vsi[v];
9541 vsi->uplink_seid = veb->seid;
9542 ret = i40e_add_vsi(vsi);
9544 dev_info(&pf->pdev->dev,
9545 "rebuild of vsi_idx %d failed: %d\n",
9547 goto end_reconstitute;
9549 i40e_vsi_reset_stats(vsi);
9553 /* create any VEBs attached to this VEB - RECURSION */
9554 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9555 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
9556 pf->veb[veb_idx]->uplink_seid = veb->seid;
9557 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
9568 * i40e_get_capabilities - get info about the HW
9569 * @pf: the PF struct
9571 static int i40e_get_capabilities(struct i40e_pf *pf,
9572 enum i40e_admin_queue_opc list_type)
9574 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
9579 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
9581 cap_buf = kzalloc(buf_len, GFP_KERNEL);
9585 /* this loads the data into the hw struct for us */
9586 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
9587 &data_size, list_type,
9589 /* data loaded, buffer no longer needed */
9592 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
9593 /* retry with a larger buffer */
9594 buf_len = data_size;
9595 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
9596 dev_info(&pf->pdev->dev,
9597 "capability discovery failed, err %s aq_err %s\n",
9598 i40e_stat_str(&pf->hw, err),
9599 i40e_aq_str(&pf->hw,
9600 pf->hw.aq.asq_last_status));
9605 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
9606 if (list_type == i40e_aqc_opc_list_func_capabilities) {
9607 dev_info(&pf->pdev->dev,
9608 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
9609 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
9610 pf->hw.func_caps.num_msix_vectors,
9611 pf->hw.func_caps.num_msix_vectors_vf,
9612 pf->hw.func_caps.fd_filters_guaranteed,
9613 pf->hw.func_caps.fd_filters_best_effort,
9614 pf->hw.func_caps.num_tx_qp,
9615 pf->hw.func_caps.num_vsis);
9616 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
9617 dev_info(&pf->pdev->dev,
9618 "switch_mode=0x%04x, function_valid=0x%08x\n",
9619 pf->hw.dev_caps.switch_mode,
9620 pf->hw.dev_caps.valid_functions);
9621 dev_info(&pf->pdev->dev,
9622 "SR-IOV=%d, num_vfs for all function=%u\n",
9623 pf->hw.dev_caps.sr_iov_1_1,
9624 pf->hw.dev_caps.num_vfs);
9625 dev_info(&pf->pdev->dev,
9626 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
9627 pf->hw.dev_caps.num_vsis,
9628 pf->hw.dev_caps.num_rx_qp,
9629 pf->hw.dev_caps.num_tx_qp);
9632 if (list_type == i40e_aqc_opc_list_func_capabilities) {
9633 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
9634 + pf->hw.func_caps.num_vfs)
9635 if (pf->hw.revision_id == 0 &&
9636 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
9637 dev_info(&pf->pdev->dev,
9638 "got num_vsis %d, setting num_vsis to %d\n",
9639 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
9640 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
9646 static int i40e_vsi_clear(struct i40e_vsi *vsi);
9649 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
9650 * @pf: board private structure
9652 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
9654 struct i40e_vsi *vsi;
9656 /* quick workaround for an NVM issue that leaves a critical register
9659 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
9660 static const u32 hkey[] = {
9661 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
9662 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
9663 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
9667 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
9668 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
9671 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
9674 /* find existing VSI and see if it needs configuring */
9675 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9677 /* create a new VSI if none exists */
9679 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
9680 pf->vsi[pf->lan_vsi]->seid, 0);
9682 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
9683 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9684 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
9689 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
9693 * i40e_fdir_teardown - release the Flow Director resources
9694 * @pf: board private structure
9696 static void i40e_fdir_teardown(struct i40e_pf *pf)
9698 struct i40e_vsi *vsi;
9700 i40e_fdir_filter_exit(pf);
9701 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9703 i40e_vsi_release(vsi);
9707 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
9709 * @seid: seid of main or channel VSIs
9711 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
9712 * existed before reset
9714 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
9716 struct i40e_cloud_filter *cfilter;
9717 struct i40e_pf *pf = vsi->back;
9718 struct hlist_node *node;
9721 /* Add cloud filters back if they exist */
9722 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
9724 if (cfilter->seid != seid)
9727 if (cfilter->dst_port)
9728 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
9731 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
9734 dev_dbg(&pf->pdev->dev,
9735 "Failed to rebuild cloud filter, err %s aq_err %s\n",
9736 i40e_stat_str(&pf->hw, ret),
9737 i40e_aq_str(&pf->hw,
9738 pf->hw.aq.asq_last_status));
9746 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
9749 * Rebuilds channel VSIs if they existed before reset
9751 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
9753 struct i40e_channel *ch, *ch_tmp;
9756 if (list_empty(&vsi->ch_list))
9759 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
9760 if (!ch->initialized)
9762 /* Proceed with creation of channel (VMDq2) VSI */
9763 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
9765 dev_info(&vsi->back->pdev->dev,
9766 "failed to rebuild channels using uplink_seid %u\n",
9770 /* Reconfigure TX queues using QTX_CTL register */
9771 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
9773 dev_info(&vsi->back->pdev->dev,
9774 "failed to configure TX rings for channel %u\n",
9778 /* update 'next_base_queue' */
9779 vsi->next_base_queue = vsi->next_base_queue +
9780 ch->num_queue_pairs;
9781 if (ch->max_tx_rate) {
9782 u64 credits = ch->max_tx_rate;
9784 if (i40e_set_bw_limit(vsi, ch->seid,
9788 do_div(credits, I40E_BW_CREDIT_DIVISOR);
9789 dev_dbg(&vsi->back->pdev->dev,
9790 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9795 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
9797 dev_dbg(&vsi->back->pdev->dev,
9798 "Failed to rebuild cloud filters for channel VSI %u\n",
9807 * i40e_prep_for_reset - prep for the core to reset
9808 * @pf: board private structure
9809 * @lock_acquired: indicates whether or not the lock has been acquired
9810 * before this function was called.
9812 * Close up the VFs and other things in prep for PF Reset.
9814 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired)
9816 struct i40e_hw *hw = &pf->hw;
9817 i40e_status ret = 0;
9820 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
9821 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
9823 if (i40e_check_asq_alive(&pf->hw))
9824 i40e_vc_notify_reset(pf);
9826 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
9828 /* quiesce the VSIs and their queues that are not already DOWN */
9829 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
9832 i40e_pf_quiesce_all_vsi(pf);
9836 for (v = 0; v < pf->num_alloc_vsi; v++) {
9838 pf->vsi[v]->seid = 0;
9841 i40e_shutdown_adminq(&pf->hw);
9843 /* call shutdown HMC */
9844 if (hw->hmc.hmc_obj) {
9845 ret = i40e_shutdown_lan_hmc(hw);
9847 dev_warn(&pf->pdev->dev,
9848 "shutdown_lan_hmc failed: %d\n", ret);
9851 /* Save the current PTP time so that we can restore the time after the
9854 i40e_ptp_save_hw_time(pf);
9858 * i40e_send_version - update firmware with driver version
9861 static void i40e_send_version(struct i40e_pf *pf)
9863 struct i40e_driver_version dv;
9865 dv.major_version = DRV_VERSION_MAJOR;
9866 dv.minor_version = DRV_VERSION_MINOR;
9867 dv.build_version = DRV_VERSION_BUILD;
9868 dv.subbuild_version = 0;
9869 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
9870 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
9874 * i40e_get_oem_version - get OEM specific version information
9875 * @hw: pointer to the hardware structure
9877 static void i40e_get_oem_version(struct i40e_hw *hw)
9879 u16 block_offset = 0xffff;
9880 u16 block_length = 0;
9881 u16 capabilities = 0;
9885 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
9886 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
9887 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
9888 #define I40E_NVM_OEM_GEN_OFFSET 0x02
9889 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
9890 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
9891 #define I40E_NVM_OEM_LENGTH 3
9893 /* Check if pointer to OEM version block is valid. */
9894 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
9895 if (block_offset == 0xffff)
9898 /* Check if OEM version block has correct length. */
9899 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
9901 if (block_length < I40E_NVM_OEM_LENGTH)
9904 /* Check if OEM version format is as expected. */
9905 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
9907 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
9910 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
9912 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
9914 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
9915 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
9919 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
9920 * @pf: board private structure
9922 static int i40e_reset(struct i40e_pf *pf)
9924 struct i40e_hw *hw = &pf->hw;
9927 ret = i40e_pf_reset(hw);
9929 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
9930 set_bit(__I40E_RESET_FAILED, pf->state);
9931 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
9939 * i40e_rebuild - rebuild using a saved config
9940 * @pf: board private structure
9941 * @reinit: if the Main VSI needs to re-initialized.
9942 * @lock_acquired: indicates whether or not the lock has been acquired
9943 * before this function was called.
9945 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
9947 int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
9948 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9949 struct i40e_hw *hw = &pf->hw;
9950 u8 set_fc_aq_fail = 0;
9955 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
9956 i40e_check_recovery_mode(pf)) {
9957 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
9960 if (test_bit(__I40E_DOWN, pf->state) &&
9961 !test_bit(__I40E_RECOVERY_MODE, pf->state) &&
9962 !old_recovery_mode_bit)
9963 goto clear_recovery;
9964 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
9966 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
9967 ret = i40e_init_adminq(&pf->hw);
9969 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
9970 i40e_stat_str(&pf->hw, ret),
9971 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9972 goto clear_recovery;
9974 i40e_get_oem_version(&pf->hw);
9976 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
9977 ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
9978 hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
9979 /* The following delay is necessary for 4.33 firmware and older
9980 * to recover after EMP reset. 200 ms should suffice but we
9981 * put here 300 ms to be sure that FW is ready to operate
9987 /* re-verify the eeprom if we just had an EMP reset */
9988 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
9989 i40e_verify_eeprom(pf);
9991 /* if we are going out of or into recovery mode we have to act
9992 * accordingly with regard to resources initialization
9993 * and deinitialization
9995 if (test_bit(__I40E_RECOVERY_MODE, pf->state) ||
9996 old_recovery_mode_bit) {
9997 if (i40e_get_capabilities(pf,
9998 i40e_aqc_opc_list_func_capabilities))
10001 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10002 /* we're staying in recovery mode so we'll reinitialize
10005 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10008 if (!lock_acquired)
10010 /* we're going out of recovery mode so we'll free
10011 * the IRQ allocated specifically for recovery mode
10012 * and restore the interrupt scheme
10014 free_irq(pf->pdev->irq, pf);
10015 i40e_clear_interrupt_scheme(pf);
10016 if (i40e_restore_interrupt_scheme(pf))
10020 /* tell the firmware that we're starting */
10021 i40e_send_version(pf);
10023 /* bail out in case recovery mode was detected, as there is
10024 * no need for further configuration.
10029 i40e_clear_pxe_mode(hw);
10030 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10032 goto end_core_reset;
10034 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10035 hw->func_caps.num_rx_qp, 0, 0);
10037 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10038 goto end_core_reset;
10040 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10042 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10043 goto end_core_reset;
10046 /* Enable FW to write a default DCB config on link-up */
10047 i40e_aq_set_dcb_parameters(hw, true, NULL);
10049 #ifdef CONFIG_I40E_DCB
10050 ret = i40e_init_pf_dcb(pf);
10052 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
10053 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10054 /* Continue without DCB enabled */
10056 #endif /* CONFIG_I40E_DCB */
10057 /* do basic switch setup */
10058 if (!lock_acquired)
10060 ret = i40e_setup_pf_switch(pf, reinit);
10064 /* The driver only wants link up/down and module qualification
10065 * reports from firmware. Note the negative logic.
10067 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10068 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10069 I40E_AQ_EVENT_MEDIA_NA |
10070 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10072 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10073 i40e_stat_str(&pf->hw, ret),
10074 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10076 /* make sure our flow control settings are restored */
10077 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
10079 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
10080 i40e_stat_str(&pf->hw, ret),
10081 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10083 /* Rebuild the VSIs and VEBs that existed before reset.
10084 * They are still in our local switch element arrays, so only
10085 * need to rebuild the switch model in the HW.
10087 * If there were VEBs but the reconstitution failed, we'll try
10088 * try to recover minimal use by getting the basic PF VSI working.
10090 if (vsi->uplink_seid != pf->mac_seid) {
10091 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10092 /* find the one VEB connected to the MAC, and find orphans */
10093 for (v = 0; v < I40E_MAX_VEB; v++) {
10097 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10098 pf->veb[v]->uplink_seid == 0) {
10099 ret = i40e_reconstitute_veb(pf->veb[v]);
10104 /* If Main VEB failed, we're in deep doodoo,
10105 * so give up rebuilding the switch and set up
10106 * for minimal rebuild of PF VSI.
10107 * If orphan failed, we'll report the error
10108 * but try to keep going.
10110 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10111 dev_info(&pf->pdev->dev,
10112 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10114 vsi->uplink_seid = pf->mac_seid;
10116 } else if (pf->veb[v]->uplink_seid == 0) {
10117 dev_info(&pf->pdev->dev,
10118 "rebuild of orphan VEB failed: %d\n",
10125 if (vsi->uplink_seid == pf->mac_seid) {
10126 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10127 /* no VEB, so rebuild only the Main VSI */
10128 ret = i40e_add_vsi(vsi);
10130 dev_info(&pf->pdev->dev,
10131 "rebuild of Main VSI failed: %d\n", ret);
10136 if (vsi->mqprio_qopt.max_rate[0]) {
10137 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10140 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10141 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10145 credits = max_tx_rate;
10146 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10147 dev_dbg(&vsi->back->pdev->dev,
10148 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10154 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10158 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10159 * for this main VSI if they exist
10161 ret = i40e_rebuild_channels(vsi);
10165 /* Reconfigure hardware for allowing smaller MSS in the case
10166 * of TSO, so that we avoid the MDD being fired and causing
10167 * a reset in the case of small MSS+TSO.
10169 #define I40E_REG_MSS 0x000E64DC
10170 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10171 #define I40E_64BYTE_MSS 0x400000
10172 val = rd32(hw, I40E_REG_MSS);
10173 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10174 val &= ~I40E_REG_MSS_MIN_MASK;
10175 val |= I40E_64BYTE_MSS;
10176 wr32(hw, I40E_REG_MSS, val);
10179 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10181 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10183 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10184 i40e_stat_str(&pf->hw, ret),
10185 i40e_aq_str(&pf->hw,
10186 pf->hw.aq.asq_last_status));
10188 /* reinit the misc interrupt */
10189 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10190 ret = i40e_setup_misc_vector(pf);
10192 /* Add a filter to drop all Flow control frames from any VSI from being
10193 * transmitted. By doing so we stop a malicious VF from sending out
10194 * PAUSE or PFC frames and potentially controlling traffic for other
10196 * The FW can still send Flow control frames if enabled.
10198 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10199 pf->main_vsi_seid);
10201 /* restart the VSIs that were rebuilt and running before the reset */
10202 i40e_pf_unquiesce_all_vsi(pf);
10204 /* Release the RTNL lock before we start resetting VFs */
10205 if (!lock_acquired)
10208 /* Restore promiscuous settings */
10209 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10211 dev_warn(&pf->pdev->dev,
10212 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10213 pf->cur_promisc ? "on" : "off",
10214 i40e_stat_str(&pf->hw, ret),
10215 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10217 i40e_reset_all_vfs(pf, true);
10219 /* tell the firmware that we're starting */
10220 i40e_send_version(pf);
10222 /* We've already released the lock, so don't do it again */
10223 goto end_core_reset;
10226 if (!lock_acquired)
10229 clear_bit(__I40E_RESET_FAILED, pf->state);
10231 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10232 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10236 * i40e_reset_and_rebuild - reset and rebuild using a saved config
10237 * @pf: board private structure
10238 * @reinit: if the Main VSI needs to re-initialized.
10239 * @lock_acquired: indicates whether or not the lock has been acquired
10240 * before this function was called.
10242 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10243 bool lock_acquired)
10246 /* Now we wait for GRST to settle out.
10247 * We don't have to delete the VEBs or VSIs from the hw switch
10248 * because the reset will make them disappear.
10250 ret = i40e_reset(pf);
10252 i40e_rebuild(pf, reinit, lock_acquired);
10256 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10257 * @pf: board private structure
10259 * Close up the VFs and other things in prep for a Core Reset,
10260 * then get ready to rebuild the world.
10261 * @lock_acquired: indicates whether or not the lock has been acquired
10262 * before this function was called.
10264 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10266 i40e_prep_for_reset(pf, lock_acquired);
10267 i40e_reset_and_rebuild(pf, false, lock_acquired);
10271 * i40e_handle_mdd_event
10272 * @pf: pointer to the PF structure
10274 * Called from the MDD irq handler to identify possibly malicious vfs
10276 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10278 struct i40e_hw *hw = &pf->hw;
10279 bool mdd_detected = false;
10280 struct i40e_vf *vf;
10284 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10287 /* find what triggered the MDD event */
10288 reg = rd32(hw, I40E_GL_MDET_TX);
10289 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
10290 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
10291 I40E_GL_MDET_TX_PF_NUM_SHIFT;
10292 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
10293 I40E_GL_MDET_TX_VF_NUM_SHIFT;
10294 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
10295 I40E_GL_MDET_TX_EVENT_SHIFT;
10296 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
10297 I40E_GL_MDET_TX_QUEUE_SHIFT) -
10298 pf->hw.func_caps.base_queue;
10299 if (netif_msg_tx_err(pf))
10300 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
10301 event, queue, pf_num, vf_num);
10302 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
10303 mdd_detected = true;
10305 reg = rd32(hw, I40E_GL_MDET_RX);
10306 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
10307 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
10308 I40E_GL_MDET_RX_FUNCTION_SHIFT;
10309 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
10310 I40E_GL_MDET_RX_EVENT_SHIFT;
10311 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
10312 I40E_GL_MDET_RX_QUEUE_SHIFT) -
10313 pf->hw.func_caps.base_queue;
10314 if (netif_msg_rx_err(pf))
10315 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
10316 event, queue, func);
10317 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
10318 mdd_detected = true;
10321 if (mdd_detected) {
10322 reg = rd32(hw, I40E_PF_MDET_TX);
10323 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
10324 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
10325 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
10327 reg = rd32(hw, I40E_PF_MDET_RX);
10328 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
10329 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
10330 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
10334 /* see if one of the VFs needs its hand slapped */
10335 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
10337 reg = rd32(hw, I40E_VP_MDET_TX(i));
10338 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
10339 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
10340 vf->num_mdd_events++;
10341 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
10343 dev_info(&pf->pdev->dev,
10344 "Use PF Control I/F to re-enable the VF\n");
10345 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10348 reg = rd32(hw, I40E_VP_MDET_RX(i));
10349 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
10350 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
10351 vf->num_mdd_events++;
10352 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
10354 dev_info(&pf->pdev->dev,
10355 "Use PF Control I/F to re-enable the VF\n");
10356 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10360 /* re-enable mdd interrupt cause */
10361 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
10362 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
10363 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
10364 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
10368 static const char *i40e_tunnel_name(u8 type)
10371 case UDP_TUNNEL_TYPE_VXLAN:
10373 case UDP_TUNNEL_TYPE_GENEVE:
10381 * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters
10382 * @pf: board private structure
10384 static void i40e_sync_udp_filters(struct i40e_pf *pf)
10388 /* loop through and set pending bit for all active UDP filters */
10389 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
10390 if (pf->udp_ports[i].port)
10391 pf->pending_udp_bitmap |= BIT_ULL(i);
10394 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
10398 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
10399 * @pf: board private structure
10401 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
10403 struct i40e_hw *hw = &pf->hw;
10404 u8 filter_index, type;
10408 if (!test_and_clear_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state))
10411 /* acquire RTNL to maintain state of flags and port requests */
10414 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
10415 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
10416 struct i40e_udp_port_config *udp_port;
10417 i40e_status ret = 0;
10419 udp_port = &pf->udp_ports[i];
10420 pf->pending_udp_bitmap &= ~BIT_ULL(i);
10422 port = READ_ONCE(udp_port->port);
10423 type = READ_ONCE(udp_port->type);
10424 filter_index = READ_ONCE(udp_port->filter_index);
10426 /* release RTNL while we wait on AQ command */
10430 ret = i40e_aq_add_udp_tunnel(hw, port,
10434 else if (filter_index != I40E_UDP_PORT_INDEX_UNUSED)
10435 ret = i40e_aq_del_udp_tunnel(hw, filter_index,
10438 /* reacquire RTNL so we can update filter_index */
10442 dev_info(&pf->pdev->dev,
10443 "%s %s port %d, index %d failed, err %s aq_err %s\n",
10444 i40e_tunnel_name(type),
10445 port ? "add" : "delete",
10448 i40e_stat_str(&pf->hw, ret),
10449 i40e_aq_str(&pf->hw,
10450 pf->hw.aq.asq_last_status));
10452 /* failed to add, just reset port,
10453 * drop pending bit for any deletion
10455 udp_port->port = 0;
10456 pf->pending_udp_bitmap &= ~BIT_ULL(i);
10459 /* record filter index on success */
10460 udp_port->filter_index = filter_index;
10469 * i40e_service_task - Run the driver's async subtasks
10470 * @work: pointer to work_struct containing our data
10472 static void i40e_service_task(struct work_struct *work)
10474 struct i40e_pf *pf = container_of(work,
10477 unsigned long start_time = jiffies;
10479 /* don't bother with service tasks if a reset is in progress */
10480 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
10481 test_bit(__I40E_SUSPENDED, pf->state))
10484 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
10487 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10488 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
10489 i40e_sync_filters_subtask(pf);
10490 i40e_reset_subtask(pf);
10491 i40e_handle_mdd_event(pf);
10492 i40e_vc_process_vflr_event(pf);
10493 i40e_watchdog_subtask(pf);
10494 i40e_fdir_reinit_subtask(pf);
10495 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
10496 /* Client subtask will reopen next time through. */
10497 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
10500 i40e_client_subtask(pf);
10501 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
10503 i40e_notify_client_of_l2_param_changes(
10504 pf->vsi[pf->lan_vsi]);
10506 i40e_sync_filters_subtask(pf);
10507 i40e_sync_udp_filters_subtask(pf);
10509 i40e_reset_subtask(pf);
10512 i40e_clean_adminq_subtask(pf);
10514 /* flush memory to make sure state is correct before next watchdog */
10515 smp_mb__before_atomic();
10516 clear_bit(__I40E_SERVICE_SCHED, pf->state);
10518 /* If the tasks have taken longer than one timer cycle or there
10519 * is more work to be done, reschedule the service task now
10520 * rather than wait for the timer to tick again.
10522 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
10523 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
10524 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
10525 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
10526 i40e_service_event_schedule(pf);
10530 * i40e_service_timer - timer callback
10531 * @data: pointer to PF struct
10533 static void i40e_service_timer(struct timer_list *t)
10535 struct i40e_pf *pf = from_timer(pf, t, service_timer);
10537 mod_timer(&pf->service_timer,
10538 round_jiffies(jiffies + pf->service_timer_period));
10539 i40e_service_event_schedule(pf);
10543 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
10544 * @vsi: the VSI being configured
10546 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
10548 struct i40e_pf *pf = vsi->back;
10550 switch (vsi->type) {
10551 case I40E_VSI_MAIN:
10552 vsi->alloc_queue_pairs = pf->num_lan_qps;
10553 if (!vsi->num_tx_desc)
10554 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10555 I40E_REQ_DESCRIPTOR_MULTIPLE);
10556 if (!vsi->num_rx_desc)
10557 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10558 I40E_REQ_DESCRIPTOR_MULTIPLE);
10559 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10560 vsi->num_q_vectors = pf->num_lan_msix;
10562 vsi->num_q_vectors = 1;
10566 case I40E_VSI_FDIR:
10567 vsi->alloc_queue_pairs = 1;
10568 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
10569 I40E_REQ_DESCRIPTOR_MULTIPLE);
10570 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
10571 I40E_REQ_DESCRIPTOR_MULTIPLE);
10572 vsi->num_q_vectors = pf->num_fdsb_msix;
10575 case I40E_VSI_VMDQ2:
10576 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
10577 if (!vsi->num_tx_desc)
10578 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10579 I40E_REQ_DESCRIPTOR_MULTIPLE);
10580 if (!vsi->num_rx_desc)
10581 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10582 I40E_REQ_DESCRIPTOR_MULTIPLE);
10583 vsi->num_q_vectors = pf->num_vmdq_msix;
10586 case I40E_VSI_SRIOV:
10587 vsi->alloc_queue_pairs = pf->num_vf_qps;
10588 if (!vsi->num_tx_desc)
10589 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10590 I40E_REQ_DESCRIPTOR_MULTIPLE);
10591 if (!vsi->num_rx_desc)
10592 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10593 I40E_REQ_DESCRIPTOR_MULTIPLE);
10605 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
10606 * @vsi: VSI pointer
10607 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
10609 * On error: returns error code (negative)
10610 * On success: returns 0
10612 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
10614 struct i40e_ring **next_rings;
10618 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
10619 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
10620 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
10621 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
10622 if (!vsi->tx_rings)
10624 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
10625 if (i40e_enabled_xdp_vsi(vsi)) {
10626 vsi->xdp_rings = next_rings;
10627 next_rings += vsi->alloc_queue_pairs;
10629 vsi->rx_rings = next_rings;
10631 if (alloc_qvectors) {
10632 /* allocate memory for q_vector pointers */
10633 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
10634 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
10635 if (!vsi->q_vectors) {
10643 kfree(vsi->tx_rings);
10648 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
10649 * @pf: board private structure
10650 * @type: type of VSI
10652 * On error: returns error code (negative)
10653 * On success: returns vsi index in PF (positive)
10655 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
10658 struct i40e_vsi *vsi;
10662 /* Need to protect the allocation of the VSIs at the PF level */
10663 mutex_lock(&pf->switch_mutex);
10665 /* VSI list may be fragmented if VSI creation/destruction has
10666 * been happening. We can afford to do a quick scan to look
10667 * for any free VSIs in the list.
10669 * find next empty vsi slot, looping back around if necessary
10672 while (i < pf->num_alloc_vsi && pf->vsi[i])
10674 if (i >= pf->num_alloc_vsi) {
10676 while (i < pf->next_vsi && pf->vsi[i])
10680 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
10681 vsi_idx = i; /* Found one! */
10684 goto unlock_pf; /* out of VSI slots! */
10686 pf->next_vsi = ++i;
10688 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
10695 set_bit(__I40E_VSI_DOWN, vsi->state);
10697 vsi->idx = vsi_idx;
10698 vsi->int_rate_limit = 0;
10699 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
10700 pf->rss_table_size : 64;
10701 vsi->netdev_registered = false;
10702 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
10703 hash_init(vsi->mac_filter_hash);
10704 vsi->irqs_ready = false;
10706 if (type == I40E_VSI_MAIN) {
10707 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
10708 if (!vsi->af_xdp_zc_qps)
10712 ret = i40e_set_num_rings_in_vsi(vsi);
10716 ret = i40e_vsi_alloc_arrays(vsi, true);
10720 /* Setup default MSIX irq handler for VSI */
10721 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
10723 /* Initialize VSI lock */
10724 spin_lock_init(&vsi->mac_filter_hash_lock);
10725 pf->vsi[vsi_idx] = vsi;
10730 bitmap_free(vsi->af_xdp_zc_qps);
10731 pf->next_vsi = i - 1;
10734 mutex_unlock(&pf->switch_mutex);
10739 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
10740 * @vsi: VSI pointer
10741 * @free_qvectors: a bool to specify if q_vectors need to be freed.
10743 * On error: returns error code (negative)
10744 * On success: returns 0
10746 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
10748 /* free the ring and vector containers */
10749 if (free_qvectors) {
10750 kfree(vsi->q_vectors);
10751 vsi->q_vectors = NULL;
10753 kfree(vsi->tx_rings);
10754 vsi->tx_rings = NULL;
10755 vsi->rx_rings = NULL;
10756 vsi->xdp_rings = NULL;
10760 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
10762 * @vsi: Pointer to VSI structure
10764 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
10769 kfree(vsi->rss_hkey_user);
10770 vsi->rss_hkey_user = NULL;
10772 kfree(vsi->rss_lut_user);
10773 vsi->rss_lut_user = NULL;
10777 * i40e_vsi_clear - Deallocate the VSI provided
10778 * @vsi: the VSI being un-configured
10780 static int i40e_vsi_clear(struct i40e_vsi *vsi)
10782 struct i40e_pf *pf;
10791 mutex_lock(&pf->switch_mutex);
10792 if (!pf->vsi[vsi->idx]) {
10793 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
10794 vsi->idx, vsi->idx, vsi->type);
10798 if (pf->vsi[vsi->idx] != vsi) {
10799 dev_err(&pf->pdev->dev,
10800 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
10801 pf->vsi[vsi->idx]->idx,
10802 pf->vsi[vsi->idx]->type,
10803 vsi->idx, vsi->type);
10807 /* updates the PF for this cleared vsi */
10808 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
10809 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
10811 bitmap_free(vsi->af_xdp_zc_qps);
10812 i40e_vsi_free_arrays(vsi, true);
10813 i40e_clear_rss_config_user(vsi);
10815 pf->vsi[vsi->idx] = NULL;
10816 if (vsi->idx < pf->next_vsi)
10817 pf->next_vsi = vsi->idx;
10820 mutex_unlock(&pf->switch_mutex);
10828 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
10829 * @vsi: the VSI being cleaned
10831 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
10835 if (vsi->tx_rings && vsi->tx_rings[0]) {
10836 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10837 kfree_rcu(vsi->tx_rings[i], rcu);
10838 vsi->tx_rings[i] = NULL;
10839 vsi->rx_rings[i] = NULL;
10840 if (vsi->xdp_rings)
10841 vsi->xdp_rings[i] = NULL;
10847 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
10848 * @vsi: the VSI being configured
10850 static int i40e_alloc_rings(struct i40e_vsi *vsi)
10852 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
10853 struct i40e_pf *pf = vsi->back;
10854 struct i40e_ring *ring;
10856 /* Set basic values in the rings to be used later during open() */
10857 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10858 /* allocate space for both Tx and Rx in one shot */
10859 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
10863 ring->queue_index = i;
10864 ring->reg_idx = vsi->base_queue + i;
10865 ring->ring_active = false;
10867 ring->netdev = vsi->netdev;
10868 ring->dev = &pf->pdev->dev;
10869 ring->count = vsi->num_tx_desc;
10872 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10873 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10874 ring->itr_setting = pf->tx_itr_default;
10875 vsi->tx_rings[i] = ring++;
10877 if (!i40e_enabled_xdp_vsi(vsi))
10880 ring->queue_index = vsi->alloc_queue_pairs + i;
10881 ring->reg_idx = vsi->base_queue + ring->queue_index;
10882 ring->ring_active = false;
10884 ring->netdev = NULL;
10885 ring->dev = &pf->pdev->dev;
10886 ring->count = vsi->num_tx_desc;
10889 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10890 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10891 set_ring_xdp(ring);
10892 ring->itr_setting = pf->tx_itr_default;
10893 vsi->xdp_rings[i] = ring++;
10896 ring->queue_index = i;
10897 ring->reg_idx = vsi->base_queue + i;
10898 ring->ring_active = false;
10900 ring->netdev = vsi->netdev;
10901 ring->dev = &pf->pdev->dev;
10902 ring->count = vsi->num_rx_desc;
10905 ring->itr_setting = pf->rx_itr_default;
10906 vsi->rx_rings[i] = ring;
10912 i40e_vsi_clear_rings(vsi);
10917 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
10918 * @pf: board private structure
10919 * @vectors: the number of MSI-X vectors to request
10921 * Returns the number of vectors reserved, or error
10923 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
10925 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
10926 I40E_MIN_MSIX, vectors);
10928 dev_info(&pf->pdev->dev,
10929 "MSI-X vector reservation failed: %d\n", vectors);
10937 * i40e_init_msix - Setup the MSIX capability
10938 * @pf: board private structure
10940 * Work with the OS to set up the MSIX vectors needed.
10942 * Returns the number of vectors reserved or negative on failure
10944 static int i40e_init_msix(struct i40e_pf *pf)
10946 struct i40e_hw *hw = &pf->hw;
10947 int cpus, extra_vectors;
10951 int iwarp_requested = 0;
10953 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
10956 /* The number of vectors we'll request will be comprised of:
10957 * - Add 1 for "other" cause for Admin Queue events, etc.
10958 * - The number of LAN queue pairs
10959 * - Queues being used for RSS.
10960 * We don't need as many as max_rss_size vectors.
10961 * use rss_size instead in the calculation since that
10962 * is governed by number of cpus in the system.
10963 * - assumes symmetric Tx/Rx pairing
10964 * - The number of VMDq pairs
10965 * - The CPU count within the NUMA node if iWARP is enabled
10966 * Once we count this up, try the request.
10968 * If we can't get what we want, we'll simplify to nearly nothing
10969 * and try again. If that still fails, we punt.
10971 vectors_left = hw->func_caps.num_msix_vectors;
10974 /* reserve one vector for miscellaneous handler */
10975 if (vectors_left) {
10980 /* reserve some vectors for the main PF traffic queues. Initially we
10981 * only reserve at most 50% of the available vectors, in the case that
10982 * the number of online CPUs is large. This ensures that we can enable
10983 * extra features as well. Once we've enabled the other features, we
10984 * will use any remaining vectors to reach as close as we can to the
10985 * number of online CPUs.
10987 cpus = num_online_cpus();
10988 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
10989 vectors_left -= pf->num_lan_msix;
10991 /* reserve one vector for sideband flow director */
10992 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10993 if (vectors_left) {
10994 pf->num_fdsb_msix = 1;
10998 pf->num_fdsb_msix = 0;
11002 /* can we reserve enough for iWARP? */
11003 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11004 iwarp_requested = pf->num_iwarp_msix;
11007 pf->num_iwarp_msix = 0;
11008 else if (vectors_left < pf->num_iwarp_msix)
11009 pf->num_iwarp_msix = 1;
11010 v_budget += pf->num_iwarp_msix;
11011 vectors_left -= pf->num_iwarp_msix;
11014 /* any vectors left over go for VMDq support */
11015 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11016 if (!vectors_left) {
11017 pf->num_vmdq_msix = 0;
11018 pf->num_vmdq_qps = 0;
11020 int vmdq_vecs_wanted =
11021 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11023 min_t(int, vectors_left, vmdq_vecs_wanted);
11025 /* if we're short on vectors for what's desired, we limit
11026 * the queues per vmdq. If this is still more than are
11027 * available, the user will need to change the number of
11028 * queues/vectors used by the PF later with the ethtool
11031 if (vectors_left < vmdq_vecs_wanted) {
11032 pf->num_vmdq_qps = 1;
11033 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11034 vmdq_vecs = min_t(int,
11038 pf->num_vmdq_msix = pf->num_vmdq_qps;
11040 v_budget += vmdq_vecs;
11041 vectors_left -= vmdq_vecs;
11045 /* On systems with a large number of SMP cores, we previously limited
11046 * the number of vectors for num_lan_msix to be at most 50% of the
11047 * available vectors, to allow for other features. Now, we add back
11048 * the remaining vectors. However, we ensure that the total
11049 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11050 * calculate the number of vectors we can add without going over the
11051 * cap of CPUs. For systems with a small number of CPUs this will be
11054 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11055 pf->num_lan_msix += extra_vectors;
11056 vectors_left -= extra_vectors;
11058 WARN(vectors_left < 0,
11059 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11061 v_budget += pf->num_lan_msix;
11062 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11064 if (!pf->msix_entries)
11067 for (i = 0; i < v_budget; i++)
11068 pf->msix_entries[i].entry = i;
11069 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11071 if (v_actual < I40E_MIN_MSIX) {
11072 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11073 kfree(pf->msix_entries);
11074 pf->msix_entries = NULL;
11075 pci_disable_msix(pf->pdev);
11078 } else if (v_actual == I40E_MIN_MSIX) {
11079 /* Adjust for minimal MSIX use */
11080 pf->num_vmdq_vsis = 0;
11081 pf->num_vmdq_qps = 0;
11082 pf->num_lan_qps = 1;
11083 pf->num_lan_msix = 1;
11085 } else if (v_actual != v_budget) {
11086 /* If we have limited resources, we will start with no vectors
11087 * for the special features and then allocate vectors to some
11088 * of these features based on the policy and at the end disable
11089 * the features that did not get any vectors.
11093 dev_info(&pf->pdev->dev,
11094 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11095 v_actual, v_budget);
11096 /* reserve the misc vector */
11097 vec = v_actual - 1;
11099 /* Scale vector usage down */
11100 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11101 pf->num_vmdq_vsis = 1;
11102 pf->num_vmdq_qps = 1;
11104 /* partition out the remaining vectors */
11107 pf->num_lan_msix = 1;
11110 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11111 pf->num_lan_msix = 1;
11112 pf->num_iwarp_msix = 1;
11114 pf->num_lan_msix = 2;
11118 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11119 pf->num_iwarp_msix = min_t(int, (vec / 3),
11121 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11122 I40E_DEFAULT_NUM_VMDQ_VSI);
11124 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11125 I40E_DEFAULT_NUM_VMDQ_VSI);
11127 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11128 pf->num_fdsb_msix = 1;
11131 pf->num_lan_msix = min_t(int,
11132 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11134 pf->num_lan_qps = pf->num_lan_msix;
11139 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11140 (pf->num_fdsb_msix == 0)) {
11141 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11142 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11143 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11145 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11146 (pf->num_vmdq_msix == 0)) {
11147 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11148 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11151 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11152 (pf->num_iwarp_msix == 0)) {
11153 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11154 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11156 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11157 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11159 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11161 pf->num_iwarp_msix);
11167 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11168 * @vsi: the VSI being configured
11169 * @v_idx: index of the vector in the vsi struct
11170 * @cpu: cpu to be used on affinity_mask
11172 * We allocate one q_vector. If allocation fails we return -ENOMEM.
11174 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
11176 struct i40e_q_vector *q_vector;
11178 /* allocate q_vector */
11179 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11183 q_vector->vsi = vsi;
11184 q_vector->v_idx = v_idx;
11185 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11188 netif_napi_add(vsi->netdev, &q_vector->napi,
11189 i40e_napi_poll, NAPI_POLL_WEIGHT);
11191 /* tie q_vector and vsi together */
11192 vsi->q_vectors[v_idx] = q_vector;
11198 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11199 * @vsi: the VSI being configured
11201 * We allocate one q_vector per queue interrupt. If allocation fails we
11204 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11206 struct i40e_pf *pf = vsi->back;
11207 int err, v_idx, num_q_vectors, current_cpu;
11209 /* if not MSIX, give the one vector only to the LAN VSI */
11210 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11211 num_q_vectors = vsi->num_q_vectors;
11212 else if (vsi == pf->vsi[pf->lan_vsi])
11217 current_cpu = cpumask_first(cpu_online_mask);
11219 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11220 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
11223 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
11224 if (unlikely(current_cpu >= nr_cpu_ids))
11225 current_cpu = cpumask_first(cpu_online_mask);
11232 i40e_free_q_vector(vsi, v_idx);
11238 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11239 * @pf: board private structure to initialize
11241 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11246 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11247 vectors = i40e_init_msix(pf);
11249 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
11250 I40E_FLAG_IWARP_ENABLED |
11251 I40E_FLAG_RSS_ENABLED |
11252 I40E_FLAG_DCB_CAPABLE |
11253 I40E_FLAG_DCB_ENABLED |
11254 I40E_FLAG_SRIOV_ENABLED |
11255 I40E_FLAG_FD_SB_ENABLED |
11256 I40E_FLAG_FD_ATR_ENABLED |
11257 I40E_FLAG_VMDQ_ENABLED);
11258 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11260 /* rework the queue expectations without MSIX */
11261 i40e_determine_queue_usage(pf);
11265 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11266 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11267 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11268 vectors = pci_enable_msi(pf->pdev);
11270 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11272 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11274 vectors = 1; /* one MSI or Legacy vector */
11277 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11278 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11280 /* set up vector assignment tracking */
11281 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11282 pf->irq_pile = kzalloc(size, GFP_KERNEL);
11286 pf->irq_pile->num_entries = vectors;
11287 pf->irq_pile->search_hint = 0;
11289 /* track first vector for misc interrupts, ignore return */
11290 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11296 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11297 * @pf: private board data structure
11299 * Restore the interrupt scheme that was cleared when we suspended the
11300 * device. This should be called during resume to re-allocate the q_vectors
11301 * and reacquire IRQs.
11303 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11307 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11308 * scheme. We need to re-enabled them here in order to attempt to
11309 * re-acquire the MSI or MSI-X vectors
11311 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11313 err = i40e_init_interrupt_scheme(pf);
11317 /* Now that we've re-acquired IRQs, we need to remap the vectors and
11318 * rings together again.
11320 for (i = 0; i < pf->num_alloc_vsi; i++) {
11322 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11325 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11329 err = i40e_setup_misc_vector(pf);
11333 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11334 i40e_client_update_msix_info(pf);
11341 i40e_vsi_free_q_vectors(pf->vsi[i]);
11348 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11349 * non queue events in recovery mode
11350 * @pf: board private structure
11352 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11353 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11354 * This is handled differently than in recovery mode since no Tx/Rx resources
11355 * are being allocated.
11357 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11361 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11362 err = i40e_setup_misc_vector(pf);
11365 dev_info(&pf->pdev->dev,
11366 "MSI-X misc vector request failed, error %d\n",
11371 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11373 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11377 dev_info(&pf->pdev->dev,
11378 "MSI/legacy misc vector request failed, error %d\n",
11382 i40e_enable_misc_int_causes(pf);
11383 i40e_irq_dynamic_enable_icr0(pf);
11390 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11391 * @pf: board private structure
11393 * This sets up the handler for MSIX 0, which is used to manage the
11394 * non-queue interrupts, e.g. AdminQ and errors. This is not used
11395 * when in MSI or Legacy interrupt mode.
11397 static int i40e_setup_misc_vector(struct i40e_pf *pf)
11399 struct i40e_hw *hw = &pf->hw;
11402 /* Only request the IRQ once, the first time through. */
11403 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
11404 err = request_irq(pf->msix_entries[0].vector,
11405 i40e_intr, 0, pf->int_name, pf);
11407 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
11408 dev_info(&pf->pdev->dev,
11409 "request_irq for %s failed: %d\n",
11410 pf->int_name, err);
11415 i40e_enable_misc_int_causes(pf);
11417 /* associate no queues to the misc vector */
11418 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
11419 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
11423 i40e_irq_dynamic_enable_icr0(pf);
11429 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
11430 * @vsi: Pointer to vsi structure
11431 * @seed: Buffter to store the hash keys
11432 * @lut: Buffer to store the lookup table entries
11433 * @lut_size: Size of buffer to store the lookup table entries
11435 * Return 0 on success, negative on failure
11437 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
11438 u8 *lut, u16 lut_size)
11440 struct i40e_pf *pf = vsi->back;
11441 struct i40e_hw *hw = &pf->hw;
11445 ret = i40e_aq_get_rss_key(hw, vsi->id,
11446 (struct i40e_aqc_get_set_rss_key_data *)seed);
11448 dev_info(&pf->pdev->dev,
11449 "Cannot get RSS key, err %s aq_err %s\n",
11450 i40e_stat_str(&pf->hw, ret),
11451 i40e_aq_str(&pf->hw,
11452 pf->hw.aq.asq_last_status));
11458 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
11460 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11462 dev_info(&pf->pdev->dev,
11463 "Cannot get RSS lut, err %s aq_err %s\n",
11464 i40e_stat_str(&pf->hw, ret),
11465 i40e_aq_str(&pf->hw,
11466 pf->hw.aq.asq_last_status));
11475 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
11476 * @vsi: Pointer to vsi structure
11477 * @seed: RSS hash seed
11478 * @lut: Lookup table
11479 * @lut_size: Lookup table size
11481 * Returns 0 on success, negative on failure
11483 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
11484 const u8 *lut, u16 lut_size)
11486 struct i40e_pf *pf = vsi->back;
11487 struct i40e_hw *hw = &pf->hw;
11488 u16 vf_id = vsi->vf_id;
11491 /* Fill out hash function seed */
11493 u32 *seed_dw = (u32 *)seed;
11495 if (vsi->type == I40E_VSI_MAIN) {
11496 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11497 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
11498 } else if (vsi->type == I40E_VSI_SRIOV) {
11499 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
11500 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
11502 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
11507 u32 *lut_dw = (u32 *)lut;
11509 if (vsi->type == I40E_VSI_MAIN) {
11510 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11512 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11513 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
11514 } else if (vsi->type == I40E_VSI_SRIOV) {
11515 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
11517 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11518 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
11520 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11529 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
11530 * @vsi: Pointer to VSI structure
11531 * @seed: Buffer to store the keys
11532 * @lut: Buffer to store the lookup table entries
11533 * @lut_size: Size of buffer to store the lookup table entries
11535 * Returns 0 on success, negative on failure
11537 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
11538 u8 *lut, u16 lut_size)
11540 struct i40e_pf *pf = vsi->back;
11541 struct i40e_hw *hw = &pf->hw;
11545 u32 *seed_dw = (u32 *)seed;
11547 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11548 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
11551 u32 *lut_dw = (u32 *)lut;
11553 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11555 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11556 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
11563 * i40e_config_rss - Configure RSS keys and lut
11564 * @vsi: Pointer to VSI structure
11565 * @seed: RSS hash seed
11566 * @lut: Lookup table
11567 * @lut_size: Lookup table size
11569 * Returns 0 on success, negative on failure
11571 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
11573 struct i40e_pf *pf = vsi->back;
11575 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
11576 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
11578 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
11582 * i40e_get_rss - Get RSS keys and lut
11583 * @vsi: Pointer to VSI structure
11584 * @seed: Buffer to store the keys
11585 * @lut: Buffer to store the lookup table entries
11586 * @lut_size: Size of buffer to store the lookup table entries
11588 * Returns 0 on success, negative on failure
11590 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
11592 struct i40e_pf *pf = vsi->back;
11594 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
11595 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
11597 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
11601 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
11602 * @pf: Pointer to board private structure
11603 * @lut: Lookup table
11604 * @rss_table_size: Lookup table size
11605 * @rss_size: Range of queue number for hashing
11607 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
11608 u16 rss_table_size, u16 rss_size)
11612 for (i = 0; i < rss_table_size; i++)
11613 lut[i] = i % rss_size;
11617 * i40e_pf_config_rss - Prepare for RSS if used
11618 * @pf: board private structure
11620 static int i40e_pf_config_rss(struct i40e_pf *pf)
11622 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
11623 u8 seed[I40E_HKEY_ARRAY_SIZE];
11625 struct i40e_hw *hw = &pf->hw;
11630 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
11631 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
11632 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
11633 hena |= i40e_pf_get_default_rss_hena(pf);
11635 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
11636 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
11638 /* Determine the RSS table size based on the hardware capabilities */
11639 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
11640 reg_val = (pf->rss_table_size == 512) ?
11641 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
11642 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
11643 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
11645 /* Determine the RSS size of the VSI */
11646 if (!vsi->rss_size) {
11648 /* If the firmware does something weird during VSI init, we
11649 * could end up with zero TCs. Check for that to avoid
11650 * divide-by-zero. It probably won't pass traffic, but it also
11653 qcount = vsi->num_queue_pairs /
11654 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
11655 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
11657 if (!vsi->rss_size)
11660 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
11664 /* Use user configured lut if there is one, otherwise use default */
11665 if (vsi->rss_lut_user)
11666 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
11668 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
11670 /* Use user configured hash key if there is one, otherwise
11673 if (vsi->rss_hkey_user)
11674 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
11676 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
11677 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
11684 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
11685 * @pf: board private structure
11686 * @queue_count: the requested queue count for rss.
11688 * returns 0 if rss is not enabled, if enabled returns the final rss queue
11689 * count which may be different from the requested queue count.
11690 * Note: expects to be called while under rtnl_lock()
11692 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
11694 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
11697 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
11700 queue_count = min_t(int, queue_count, num_online_cpus());
11701 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
11703 if (queue_count != vsi->num_queue_pairs) {
11706 vsi->req_queue_pairs = queue_count;
11707 i40e_prep_for_reset(pf, true);
11709 pf->alloc_rss_size = new_rss_size;
11711 i40e_reset_and_rebuild(pf, true, true);
11713 /* Discard the user configured hash keys and lut, if less
11714 * queues are enabled.
11716 if (queue_count < vsi->rss_size) {
11717 i40e_clear_rss_config_user(vsi);
11718 dev_dbg(&pf->pdev->dev,
11719 "discard user configured hash keys and lut\n");
11722 /* Reset vsi->rss_size, as number of enabled queues changed */
11723 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
11724 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
11726 i40e_pf_config_rss(pf);
11728 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
11729 vsi->req_queue_pairs, pf->rss_size_max);
11730 return pf->alloc_rss_size;
11734 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
11735 * @pf: board private structure
11737 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
11739 i40e_status status;
11740 bool min_valid, max_valid;
11741 u32 max_bw, min_bw;
11743 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
11744 &min_valid, &max_valid);
11748 pf->min_bw = min_bw;
11750 pf->max_bw = max_bw;
11757 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
11758 * @pf: board private structure
11760 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
11762 struct i40e_aqc_configure_partition_bw_data bw_data;
11763 i40e_status status;
11765 /* Set the valid bit for this PF */
11766 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
11767 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
11768 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
11770 /* Set the new bandwidths */
11771 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
11777 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
11778 * @pf: board private structure
11780 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
11782 /* Commit temporary BW setting to permanent NVM image */
11783 enum i40e_admin_queue_err last_aq_status;
11787 if (pf->hw.partition_id != 1) {
11788 dev_info(&pf->pdev->dev,
11789 "Commit BW only works on partition 1! This is partition %d",
11790 pf->hw.partition_id);
11791 ret = I40E_NOT_SUPPORTED;
11792 goto bw_commit_out;
11795 /* Acquire NVM for read access */
11796 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
11797 last_aq_status = pf->hw.aq.asq_last_status;
11799 dev_info(&pf->pdev->dev,
11800 "Cannot acquire NVM for read access, err %s aq_err %s\n",
11801 i40e_stat_str(&pf->hw, ret),
11802 i40e_aq_str(&pf->hw, last_aq_status));
11803 goto bw_commit_out;
11806 /* Read word 0x10 of NVM - SW compatibility word 1 */
11807 ret = i40e_aq_read_nvm(&pf->hw,
11808 I40E_SR_NVM_CONTROL_WORD,
11809 0x10, sizeof(nvm_word), &nvm_word,
11811 /* Save off last admin queue command status before releasing
11814 last_aq_status = pf->hw.aq.asq_last_status;
11815 i40e_release_nvm(&pf->hw);
11817 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
11818 i40e_stat_str(&pf->hw, ret),
11819 i40e_aq_str(&pf->hw, last_aq_status));
11820 goto bw_commit_out;
11823 /* Wait a bit for NVM release to complete */
11826 /* Acquire NVM for write access */
11827 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
11828 last_aq_status = pf->hw.aq.asq_last_status;
11830 dev_info(&pf->pdev->dev,
11831 "Cannot acquire NVM for write access, err %s aq_err %s\n",
11832 i40e_stat_str(&pf->hw, ret),
11833 i40e_aq_str(&pf->hw, last_aq_status));
11834 goto bw_commit_out;
11836 /* Write it back out unchanged to initiate update NVM,
11837 * which will force a write of the shadow (alt) RAM to
11838 * the NVM - thus storing the bandwidth values permanently.
11840 ret = i40e_aq_update_nvm(&pf->hw,
11841 I40E_SR_NVM_CONTROL_WORD,
11842 0x10, sizeof(nvm_word),
11843 &nvm_word, true, 0, NULL);
11844 /* Save off last admin queue command status before releasing
11847 last_aq_status = pf->hw.aq.asq_last_status;
11848 i40e_release_nvm(&pf->hw);
11850 dev_info(&pf->pdev->dev,
11851 "BW settings NOT SAVED, err %s aq_err %s\n",
11852 i40e_stat_str(&pf->hw, ret),
11853 i40e_aq_str(&pf->hw, last_aq_status));
11860 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
11861 * @pf: board private structure to initialize
11863 * i40e_sw_init initializes the Adapter private data structure.
11864 * Fields are initialized based on PCI device information and
11865 * OS network device settings (MTU size).
11867 static int i40e_sw_init(struct i40e_pf *pf)
11872 /* Set default capability flags */
11873 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
11874 I40E_FLAG_MSI_ENABLED |
11875 I40E_FLAG_MSIX_ENABLED;
11877 /* Set default ITR */
11878 pf->rx_itr_default = I40E_ITR_RX_DEF;
11879 pf->tx_itr_default = I40E_ITR_TX_DEF;
11881 /* Depending on PF configurations, it is possible that the RSS
11882 * maximum might end up larger than the available queues
11884 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
11885 pf->alloc_rss_size = 1;
11886 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
11887 pf->rss_size_max = min_t(int, pf->rss_size_max,
11888 pf->hw.func_caps.num_tx_qp);
11889 if (pf->hw.func_caps.rss) {
11890 pf->flags |= I40E_FLAG_RSS_ENABLED;
11891 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
11892 num_online_cpus());
11895 /* MFP mode enabled */
11896 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
11897 pf->flags |= I40E_FLAG_MFP_ENABLED;
11898 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
11899 if (i40e_get_partition_bw_setting(pf)) {
11900 dev_warn(&pf->pdev->dev,
11901 "Could not get partition bw settings\n");
11903 dev_info(&pf->pdev->dev,
11904 "Partition BW Min = %8.8x, Max = %8.8x\n",
11905 pf->min_bw, pf->max_bw);
11907 /* nudge the Tx scheduler */
11908 i40e_set_partition_bw_setting(pf);
11912 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
11913 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
11914 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
11915 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
11916 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
11917 pf->hw.num_partitions > 1)
11918 dev_info(&pf->pdev->dev,
11919 "Flow Director Sideband mode Disabled in MFP mode\n");
11921 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
11922 pf->fdir_pf_filter_count =
11923 pf->hw.func_caps.fd_filters_guaranteed;
11924 pf->hw.fdir_shared_filter_count =
11925 pf->hw.func_caps.fd_filters_best_effort;
11928 if (pf->hw.mac.type == I40E_MAC_X722) {
11929 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
11930 I40E_HW_128_QP_RSS_CAPABLE |
11931 I40E_HW_ATR_EVICT_CAPABLE |
11932 I40E_HW_WB_ON_ITR_CAPABLE |
11933 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
11934 I40E_HW_NO_PCI_LINK_CHECK |
11935 I40E_HW_USE_SET_LLDP_MIB |
11936 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
11937 I40E_HW_PTP_L4_CAPABLE |
11938 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
11939 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
11941 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
11942 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
11943 I40E_FDEVICT_PCTYPE_DEFAULT) {
11944 dev_warn(&pf->pdev->dev,
11945 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
11946 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
11948 } else if ((pf->hw.aq.api_maj_ver > 1) ||
11949 ((pf->hw.aq.api_maj_ver == 1) &&
11950 (pf->hw.aq.api_min_ver > 4))) {
11951 /* Supported in FW API version higher than 1.4 */
11952 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
11955 /* Enable HW ATR eviction if possible */
11956 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
11957 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
11959 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11960 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
11961 (pf->hw.aq.fw_maj_ver < 4))) {
11962 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
11963 /* No DCB support for FW < v4.33 */
11964 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
11967 /* Disable FW LLDP if FW < v4.3 */
11968 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11969 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
11970 (pf->hw.aq.fw_maj_ver < 4)))
11971 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
11973 /* Use the FW Set LLDP MIB API if FW > v4.40 */
11974 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11975 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
11976 (pf->hw.aq.fw_maj_ver >= 5)))
11977 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
11979 /* Enable PTP L4 if FW > v6.0 */
11980 if (pf->hw.mac.type == I40E_MAC_XL710 &&
11981 pf->hw.aq.fw_maj_ver >= 6)
11982 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
11984 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
11985 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
11986 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
11987 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
11990 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
11991 pf->flags |= I40E_FLAG_IWARP_ENABLED;
11992 /* IWARP needs one extra vector for CQP just like MISC.*/
11993 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
11995 /* Stopping FW LLDP engine is supported on XL710 and X722
11996 * starting from FW versions determined in i40e_init_adminq.
11997 * Stopping the FW LLDP engine is not supported on XL710
11998 * if NPAR is functioning so unset this hw flag in this case.
12000 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12001 pf->hw.func_caps.npar_enable &&
12002 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12003 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12005 #ifdef CONFIG_PCI_IOV
12006 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12007 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12008 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12009 pf->num_req_vfs = min_t(int,
12010 pf->hw.func_caps.num_vfs,
12011 I40E_MAX_VF_COUNT);
12013 #endif /* CONFIG_PCI_IOV */
12014 pf->eeprom_version = 0xDEAD;
12015 pf->lan_veb = I40E_NO_VEB;
12016 pf->lan_vsi = I40E_NO_VSI;
12018 /* By default FW has this off for performance reasons */
12019 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12021 /* set up queue assignment tracking */
12022 size = sizeof(struct i40e_lump_tracking)
12023 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12024 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12025 if (!pf->qp_pile) {
12029 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12030 pf->qp_pile->search_hint = 0;
12032 pf->tx_timeout_recovery_level = 1;
12034 mutex_init(&pf->switch_mutex);
12041 * i40e_set_ntuple - set the ntuple feature flag and take action
12042 * @pf: board private structure to initialize
12043 * @features: the feature set that the stack is suggesting
12045 * returns a bool to indicate if reset needs to happen
12047 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12049 bool need_reset = false;
12051 /* Check if Flow Director n-tuple support was enabled or disabled. If
12052 * the state changed, we need to reset.
12054 if (features & NETIF_F_NTUPLE) {
12055 /* Enable filters and mark for reset */
12056 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12058 /* enable FD_SB only if there is MSI-X vector and no cloud
12061 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12062 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12063 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12066 /* turn off filters, mark for reset and clear SW filter list */
12067 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12069 i40e_fdir_filter_exit(pf);
12071 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12072 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12073 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12075 /* reset fd counters */
12076 pf->fd_add_err = 0;
12077 pf->fd_atr_cnt = 0;
12078 /* if ATR was auto disabled it can be re-enabled. */
12079 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12080 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12081 (I40E_DEBUG_FD & pf->hw.debug_mask))
12082 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12088 * i40e_clear_rss_lut - clear the rx hash lookup table
12089 * @vsi: the VSI being configured
12091 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12093 struct i40e_pf *pf = vsi->back;
12094 struct i40e_hw *hw = &pf->hw;
12095 u16 vf_id = vsi->vf_id;
12098 if (vsi->type == I40E_VSI_MAIN) {
12099 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12100 wr32(hw, I40E_PFQF_HLUT(i), 0);
12101 } else if (vsi->type == I40E_VSI_SRIOV) {
12102 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12103 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12105 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12110 * i40e_set_features - set the netdev feature flags
12111 * @netdev: ptr to the netdev being adjusted
12112 * @features: the feature set that the stack is suggesting
12113 * Note: expects to be called while under rtnl_lock()
12115 static int i40e_set_features(struct net_device *netdev,
12116 netdev_features_t features)
12118 struct i40e_netdev_priv *np = netdev_priv(netdev);
12119 struct i40e_vsi *vsi = np->vsi;
12120 struct i40e_pf *pf = vsi->back;
12123 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12124 i40e_pf_config_rss(pf);
12125 else if (!(features & NETIF_F_RXHASH) &&
12126 netdev->features & NETIF_F_RXHASH)
12127 i40e_clear_rss_lut(vsi);
12129 if (features & NETIF_F_HW_VLAN_CTAG_RX)
12130 i40e_vlan_stripping_enable(vsi);
12132 i40e_vlan_stripping_disable(vsi);
12134 if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12135 dev_err(&pf->pdev->dev,
12136 "Offloaded tc filters active, can't turn hw_tc_offload off");
12140 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12141 i40e_del_all_macvlans(vsi);
12143 need_reset = i40e_set_ntuple(pf, features);
12146 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12152 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
12153 * @pf: board private structure
12154 * @port: The UDP port to look up
12156 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
12158 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
12162 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
12163 /* Do not report ports with pending deletions as
12166 if (!port && (pf->pending_udp_bitmap & BIT_ULL(i)))
12168 if (pf->udp_ports[i].port == port)
12176 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
12177 * @netdev: This physical port's netdev
12178 * @ti: Tunnel endpoint information
12180 static void i40e_udp_tunnel_add(struct net_device *netdev,
12181 struct udp_tunnel_info *ti)
12183 struct i40e_netdev_priv *np = netdev_priv(netdev);
12184 struct i40e_vsi *vsi = np->vsi;
12185 struct i40e_pf *pf = vsi->back;
12186 u16 port = ntohs(ti->port);
12190 idx = i40e_get_udp_port_idx(pf, port);
12192 /* Check if port already exists */
12193 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
12194 netdev_info(netdev, "port %d already offloaded\n", port);
12198 /* Now check if there is space to add the new port */
12199 next_idx = i40e_get_udp_port_idx(pf, 0);
12201 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
12202 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
12207 switch (ti->type) {
12208 case UDP_TUNNEL_TYPE_VXLAN:
12209 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
12211 case UDP_TUNNEL_TYPE_GENEVE:
12212 if (!(pf->hw_features & I40E_HW_GENEVE_OFFLOAD_CAPABLE))
12214 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
12220 /* New port: add it and mark its index in the bitmap */
12221 pf->udp_ports[next_idx].port = port;
12222 pf->udp_ports[next_idx].filter_index = I40E_UDP_PORT_INDEX_UNUSED;
12223 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
12224 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
12228 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
12229 * @netdev: This physical port's netdev
12230 * @ti: Tunnel endpoint information
12232 static void i40e_udp_tunnel_del(struct net_device *netdev,
12233 struct udp_tunnel_info *ti)
12235 struct i40e_netdev_priv *np = netdev_priv(netdev);
12236 struct i40e_vsi *vsi = np->vsi;
12237 struct i40e_pf *pf = vsi->back;
12238 u16 port = ntohs(ti->port);
12241 idx = i40e_get_udp_port_idx(pf, port);
12243 /* Check if port already exists */
12244 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
12247 switch (ti->type) {
12248 case UDP_TUNNEL_TYPE_VXLAN:
12249 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
12252 case UDP_TUNNEL_TYPE_GENEVE:
12253 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
12260 /* if port exists, set it to 0 (mark for deletion)
12261 * and make it pending
12263 pf->udp_ports[idx].port = 0;
12265 /* Toggle pending bit instead of setting it. This way if we are
12266 * deleting a port that has yet to be added we just clear the pending
12267 * bit and don't have to worry about it.
12269 pf->pending_udp_bitmap ^= BIT_ULL(idx);
12270 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
12274 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
12278 static int i40e_get_phys_port_id(struct net_device *netdev,
12279 struct netdev_phys_item_id *ppid)
12281 struct i40e_netdev_priv *np = netdev_priv(netdev);
12282 struct i40e_pf *pf = np->vsi->back;
12283 struct i40e_hw *hw = &pf->hw;
12285 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12286 return -EOPNOTSUPP;
12288 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12289 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12295 * i40e_ndo_fdb_add - add an entry to the hardware database
12296 * @ndm: the input from the stack
12297 * @tb: pointer to array of nladdr (unused)
12298 * @dev: the net device pointer
12299 * @addr: the MAC address entry being added
12301 * @flags: instructions from stack about fdb operation
12303 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12304 struct net_device *dev,
12305 const unsigned char *addr, u16 vid,
12307 struct netlink_ext_ack *extack)
12309 struct i40e_netdev_priv *np = netdev_priv(dev);
12310 struct i40e_pf *pf = np->vsi->back;
12313 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12314 return -EOPNOTSUPP;
12317 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12321 /* Hardware does not support aging addresses so if a
12322 * ndm_state is given only allow permanent addresses
12324 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12325 netdev_info(dev, "FDB only supports static addresses\n");
12329 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12330 err = dev_uc_add_excl(dev, addr);
12331 else if (is_multicast_ether_addr(addr))
12332 err = dev_mc_add_excl(dev, addr);
12336 /* Only return duplicate errors if NLM_F_EXCL is set */
12337 if (err == -EEXIST && !(flags & NLM_F_EXCL))
12344 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12345 * @dev: the netdev being configured
12346 * @nlh: RTNL message
12347 * @flags: bridge flags
12348 * @extack: netlink extended ack
12350 * Inserts a new hardware bridge if not already created and
12351 * enables the bridging mode requested (VEB or VEPA). If the
12352 * hardware bridge has already been inserted and the request
12353 * is to change the mode then that requires a PF reset to
12354 * allow rebuild of the components with required hardware
12355 * bridge mode enabled.
12357 * Note: expects to be called while under rtnl_lock()
12359 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12360 struct nlmsghdr *nlh,
12362 struct netlink_ext_ack *extack)
12364 struct i40e_netdev_priv *np = netdev_priv(dev);
12365 struct i40e_vsi *vsi = np->vsi;
12366 struct i40e_pf *pf = vsi->back;
12367 struct i40e_veb *veb = NULL;
12368 struct nlattr *attr, *br_spec;
12371 /* Only for PF VSI for now */
12372 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12373 return -EOPNOTSUPP;
12375 /* Find the HW bridge for PF VSI */
12376 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12377 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12381 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12383 nla_for_each_nested(attr, br_spec, rem) {
12386 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12389 mode = nla_get_u16(attr);
12390 if ((mode != BRIDGE_MODE_VEPA) &&
12391 (mode != BRIDGE_MODE_VEB))
12394 /* Insert a new HW bridge */
12396 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12397 vsi->tc_config.enabled_tc);
12399 veb->bridge_mode = mode;
12400 i40e_config_bridge_mode(veb);
12402 /* No Bridge HW offload available */
12406 } else if (mode != veb->bridge_mode) {
12407 /* Existing HW bridge but different mode needs reset */
12408 veb->bridge_mode = mode;
12409 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
12410 if (mode == BRIDGE_MODE_VEB)
12411 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
12413 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12414 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12423 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
12426 * @seq: RTNL message seq #
12427 * @dev: the netdev being configured
12428 * @filter_mask: unused
12429 * @nlflags: netlink flags passed in
12431 * Return the mode in which the hardware bridge is operating in
12434 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
12435 struct net_device *dev,
12436 u32 __always_unused filter_mask,
12439 struct i40e_netdev_priv *np = netdev_priv(dev);
12440 struct i40e_vsi *vsi = np->vsi;
12441 struct i40e_pf *pf = vsi->back;
12442 struct i40e_veb *veb = NULL;
12445 /* Only for PF VSI for now */
12446 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12447 return -EOPNOTSUPP;
12449 /* Find the HW bridge for the PF VSI */
12450 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12451 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12458 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
12459 0, 0, nlflags, filter_mask, NULL);
12463 * i40e_features_check - Validate encapsulated packet conforms to limits
12465 * @dev: This physical port's netdev
12466 * @features: Offload features that the stack believes apply
12468 static netdev_features_t i40e_features_check(struct sk_buff *skb,
12469 struct net_device *dev,
12470 netdev_features_t features)
12474 /* No point in doing any of this if neither checksum nor GSO are
12475 * being requested for this frame. We can rule out both by just
12476 * checking for CHECKSUM_PARTIAL
12478 if (skb->ip_summed != CHECKSUM_PARTIAL)
12481 /* We cannot support GSO if the MSS is going to be less than
12482 * 64 bytes. If it is then we need to drop support for GSO.
12484 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
12485 features &= ~NETIF_F_GSO_MASK;
12487 /* MACLEN can support at most 63 words */
12488 len = skb_network_header(skb) - skb->data;
12489 if (len & ~(63 * 2))
12492 /* IPLEN and EIPLEN can support at most 127 dwords */
12493 len = skb_transport_header(skb) - skb_network_header(skb);
12494 if (len & ~(127 * 4))
12497 if (skb->encapsulation) {
12498 /* L4TUNLEN can support 127 words */
12499 len = skb_inner_network_header(skb) - skb_transport_header(skb);
12500 if (len & ~(127 * 2))
12503 /* IPLEN can support at most 127 dwords */
12504 len = skb_inner_transport_header(skb) -
12505 skb_inner_network_header(skb);
12506 if (len & ~(127 * 4))
12510 /* No need to validate L4LEN as TCP is the only protocol with a
12511 * a flexible value and we support all possible values supported
12512 * by TCP, which is at most 15 dwords
12517 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
12521 * i40e_xdp_setup - add/remove an XDP program
12522 * @vsi: VSI to changed
12523 * @prog: XDP program
12525 static int i40e_xdp_setup(struct i40e_vsi *vsi,
12526 struct bpf_prog *prog)
12528 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
12529 struct i40e_pf *pf = vsi->back;
12530 struct bpf_prog *old_prog;
12534 /* Don't allow frames that span over multiple buffers */
12535 if (frame_size > vsi->rx_buf_len)
12538 if (!i40e_enabled_xdp_vsi(vsi) && !prog)
12541 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
12542 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
12545 i40e_prep_for_reset(pf, true);
12547 old_prog = xchg(&vsi->xdp_prog, prog);
12550 i40e_reset_and_rebuild(pf, true, true);
12552 for (i = 0; i < vsi->num_queue_pairs; i++)
12553 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
12556 bpf_prog_put(old_prog);
12558 /* Kick start the NAPI context if there is an AF_XDP socket open
12559 * on that queue id. This so that receiving will start.
12561 if (need_reset && prog)
12562 for (i = 0; i < vsi->num_queue_pairs; i++)
12563 if (vsi->xdp_rings[i]->xsk_umem)
12564 (void)i40e_xsk_wakeup(vsi->netdev, i,
12571 * i40e_enter_busy_conf - Enters busy config state
12574 * Returns 0 on success, <0 for failure.
12576 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
12578 struct i40e_pf *pf = vsi->back;
12581 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
12585 usleep_range(1000, 2000);
12592 * i40e_exit_busy_conf - Exits busy config state
12595 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
12597 struct i40e_pf *pf = vsi->back;
12599 clear_bit(__I40E_CONFIG_BUSY, pf->state);
12603 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
12605 * @queue_pair: queue pair
12607 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
12609 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
12610 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
12611 memset(&vsi->tx_rings[queue_pair]->stats, 0,
12612 sizeof(vsi->tx_rings[queue_pair]->stats));
12613 if (i40e_enabled_xdp_vsi(vsi)) {
12614 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
12615 sizeof(vsi->xdp_rings[queue_pair]->stats));
12620 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
12622 * @queue_pair: queue pair
12624 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
12626 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
12627 if (i40e_enabled_xdp_vsi(vsi)) {
12628 /* Make sure that in-progress ndo_xdp_xmit calls are
12632 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
12634 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
12638 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
12640 * @queue_pair: queue pair
12641 * @enable: true for enable, false for disable
12643 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
12646 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12647 struct i40e_q_vector *q_vector = rxr->q_vector;
12652 /* All rings in a qp belong to the same qvector. */
12653 if (q_vector->rx.ring || q_vector->tx.ring) {
12655 napi_enable(&q_vector->napi);
12657 napi_disable(&q_vector->napi);
12662 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
12664 * @queue_pair: queue pair
12665 * @enable: true for enable, false for disable
12667 * Returns 0 on success, <0 on failure.
12669 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
12672 struct i40e_pf *pf = vsi->back;
12675 pf_q = vsi->base_queue + queue_pair;
12676 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
12677 false /*is xdp*/, enable);
12679 dev_info(&pf->pdev->dev,
12680 "VSI seid %d Tx ring %d %sable timeout\n",
12681 vsi->seid, pf_q, (enable ? "en" : "dis"));
12685 i40e_control_rx_q(pf, pf_q, enable);
12686 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
12688 dev_info(&pf->pdev->dev,
12689 "VSI seid %d Rx ring %d %sable timeout\n",
12690 vsi->seid, pf_q, (enable ? "en" : "dis"));
12694 /* Due to HW errata, on Rx disable only, the register can
12695 * indicate done before it really is. Needs 50ms to be sure
12700 if (!i40e_enabled_xdp_vsi(vsi))
12703 ret = i40e_control_wait_tx_q(vsi->seid, pf,
12704 pf_q + vsi->alloc_queue_pairs,
12705 true /*is xdp*/, enable);
12707 dev_info(&pf->pdev->dev,
12708 "VSI seid %d XDP Tx ring %d %sable timeout\n",
12709 vsi->seid, pf_q, (enable ? "en" : "dis"));
12716 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
12718 * @queue_pair: queue_pair
12720 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
12722 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12723 struct i40e_pf *pf = vsi->back;
12724 struct i40e_hw *hw = &pf->hw;
12726 /* All rings in a qp belong to the same qvector. */
12727 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
12728 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
12730 i40e_irq_dynamic_enable_icr0(pf);
12736 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
12738 * @queue_pair: queue_pair
12740 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
12742 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12743 struct i40e_pf *pf = vsi->back;
12744 struct i40e_hw *hw = &pf->hw;
12746 /* For simplicity, instead of removing the qp interrupt causes
12747 * from the interrupt linked list, we simply disable the interrupt, and
12748 * leave the list intact.
12750 * All rings in a qp belong to the same qvector.
12752 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12753 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
12755 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
12757 synchronize_irq(pf->msix_entries[intpf].vector);
12759 /* Legacy and MSI mode - this stops all interrupt handling */
12760 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
12761 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
12763 synchronize_irq(pf->pdev->irq);
12768 * i40e_queue_pair_disable - Disables a queue pair
12770 * @queue_pair: queue pair
12772 * Returns 0 on success, <0 on failure.
12774 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
12778 err = i40e_enter_busy_conf(vsi);
12782 i40e_queue_pair_disable_irq(vsi, queue_pair);
12783 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
12784 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
12785 i40e_queue_pair_clean_rings(vsi, queue_pair);
12786 i40e_queue_pair_reset_stats(vsi, queue_pair);
12792 * i40e_queue_pair_enable - Enables a queue pair
12794 * @queue_pair: queue pair
12796 * Returns 0 on success, <0 on failure.
12798 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
12802 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
12806 if (i40e_enabled_xdp_vsi(vsi)) {
12807 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
12812 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
12816 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
12817 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
12818 i40e_queue_pair_enable_irq(vsi, queue_pair);
12820 i40e_exit_busy_conf(vsi);
12826 * i40e_xdp - implements ndo_bpf for i40e
12828 * @xdp: XDP command
12830 static int i40e_xdp(struct net_device *dev,
12831 struct netdev_bpf *xdp)
12833 struct i40e_netdev_priv *np = netdev_priv(dev);
12834 struct i40e_vsi *vsi = np->vsi;
12836 if (vsi->type != I40E_VSI_MAIN)
12839 switch (xdp->command) {
12840 case XDP_SETUP_PROG:
12841 return i40e_xdp_setup(vsi, xdp->prog);
12842 case XDP_QUERY_PROG:
12843 xdp->prog_id = vsi->xdp_prog ? vsi->xdp_prog->aux->id : 0;
12845 case XDP_SETUP_XSK_UMEM:
12846 return i40e_xsk_umem_setup(vsi, xdp->xsk.umem,
12847 xdp->xsk.queue_id);
12853 static const struct net_device_ops i40e_netdev_ops = {
12854 .ndo_open = i40e_open,
12855 .ndo_stop = i40e_close,
12856 .ndo_start_xmit = i40e_lan_xmit_frame,
12857 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
12858 .ndo_set_rx_mode = i40e_set_rx_mode,
12859 .ndo_validate_addr = eth_validate_addr,
12860 .ndo_set_mac_address = i40e_set_mac,
12861 .ndo_change_mtu = i40e_change_mtu,
12862 .ndo_do_ioctl = i40e_ioctl,
12863 .ndo_tx_timeout = i40e_tx_timeout,
12864 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
12865 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
12866 #ifdef CONFIG_NET_POLL_CONTROLLER
12867 .ndo_poll_controller = i40e_netpoll,
12869 .ndo_setup_tc = __i40e_setup_tc,
12870 .ndo_set_features = i40e_set_features,
12871 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
12872 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
12873 .ndo_get_vf_stats = i40e_get_vf_stats,
12874 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
12875 .ndo_get_vf_config = i40e_ndo_get_vf_config,
12876 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
12877 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
12878 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
12879 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
12880 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
12881 .ndo_get_phys_port_id = i40e_get_phys_port_id,
12882 .ndo_fdb_add = i40e_ndo_fdb_add,
12883 .ndo_features_check = i40e_features_check,
12884 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
12885 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
12886 .ndo_bpf = i40e_xdp,
12887 .ndo_xdp_xmit = i40e_xdp_xmit,
12888 .ndo_xsk_wakeup = i40e_xsk_wakeup,
12889 .ndo_dfwd_add_station = i40e_fwd_add,
12890 .ndo_dfwd_del_station = i40e_fwd_del,
12894 * i40e_config_netdev - Setup the netdev flags
12895 * @vsi: the VSI being configured
12897 * Returns 0 on success, negative value on failure
12899 static int i40e_config_netdev(struct i40e_vsi *vsi)
12901 struct i40e_pf *pf = vsi->back;
12902 struct i40e_hw *hw = &pf->hw;
12903 struct i40e_netdev_priv *np;
12904 struct net_device *netdev;
12905 u8 broadcast[ETH_ALEN];
12906 u8 mac_addr[ETH_ALEN];
12908 netdev_features_t hw_enc_features;
12909 netdev_features_t hw_features;
12911 etherdev_size = sizeof(struct i40e_netdev_priv);
12912 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
12916 vsi->netdev = netdev;
12917 np = netdev_priv(netdev);
12920 hw_enc_features = NETIF_F_SG |
12922 NETIF_F_IPV6_CSUM |
12924 NETIF_F_SOFT_FEATURES |
12929 NETIF_F_GSO_GRE_CSUM |
12930 NETIF_F_GSO_PARTIAL |
12931 NETIF_F_GSO_IPXIP4 |
12932 NETIF_F_GSO_IPXIP6 |
12933 NETIF_F_GSO_UDP_TUNNEL |
12934 NETIF_F_GSO_UDP_TUNNEL_CSUM |
12935 NETIF_F_GSO_UDP_L4 |
12941 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
12942 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
12944 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
12946 netdev->hw_enc_features |= hw_enc_features;
12948 /* record features VLANs can make use of */
12949 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
12951 /* enable macvlan offloads */
12952 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
12954 hw_features = hw_enc_features |
12955 NETIF_F_HW_VLAN_CTAG_TX |
12956 NETIF_F_HW_VLAN_CTAG_RX;
12958 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
12959 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
12961 netdev->hw_features |= hw_features;
12963 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
12964 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
12966 if (vsi->type == I40E_VSI_MAIN) {
12967 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
12968 ether_addr_copy(mac_addr, hw->mac.perm_addr);
12969 /* The following steps are necessary for two reasons. First,
12970 * some older NVM configurations load a default MAC-VLAN
12971 * filter that will accept any tagged packet, and we want to
12972 * replace this with a normal filter. Additionally, it is
12973 * possible our MAC address was provided by the platform using
12974 * Open Firmware or similar.
12976 * Thus, we need to remove the default filter and install one
12977 * specific to the MAC address.
12979 i40e_rm_default_mac_filter(vsi, mac_addr);
12980 spin_lock_bh(&vsi->mac_filter_hash_lock);
12981 i40e_add_mac_filter(vsi, mac_addr);
12982 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12984 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
12985 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
12986 * the end, which is 4 bytes long, so force truncation of the
12987 * original name by IFNAMSIZ - 4
12989 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
12991 pf->vsi[pf->lan_vsi]->netdev->name);
12992 eth_random_addr(mac_addr);
12994 spin_lock_bh(&vsi->mac_filter_hash_lock);
12995 i40e_add_mac_filter(vsi, mac_addr);
12996 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12999 /* Add the broadcast filter so that we initially will receive
13000 * broadcast packets. Note that when a new VLAN is first added the
13001 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13002 * specific filters as part of transitioning into "vlan" operation.
13003 * When more VLANs are added, the driver will copy each existing MAC
13004 * filter and add it for the new VLAN.
13006 * Broadcast filters are handled specially by
13007 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13008 * promiscuous bit instead of adding this directly as a MAC/VLAN
13009 * filter. The subtask will update the correct broadcast promiscuous
13010 * bits as VLANs become active or inactive.
13012 eth_broadcast_addr(broadcast);
13013 spin_lock_bh(&vsi->mac_filter_hash_lock);
13014 i40e_add_mac_filter(vsi, broadcast);
13015 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13017 ether_addr_copy(netdev->dev_addr, mac_addr);
13018 ether_addr_copy(netdev->perm_addr, mac_addr);
13020 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13021 netdev->neigh_priv_len = sizeof(u32) * 4;
13023 netdev->priv_flags |= IFF_UNICAST_FLT;
13024 netdev->priv_flags |= IFF_SUPP_NOFCS;
13025 /* Setup netdev TC information */
13026 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13028 netdev->netdev_ops = &i40e_netdev_ops;
13029 netdev->watchdog_timeo = 5 * HZ;
13030 i40e_set_ethtool_ops(netdev);
13032 /* MTU range: 68 - 9706 */
13033 netdev->min_mtu = ETH_MIN_MTU;
13034 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13040 * i40e_vsi_delete - Delete a VSI from the switch
13041 * @vsi: the VSI being removed
13043 * Returns 0 on success, negative value on failure
13045 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13047 /* remove default VSI is not allowed */
13048 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13051 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13055 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13056 * @vsi: the VSI being queried
13058 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13060 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13062 struct i40e_veb *veb;
13063 struct i40e_pf *pf = vsi->back;
13065 /* Uplink is not a bridge so default to VEB */
13066 if (vsi->veb_idx >= I40E_MAX_VEB)
13069 veb = pf->veb[vsi->veb_idx];
13071 dev_info(&pf->pdev->dev,
13072 "There is no veb associated with the bridge\n");
13076 /* Uplink is a bridge in VEPA mode */
13077 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13080 /* Uplink is a bridge in VEB mode */
13084 /* VEPA is now default bridge, so return 0 */
13089 * i40e_add_vsi - Add a VSI to the switch
13090 * @vsi: the VSI being configured
13092 * This initializes a VSI context depending on the VSI type to be added and
13093 * passes it down to the add_vsi aq command.
13095 static int i40e_add_vsi(struct i40e_vsi *vsi)
13098 struct i40e_pf *pf = vsi->back;
13099 struct i40e_hw *hw = &pf->hw;
13100 struct i40e_vsi_context ctxt;
13101 struct i40e_mac_filter *f;
13102 struct hlist_node *h;
13105 u8 enabled_tc = 0x1; /* TC0 enabled */
13108 memset(&ctxt, 0, sizeof(ctxt));
13109 switch (vsi->type) {
13110 case I40E_VSI_MAIN:
13111 /* The PF's main VSI is already setup as part of the
13112 * device initialization, so we'll not bother with
13113 * the add_vsi call, but we will retrieve the current
13116 ctxt.seid = pf->main_vsi_seid;
13117 ctxt.pf_num = pf->hw.pf_id;
13119 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13120 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13122 dev_info(&pf->pdev->dev,
13123 "couldn't get PF vsi config, err %s aq_err %s\n",
13124 i40e_stat_str(&pf->hw, ret),
13125 i40e_aq_str(&pf->hw,
13126 pf->hw.aq.asq_last_status));
13129 vsi->info = ctxt.info;
13130 vsi->info.valid_sections = 0;
13132 vsi->seid = ctxt.seid;
13133 vsi->id = ctxt.vsi_number;
13135 enabled_tc = i40e_pf_get_tc_map(pf);
13137 /* Source pruning is enabled by default, so the flag is
13138 * negative logic - if it's set, we need to fiddle with
13139 * the VSI to disable source pruning.
13141 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13142 memset(&ctxt, 0, sizeof(ctxt));
13143 ctxt.seid = pf->main_vsi_seid;
13144 ctxt.pf_num = pf->hw.pf_id;
13146 ctxt.info.valid_sections |=
13147 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13148 ctxt.info.switch_id =
13149 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13150 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13152 dev_info(&pf->pdev->dev,
13153 "update vsi failed, err %s aq_err %s\n",
13154 i40e_stat_str(&pf->hw, ret),
13155 i40e_aq_str(&pf->hw,
13156 pf->hw.aq.asq_last_status));
13162 /* MFP mode setup queue map and update VSI */
13163 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13164 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13165 memset(&ctxt, 0, sizeof(ctxt));
13166 ctxt.seid = pf->main_vsi_seid;
13167 ctxt.pf_num = pf->hw.pf_id;
13169 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13170 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13172 dev_info(&pf->pdev->dev,
13173 "update vsi failed, err %s aq_err %s\n",
13174 i40e_stat_str(&pf->hw, ret),
13175 i40e_aq_str(&pf->hw,
13176 pf->hw.aq.asq_last_status));
13180 /* update the local VSI info queue map */
13181 i40e_vsi_update_queue_map(vsi, &ctxt);
13182 vsi->info.valid_sections = 0;
13184 /* Default/Main VSI is only enabled for TC0
13185 * reconfigure it to enable all TCs that are
13186 * available on the port in SFP mode.
13187 * For MFP case the iSCSI PF would use this
13188 * flow to enable LAN+iSCSI TC.
13190 ret = i40e_vsi_config_tc(vsi, enabled_tc);
13192 /* Single TC condition is not fatal,
13193 * message and continue
13195 dev_info(&pf->pdev->dev,
13196 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13198 i40e_stat_str(&pf->hw, ret),
13199 i40e_aq_str(&pf->hw,
13200 pf->hw.aq.asq_last_status));
13205 case I40E_VSI_FDIR:
13206 ctxt.pf_num = hw->pf_id;
13208 ctxt.uplink_seid = vsi->uplink_seid;
13209 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13210 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13211 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13212 (i40e_is_vsi_uplink_mode_veb(vsi))) {
13213 ctxt.info.valid_sections |=
13214 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13215 ctxt.info.switch_id =
13216 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13218 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13221 case I40E_VSI_VMDQ2:
13222 ctxt.pf_num = hw->pf_id;
13224 ctxt.uplink_seid = vsi->uplink_seid;
13225 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13226 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13228 /* This VSI is connected to VEB so the switch_id
13229 * should be set to zero by default.
13231 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13232 ctxt.info.valid_sections |=
13233 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13234 ctxt.info.switch_id =
13235 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13238 /* Setup the VSI tx/rx queue map for TC0 only for now */
13239 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13242 case I40E_VSI_SRIOV:
13243 ctxt.pf_num = hw->pf_id;
13244 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13245 ctxt.uplink_seid = vsi->uplink_seid;
13246 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13247 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13249 /* This VSI is connected to VEB so the switch_id
13250 * should be set to zero by default.
13252 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13253 ctxt.info.valid_sections |=
13254 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13255 ctxt.info.switch_id =
13256 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13259 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13260 ctxt.info.valid_sections |=
13261 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13262 ctxt.info.queueing_opt_flags |=
13263 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13264 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13267 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13268 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13269 if (pf->vf[vsi->vf_id].spoofchk) {
13270 ctxt.info.valid_sections |=
13271 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13272 ctxt.info.sec_flags |=
13273 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13274 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13276 /* Setup the VSI tx/rx queue map for TC0 only for now */
13277 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13280 case I40E_VSI_IWARP:
13281 /* send down message to iWARP */
13288 if (vsi->type != I40E_VSI_MAIN) {
13289 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13291 dev_info(&vsi->back->pdev->dev,
13292 "add vsi failed, err %s aq_err %s\n",
13293 i40e_stat_str(&pf->hw, ret),
13294 i40e_aq_str(&pf->hw,
13295 pf->hw.aq.asq_last_status));
13299 vsi->info = ctxt.info;
13300 vsi->info.valid_sections = 0;
13301 vsi->seid = ctxt.seid;
13302 vsi->id = ctxt.vsi_number;
13305 vsi->active_filters = 0;
13306 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13307 spin_lock_bh(&vsi->mac_filter_hash_lock);
13308 /* If macvlan filters already exist, force them to get loaded */
13309 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13310 f->state = I40E_FILTER_NEW;
13313 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13316 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13317 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13320 /* Update VSI BW information */
13321 ret = i40e_vsi_get_bw_info(vsi);
13323 dev_info(&pf->pdev->dev,
13324 "couldn't get vsi bw info, err %s aq_err %s\n",
13325 i40e_stat_str(&pf->hw, ret),
13326 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13327 /* VSI is already added so not tearing that up */
13336 * i40e_vsi_release - Delete a VSI and free its resources
13337 * @vsi: the VSI being removed
13339 * Returns 0 on success or < 0 on error
13341 int i40e_vsi_release(struct i40e_vsi *vsi)
13343 struct i40e_mac_filter *f;
13344 struct hlist_node *h;
13345 struct i40e_veb *veb = NULL;
13346 struct i40e_pf *pf;
13352 /* release of a VEB-owner or last VSI is not allowed */
13353 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13354 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13355 vsi->seid, vsi->uplink_seid);
13358 if (vsi == pf->vsi[pf->lan_vsi] &&
13359 !test_bit(__I40E_DOWN, pf->state)) {
13360 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13364 uplink_seid = vsi->uplink_seid;
13365 if (vsi->type != I40E_VSI_SRIOV) {
13366 if (vsi->netdev_registered) {
13367 vsi->netdev_registered = false;
13369 /* results in a call to i40e_close() */
13370 unregister_netdev(vsi->netdev);
13373 i40e_vsi_close(vsi);
13375 i40e_vsi_disable_irq(vsi);
13378 spin_lock_bh(&vsi->mac_filter_hash_lock);
13380 /* clear the sync flag on all filters */
13382 __dev_uc_unsync(vsi->netdev, NULL);
13383 __dev_mc_unsync(vsi->netdev, NULL);
13386 /* make sure any remaining filters are marked for deletion */
13387 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
13388 __i40e_del_filter(vsi, f);
13390 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13392 i40e_sync_vsi_filters(vsi);
13394 i40e_vsi_delete(vsi);
13395 i40e_vsi_free_q_vectors(vsi);
13397 free_netdev(vsi->netdev);
13398 vsi->netdev = NULL;
13400 i40e_vsi_clear_rings(vsi);
13401 i40e_vsi_clear(vsi);
13403 /* If this was the last thing on the VEB, except for the
13404 * controlling VSI, remove the VEB, which puts the controlling
13405 * VSI onto the next level down in the switch.
13407 * Well, okay, there's one more exception here: don't remove
13408 * the orphan VEBs yet. We'll wait for an explicit remove request
13409 * from up the network stack.
13411 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
13413 pf->vsi[i]->uplink_seid == uplink_seid &&
13414 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13415 n++; /* count the VSIs */
13418 for (i = 0; i < I40E_MAX_VEB; i++) {
13421 if (pf->veb[i]->uplink_seid == uplink_seid)
13422 n++; /* count the VEBs */
13423 if (pf->veb[i]->seid == uplink_seid)
13426 if (n == 0 && veb && veb->uplink_seid != 0)
13427 i40e_veb_release(veb);
13433 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
13434 * @vsi: ptr to the VSI
13436 * This should only be called after i40e_vsi_mem_alloc() which allocates the
13437 * corresponding SW VSI structure and initializes num_queue_pairs for the
13438 * newly allocated VSI.
13440 * Returns 0 on success or negative on failure
13442 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
13445 struct i40e_pf *pf = vsi->back;
13447 if (vsi->q_vectors[0]) {
13448 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
13453 if (vsi->base_vector) {
13454 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
13455 vsi->seid, vsi->base_vector);
13459 ret = i40e_vsi_alloc_q_vectors(vsi);
13461 dev_info(&pf->pdev->dev,
13462 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
13463 vsi->num_q_vectors, vsi->seid, ret);
13464 vsi->num_q_vectors = 0;
13465 goto vector_setup_out;
13468 /* In Legacy mode, we do not have to get any other vector since we
13469 * piggyback on the misc/ICR0 for queue interrupts.
13471 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
13473 if (vsi->num_q_vectors)
13474 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
13475 vsi->num_q_vectors, vsi->idx);
13476 if (vsi->base_vector < 0) {
13477 dev_info(&pf->pdev->dev,
13478 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
13479 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
13480 i40e_vsi_free_q_vectors(vsi);
13482 goto vector_setup_out;
13490 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
13491 * @vsi: pointer to the vsi.
13493 * This re-allocates a vsi's queue resources.
13495 * Returns pointer to the successfully allocated and configured VSI sw struct
13496 * on success, otherwise returns NULL on failure.
13498 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
13500 u16 alloc_queue_pairs;
13501 struct i40e_pf *pf;
13510 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
13511 i40e_vsi_clear_rings(vsi);
13513 i40e_vsi_free_arrays(vsi, false);
13514 i40e_set_num_rings_in_vsi(vsi);
13515 ret = i40e_vsi_alloc_arrays(vsi, false);
13519 alloc_queue_pairs = vsi->alloc_queue_pairs *
13520 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13522 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13524 dev_info(&pf->pdev->dev,
13525 "failed to get tracking for %d queues for VSI %d err %d\n",
13526 alloc_queue_pairs, vsi->seid, ret);
13529 vsi->base_queue = ret;
13531 /* Update the FW view of the VSI. Force a reset of TC and queue
13532 * layout configurations.
13534 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13535 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13536 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13537 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13538 if (vsi->type == I40E_VSI_MAIN)
13539 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
13541 /* assign it some queues */
13542 ret = i40e_alloc_rings(vsi);
13546 /* map all of the rings to the q_vectors */
13547 i40e_vsi_map_rings_to_vectors(vsi);
13551 i40e_vsi_free_q_vectors(vsi);
13552 if (vsi->netdev_registered) {
13553 vsi->netdev_registered = false;
13554 unregister_netdev(vsi->netdev);
13555 free_netdev(vsi->netdev);
13556 vsi->netdev = NULL;
13558 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13560 i40e_vsi_clear(vsi);
13565 * i40e_vsi_setup - Set up a VSI by a given type
13566 * @pf: board private structure
13568 * @uplink_seid: the switch element to link to
13569 * @param1: usage depends upon VSI type. For VF types, indicates VF id
13571 * This allocates the sw VSI structure and its queue resources, then add a VSI
13572 * to the identified VEB.
13574 * Returns pointer to the successfully allocated and configure VSI sw struct on
13575 * success, otherwise returns NULL on failure.
13577 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
13578 u16 uplink_seid, u32 param1)
13580 struct i40e_vsi *vsi = NULL;
13581 struct i40e_veb *veb = NULL;
13582 u16 alloc_queue_pairs;
13586 /* The requested uplink_seid must be either
13587 * - the PF's port seid
13588 * no VEB is needed because this is the PF
13589 * or this is a Flow Director special case VSI
13590 * - seid of an existing VEB
13591 * - seid of a VSI that owns an existing VEB
13592 * - seid of a VSI that doesn't own a VEB
13593 * a new VEB is created and the VSI becomes the owner
13594 * - seid of the PF VSI, which is what creates the first VEB
13595 * this is a special case of the previous
13597 * Find which uplink_seid we were given and create a new VEB if needed
13599 for (i = 0; i < I40E_MAX_VEB; i++) {
13600 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
13606 if (!veb && uplink_seid != pf->mac_seid) {
13608 for (i = 0; i < pf->num_alloc_vsi; i++) {
13609 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
13615 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
13620 if (vsi->uplink_seid == pf->mac_seid)
13621 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
13622 vsi->tc_config.enabled_tc);
13623 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
13624 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
13625 vsi->tc_config.enabled_tc);
13627 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
13628 dev_info(&vsi->back->pdev->dev,
13629 "New VSI creation error, uplink seid of LAN VSI expected.\n");
13632 /* We come up by default in VEPA mode if SRIOV is not
13633 * already enabled, in which case we can't force VEPA
13636 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
13637 veb->bridge_mode = BRIDGE_MODE_VEPA;
13638 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13640 i40e_config_bridge_mode(veb);
13642 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13643 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13647 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
13651 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
13652 uplink_seid = veb->seid;
13655 /* get vsi sw struct */
13656 v_idx = i40e_vsi_mem_alloc(pf, type);
13659 vsi = pf->vsi[v_idx];
13663 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
13665 if (type == I40E_VSI_MAIN)
13666 pf->lan_vsi = v_idx;
13667 else if (type == I40E_VSI_SRIOV)
13668 vsi->vf_id = param1;
13669 /* assign it some queues */
13670 alloc_queue_pairs = vsi->alloc_queue_pairs *
13671 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13673 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13675 dev_info(&pf->pdev->dev,
13676 "failed to get tracking for %d queues for VSI %d err=%d\n",
13677 alloc_queue_pairs, vsi->seid, ret);
13680 vsi->base_queue = ret;
13682 /* get a VSI from the hardware */
13683 vsi->uplink_seid = uplink_seid;
13684 ret = i40e_add_vsi(vsi);
13688 switch (vsi->type) {
13689 /* setup the netdev if needed */
13690 case I40E_VSI_MAIN:
13691 case I40E_VSI_VMDQ2:
13692 ret = i40e_config_netdev(vsi);
13695 ret = register_netdev(vsi->netdev);
13698 vsi->netdev_registered = true;
13699 netif_carrier_off(vsi->netdev);
13700 #ifdef CONFIG_I40E_DCB
13701 /* Setup DCB netlink interface */
13702 i40e_dcbnl_setup(vsi);
13703 #endif /* CONFIG_I40E_DCB */
13706 case I40E_VSI_FDIR:
13707 /* set up vectors and rings if needed */
13708 ret = i40e_vsi_setup_vectors(vsi);
13712 ret = i40e_alloc_rings(vsi);
13716 /* map all of the rings to the q_vectors */
13717 i40e_vsi_map_rings_to_vectors(vsi);
13719 i40e_vsi_reset_stats(vsi);
13723 /* no netdev or rings for the other VSI types */
13727 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
13728 (vsi->type == I40E_VSI_VMDQ2)) {
13729 ret = i40e_vsi_config_rss(vsi);
13734 i40e_vsi_free_q_vectors(vsi);
13736 if (vsi->netdev_registered) {
13737 vsi->netdev_registered = false;
13738 unregister_netdev(vsi->netdev);
13739 free_netdev(vsi->netdev);
13740 vsi->netdev = NULL;
13743 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13745 i40e_vsi_clear(vsi);
13751 * i40e_veb_get_bw_info - Query VEB BW information
13752 * @veb: the veb to query
13754 * Query the Tx scheduler BW configuration data for given VEB
13756 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
13758 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
13759 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
13760 struct i40e_pf *pf = veb->pf;
13761 struct i40e_hw *hw = &pf->hw;
13766 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
13769 dev_info(&pf->pdev->dev,
13770 "query veb bw config failed, err %s aq_err %s\n",
13771 i40e_stat_str(&pf->hw, ret),
13772 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
13776 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
13779 dev_info(&pf->pdev->dev,
13780 "query veb bw ets config failed, err %s aq_err %s\n",
13781 i40e_stat_str(&pf->hw, ret),
13782 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
13786 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
13787 veb->bw_max_quanta = ets_data.tc_bw_max;
13788 veb->is_abs_credits = bw_data.absolute_credits_enable;
13789 veb->enabled_tc = ets_data.tc_valid_bits;
13790 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
13791 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
13792 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
13793 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
13794 veb->bw_tc_limit_credits[i] =
13795 le16_to_cpu(bw_data.tc_bw_limits[i]);
13796 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
13804 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
13805 * @pf: board private structure
13807 * On error: returns error code (negative)
13808 * On success: returns vsi index in PF (positive)
13810 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
13813 struct i40e_veb *veb;
13816 /* Need to protect the allocation of switch elements at the PF level */
13817 mutex_lock(&pf->switch_mutex);
13819 /* VEB list may be fragmented if VEB creation/destruction has
13820 * been happening. We can afford to do a quick scan to look
13821 * for any free slots in the list.
13823 * find next empty veb slot, looping back around if necessary
13826 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
13828 if (i >= I40E_MAX_VEB) {
13830 goto err_alloc_veb; /* out of VEB slots! */
13833 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
13836 goto err_alloc_veb;
13840 veb->enabled_tc = 1;
13845 mutex_unlock(&pf->switch_mutex);
13850 * i40e_switch_branch_release - Delete a branch of the switch tree
13851 * @branch: where to start deleting
13853 * This uses recursion to find the tips of the branch to be
13854 * removed, deleting until we get back to and can delete this VEB.
13856 static void i40e_switch_branch_release(struct i40e_veb *branch)
13858 struct i40e_pf *pf = branch->pf;
13859 u16 branch_seid = branch->seid;
13860 u16 veb_idx = branch->idx;
13863 /* release any VEBs on this VEB - RECURSION */
13864 for (i = 0; i < I40E_MAX_VEB; i++) {
13867 if (pf->veb[i]->uplink_seid == branch->seid)
13868 i40e_switch_branch_release(pf->veb[i]);
13871 /* Release the VSIs on this VEB, but not the owner VSI.
13873 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
13874 * the VEB itself, so don't use (*branch) after this loop.
13876 for (i = 0; i < pf->num_alloc_vsi; i++) {
13879 if (pf->vsi[i]->uplink_seid == branch_seid &&
13880 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13881 i40e_vsi_release(pf->vsi[i]);
13885 /* There's one corner case where the VEB might not have been
13886 * removed, so double check it here and remove it if needed.
13887 * This case happens if the veb was created from the debugfs
13888 * commands and no VSIs were added to it.
13890 if (pf->veb[veb_idx])
13891 i40e_veb_release(pf->veb[veb_idx]);
13895 * i40e_veb_clear - remove veb struct
13896 * @veb: the veb to remove
13898 static void i40e_veb_clear(struct i40e_veb *veb)
13904 struct i40e_pf *pf = veb->pf;
13906 mutex_lock(&pf->switch_mutex);
13907 if (pf->veb[veb->idx] == veb)
13908 pf->veb[veb->idx] = NULL;
13909 mutex_unlock(&pf->switch_mutex);
13916 * i40e_veb_release - Delete a VEB and free its resources
13917 * @veb: the VEB being removed
13919 void i40e_veb_release(struct i40e_veb *veb)
13921 struct i40e_vsi *vsi = NULL;
13922 struct i40e_pf *pf;
13927 /* find the remaining VSI and check for extras */
13928 for (i = 0; i < pf->num_alloc_vsi; i++) {
13929 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
13935 dev_info(&pf->pdev->dev,
13936 "can't remove VEB %d with %d VSIs left\n",
13941 /* move the remaining VSI to uplink veb */
13942 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
13943 if (veb->uplink_seid) {
13944 vsi->uplink_seid = veb->uplink_seid;
13945 if (veb->uplink_seid == pf->mac_seid)
13946 vsi->veb_idx = I40E_NO_VEB;
13948 vsi->veb_idx = veb->veb_idx;
13951 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
13952 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
13955 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
13956 i40e_veb_clear(veb);
13960 * i40e_add_veb - create the VEB in the switch
13961 * @veb: the VEB to be instantiated
13962 * @vsi: the controlling VSI
13964 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
13966 struct i40e_pf *pf = veb->pf;
13967 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
13970 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
13971 veb->enabled_tc, false,
13972 &veb->seid, enable_stats, NULL);
13974 /* get a VEB from the hardware */
13976 dev_info(&pf->pdev->dev,
13977 "couldn't add VEB, err %s aq_err %s\n",
13978 i40e_stat_str(&pf->hw, ret),
13979 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13983 /* get statistics counter */
13984 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
13985 &veb->stats_idx, NULL, NULL, NULL);
13987 dev_info(&pf->pdev->dev,
13988 "couldn't get VEB statistics idx, err %s aq_err %s\n",
13989 i40e_stat_str(&pf->hw, ret),
13990 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13993 ret = i40e_veb_get_bw_info(veb);
13995 dev_info(&pf->pdev->dev,
13996 "couldn't get VEB bw info, err %s aq_err %s\n",
13997 i40e_stat_str(&pf->hw, ret),
13998 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13999 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14003 vsi->uplink_seid = veb->seid;
14004 vsi->veb_idx = veb->idx;
14005 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14011 * i40e_veb_setup - Set up a VEB
14012 * @pf: board private structure
14013 * @flags: VEB setup flags
14014 * @uplink_seid: the switch element to link to
14015 * @vsi_seid: the initial VSI seid
14016 * @enabled_tc: Enabled TC bit-map
14018 * This allocates the sw VEB structure and links it into the switch
14019 * It is possible and legal for this to be a duplicate of an already
14020 * existing VEB. It is also possible for both uplink and vsi seids
14021 * to be zero, in order to create a floating VEB.
14023 * Returns pointer to the successfully allocated VEB sw struct on
14024 * success, otherwise returns NULL on failure.
14026 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14027 u16 uplink_seid, u16 vsi_seid,
14030 struct i40e_veb *veb, *uplink_veb = NULL;
14031 int vsi_idx, veb_idx;
14034 /* if one seid is 0, the other must be 0 to create a floating relay */
14035 if ((uplink_seid == 0 || vsi_seid == 0) &&
14036 (uplink_seid + vsi_seid != 0)) {
14037 dev_info(&pf->pdev->dev,
14038 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14039 uplink_seid, vsi_seid);
14043 /* make sure there is such a vsi and uplink */
14044 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14045 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14047 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14048 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14053 if (uplink_seid && uplink_seid != pf->mac_seid) {
14054 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14055 if (pf->veb[veb_idx] &&
14056 pf->veb[veb_idx]->seid == uplink_seid) {
14057 uplink_veb = pf->veb[veb_idx];
14062 dev_info(&pf->pdev->dev,
14063 "uplink seid %d not found\n", uplink_seid);
14068 /* get veb sw struct */
14069 veb_idx = i40e_veb_mem_alloc(pf);
14072 veb = pf->veb[veb_idx];
14073 veb->flags = flags;
14074 veb->uplink_seid = uplink_seid;
14075 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14076 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14078 /* create the VEB in the switch */
14079 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14082 if (vsi_idx == pf->lan_vsi)
14083 pf->lan_veb = veb->idx;
14088 i40e_veb_clear(veb);
14094 * i40e_setup_pf_switch_element - set PF vars based on switch type
14095 * @pf: board private structure
14096 * @ele: element we are building info from
14097 * @num_reported: total number of elements
14098 * @printconfig: should we print the contents
14100 * helper function to assist in extracting a few useful SEID values.
14102 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14103 struct i40e_aqc_switch_config_element_resp *ele,
14104 u16 num_reported, bool printconfig)
14106 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14107 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14108 u8 element_type = ele->element_type;
14109 u16 seid = le16_to_cpu(ele->seid);
14112 dev_info(&pf->pdev->dev,
14113 "type=%d seid=%d uplink=%d downlink=%d\n",
14114 element_type, seid, uplink_seid, downlink_seid);
14116 switch (element_type) {
14117 case I40E_SWITCH_ELEMENT_TYPE_MAC:
14118 pf->mac_seid = seid;
14120 case I40E_SWITCH_ELEMENT_TYPE_VEB:
14122 if (uplink_seid != pf->mac_seid)
14124 if (pf->lan_veb >= I40E_MAX_VEB) {
14127 /* find existing or else empty VEB */
14128 for (v = 0; v < I40E_MAX_VEB; v++) {
14129 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14134 if (pf->lan_veb >= I40E_MAX_VEB) {
14135 v = i40e_veb_mem_alloc(pf);
14141 if (pf->lan_veb >= I40E_MAX_VEB)
14144 pf->veb[pf->lan_veb]->seid = seid;
14145 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14146 pf->veb[pf->lan_veb]->pf = pf;
14147 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14149 case I40E_SWITCH_ELEMENT_TYPE_VSI:
14150 if (num_reported != 1)
14152 /* This is immediately after a reset so we can assume this is
14155 pf->mac_seid = uplink_seid;
14156 pf->pf_seid = downlink_seid;
14157 pf->main_vsi_seid = seid;
14159 dev_info(&pf->pdev->dev,
14160 "pf_seid=%d main_vsi_seid=%d\n",
14161 pf->pf_seid, pf->main_vsi_seid);
14163 case I40E_SWITCH_ELEMENT_TYPE_PF:
14164 case I40E_SWITCH_ELEMENT_TYPE_VF:
14165 case I40E_SWITCH_ELEMENT_TYPE_EMP:
14166 case I40E_SWITCH_ELEMENT_TYPE_BMC:
14167 case I40E_SWITCH_ELEMENT_TYPE_PE:
14168 case I40E_SWITCH_ELEMENT_TYPE_PA:
14169 /* ignore these for now */
14172 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14173 element_type, seid);
14179 * i40e_fetch_switch_configuration - Get switch config from firmware
14180 * @pf: board private structure
14181 * @printconfig: should we print the contents
14183 * Get the current switch configuration from the device and
14184 * extract a few useful SEID values.
14186 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14188 struct i40e_aqc_get_switch_config_resp *sw_config;
14194 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14198 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14200 u16 num_reported, num_total;
14202 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14206 dev_info(&pf->pdev->dev,
14207 "get switch config failed err %s aq_err %s\n",
14208 i40e_stat_str(&pf->hw, ret),
14209 i40e_aq_str(&pf->hw,
14210 pf->hw.aq.asq_last_status));
14215 num_reported = le16_to_cpu(sw_config->header.num_reported);
14216 num_total = le16_to_cpu(sw_config->header.num_total);
14219 dev_info(&pf->pdev->dev,
14220 "header: %d reported %d total\n",
14221 num_reported, num_total);
14223 for (i = 0; i < num_reported; i++) {
14224 struct i40e_aqc_switch_config_element_resp *ele =
14225 &sw_config->element[i];
14227 i40e_setup_pf_switch_element(pf, ele, num_reported,
14230 } while (next_seid != 0);
14237 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14238 * @pf: board private structure
14239 * @reinit: if the Main VSI needs to re-initialized.
14241 * Returns 0 on success, negative value on failure
14243 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
14248 /* find out what's out there already */
14249 ret = i40e_fetch_switch_configuration(pf, false);
14251 dev_info(&pf->pdev->dev,
14252 "couldn't fetch switch config, err %s aq_err %s\n",
14253 i40e_stat_str(&pf->hw, ret),
14254 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14257 i40e_pf_reset_stats(pf);
14259 /* set the switch config bit for the whole device to
14260 * support limited promisc or true promisc
14261 * when user requests promisc. The default is limited
14265 if ((pf->hw.pf_id == 0) &&
14266 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14267 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14268 pf->last_sw_conf_flags = flags;
14271 if (pf->hw.pf_id == 0) {
14274 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14275 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14277 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14278 dev_info(&pf->pdev->dev,
14279 "couldn't set switch config bits, err %s aq_err %s\n",
14280 i40e_stat_str(&pf->hw, ret),
14281 i40e_aq_str(&pf->hw,
14282 pf->hw.aq.asq_last_status));
14283 /* not a fatal problem, just keep going */
14285 pf->last_sw_conf_valid_flags = valid_flags;
14288 /* first time setup */
14289 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14290 struct i40e_vsi *vsi = NULL;
14293 /* Set up the PF VSI associated with the PF's main VSI
14294 * that is already in the HW switch
14296 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14297 uplink_seid = pf->veb[pf->lan_veb]->seid;
14299 uplink_seid = pf->mac_seid;
14300 if (pf->lan_vsi == I40E_NO_VSI)
14301 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14303 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14305 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14306 i40e_cloud_filter_exit(pf);
14307 i40e_fdir_teardown(pf);
14311 /* force a reset of TC and queue layout configurations */
14312 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14314 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14315 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14316 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14318 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14320 i40e_fdir_sb_setup(pf);
14322 /* Setup static PF queue filter control settings */
14323 ret = i40e_setup_pf_filter_control(pf);
14325 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14327 /* Failure here should not stop continuing other steps */
14330 /* enable RSS in the HW, even for only one queue, as the stack can use
14333 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14334 i40e_pf_config_rss(pf);
14336 /* fill in link information and enable LSE reporting */
14337 i40e_link_event(pf);
14339 /* Initialize user-specific link properties */
14340 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14341 I40E_AQ_AN_COMPLETED) ? true : false);
14345 /* repopulate tunnel port filters */
14346 i40e_sync_udp_filters(pf);
14352 * i40e_determine_queue_usage - Work out queue distribution
14353 * @pf: board private structure
14355 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14360 pf->num_lan_qps = 0;
14362 /* Find the max queues to be put into basic use. We'll always be
14363 * using TC0, whether or not DCB is running, and TC0 will get the
14366 queues_left = pf->hw.func_caps.num_tx_qp;
14368 if ((queues_left == 1) ||
14369 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
14370 /* one qp for PF, no queues for anything else */
14372 pf->alloc_rss_size = pf->num_lan_qps = 1;
14374 /* make sure all the fancies are disabled */
14375 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
14376 I40E_FLAG_IWARP_ENABLED |
14377 I40E_FLAG_FD_SB_ENABLED |
14378 I40E_FLAG_FD_ATR_ENABLED |
14379 I40E_FLAG_DCB_CAPABLE |
14380 I40E_FLAG_DCB_ENABLED |
14381 I40E_FLAG_SRIOV_ENABLED |
14382 I40E_FLAG_VMDQ_ENABLED);
14383 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14384 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
14385 I40E_FLAG_FD_SB_ENABLED |
14386 I40E_FLAG_FD_ATR_ENABLED |
14387 I40E_FLAG_DCB_CAPABLE))) {
14388 /* one qp for PF */
14389 pf->alloc_rss_size = pf->num_lan_qps = 1;
14390 queues_left -= pf->num_lan_qps;
14392 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
14393 I40E_FLAG_IWARP_ENABLED |
14394 I40E_FLAG_FD_SB_ENABLED |
14395 I40E_FLAG_FD_ATR_ENABLED |
14396 I40E_FLAG_DCB_ENABLED |
14397 I40E_FLAG_VMDQ_ENABLED);
14398 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14400 /* Not enough queues for all TCs */
14401 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
14402 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
14403 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
14404 I40E_FLAG_DCB_ENABLED);
14405 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
14408 /* limit lan qps to the smaller of qps, cpus or msix */
14409 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
14410 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
14411 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
14412 pf->num_lan_qps = q_max;
14414 queues_left -= pf->num_lan_qps;
14417 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14418 if (queues_left > 1) {
14419 queues_left -= 1; /* save 1 queue for FD */
14421 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
14422 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14423 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
14427 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14428 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
14429 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
14430 (queues_left / pf->num_vf_qps));
14431 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
14434 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
14435 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
14436 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
14437 (queues_left / pf->num_vmdq_qps));
14438 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
14441 pf->queues_left = queues_left;
14442 dev_dbg(&pf->pdev->dev,
14443 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
14444 pf->hw.func_caps.num_tx_qp,
14445 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
14446 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
14447 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
14452 * i40e_setup_pf_filter_control - Setup PF static filter control
14453 * @pf: PF to be setup
14455 * i40e_setup_pf_filter_control sets up a PF's initial filter control
14456 * settings. If PE/FCoE are enabled then it will also set the per PF
14457 * based filter sizes required for them. It also enables Flow director,
14458 * ethertype and macvlan type filter settings for the pf.
14460 * Returns 0 on success, negative on failure
14462 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
14464 struct i40e_filter_control_settings *settings = &pf->filter_settings;
14466 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
14468 /* Flow Director is enabled */
14469 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
14470 settings->enable_fdir = true;
14472 /* Ethtype and MACVLAN filters enabled for PF */
14473 settings->enable_ethtype = true;
14474 settings->enable_macvlan = true;
14476 if (i40e_set_filter_control(&pf->hw, settings))
14482 #define INFO_STRING_LEN 255
14483 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
14484 static void i40e_print_features(struct i40e_pf *pf)
14486 struct i40e_hw *hw = &pf->hw;
14490 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
14494 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
14495 #ifdef CONFIG_PCI_IOV
14496 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
14498 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
14499 pf->hw.func_caps.num_vsis,
14500 pf->vsi[pf->lan_vsi]->num_queue_pairs);
14501 if (pf->flags & I40E_FLAG_RSS_ENABLED)
14502 i += snprintf(&buf[i], REMAIN(i), " RSS");
14503 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
14504 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
14505 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14506 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
14507 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
14509 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
14510 i += snprintf(&buf[i], REMAIN(i), " DCB");
14511 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
14512 i += snprintf(&buf[i], REMAIN(i), " Geneve");
14513 if (pf->flags & I40E_FLAG_PTP)
14514 i += snprintf(&buf[i], REMAIN(i), " PTP");
14515 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
14516 i += snprintf(&buf[i], REMAIN(i), " VEB");
14518 i += snprintf(&buf[i], REMAIN(i), " VEPA");
14520 dev_info(&pf->pdev->dev, "%s\n", buf);
14522 WARN_ON(i > INFO_STRING_LEN);
14526 * i40e_get_platform_mac_addr - get platform-specific MAC address
14527 * @pdev: PCI device information struct
14528 * @pf: board private structure
14530 * Look up the MAC address for the device. First we'll try
14531 * eth_platform_get_mac_address, which will check Open Firmware, or arch
14532 * specific fallback. Otherwise, we'll default to the stored value in
14535 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
14537 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
14538 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
14542 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
14543 * @fec_cfg: FEC option to set in flags
14544 * @flags: ptr to flags in which we set FEC option
14546 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
14548 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
14549 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
14550 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
14551 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
14552 *flags |= I40E_FLAG_RS_FEC;
14553 *flags &= ~I40E_FLAG_BASE_R_FEC;
14555 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
14556 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
14557 *flags |= I40E_FLAG_BASE_R_FEC;
14558 *flags &= ~I40E_FLAG_RS_FEC;
14561 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
14565 * i40e_check_recovery_mode - check if we are running transition firmware
14566 * @pf: board private structure
14568 * Check registers indicating the firmware runs in recovery mode. Sets the
14569 * appropriate driver state.
14571 * Returns true if the recovery mode was detected, false otherwise
14573 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
14575 u32 val = rd32(&pf->hw, I40E_GL_FWSTS) & I40E_GL_FWSTS_FWS1B_MASK;
14576 bool is_recovery_mode = false;
14578 if (pf->hw.mac.type == I40E_MAC_XL710)
14580 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK ||
14581 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK ||
14582 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_TRANSITION_MASK ||
14583 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_NVM_MASK;
14584 if (pf->hw.mac.type == I40E_MAC_X722)
14586 val == I40E_X722_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK ||
14587 val == I40E_X722_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK;
14588 if (is_recovery_mode) {
14589 dev_notice(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
14590 dev_notice(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
14591 set_bit(__I40E_RECOVERY_MODE, pf->state);
14595 if (test_and_clear_bit(__I40E_RECOVERY_MODE, pf->state))
14596 dev_info(&pf->pdev->dev, "Reinitializing in normal mode with full functionality.\n");
14602 * i40e_pf_loop_reset - perform reset in a loop.
14603 * @pf: board private structure
14605 * This function is useful when a NIC is about to enter recovery mode.
14606 * When a NIC's internal data structures are corrupted the NIC's
14607 * firmware is going to enter recovery mode.
14608 * Right after a POR it takes about 7 minutes for firmware to enter
14609 * recovery mode. Until that time a NIC is in some kind of intermediate
14610 * state. After that time period the NIC almost surely enters
14611 * recovery mode. The only way for a driver to detect intermediate
14612 * state is to issue a series of pf-resets and check a return value.
14613 * If a PF reset returns success then the firmware could be in recovery
14614 * mode so the caller of this code needs to check for recovery mode
14615 * if this function returns success. There is a little chance that
14616 * firmware will hang in intermediate state forever.
14617 * Since waiting 7 minutes is quite a lot of time this function waits
14618 * 10 seconds and then gives up by returning an error.
14620 * Return 0 on success, negative on failure.
14622 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
14624 const unsigned short MAX_CNT = 1000;
14625 const unsigned short MSECS = 10;
14626 struct i40e_hw *hw = &pf->hw;
14630 for (cnt = 0; cnt < MAX_CNT; ++cnt) {
14631 ret = i40e_pf_reset(hw);
14637 if (cnt == MAX_CNT) {
14638 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
14647 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
14648 * @pf: board private structure
14649 * @hw: ptr to the hardware info
14651 * This function does a minimal setup of all subsystems needed for running
14654 * Returns 0 on success, negative on failure
14656 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
14658 struct i40e_vsi *vsi;
14662 pci_save_state(pf->pdev);
14664 /* set up periodic task facility */
14665 timer_setup(&pf->service_timer, i40e_service_timer, 0);
14666 pf->service_timer_period = HZ;
14668 INIT_WORK(&pf->service_task, i40e_service_task);
14669 clear_bit(__I40E_SERVICE_SCHED, pf->state);
14671 err = i40e_init_interrupt_scheme(pf);
14673 goto err_switch_setup;
14675 /* The number of VSIs reported by the FW is the minimum guaranteed
14676 * to us; HW supports far more and we share the remaining pool with
14677 * the other PFs. We allocate space for more than the guarantee with
14678 * the understanding that we might not get them all later.
14680 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
14681 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
14683 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
14685 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
14686 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
14690 goto err_switch_setup;
14693 /* We allocate one VSI which is needed as absolute minimum
14694 * in order to register the netdev
14696 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
14698 goto err_switch_setup;
14699 pf->lan_vsi = v_idx;
14700 vsi = pf->vsi[v_idx];
14702 goto err_switch_setup;
14703 vsi->alloc_queue_pairs = 1;
14704 err = i40e_config_netdev(vsi);
14706 goto err_switch_setup;
14707 err = register_netdev(vsi->netdev);
14709 goto err_switch_setup;
14710 vsi->netdev_registered = true;
14711 i40e_dbg_pf_init(pf);
14713 err = i40e_setup_misc_vector_for_recovery_mode(pf);
14715 goto err_switch_setup;
14717 /* tell the firmware that we're starting */
14718 i40e_send_version(pf);
14720 /* since everything's happy, start the service_task timer */
14721 mod_timer(&pf->service_timer,
14722 round_jiffies(jiffies + pf->service_timer_period));
14727 i40e_reset_interrupt_capability(pf);
14728 del_timer_sync(&pf->service_timer);
14729 i40e_shutdown_adminq(hw);
14730 iounmap(hw->hw_addr);
14731 pci_disable_pcie_error_reporting(pf->pdev);
14732 pci_release_mem_regions(pf->pdev);
14733 pci_disable_device(pf->pdev);
14740 * i40e_probe - Device initialization routine
14741 * @pdev: PCI device information struct
14742 * @ent: entry in i40e_pci_tbl
14744 * i40e_probe initializes a PF identified by a pci_dev structure.
14745 * The OS initialization, configuring of the PF private structure,
14746 * and a hardware reset occur.
14748 * Returns 0 on success, negative on failure
14750 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
14752 struct i40e_aq_get_phy_abilities_resp abilities;
14753 struct i40e_pf *pf;
14754 struct i40e_hw *hw;
14755 static u16 pfs_found;
14763 err = pci_enable_device_mem(pdev);
14767 /* set up for high or low dma */
14768 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
14770 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
14772 dev_err(&pdev->dev,
14773 "DMA configuration failed: 0x%x\n", err);
14778 /* set up pci connections */
14779 err = pci_request_mem_regions(pdev, i40e_driver_name);
14781 dev_info(&pdev->dev,
14782 "pci_request_selected_regions failed %d\n", err);
14786 pci_enable_pcie_error_reporting(pdev);
14787 pci_set_master(pdev);
14789 /* Now that we have a PCI connection, we need to do the
14790 * low level device setup. This is primarily setting up
14791 * the Admin Queue structures and then querying for the
14792 * device's current profile information.
14794 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
14801 set_bit(__I40E_DOWN, pf->state);
14806 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
14807 I40E_MAX_CSR_SPACE);
14808 /* We believe that the highest register to read is
14809 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
14810 * is not less than that before mapping to prevent a
14813 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
14814 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
14819 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
14820 if (!hw->hw_addr) {
14822 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
14823 (unsigned int)pci_resource_start(pdev, 0),
14824 pf->ioremap_len, err);
14827 hw->vendor_id = pdev->vendor;
14828 hw->device_id = pdev->device;
14829 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
14830 hw->subsystem_vendor_id = pdev->subsystem_vendor;
14831 hw->subsystem_device_id = pdev->subsystem_device;
14832 hw->bus.device = PCI_SLOT(pdev->devfn);
14833 hw->bus.func = PCI_FUNC(pdev->devfn);
14834 hw->bus.bus_id = pdev->bus->number;
14835 pf->instance = pfs_found;
14837 /* Select something other than the 802.1ad ethertype for the
14838 * switch to use internally and drop on ingress.
14840 hw->switch_tag = 0xffff;
14841 hw->first_tag = ETH_P_8021AD;
14842 hw->second_tag = ETH_P_8021Q;
14844 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
14845 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
14846 INIT_LIST_HEAD(&pf->ddp_old_prof);
14848 /* set up the locks for the AQ, do this only once in probe
14849 * and destroy them only once in remove
14851 mutex_init(&hw->aq.asq_mutex);
14852 mutex_init(&hw->aq.arq_mutex);
14854 pf->msg_enable = netif_msg_init(debug,
14859 pf->hw.debug_mask = debug;
14861 /* do a special CORER for clearing PXE mode once at init */
14862 if (hw->revision_id == 0 &&
14863 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
14864 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
14869 i40e_clear_pxe_mode(hw);
14872 /* Reset here to make sure all is clean and to define PF 'n' */
14875 err = i40e_set_mac_type(hw);
14877 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
14882 err = i40e_pf_loop_reset(pf);
14884 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
14888 i40e_check_recovery_mode(pf);
14890 hw->aq.num_arq_entries = I40E_AQ_LEN;
14891 hw->aq.num_asq_entries = I40E_AQ_LEN;
14892 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
14893 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
14894 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
14896 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
14898 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
14900 err = i40e_init_shared_code(hw);
14902 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
14907 /* set up a default setting for link flow control */
14908 pf->hw.fc.requested_mode = I40E_FC_NONE;
14910 err = i40e_init_adminq(hw);
14912 if (err == I40E_ERR_FIRMWARE_API_VERSION)
14913 dev_info(&pdev->dev,
14914 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
14915 hw->aq.api_maj_ver,
14916 hw->aq.api_min_ver,
14917 I40E_FW_API_VERSION_MAJOR,
14918 I40E_FW_MINOR_VERSION(hw));
14920 dev_info(&pdev->dev,
14921 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
14925 i40e_get_oem_version(hw);
14927 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
14928 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
14929 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
14930 hw->aq.api_maj_ver, hw->aq.api_min_ver,
14931 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
14932 hw->subsystem_vendor_id, hw->subsystem_device_id);
14934 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
14935 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
14936 dev_info(&pdev->dev,
14937 "The driver for the device detected a newer version of the NVM image v%u.%u than expected v%u.%u. Please install the most recent version of the network driver.\n",
14938 hw->aq.api_maj_ver,
14939 hw->aq.api_min_ver,
14940 I40E_FW_API_VERSION_MAJOR,
14941 I40E_FW_MINOR_VERSION(hw));
14942 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
14943 dev_info(&pdev->dev,
14944 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
14945 hw->aq.api_maj_ver,
14946 hw->aq.api_min_ver,
14947 I40E_FW_API_VERSION_MAJOR,
14948 I40E_FW_MINOR_VERSION(hw));
14950 i40e_verify_eeprom(pf);
14952 /* Rev 0 hardware was never productized */
14953 if (hw->revision_id < 1)
14954 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
14956 i40e_clear_pxe_mode(hw);
14958 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
14960 goto err_adminq_setup;
14962 err = i40e_sw_init(pf);
14964 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
14968 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
14969 return i40e_init_recovery_mode(pf, hw);
14971 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
14972 hw->func_caps.num_rx_qp, 0, 0);
14974 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
14975 goto err_init_lan_hmc;
14978 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
14980 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
14982 goto err_configure_lan_hmc;
14985 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
14986 * Ignore error return codes because if it was already disabled via
14987 * hardware settings this will fail
14989 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
14990 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
14991 i40e_aq_stop_lldp(hw, true, false, NULL);
14994 /* allow a platform config to override the HW addr */
14995 i40e_get_platform_mac_addr(pdev, pf);
14997 if (!is_valid_ether_addr(hw->mac.addr)) {
14998 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15002 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15003 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15004 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15005 if (is_valid_ether_addr(hw->mac.port_addr))
15006 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15008 pci_set_drvdata(pdev, pf);
15009 pci_save_state(pdev);
15011 dev_info(&pdev->dev,
15012 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15013 "FW LLDP is disabled\n" :
15014 "FW LLDP is enabled\n");
15016 /* Enable FW to write default DCB config on link-up */
15017 i40e_aq_set_dcb_parameters(hw, true, NULL);
15019 #ifdef CONFIG_I40E_DCB
15020 err = i40e_init_pf_dcb(pf);
15022 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15023 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15024 /* Continue without DCB enabled */
15026 #endif /* CONFIG_I40E_DCB */
15028 /* set up periodic task facility */
15029 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15030 pf->service_timer_period = HZ;
15032 INIT_WORK(&pf->service_task, i40e_service_task);
15033 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15035 /* NVM bit on means WoL disabled for the port */
15036 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15037 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15038 pf->wol_en = false;
15041 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15043 /* set up the main switch operations */
15044 i40e_determine_queue_usage(pf);
15045 err = i40e_init_interrupt_scheme(pf);
15047 goto err_switch_setup;
15049 /* The number of VSIs reported by the FW is the minimum guaranteed
15050 * to us; HW supports far more and we share the remaining pool with
15051 * the other PFs. We allocate space for more than the guarantee with
15052 * the understanding that we might not get them all later.
15054 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15055 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15057 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15059 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15060 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15064 goto err_switch_setup;
15067 #ifdef CONFIG_PCI_IOV
15068 /* prep for VF support */
15069 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15070 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15071 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15072 if (pci_num_vf(pdev))
15073 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15076 err = i40e_setup_pf_switch(pf, false);
15078 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15081 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15083 /* Make sure flow control is set according to current settings */
15084 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
15085 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
15086 dev_dbg(&pf->pdev->dev,
15087 "Set fc with err %s aq_err %s on get_phy_cap\n",
15088 i40e_stat_str(hw, err),
15089 i40e_aq_str(hw, hw->aq.asq_last_status));
15090 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
15091 dev_dbg(&pf->pdev->dev,
15092 "Set fc with err %s aq_err %s on set_phy_config\n",
15093 i40e_stat_str(hw, err),
15094 i40e_aq_str(hw, hw->aq.asq_last_status));
15095 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
15096 dev_dbg(&pf->pdev->dev,
15097 "Set fc with err %s aq_err %s on get_link_info\n",
15098 i40e_stat_str(hw, err),
15099 i40e_aq_str(hw, hw->aq.asq_last_status));
15101 /* if FDIR VSI was set up, start it now */
15102 for (i = 0; i < pf->num_alloc_vsi; i++) {
15103 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15104 i40e_vsi_open(pf->vsi[i]);
15109 /* The driver only wants link up/down and module qualification
15110 * reports from firmware. Note the negative logic.
15112 err = i40e_aq_set_phy_int_mask(&pf->hw,
15113 ~(I40E_AQ_EVENT_LINK_UPDOWN |
15114 I40E_AQ_EVENT_MEDIA_NA |
15115 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15117 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15118 i40e_stat_str(&pf->hw, err),
15119 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15121 /* Reconfigure hardware for allowing smaller MSS in the case
15122 * of TSO, so that we avoid the MDD being fired and causing
15123 * a reset in the case of small MSS+TSO.
15125 val = rd32(hw, I40E_REG_MSS);
15126 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15127 val &= ~I40E_REG_MSS_MIN_MASK;
15128 val |= I40E_64BYTE_MSS;
15129 wr32(hw, I40E_REG_MSS, val);
15132 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15134 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15136 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15137 i40e_stat_str(&pf->hw, err),
15138 i40e_aq_str(&pf->hw,
15139 pf->hw.aq.asq_last_status));
15141 /* The main driver is (mostly) up and happy. We need to set this state
15142 * before setting up the misc vector or we get a race and the vector
15143 * ends up disabled forever.
15145 clear_bit(__I40E_DOWN, pf->state);
15147 /* In case of MSIX we are going to setup the misc vector right here
15148 * to handle admin queue events etc. In case of legacy and MSI
15149 * the misc functionality and queue processing is combined in
15150 * the same vector and that gets setup at open.
15152 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15153 err = i40e_setup_misc_vector(pf);
15155 dev_info(&pdev->dev,
15156 "setup of misc vector failed: %d\n", err);
15161 #ifdef CONFIG_PCI_IOV
15162 /* prep for VF support */
15163 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15164 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15165 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15166 /* disable link interrupts for VFs */
15167 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15168 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15169 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15172 if (pci_num_vf(pdev)) {
15173 dev_info(&pdev->dev,
15174 "Active VFs found, allocating resources.\n");
15175 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15177 dev_info(&pdev->dev,
15178 "Error %d allocating resources for existing VFs\n",
15182 #endif /* CONFIG_PCI_IOV */
15184 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15185 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15186 pf->num_iwarp_msix,
15187 I40E_IWARP_IRQ_PILE_ID);
15188 if (pf->iwarp_base_vector < 0) {
15189 dev_info(&pdev->dev,
15190 "failed to get tracking for %d vectors for IWARP err=%d\n",
15191 pf->num_iwarp_msix, pf->iwarp_base_vector);
15192 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15196 i40e_dbg_pf_init(pf);
15198 /* tell the firmware that we're starting */
15199 i40e_send_version(pf);
15201 /* since everything's happy, start the service_task timer */
15202 mod_timer(&pf->service_timer,
15203 round_jiffies(jiffies + pf->service_timer_period));
15205 /* add this PF to client device list and launch a client service task */
15206 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15207 err = i40e_lan_add_device(pf);
15209 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15213 #define PCI_SPEED_SIZE 8
15214 #define PCI_WIDTH_SIZE 8
15215 /* Devices on the IOSF bus do not have this information
15216 * and will report PCI Gen 1 x 1 by default so don't bother
15219 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15220 char speed[PCI_SPEED_SIZE] = "Unknown";
15221 char width[PCI_WIDTH_SIZE] = "Unknown";
15223 /* Get the negotiated link width and speed from PCI config
15226 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15229 i40e_set_pci_config_data(hw, link_status);
15231 switch (hw->bus.speed) {
15232 case i40e_bus_speed_8000:
15233 strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15234 case i40e_bus_speed_5000:
15235 strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15236 case i40e_bus_speed_2500:
15237 strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15241 switch (hw->bus.width) {
15242 case i40e_bus_width_pcie_x8:
15243 strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15244 case i40e_bus_width_pcie_x4:
15245 strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15246 case i40e_bus_width_pcie_x2:
15247 strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15248 case i40e_bus_width_pcie_x1:
15249 strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15254 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15257 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15258 hw->bus.speed < i40e_bus_speed_8000) {
15259 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15260 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15264 /* get the requested speeds from the fw */
15265 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15267 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
15268 i40e_stat_str(&pf->hw, err),
15269 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15270 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15272 /* set the FEC config due to the board capabilities */
15273 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15275 /* get the supported phy types from the fw */
15276 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15278 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
15279 i40e_stat_str(&pf->hw, err),
15280 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15282 /* Add a filter to drop all Flow control frames from any VSI from being
15283 * transmitted. By doing so we stop a malicious VF from sending out
15284 * PAUSE or PFC frames and potentially controlling traffic for other
15286 * The FW can still send Flow control frames if enabled.
15288 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15289 pf->main_vsi_seid);
15291 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15292 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15293 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15294 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15295 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15296 /* print a string summarizing features */
15297 i40e_print_features(pf);
15301 /* Unwind what we've done if something failed in the setup */
15303 set_bit(__I40E_DOWN, pf->state);
15304 i40e_clear_interrupt_scheme(pf);
15307 i40e_reset_interrupt_capability(pf);
15308 del_timer_sync(&pf->service_timer);
15310 err_configure_lan_hmc:
15311 (void)i40e_shutdown_lan_hmc(hw);
15313 kfree(pf->qp_pile);
15317 iounmap(hw->hw_addr);
15321 pci_disable_pcie_error_reporting(pdev);
15322 pci_release_mem_regions(pdev);
15325 pci_disable_device(pdev);
15330 * i40e_remove - Device removal routine
15331 * @pdev: PCI device information struct
15333 * i40e_remove is called by the PCI subsystem to alert the driver
15334 * that is should release a PCI device. This could be caused by a
15335 * Hot-Plug event, or because the driver is going to be removed from
15338 static void i40e_remove(struct pci_dev *pdev)
15340 struct i40e_pf *pf = pci_get_drvdata(pdev);
15341 struct i40e_hw *hw = &pf->hw;
15342 i40e_status ret_code;
15345 i40e_dbg_pf_exit(pf);
15349 /* Disable RSS in hw */
15350 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
15351 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
15353 /* no more scheduling of any task */
15354 set_bit(__I40E_SUSPENDED, pf->state);
15355 set_bit(__I40E_DOWN, pf->state);
15356 if (pf->service_timer.function)
15357 del_timer_sync(&pf->service_timer);
15358 if (pf->service_task.func)
15359 cancel_work_sync(&pf->service_task);
15361 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
15362 struct i40e_vsi *vsi = pf->vsi[0];
15364 /* We know that we have allocated only one vsi for this PF,
15365 * it was just for registering netdevice, so the interface
15366 * could be visible in the 'ifconfig' output
15368 unregister_netdev(vsi->netdev);
15369 free_netdev(vsi->netdev);
15374 /* Client close must be called explicitly here because the timer
15375 * has been stopped.
15377 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15379 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
15381 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
15384 i40e_fdir_teardown(pf);
15386 /* If there is a switch structure or any orphans, remove them.
15387 * This will leave only the PF's VSI remaining.
15389 for (i = 0; i < I40E_MAX_VEB; i++) {
15393 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
15394 pf->veb[i]->uplink_seid == 0)
15395 i40e_switch_branch_release(pf->veb[i]);
15398 /* Now we can shutdown the PF's VSI, just before we kill
15401 if (pf->vsi[pf->lan_vsi])
15402 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
15404 i40e_cloud_filter_exit(pf);
15406 /* remove attached clients */
15407 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15408 ret_code = i40e_lan_del_device(pf);
15410 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
15414 /* shutdown and destroy the HMC */
15415 if (hw->hmc.hmc_obj) {
15416 ret_code = i40e_shutdown_lan_hmc(hw);
15418 dev_warn(&pdev->dev,
15419 "Failed to destroy the HMC resources: %d\n",
15424 /* Free MSI/legacy interrupt 0 when in recovery mode. */
15425 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15426 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15427 free_irq(pf->pdev->irq, pf);
15429 /* shutdown the adminq */
15430 i40e_shutdown_adminq(hw);
15432 /* destroy the locks only once, here */
15433 mutex_destroy(&hw->aq.arq_mutex);
15434 mutex_destroy(&hw->aq.asq_mutex);
15436 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
15438 i40e_clear_interrupt_scheme(pf);
15439 for (i = 0; i < pf->num_alloc_vsi; i++) {
15441 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
15442 i40e_vsi_clear_rings(pf->vsi[i]);
15443 i40e_vsi_clear(pf->vsi[i]);
15449 for (i = 0; i < I40E_MAX_VEB; i++) {
15454 kfree(pf->qp_pile);
15457 iounmap(hw->hw_addr);
15459 pci_release_mem_regions(pdev);
15461 pci_disable_pcie_error_reporting(pdev);
15462 pci_disable_device(pdev);
15466 * i40e_pci_error_detected - warning that something funky happened in PCI land
15467 * @pdev: PCI device information struct
15468 * @error: the type of PCI error
15470 * Called to warn that something happened and the error handling steps
15471 * are in progress. Allows the driver to quiesce things, be ready for
15474 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
15475 enum pci_channel_state error)
15477 struct i40e_pf *pf = pci_get_drvdata(pdev);
15479 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
15482 dev_info(&pdev->dev,
15483 "Cannot recover - error happened during device probe\n");
15484 return PCI_ERS_RESULT_DISCONNECT;
15487 /* shutdown all operations */
15488 if (!test_bit(__I40E_SUSPENDED, pf->state))
15489 i40e_prep_for_reset(pf, false);
15491 /* Request a slot reset */
15492 return PCI_ERS_RESULT_NEED_RESET;
15496 * i40e_pci_error_slot_reset - a PCI slot reset just happened
15497 * @pdev: PCI device information struct
15499 * Called to find if the driver can work with the device now that
15500 * the pci slot has been reset. If a basic connection seems good
15501 * (registers are readable and have sane content) then return a
15502 * happy little PCI_ERS_RESULT_xxx.
15504 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
15506 struct i40e_pf *pf = pci_get_drvdata(pdev);
15507 pci_ers_result_t result;
15510 dev_dbg(&pdev->dev, "%s\n", __func__);
15511 if (pci_enable_device_mem(pdev)) {
15512 dev_info(&pdev->dev,
15513 "Cannot re-enable PCI device after reset.\n");
15514 result = PCI_ERS_RESULT_DISCONNECT;
15516 pci_set_master(pdev);
15517 pci_restore_state(pdev);
15518 pci_save_state(pdev);
15519 pci_wake_from_d3(pdev, false);
15521 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
15523 result = PCI_ERS_RESULT_RECOVERED;
15525 result = PCI_ERS_RESULT_DISCONNECT;
15532 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
15533 * @pdev: PCI device information struct
15535 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
15537 struct i40e_pf *pf = pci_get_drvdata(pdev);
15539 i40e_prep_for_reset(pf, false);
15543 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
15544 * @pdev: PCI device information struct
15546 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
15548 struct i40e_pf *pf = pci_get_drvdata(pdev);
15550 i40e_reset_and_rebuild(pf, false, false);
15554 * i40e_pci_error_resume - restart operations after PCI error recovery
15555 * @pdev: PCI device information struct
15557 * Called to allow the driver to bring things back up after PCI error
15558 * and/or reset recovery has finished.
15560 static void i40e_pci_error_resume(struct pci_dev *pdev)
15562 struct i40e_pf *pf = pci_get_drvdata(pdev);
15564 dev_dbg(&pdev->dev, "%s\n", __func__);
15565 if (test_bit(__I40E_SUSPENDED, pf->state))
15568 i40e_handle_reset_warning(pf, false);
15572 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
15573 * using the mac_address_write admin q function
15574 * @pf: pointer to i40e_pf struct
15576 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
15578 struct i40e_hw *hw = &pf->hw;
15583 /* Get current MAC address in case it's an LAA */
15584 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
15585 ether_addr_copy(mac_addr,
15586 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
15588 dev_err(&pf->pdev->dev,
15589 "Failed to retrieve MAC address; using default\n");
15590 ether_addr_copy(mac_addr, hw->mac.addr);
15593 /* The FW expects the mac address write cmd to first be called with
15594 * one of these flags before calling it again with the multicast
15597 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
15599 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
15600 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
15602 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
15604 dev_err(&pf->pdev->dev,
15605 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
15609 flags = I40E_AQC_MC_MAG_EN
15610 | I40E_AQC_WOL_PRESERVE_ON_PFR
15611 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
15612 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
15614 dev_err(&pf->pdev->dev,
15615 "Failed to enable Multicast Magic Packet wake up\n");
15619 * i40e_shutdown - PCI callback for shutting down
15620 * @pdev: PCI device information struct
15622 static void i40e_shutdown(struct pci_dev *pdev)
15624 struct i40e_pf *pf = pci_get_drvdata(pdev);
15625 struct i40e_hw *hw = &pf->hw;
15627 set_bit(__I40E_SUSPENDED, pf->state);
15628 set_bit(__I40E_DOWN, pf->state);
15630 del_timer_sync(&pf->service_timer);
15631 cancel_work_sync(&pf->service_task);
15632 i40e_cloud_filter_exit(pf);
15633 i40e_fdir_teardown(pf);
15635 /* Client close must be called explicitly here because the timer
15636 * has been stopped.
15638 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15640 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
15641 i40e_enable_mc_magic_wake(pf);
15643 i40e_prep_for_reset(pf, false);
15645 wr32(hw, I40E_PFPM_APM,
15646 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
15647 wr32(hw, I40E_PFPM_WUFC,
15648 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
15650 /* Free MSI/legacy interrupt 0 when in recovery mode. */
15651 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15652 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15653 free_irq(pf->pdev->irq, pf);
15655 /* Since we're going to destroy queues during the
15656 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
15660 i40e_clear_interrupt_scheme(pf);
15663 if (system_state == SYSTEM_POWER_OFF) {
15664 pci_wake_from_d3(pdev, pf->wol_en);
15665 pci_set_power_state(pdev, PCI_D3hot);
15670 * i40e_suspend - PM callback for moving to D3
15671 * @dev: generic device information structure
15673 static int __maybe_unused i40e_suspend(struct device *dev)
15675 struct i40e_pf *pf = dev_get_drvdata(dev);
15676 struct i40e_hw *hw = &pf->hw;
15678 /* If we're already suspended, then there is nothing to do */
15679 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
15682 set_bit(__I40E_DOWN, pf->state);
15684 /* Ensure service task will not be running */
15685 del_timer_sync(&pf->service_timer);
15686 cancel_work_sync(&pf->service_task);
15688 /* Client close must be called explicitly here because the timer
15689 * has been stopped.
15691 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15693 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
15694 i40e_enable_mc_magic_wake(pf);
15696 /* Since we're going to destroy queues during the
15697 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
15702 i40e_prep_for_reset(pf, true);
15704 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
15705 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
15707 /* Clear the interrupt scheme and release our IRQs so that the system
15708 * can safely hibernate even when there are a large number of CPUs.
15709 * Otherwise hibernation might fail when mapping all the vectors back
15712 i40e_clear_interrupt_scheme(pf);
15720 * i40e_resume - PM callback for waking up from D3
15721 * @dev: generic device information structure
15723 static int __maybe_unused i40e_resume(struct device *dev)
15725 struct i40e_pf *pf = dev_get_drvdata(dev);
15728 /* If we're not suspended, then there is nothing to do */
15729 if (!test_bit(__I40E_SUSPENDED, pf->state))
15732 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
15733 * since we're going to be restoring queues
15737 /* We cleared the interrupt scheme when we suspended, so we need to
15738 * restore it now to resume device functionality.
15740 err = i40e_restore_interrupt_scheme(pf);
15742 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
15746 clear_bit(__I40E_DOWN, pf->state);
15747 i40e_reset_and_rebuild(pf, false, true);
15751 /* Clear suspended state last after everything is recovered */
15752 clear_bit(__I40E_SUSPENDED, pf->state);
15754 /* Restart the service task */
15755 mod_timer(&pf->service_timer,
15756 round_jiffies(jiffies + pf->service_timer_period));
15761 static const struct pci_error_handlers i40e_err_handler = {
15762 .error_detected = i40e_pci_error_detected,
15763 .slot_reset = i40e_pci_error_slot_reset,
15764 .reset_prepare = i40e_pci_error_reset_prepare,
15765 .reset_done = i40e_pci_error_reset_done,
15766 .resume = i40e_pci_error_resume,
15769 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
15771 static struct pci_driver i40e_driver = {
15772 .name = i40e_driver_name,
15773 .id_table = i40e_pci_tbl,
15774 .probe = i40e_probe,
15775 .remove = i40e_remove,
15777 .pm = &i40e_pm_ops,
15779 .shutdown = i40e_shutdown,
15780 .err_handler = &i40e_err_handler,
15781 .sriov_configure = i40e_pci_sriov_configure,
15785 * i40e_init_module - Driver registration routine
15787 * i40e_init_module is the first routine called when the driver is
15788 * loaded. All it does is register with the PCI subsystem.
15790 static int __init i40e_init_module(void)
15792 pr_info("%s: %s - version %s\n", i40e_driver_name,
15793 i40e_driver_string, i40e_driver_version_str);
15794 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
15796 /* There is no need to throttle the number of active tasks because
15797 * each device limits its own task using a state bit for scheduling
15798 * the service task, and the device tasks do not interfere with each
15799 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
15800 * since we need to be able to guarantee forward progress even under
15803 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
15805 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
15810 return pci_register_driver(&i40e_driver);
15812 module_init(i40e_init_module);
15815 * i40e_exit_module - Driver exit cleanup routine
15817 * i40e_exit_module is called just before the driver is removed
15820 static void __exit i40e_exit_module(void)
15822 pci_unregister_driver(&i40e_driver);
15823 destroy_workqueue(i40e_wq);
15826 module_exit(i40e_exit_module);