2 * Copyright (c) 2012 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
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6 * General Public License (GPL) Version 2, available from the file
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23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/device.h>
35 #include <linux/clocksource.h>
39 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
41 static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
43 struct mlx4_en_dev *mdev =
44 container_of(tc, struct mlx4_en_dev, cycles);
45 struct mlx4_dev *dev = mdev->dev;
47 return mlx4_read_clock(dev) & tc->mask;
50 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
53 struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
55 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
56 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
61 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
62 struct skb_shared_hwtstamps *hwts,
68 read_lock_irqsave(&mdev->clock_lock, flags);
69 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
70 read_unlock_irqrestore(&mdev->clock_lock, flags);
72 memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
73 hwts->hwtstamp = ns_to_ktime(nsec);
77 * mlx4_en_remove_timestamp - disable PTP device
78 * @mdev: board private structure
80 * Stop the PTP support.
82 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev)
84 if (mdev->ptp_clock) {
85 ptp_clock_unregister(mdev->ptp_clock);
86 mdev->ptp_clock = NULL;
87 mlx4_info(mdev, "removed PHC\n");
91 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
93 bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
94 mdev->overflow_period);
98 write_lock_irqsave(&mdev->clock_lock, flags);
99 timecounter_read(&mdev->clock);
100 write_unlock_irqrestore(&mdev->clock_lock, flags);
101 mdev->last_overflow_check = jiffies;
106 * mlx4_en_phc_adjfreq - adjust the frequency of the hardware clock
107 * @ptp: ptp clock structure
108 * @delta: Desired frequency change in parts per billion
110 * Adjust the frequency of the PHC cycle counter by the indicated delta from
111 * the base frequency.
113 static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
119 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
126 mult = mdev->nominal_c_mult;
129 diff = div_u64(adj, 1000000000ULL);
131 write_lock_irqsave(&mdev->clock_lock, flags);
132 timecounter_read(&mdev->clock);
133 mdev->cycles.mult = neg_adj ? mult - diff : mult + diff;
134 write_unlock_irqrestore(&mdev->clock_lock, flags);
140 * mlx4_en_phc_adjtime - Shift the time of the hardware clock
141 * @ptp: ptp clock structure
142 * @delta: Desired change in nanoseconds
144 * Adjust the timer by resetting the timecounter structure.
146 static int mlx4_en_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
148 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
152 write_lock_irqsave(&mdev->clock_lock, flags);
153 timecounter_adjtime(&mdev->clock, delta);
154 write_unlock_irqrestore(&mdev->clock_lock, flags);
160 * mlx4_en_phc_gettime - Reads the current time from the hardware clock
161 * @ptp: ptp clock structure
162 * @ts: timespec structure to hold the current time value
164 * Read the timecounter and return the correct value in ns after converting
165 * it into a struct timespec.
167 static int mlx4_en_phc_gettime(struct ptp_clock_info *ptp,
168 struct timespec64 *ts)
170 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
175 write_lock_irqsave(&mdev->clock_lock, flags);
176 ns = timecounter_read(&mdev->clock);
177 write_unlock_irqrestore(&mdev->clock_lock, flags);
179 *ts = ns_to_timespec64(ns);
185 * mlx4_en_phc_settime - Set the current time on the hardware clock
186 * @ptp: ptp clock structure
187 * @ts: timespec containing the new time for the cycle counter
189 * Reset the timecounter to use a new base value instead of the kernel
192 static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
193 const struct timespec64 *ts)
195 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
197 u64 ns = timespec64_to_ns(ts);
200 /* reset the timecounter */
201 write_lock_irqsave(&mdev->clock_lock, flags);
202 timecounter_init(&mdev->clock, &mdev->cycles, ns);
203 write_unlock_irqrestore(&mdev->clock_lock, flags);
209 * mlx4_en_phc_enable - enable or disable an ancillary feature
210 * @ptp: ptp clock structure
211 * @request: Desired resource to enable or disable
212 * @on: Caller passes one to enable or zero to disable
214 * Enable (or disable) ancillary features of the PHC subsystem.
215 * Currently, no ancillary features are supported.
217 static int mlx4_en_phc_enable(struct ptp_clock_info __always_unused *ptp,
218 struct ptp_clock_request __always_unused *request,
219 int __always_unused on)
224 static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
225 .owner = THIS_MODULE,
226 .max_adj = 100000000,
232 .adjfreq = mlx4_en_phc_adjfreq,
233 .adjtime = mlx4_en_phc_adjtime,
234 .gettime64 = mlx4_en_phc_gettime,
235 .settime64 = mlx4_en_phc_settime,
236 .enable = mlx4_en_phc_enable,
239 #define MLX4_EN_WRAP_AROUND_SEC 10ULL
241 /* This function calculates the max shift that enables the user range
242 * of MLX4_EN_WRAP_AROUND_SEC values in the cycles register.
244 static u32 freq_to_shift(u16 freq)
246 u32 freq_khz = freq * 1000;
247 u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;
249 roundup_pow_of_two(max_val_cycles) > max_val_cycles ?
250 roundup_pow_of_two(max_val_cycles) - 1 : UINT_MAX;
251 u64 max_val_cycles_rounded = is_power_of_2(max_val_cycles + 1) ?
252 max_val_cycles : tmp_rounded;
253 /* calculate max possible multiplier in order to fit in 64bit */
254 u64 max_mul = div_u64(0xffffffffffffffffULL, max_val_cycles_rounded);
256 /* This comes from the reverse of clocksource_khz2mult */
257 return ilog2(div_u64(max_mul * freq_khz, 1000000));
260 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
262 struct mlx4_dev *dev = mdev->dev;
266 /* mlx4_en_init_timestamp is called for each netdev.
267 * mdev->ptp_clock is common for all ports, skip initialization if
268 * was done for other port.
273 rwlock_init(&mdev->clock_lock);
275 memset(&mdev->cycles, 0, sizeof(mdev->cycles));
276 mdev->cycles.read = mlx4_en_read_clock;
277 mdev->cycles.mask = CLOCKSOURCE_MASK(48);
278 mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock);
280 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
281 mdev->nominal_c_mult = mdev->cycles.mult;
283 write_lock_irqsave(&mdev->clock_lock, flags);
284 timecounter_init(&mdev->clock, &mdev->cycles,
285 ktime_to_ns(ktime_get_real()));
286 write_unlock_irqrestore(&mdev->clock_lock, flags);
288 /* Calculate period in seconds to call the overflow watchdog - to make
289 * sure counter is checked at least once every wrap around.
291 ns = cyclecounter_cyc2ns(&mdev->cycles, mdev->cycles.mask, zero, &zero);
292 do_div(ns, NSEC_PER_SEC / 2 / HZ);
293 mdev->overflow_period = ns;
295 /* Configure the PHC */
296 mdev->ptp_clock_info = mlx4_en_ptp_clock_info;
297 snprintf(mdev->ptp_clock_info.name, 16, "mlx4 ptp");
299 mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info,
301 if (IS_ERR(mdev->ptp_clock)) {
302 mdev->ptp_clock = NULL;
303 mlx4_err(mdev, "ptp_clock_register failed\n");
304 } else if (mdev->ptp_clock) {
305 mlx4_info(mdev, "registered PHC clock\n");