1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Mellanox Technologies.
7 int mlx5e_reporter_named_obj_nest_start(struct devlink_fmsg *fmsg, char *name)
11 err = devlink_fmsg_pair_nest_start(fmsg, name);
15 err = devlink_fmsg_obj_nest_start(fmsg);
22 int mlx5e_reporter_named_obj_nest_end(struct devlink_fmsg *fmsg)
26 err = devlink_fmsg_obj_nest_end(fmsg);
30 err = devlink_fmsg_pair_nest_end(fmsg);
37 int mlx5e_reporter_cq_diagnose(struct mlx5e_cq *cq, struct devlink_fmsg *fmsg)
39 struct mlx5e_priv *priv = cq->channel->priv;
40 u32 out[MLX5_ST_SZ_DW(query_cq_out)] = {};
45 err = mlx5_core_query_cq(priv->mdev, &cq->mcq, out, sizeof(out));
49 cqc = MLX5_ADDR_OF(query_cq_out, out, cq_context);
50 hw_status = MLX5_GET(cqc, cqc, status);
52 err = mlx5e_reporter_named_obj_nest_start(fmsg, "CQ");
56 err = devlink_fmsg_u32_pair_put(fmsg, "cqn", cq->mcq.cqn);
60 err = devlink_fmsg_u8_pair_put(fmsg, "HW status", hw_status);
64 err = mlx5e_reporter_named_obj_nest_end(fmsg);
71 int mlx5e_reporter_cq_common_diagnose(struct mlx5e_cq *cq, struct devlink_fmsg *fmsg)
77 cq_sz = mlx5_cqwq_get_size(&cq->wq);
78 cq_log_stride = mlx5_cqwq_get_log_stride_size(&cq->wq);
80 err = mlx5e_reporter_named_obj_nest_start(fmsg, "CQ");
84 err = devlink_fmsg_u64_pair_put(fmsg, "stride size", BIT(cq_log_stride));
88 err = devlink_fmsg_u32_pair_put(fmsg, "size", cq_sz);
92 err = mlx5e_reporter_named_obj_nest_end(fmsg);
99 int mlx5e_health_create_reporters(struct mlx5e_priv *priv)
103 err = mlx5e_reporter_tx_create(priv);
107 err = mlx5e_reporter_rx_create(priv);
114 void mlx5e_health_destroy_reporters(struct mlx5e_priv *priv)
116 mlx5e_reporter_rx_destroy(priv);
117 mlx5e_reporter_tx_destroy(priv);
120 void mlx5e_health_channels_update(struct mlx5e_priv *priv)
122 if (priv->tx_reporter)
123 devlink_health_reporter_state_update(priv->tx_reporter,
124 DEVLINK_HEALTH_REPORTER_STATE_HEALTHY);
125 if (priv->rx_reporter)
126 devlink_health_reporter_state_update(priv->rx_reporter,
127 DEVLINK_HEALTH_REPORTER_STATE_HEALTHY);
130 int mlx5e_health_sq_to_ready(struct mlx5e_channel *channel, u32 sqn)
132 struct mlx5_core_dev *mdev = channel->mdev;
133 struct net_device *dev = channel->netdev;
134 struct mlx5e_modify_sq_param msp = {};
137 msp.curr_state = MLX5_SQC_STATE_ERR;
138 msp.next_state = MLX5_SQC_STATE_RST;
140 err = mlx5e_modify_sq(mdev, sqn, &msp);
142 netdev_err(dev, "Failed to move sq 0x%x to reset\n", sqn);
146 memset(&msp, 0, sizeof(msp));
147 msp.curr_state = MLX5_SQC_STATE_RST;
148 msp.next_state = MLX5_SQC_STATE_RDY;
150 err = mlx5e_modify_sq(mdev, sqn, &msp);
152 netdev_err(dev, "Failed to move sq 0x%x to ready\n", sqn);
159 int mlx5e_health_recover_channels(struct mlx5e_priv *priv)
164 mutex_lock(&priv->state_lock);
166 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
169 err = mlx5e_safe_reopen_channels(priv);
172 mutex_unlock(&priv->state_lock);
178 int mlx5e_health_channel_eq_recover(struct mlx5_eq_comp *eq, struct mlx5e_channel *channel)
182 netdev_err(channel->netdev, "EQ 0x%x: Cons = 0x%x, irqn = 0x%x\n",
183 eq->core.eqn, eq->core.cons_index, eq->core.irqn);
185 eqe_count = mlx5_eq_poll_irq_disabled(eq);
189 netdev_err(channel->netdev, "Recovered %d eqes on EQ 0x%x\n",
190 eqe_count, eq->core.eqn);
192 channel->stats->eq_rearm++;
196 int mlx5e_health_report(struct mlx5e_priv *priv,
197 struct devlink_health_reporter *reporter, char *err_str,
198 struct mlx5e_err_ctx *err_ctx)
200 netdev_err(priv->netdev, err_str);
203 return err_ctx->recover(err_ctx->ctx);
205 return devlink_health_report(reporter, err_str, err_ctx);