2 * Copyright (c) 2018, Mellanox Technologies. All rights reserved.
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33 #include <linux/bpf_trace.h>
37 mlx5e_xmit_xdp_buff(struct mlx5e_xdpsq *sq, struct mlx5e_dma_info *di,
40 struct mlx5e_xdp_info xdpi;
42 xdpi.xdpf = convert_to_xdp_frame(xdp);
43 if (unlikely(!xdpi.xdpf))
45 xdpi.dma_addr = di->addr + (xdpi.xdpf->data - (void *)xdpi.xdpf);
46 dma_sync_single_for_device(sq->pdev, xdpi.dma_addr,
47 xdpi.xdpf->len, PCI_DMA_TODEVICE);
50 return mlx5e_xmit_xdp_frame(sq, &xdpi);
53 /* returns true if packet was consumed by xdp */
54 bool mlx5e_xdp_handle(struct mlx5e_rq *rq, struct mlx5e_dma_info *di,
55 void *va, u16 *rx_headroom, u32 *len)
57 struct bpf_prog *prog = READ_ONCE(rq->xdp_prog);
65 xdp.data = va + *rx_headroom;
66 xdp_set_data_meta_invalid(&xdp);
67 xdp.data_end = xdp.data + *len;
68 xdp.data_hard_start = va;
69 xdp.rxq = &rq->xdp_rxq;
71 act = bpf_prog_run_xdp(prog, &xdp);
74 *rx_headroom = xdp.data - xdp.data_hard_start;
75 *len = xdp.data_end - xdp.data;
78 if (unlikely(!mlx5e_xmit_xdp_buff(&rq->xdpsq, di, &xdp)))
80 __set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags); /* non-atomic */
83 /* When XDP enabled then page-refcnt==1 here */
84 err = xdp_do_redirect(rq->netdev, &xdp, prog);
87 __set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags);
88 rq->xdpsq.redirect_flush = true;
89 mlx5e_page_dma_unmap(rq, di);
90 rq->stats->xdp_redirect++;
93 bpf_warn_invalid_xdp_action(act);
96 trace_xdp_exception(rq->netdev, prog, act);
98 rq->stats->xdp_drop++;
103 bool mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xdp_info *xdpi)
105 struct mlx5_wq_cyc *wq = &sq->wq;
106 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
107 struct mlx5e_tx_wqe *wqe = mlx5_wq_cyc_get_wqe(wq, pi);
109 struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl;
110 struct mlx5_wqe_eth_seg *eseg = &wqe->eth;
111 struct mlx5_wqe_data_seg *dseg = wqe->data;
113 struct xdp_frame *xdpf = xdpi->xdpf;
114 dma_addr_t dma_addr = xdpi->dma_addr;
115 unsigned int dma_len = xdpf->len;
117 struct mlx5e_xdpsq_stats *stats = sq->stats;
121 if (unlikely(dma_len < MLX5E_XDP_MIN_INLINE || sq->hw_mtu < dma_len)) {
126 if (unlikely(!mlx5e_wqc_has_room_for(wq, sq->cc, sq->pc, 1))) {
128 /* SQ is full, ring doorbell */
129 mlx5e_xmit_xdp_doorbell(sq);
130 sq->doorbell = false;
138 /* copy the inline part if required */
139 if (sq->min_inline_mode != MLX5_INLINE_MODE_NONE) {
140 memcpy(eseg->inline_hdr.start, xdpf->data, MLX5E_XDP_MIN_INLINE);
141 eseg->inline_hdr.sz = cpu_to_be16(MLX5E_XDP_MIN_INLINE);
142 dma_len -= MLX5E_XDP_MIN_INLINE;
143 dma_addr += MLX5E_XDP_MIN_INLINE;
147 /* write the dma part */
148 dseg->addr = cpu_to_be64(dma_addr);
149 dseg->byte_count = cpu_to_be32(dma_len);
151 cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_SEND);
153 /* move page to reference to sq responsibility,
154 * and mark so it's not put back in page-cache.
156 sq->db.xdpi[pi] = *xdpi;
165 bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq)
167 struct mlx5e_xdpsq *sq;
168 struct mlx5_cqe64 *cqe;
174 sq = container_of(cq, struct mlx5e_xdpsq, cq);
176 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
179 cqe = mlx5_cqwq_get_cqe(&cq->wq);
183 is_redirect = test_bit(MLX5E_SQ_STATE_REDIRECT, &sq->state);
184 rq = container_of(sq, struct mlx5e_rq, xdpsq);
186 /* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
187 * otherwise a cq overrun may occur
196 mlx5_cqwq_pop(&cq->wq);
198 wqe_counter = be16_to_cpu(cqe->wqe_counter);
201 u16 ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc);
202 struct mlx5e_xdp_info *xdpi = &sq->db.xdpi[ci];
204 last_wqe = (sqcc == wqe_counter);
208 xdp_return_frame(xdpi->xdpf);
209 dma_unmap_single(sq->pdev, xdpi->dma_addr,
210 xdpi->xdpf->len, DMA_TO_DEVICE);
212 /* Recycle RX page */
213 mlx5e_page_release(rq, &xdpi->di, true);
216 } while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq)));
218 sq->stats->cqes += i;
220 mlx5_cqwq_update_db_record(&cq->wq);
222 /* ensure cq space is freed before enabling more cqes */
226 return (i == MLX5E_TX_CQ_POLL_BUDGET);
229 void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq)
234 is_redirect = test_bit(MLX5E_SQ_STATE_REDIRECT, &sq->state);
235 rq = is_redirect ? NULL : container_of(sq, struct mlx5e_rq, xdpsq);
237 while (sq->cc != sq->pc) {
238 u16 ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sq->cc);
239 struct mlx5e_xdp_info *xdpi = &sq->db.xdpi[ci];
244 xdp_return_frame(xdpi->xdpf);
245 dma_unmap_single(sq->pdev, xdpi->dma_addr,
246 xdpi->xdpf->len, DMA_TO_DEVICE);
248 /* Recycle RX page */
249 mlx5e_page_release(rq, &xdpi->di, false);
254 int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
257 struct mlx5e_priv *priv = netdev_priv(dev);
258 struct mlx5e_xdpsq *sq;
263 if (unlikely(!test_bit(MLX5E_STATE_OPENED, &priv->state)))
266 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
269 sq_num = smp_processor_id();
271 if (unlikely(sq_num >= priv->channels.num))
274 sq = &priv->channels.c[sq_num]->xdpsq;
276 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
279 for (i = 0; i < n; i++) {
280 struct xdp_frame *xdpf = frames[i];
281 struct mlx5e_xdp_info xdpi;
283 xdpi.dma_addr = dma_map_single(sq->pdev, xdpf->data, xdpf->len,
285 if (unlikely(dma_mapping_error(sq->pdev, xdpi.dma_addr))) {
292 if (unlikely(!mlx5e_xmit_xdp_frame(sq, &xdpi))) {
293 xdp_return_frame_rx_napi(xdpf);
298 if (flags & XDP_XMIT_FLUSH)
299 mlx5e_xmit_xdp_doorbell(sq);