drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "lib/vxlan.h"
  54 #include "fs_core.h"
  55 #include "en/port.h"
  56
  57 struct mlx5_nic_flow_attr {
  58         u32 action;
  59         u32 flow_tag;
  60         u32 mod_hdr_id;
  61         u32 hairpin_tirn;
  62         u8 match_level;
  63         struct mlx5_flow_table  *hairpin_ft;
  64         struct mlx5_fc          *counter;
  65 };
  66
  67 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
  68
  69 enum {
  70         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
  71         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
  72         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
  73         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
  74         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
  75         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
  76         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
  77         MLX5E_TC_FLOW_SLOW        = BIT(MLX5E_TC_FLOW_BASE + 5),
  78 };
  79
  80 #define MLX5E_TC_MAX_SPLITS 1
  81
  82 struct mlx5e_tc_flow {
  83         struct rhash_head       node;
  84         struct mlx5e_priv       *priv;
  85         u64                     cookie;
  86         u16                     flags;
  87         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
  88         struct list_head        encap;   /* flows sharing the same encap ID */
  89         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  90         struct list_head        hairpin; /* flows sharing the same hairpin */
  91         union {
  92                 struct mlx5_esw_flow_attr esw_attr[0];
  93                 struct mlx5_nic_flow_attr nic_attr[0];
  94         };
  95 };
  96
  97 struct mlx5e_tc_flow_parse_attr {
  98         struct ip_tunnel_info tun_info;
  99         struct mlx5_flow_spec spec;
 100         int num_mod_hdr_actions;
 101         void *mod_hdr_actions;
 102         int mirred_ifindex;
 103 };
 104
 105 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 106 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 107
 108 struct mlx5e_hairpin {
 109         struct mlx5_hairpin *pair;
 110
 111         struct mlx5_core_dev *func_mdev;
 112         struct mlx5e_priv *func_priv;
 113         u32 tdn;
 114         u32 tirn;
 115
 116         int num_channels;
 117         struct mlx5e_rqt indir_rqt;
 118         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 119         struct mlx5e_ttc_table ttc;
 120 };
 121
 122 struct mlx5e_hairpin_entry {
 123         /* a node of a hash table which keeps all the  hairpin entries */
 124         struct hlist_node hairpin_hlist;
 125
 126         /* flows sharing the same hairpin */
 127         struct list_head flows;
 128
 129         u16 peer_vhca_id;
 130         u8 prio;
 131         struct mlx5e_hairpin *hp;
 132 };
 133
 134 struct mod_hdr_key {
 135         int num_actions;
 136         void *actions;
 137 };
 138
 139 struct mlx5e_mod_hdr_entry {
 140         /* a node of a hash table which keeps all the mod_hdr entries */
 141         struct hlist_node mod_hdr_hlist;
 142
 143         /* flows sharing the same mod_hdr entry */
 144         struct list_head flows;
 145
 146         struct mod_hdr_key key;
 147
 148         u32 mod_hdr_id;
 149 };
 150
 151 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 152
 153 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 154 {
 155         return jhash(key->actions,
 156                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 157 }
 158
 159 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 160                                    struct mod_hdr_key *b)
 161 {
 162         if (a->num_actions != b->num_actions)
 163                 return 1;
 164
 165         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 166 }
 167
 168 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 169                                 struct mlx5e_tc_flow *flow,
 170                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 171 {
 172         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 173         int num_actions, actions_size, namespace, err;
 174         struct mlx5e_mod_hdr_entry *mh;
 175         struct mod_hdr_key key;
 176         bool found = false;
 177         u32 hash_key;
 178
 179         num_actions  = parse_attr->num_mod_hdr_actions;
 180         actions_size = MLX5_MH_ACT_SZ * num_actions;
 181
 182         key.actions = parse_attr->mod_hdr_actions;
 183         key.num_actions = num_actions;
 184
 185         hash_key = hash_mod_hdr_info(&key);
 186
 187         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 188                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 189                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 190                                        mod_hdr_hlist, hash_key) {
 191                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 192                                 found = true;
 193                                 break;
 194                         }
 195                 }
 196         } else {
 197                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 198                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 199                                        mod_hdr_hlist, hash_key) {
 200                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 201                                 found = true;
 202                                 break;
 203                         }
 204                 }
 205         }
 206
 207         if (found)
 208                 goto attach_flow;
 209
 210         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 211         if (!mh)
 212                 return -ENOMEM;
 213
 214         mh->key.actions = (void *)mh + sizeof(*mh);
 215         memcpy(mh->key.actions, key.actions, actions_size);
 216         mh->key.num_actions = num_actions;
 217         INIT_LIST_HEAD(&mh->flows);
 218
 219         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 220                                        mh->key.num_actions,
 221                                        mh->key.actions,
 222                                        &mh->mod_hdr_id);
 223         if (err)
 224                 goto out_err;
 225
 226         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 227                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 228         else
 229                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 230
 231 attach_flow:
 232         list_add(&flow->mod_hdr, &mh->flows);
 233         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 234                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 235         else
 236                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 237
 238         return 0;
 239
 240 out_err:
 241         kfree(mh);
 242         return err;
 243 }
 244
 245 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 246                                  struct mlx5e_tc_flow *flow)
 247 {
 248         struct list_head *next = flow->mod_hdr.next;
 249
 250         list_del(&flow->mod_hdr);
 251
 252         if (list_empty(next)) {
 253                 struct mlx5e_mod_hdr_entry *mh;
 254
 255                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 256
 257                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 258                 hash_del(&mh->mod_hdr_hlist);
 259                 kfree(mh);
 260         }
 261 }
 262
 263 static
 264 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 265 {
 266         struct net_device *netdev;
 267         struct mlx5e_priv *priv;
 268
 269         netdev = __dev_get_by_index(net, ifindex);
 270         priv = netdev_priv(netdev);
 271         return priv->mdev;
 272 }
 273
 274 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 275 {
 276         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 277         void *tirc;
 278         int err;
 279
 280         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 281         if (err)
 282                 goto alloc_tdn_err;
 283
 284         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 285
 286         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 287         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 288         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 289
 290         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 291         if (err)
 292                 goto create_tir_err;
 293
 294         return 0;
 295
 296 create_tir_err:
 297         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 298 alloc_tdn_err:
 299         return err;
 300 }
 301
 302 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 303 {
 304         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 305         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 306 }
 307
 308 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 309 {
 310         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 311         struct mlx5e_priv *priv = hp->func_priv;
 312         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 313
 314         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 315                                       hp->num_channels);
 316
 317         for (i = 0; i < sz; i++) {
 318                 ix = i;
 319                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
 320                         ix = mlx5e_bits_invert(i, ilog2(sz));
 321                 ix = indirection_rqt[ix];
 322                 rqn = hp->pair->rqn[ix];
 323                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 324         }
 325 }
 326
 327 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 328 {
 329         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 330         struct mlx5e_priv *priv = hp->func_priv;
 331         struct mlx5_core_dev *mdev = priv->mdev;
 332         void *rqtc;
 333         u32 *in;
 334
 335         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 336         in = kvzalloc(inlen, GFP_KERNEL);
 337         if (!in)
 338                 return -ENOMEM;
 339
 340         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 341
 342         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 343         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 344
 345         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 346
 347         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 348         if (!err)
 349                 hp->indir_rqt.enabled = true;
 350
 351         kvfree(in);
 352         return err;
 353 }
 354
 355 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 356 {
 357         struct mlx5e_priv *priv = hp->func_priv;
 358         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 359         int tt, i, err;
 360         void *tirc;
 361
 362         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 363                 struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt);
 364
 365                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 366                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 367
 368                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 369                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 370                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 371                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, &ttconfig, tirc, false);
 372                 err = mlx5_core_create_tir(hp->func_mdev, in,
 373                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 374                 if (err) {
 375                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 376                         goto err_destroy_tirs;
 377                 }
 378         }
 379         return 0;
 380
 381 err_destroy_tirs:
 382         for (i = 0; i < tt; i++)
 383                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 384         return err;
 385 }
 386
 387 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 388 {
 389         int tt;
 390
 391         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 392                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 393 }
 394
 395 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 396                                          struct ttc_params *ttc_params)
 397 {
 398         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 399         int tt;
 400
 401         memset(ttc_params, 0, sizeof(*ttc_params));
 402
 403         ttc_params->any_tt_tirn = hp->tirn;
 404
 405         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 406                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 407
 408         ft_attr->max_fte = MLX5E_NUM_TT;
 409         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 410         ft_attr->prio = MLX5E_TC_PRIO;
 411 }
 412
 413 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 414 {
 415         struct mlx5e_priv *priv = hp->func_priv;
 416         struct ttc_params ttc_params;
 417         int err;
 418
 419         err = mlx5e_hairpin_create_indirect_rqt(hp);
 420         if (err)
 421                 return err;
 422
 423         err = mlx5e_hairpin_create_indirect_tirs(hp);
 424         if (err)
 425                 goto err_create_indirect_tirs;
 426
 427         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 428         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 429         if (err)
 430                 goto err_create_ttc_table;
 431
 432         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 433                    hp->num_channels, hp->ttc.ft.t->id);
 434
 435         return 0;
 436
 437 err_create_ttc_table:
 438         mlx5e_hairpin_destroy_indirect_tirs(hp);
 439 err_create_indirect_tirs:
 440         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 441
 442         return err;
 443 }
 444
 445 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 446 {
 447         struct mlx5e_priv *priv = hp->func_priv;
 448
 449         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 450         mlx5e_hairpin_destroy_indirect_tirs(hp);
 451         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 452 }
 453
 454 static struct mlx5e_hairpin *
 455 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 456                      int peer_ifindex)
 457 {
 458         struct mlx5_core_dev *func_mdev, *peer_mdev;
 459         struct mlx5e_hairpin *hp;
 460         struct mlx5_hairpin *pair;
 461         int err;
 462
 463         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 464         if (!hp)
 465                 return ERR_PTR(-ENOMEM);
 466
 467         func_mdev = priv->mdev;
 468         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 469
 470         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 471         if (IS_ERR(pair)) {
 472                 err = PTR_ERR(pair);
 473                 goto create_pair_err;
 474         }
 475         hp->pair = pair;
 476         hp->func_mdev = func_mdev;
 477         hp->func_priv = priv;
 478         hp->num_channels = params->num_channels;
 479
 480         err = mlx5e_hairpin_create_transport(hp);
 481         if (err)
 482                 goto create_transport_err;
 483
 484         if (hp->num_channels > 1) {
 485                 err = mlx5e_hairpin_rss_init(hp);
 486                 if (err)
 487                         goto rss_init_err;
 488         }
 489
 490         return hp;
 491
 492 rss_init_err:
 493         mlx5e_hairpin_destroy_transport(hp);
 494 create_transport_err:
 495         mlx5_core_hairpin_destroy(hp->pair);
 496 create_pair_err:
 497         kfree(hp);
 498         return ERR_PTR(err);
 499 }
 500
 501 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 502 {
 503         if (hp->num_channels > 1)
 504                 mlx5e_hairpin_rss_cleanup(hp);
 505         mlx5e_hairpin_destroy_transport(hp);
 506         mlx5_core_hairpin_destroy(hp->pair);
 507         kvfree(hp);
 508 }
 509
 510 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 511 {
 512         return (peer_vhca_id << 16 | prio);
 513 }
 514
 515 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 516                                                      u16 peer_vhca_id, u8 prio)
 517 {
 518         struct mlx5e_hairpin_entry *hpe;
 519         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 520
 521         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 522                                hairpin_hlist, hash_key) {
 523                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 524                         return hpe;
 525         }
 526
 527         return NULL;
 528 }
 529
 530 #define UNKNOWN_MATCH_PRIO 8
 531
 532 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 533                                   struct mlx5_flow_spec *spec, u8 *match_prio,
 534                                   struct netlink_ext_ack *extack)
 535 {
 536         void *headers_c, *headers_v;
 537         u8 prio_val, prio_mask = 0;
 538         bool vlan_present;
 539
 540 #ifdef CONFIG_MLX5_CORE_EN_DCB
 541         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 542                 NL_SET_ERR_MSG_MOD(extack,
 543                                    "only PCP trust state supported for hairpin");
 544                 return -EOPNOTSUPP;
 545         }
 546 #endif
 547         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 548         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 549
 550         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 551         if (vlan_present) {
 552                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 553                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 554         }
 555
 556         if (!vlan_present || !prio_mask) {
 557                 prio_val = UNKNOWN_MATCH_PRIO;
 558         } else if (prio_mask != 0x7) {
 559                 NL_SET_ERR_MSG_MOD(extack,
 560                                    "masked priority match not supported for hairpin");
 561                 return -EOPNOTSUPP;
 562         }
 563
 564         *match_prio = prio_val;
 565         return 0;
 566 }
 567
 568 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 569                                   struct mlx5e_tc_flow *flow,
 570                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
 571                                   struct netlink_ext_ack *extack)
 572 {
 573         int peer_ifindex = parse_attr->mirred_ifindex;
 574         struct mlx5_hairpin_params params;
 575         struct mlx5_core_dev *peer_mdev;
 576         struct mlx5e_hairpin_entry *hpe;
 577         struct mlx5e_hairpin *hp;
 578         u64 link_speed64;
 579         u32 link_speed;
 580         u8 match_prio;
 581         u16 peer_id;
 582         int err;
 583
 584         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 585         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 586                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
 587                 return -EOPNOTSUPP;
 588         }
 589
 590         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 591         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
 592                                      extack);
 593         if (err)
 594                 return err;
 595         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 596         if (hpe)
 597                 goto attach_flow;
 598
 599         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 600         if (!hpe)
 601                 return -ENOMEM;
 602
 603         INIT_LIST_HEAD(&hpe->flows);
 604         hpe->peer_vhca_id = peer_id;
 605         hpe->prio = match_prio;
 606
 607         params.log_data_size = 15;
 608         params.log_data_size = min_t(u8, params.log_data_size,
 609                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 610         params.log_data_size = max_t(u8, params.log_data_size,
 611                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 612
 613         params.log_num_packets = params.log_data_size -
 614                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 615         params.log_num_packets = min_t(u8, params.log_num_packets,
 616                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 617
 618         params.q_counter = priv->q_counter;
 619         /* set hairpin pair per each 50Gbs share of the link */
 620         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 621         link_speed = max_t(u32, link_speed, 50000);
 622         link_speed64 = link_speed;
 623         do_div(link_speed64, 50000);
 624         params.num_channels = link_speed64;
 625
 626         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 627         if (IS_ERR(hp)) {
 628                 err = PTR_ERR(hp);
 629                 goto create_hairpin_err;
 630         }
 631
 632         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 633                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 634                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 635
 636         hpe->hp = hp;
 637         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 638                  hash_hairpin_info(peer_id, match_prio));
 639
 640 attach_flow:
 641         if (hpe->hp->num_channels > 1) {
 642                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 643                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 644         } else {
 645                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 646         }
 647         list_add(&flow->hairpin, &hpe->flows);
 648
 649         return 0;
 650
 651 create_hairpin_err:
 652         kfree(hpe);
 653         return err;
 654 }
 655
 656 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 657                                    struct mlx5e_tc_flow *flow)
 658 {
 659         struct list_head *next = flow->hairpin.next;
 660
 661         list_del(&flow->hairpin);
 662
 663         /* no more hairpin flows for us, release the hairpin pair */
 664         if (list_empty(next)) {
 665                 struct mlx5e_hairpin_entry *hpe;
 666
 667                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 668
 669                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 670                            hpe->hp->pair->peer_mdev->priv.name);
 671
 672                 mlx5e_hairpin_destroy(hpe->hp);
 673                 hash_del(&hpe->hairpin_hlist);
 674                 kfree(hpe);
 675         }
 676 }
 677
 678 static int
 679 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 680                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 681                       struct mlx5e_tc_flow *flow,
 682                       struct netlink_ext_ack *extack)
 683 {
 684         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 685         struct mlx5_core_dev *dev = priv->mdev;
 686         struct mlx5_flow_destination dest[2] = {};
 687         struct mlx5_flow_act flow_act = {
 688                 .action = attr->action,
 689                 .flow_tag = attr->flow_tag,
 690                 .reformat_id = 0,
 691                 .flags    = FLOW_ACT_HAS_TAG | FLOW_ACT_NO_APPEND,
 692         };
 693         struct mlx5_fc *counter = NULL;
 694         bool table_created = false;
 695         int err, dest_ix = 0;
 696
 697         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 698                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
 699                 if (err) {
 700                         goto err_add_hairpin_flow;
 701                 }
 702                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 703                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 704                         dest[dest_ix].ft = attr->hairpin_ft;
 705                 } else {
 706                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 707                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 708                 }
 709                 dest_ix++;
 710         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 711                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 712                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 713                 dest_ix++;
 714         }
 715
 716         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 717                 counter = mlx5_fc_create(dev, true);
 718                 if (IS_ERR(counter)) {
 719                         err = PTR_ERR(counter);
 720                         goto err_fc_create;
 721                 }
 722                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 723                 dest[dest_ix].counter_id = mlx5_fc_id(counter);
 724                 dest_ix++;
 725                 attr->counter = counter;
 726         }
 727
 728         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 729                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 730                 flow_act.modify_id = attr->mod_hdr_id;
 731                 kfree(parse_attr->mod_hdr_actions);
 732                 if (err)
 733                         goto err_create_mod_hdr_id;
 734         }
 735
 736         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 737                 int tc_grp_size, tc_tbl_size;
 738                 u32 max_flow_counter;
 739
 740                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 741                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 742
 743                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 744
 745                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 746                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 747
 748                 priv->fs.tc.t =
 749                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 750                                                             MLX5E_TC_PRIO,
 751                                                             tc_tbl_size,
 752                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 753                                                             MLX5E_TC_FT_LEVEL, 0);
 754                 if (IS_ERR(priv->fs.tc.t)) {
 755                         NL_SET_ERR_MSG_MOD(extack,
 756                                            "Failed to create tc offload table\n");
 757                         netdev_err(priv->netdev,
 758                                    "Failed to create tc offload table\n");
 759                         err = PTR_ERR(priv->fs.tc.t);
 760                         goto err_create_ft;
 761                 }
 762
 763                 table_created = true;
 764         }
 765
 766         if (attr->match_level != MLX5_MATCH_NONE)
 767                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 768
 769         flow->rule[0] = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 770                                             &flow_act, dest, dest_ix);
 771
 772         if (IS_ERR(flow->rule[0])) {
 773                 err = PTR_ERR(flow->rule[0]);
 774                 goto err_add_rule;
 775         }
 776
 777         return 0;
 778
 779 err_add_rule:
 780         if (table_created) {
 781                 mlx5_destroy_flow_table(priv->fs.tc.t);
 782                 priv->fs.tc.t = NULL;
 783         }
 784 err_create_ft:
 785         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 786                 mlx5e_detach_mod_hdr(priv, flow);
 787 err_create_mod_hdr_id:
 788         mlx5_fc_destroy(dev, counter);
 789 err_fc_create:
 790         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 791                 mlx5e_hairpin_flow_del(priv, flow);
 792 err_add_hairpin_flow:
 793         return err;
 794 }
 795
 796 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 797                                   struct mlx5e_tc_flow *flow)
 798 {
 799         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 800         struct mlx5_fc *counter = NULL;
 801
 802         counter = attr->counter;
 803         mlx5_del_flow_rules(flow->rule[0]);
 804         mlx5_fc_destroy(priv->mdev, counter);
 805
 806         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
 807                 mlx5_destroy_flow_table(priv->fs.tc.t);
 808                 priv->fs.tc.t = NULL;
 809         }
 810
 811         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 812                 mlx5e_detach_mod_hdr(priv, flow);
 813
 814         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 815                 mlx5e_hairpin_flow_del(priv, flow);
 816 }
 817
 818 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 819                                struct mlx5e_tc_flow *flow);
 820
 821 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 822                               struct ip_tunnel_info *tun_info,
 823                               struct net_device *mirred_dev,
 824                               struct net_device **encap_dev,
 825                               struct mlx5e_tc_flow *flow,
 826                               struct netlink_ext_ack *extack);
 827
 828 static struct mlx5_flow_handle *
 829 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
 830                            struct mlx5e_tc_flow *flow,
 831                            struct mlx5_flow_spec *spec,
 832                            struct mlx5_esw_flow_attr *attr)
 833 {
 834         struct mlx5_flow_handle *rule;
 835
 836         rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 837         if (IS_ERR(rule))
 838                 return rule;
 839
 840         if (attr->mirror_count) {
 841                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
 842                 if (IS_ERR(flow->rule[1])) {
 843                         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 844                         return flow->rule[1];
 845                 }
 846         }
 847
 848         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 849         return rule;
 850 }
 851
 852 static void
 853 mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
 854                              struct mlx5e_tc_flow *flow,
 855                            struct mlx5_esw_flow_attr *attr)
 856 {
 857         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 858
 859         if (attr->mirror_count)
 860                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
 861
 862         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
 863 }
 864
 865 static struct mlx5_flow_handle *
 866 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
 867                               struct mlx5e_tc_flow *flow,
 868                               struct mlx5_flow_spec *spec,
 869                               struct mlx5_esw_flow_attr *slow_attr)
 870 {
 871         struct mlx5_flow_handle *rule;
 872
 873         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 874         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
 875         slow_attr->mirror_count = 0,
 876         slow_attr->dest_chain = FDB_SLOW_PATH_CHAIN,
 877
 878         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
 879         if (!IS_ERR(rule))
 880                 flow->flags |= MLX5E_TC_FLOW_SLOW;
 881
 882         return rule;
 883 }
 884
 885 static void
 886 mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
 887                                   struct mlx5e_tc_flow *flow,
 888                                   struct mlx5_esw_flow_attr *slow_attr)
 889 {
 890         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 891         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
 892         flow->flags &= ~MLX5E_TC_FLOW_SLOW;
 893 }
 894
 895 static int
 896 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 897                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 898                       struct mlx5e_tc_flow *flow,
 899                       struct netlink_ext_ack *extack)
 900 {
 901         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 902         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
 903         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 904         u16 max_prio = mlx5_eswitch_get_prio_range(esw);
 905         struct net_device *out_dev, *encap_dev = NULL;
 906         struct mlx5_fc *counter = NULL;
 907         struct mlx5e_rep_priv *rpriv;
 908         struct mlx5e_priv *out_priv;
 909         int err = 0, encap_err = 0;
 910
 911         /* if prios are not supported, keep the old behaviour of using same prio
 912          * for all offloaded rules.
 913          */
 914         if (!mlx5_eswitch_prios_supported(esw))
 915                 attr->prio = 1;
 916
 917         if (attr->chain > max_chain) {
 918                 NL_SET_ERR_MSG(extack, "Requested chain is out of supported range");
 919                 err = -EOPNOTSUPP;
 920                 goto err_max_prio_chain;
 921         }
 922
 923         if (attr->prio > max_prio) {
 924                 NL_SET_ERR_MSG(extack, "Requested priority is out of supported range");
 925                 err = -EOPNOTSUPP;
 926                 goto err_max_prio_chain;
 927         }
 928
 929         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
 930                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 931                                              attr->parse_attr->mirred_ifindex);
 932                 encap_err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 933                                                out_dev, &encap_dev, flow,
 934                                                extack);
 935                 if (encap_err && encap_err != -EAGAIN) {
 936                         err = encap_err;
 937                         goto err_attach_encap;
 938                 }
 939                 out_priv = netdev_priv(encap_dev);
 940                 rpriv = out_priv->ppriv;
 941                 attr->out_rep[attr->out_count] = rpriv->rep;
 942                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
 943         }
 944
 945         err = mlx5_eswitch_add_vlan_action(esw, attr);
 946         if (err)
 947                 goto err_add_vlan;
 948
 949         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 950                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 951                 kfree(parse_attr->mod_hdr_actions);
 952                 if (err)
 953                         goto err_mod_hdr;
 954         }
 955
 956         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 957                 counter = mlx5_fc_create(esw->dev, true);
 958                 if (IS_ERR(counter)) {
 959                         err = PTR_ERR(counter);
 960                         goto err_create_counter;
 961                 }
 962
 963                 attr->counter = counter;
 964         }
 965
 966         /* we get here if (1) there's no error or when
 967          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 968          */
 969         if (encap_err == -EAGAIN) {
 970                 /* continue with goto slow path rule instead */
 971                 struct mlx5_esw_flow_attr slow_attr;
 972
 973                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec, &slow_attr);
 974         } else {
 975                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
 976         }
 977
 978         if (IS_ERR(flow->rule[0])) {
 979                 err = PTR_ERR(flow->rule[0]);
 980                 goto err_add_rule;
 981         }
 982
 983         return 0;
 984
 985 err_add_rule:
 986         mlx5_fc_destroy(esw->dev, counter);
 987 err_create_counter:
 988         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 989                 mlx5e_detach_mod_hdr(priv, flow);
 990 err_mod_hdr:
 991         mlx5_eswitch_del_vlan_action(esw, attr);
 992 err_add_vlan:
 993         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
 994                 mlx5e_detach_encap(priv, flow);
 995 err_attach_encap:
 996 err_max_prio_chain:
 997         return err;
 998 }
 999
1000 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1001                                   struct mlx5e_tc_flow *flow)
1002 {
1003         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1004         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1005         struct mlx5_esw_flow_attr slow_attr;
1006
1007         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1008                 if (flow->flags & MLX5E_TC_FLOW_SLOW)
1009                         mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1010                 else
1011                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1012         }
1013
1014         mlx5_eswitch_del_vlan_action(esw, attr);
1015
1016         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
1017                 mlx5e_detach_encap(priv, flow);
1018                 kvfree(attr->parse_attr);
1019         }
1020
1021         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1022                 mlx5e_detach_mod_hdr(priv, flow);
1023
1024         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1025                 mlx5_fc_destroy(esw->dev, attr->counter);
1026 }
1027
1028 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
1029                               struct mlx5e_encap_entry *e)
1030 {
1031         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1032         struct mlx5_esw_flow_attr slow_attr, *esw_attr;
1033         struct mlx5_flow_handle *rule;
1034         struct mlx5_flow_spec *spec;
1035         struct mlx5e_tc_flow *flow;
1036         int err;
1037
1038         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
1039                                          e->encap_size, e->encap_header,
1040                                          MLX5_FLOW_NAMESPACE_FDB,
1041                                          &e->encap_id);
1042         if (err) {
1043                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
1044                                err);
1045                 return;
1046         }
1047         e->flags |= MLX5_ENCAP_ENTRY_VALID;
1048         mlx5e_rep_queue_neigh_stats_work(priv);
1049
1050         list_for_each_entry(flow, &e->flows, encap) {
1051                 esw_attr = flow->esw_attr;
1052                 esw_attr->encap_id = e->encap_id;
1053                 spec = &esw_attr->parse_attr->spec;
1054
1055                 /* update from slow path rule to encap rule */
1056                 rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, esw_attr);
1057                 if (IS_ERR(rule)) {
1058                         err = PTR_ERR(rule);
1059                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
1060                                        err);
1061                         continue;
1062                 }
1063
1064                 mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1065                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when slow path rule removed */
1066                 flow->rule[0] = rule;
1067         }
1068 }
1069
1070 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
1071                               struct mlx5e_encap_entry *e)
1072 {
1073         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1074         struct mlx5_esw_flow_attr slow_attr;
1075         struct mlx5_flow_handle *rule;
1076         struct mlx5_flow_spec *spec;
1077         struct mlx5e_tc_flow *flow;
1078         int err;
1079
1080         list_for_each_entry(flow, &e->flows, encap) {
1081                 spec = &flow->esw_attr->parse_attr->spec;
1082
1083                 /* update from encap rule to slow path rule */
1084                 rule = mlx5e_tc_offload_to_slow_path(esw, flow, spec, &slow_attr);
1085
1086                 if (IS_ERR(rule)) {
1087                         err = PTR_ERR(rule);
1088                         mlx5_core_warn(priv->mdev, "Failed to update slow path (encap) flow, %d\n",
1089                                        err);
1090                         continue;
1091                 }
1092
1093                 mlx5e_tc_unoffload_fdb_rules(esw, flow, flow->esw_attr);
1094                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when fast path rule removed */
1095                 flow->rule[0] = rule;
1096         }
1097
1098         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
1099                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
1100                 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1101         }
1102 }
1103
1104 static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1105 {
1106         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1107                 return flow->esw_attr->counter;
1108         else
1109                 return flow->nic_attr->counter;
1110 }
1111
1112 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1113 {
1114         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1115         u64 bytes, packets, lastuse = 0;
1116         struct mlx5e_tc_flow *flow;
1117         struct mlx5e_encap_entry *e;
1118         struct mlx5_fc *counter;
1119         struct neigh_table *tbl;
1120         bool neigh_used = false;
1121         struct neighbour *n;
1122
1123         if (m_neigh->family == AF_INET)
1124                 tbl = &arp_tbl;
1125 #if IS_ENABLED(CONFIG_IPV6)
1126         else if (m_neigh->family == AF_INET6)
1127                 tbl = &nd_tbl;
1128 #endif
1129         else
1130                 return;
1131
1132         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1133                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1134                         continue;
1135                 list_for_each_entry(flow, &e->flows, encap) {
1136                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1137                                 counter = mlx5e_tc_get_counter(flow);
1138                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1139                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1140                                         neigh_used = true;
1141                                         break;
1142                                 }
1143                         }
1144                 }
1145                 if (neigh_used)
1146                         break;
1147         }
1148
1149         if (neigh_used) {
1150                 nhe->reported_lastuse = jiffies;
1151
1152                 /* find the relevant neigh according to the cached device and
1153                  * dst ip pair
1154                  */
1155                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1156                 if (!n)
1157                         return;
1158
1159                 neigh_event_send(n, NULL);
1160                 neigh_release(n);
1161         }
1162 }
1163
1164 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1165                                struct mlx5e_tc_flow *flow)
1166 {
1167         struct list_head *next = flow->encap.next;
1168
1169         list_del(&flow->encap);
1170         if (list_empty(next)) {
1171                 struct mlx5e_encap_entry *e;
1172
1173                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1174                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1175
1176                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1177                         mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1178
1179                 hash_del_rcu(&e->encap_hlist);
1180                 kfree(e->encap_header);
1181                 kfree(e);
1182         }
1183 }
1184
1185 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1186                               struct mlx5e_tc_flow *flow)
1187 {
1188         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1189                 mlx5e_tc_del_fdb_flow(priv, flow);
1190         else
1191                 mlx5e_tc_del_nic_flow(priv, flow);
1192 }
1193
1194 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1195                              struct tc_cls_flower_offload *f)
1196 {
1197         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1198                                        outer_headers);
1199         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1200                                        outer_headers);
1201         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1202                                     misc_parameters);
1203         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1204                                     misc_parameters);
1205
1206         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1207         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1208
1209         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1210                 struct flow_dissector_key_keyid *key =
1211                         skb_flow_dissector_target(f->dissector,
1212                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1213                                                   f->key);
1214                 struct flow_dissector_key_keyid *mask =
1215                         skb_flow_dissector_target(f->dissector,
1216                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1217                                                   f->mask);
1218                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1219                          be32_to_cpu(mask->keyid));
1220                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1221                          be32_to_cpu(key->keyid));
1222         }
1223 }
1224
1225 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1226                              struct mlx5_flow_spec *spec,
1227                              struct tc_cls_flower_offload *f)
1228 {
1229         struct netlink_ext_ack *extack = f->common.extack;
1230         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1231                                        outer_headers);
1232         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1233                                        outer_headers);
1234
1235         struct flow_dissector_key_control *enc_control =
1236                 skb_flow_dissector_target(f->dissector,
1237                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1238                                           f->key);
1239
1240         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1241                 struct flow_dissector_key_ports *key =
1242                         skb_flow_dissector_target(f->dissector,
1243                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1244                                                   f->key);
1245                 struct flow_dissector_key_ports *mask =
1246                         skb_flow_dissector_target(f->dissector,
1247                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1248                                                   f->mask);
1249
1250                 /* Full udp dst port must be given */
1251                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1252                         goto vxlan_match_offload_err;
1253
1254                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1255                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1256                         parse_vxlan_attr(spec, f);
1257                 else {
1258                         NL_SET_ERR_MSG_MOD(extack,
1259                                            "port isn't an offloaded vxlan udp dport");
1260                         netdev_warn(priv->netdev,
1261                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1262                         return -EOPNOTSUPP;
1263                 }
1264
1265                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1266                          udp_dport, ntohs(mask->dst));
1267                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1268                          udp_dport, ntohs(key->dst));
1269
1270                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1271                          udp_sport, ntohs(mask->src));
1272                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1273                          udp_sport, ntohs(key->src));
1274         } else { /* udp dst port must be given */
1275 vxlan_match_offload_err:
1276                 NL_SET_ERR_MSG_MOD(extack,
1277                                    "IP tunnel decap offload supported only for vxlan, must set UDP dport");
1278                 netdev_warn(priv->netdev,
1279                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1280                 return -EOPNOTSUPP;
1281         }
1282
1283         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1284                 struct flow_dissector_key_ipv4_addrs *key =
1285                         skb_flow_dissector_target(f->dissector,
1286                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1287                                                   f->key);
1288                 struct flow_dissector_key_ipv4_addrs *mask =
1289                         skb_flow_dissector_target(f->dissector,
1290                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1291                                                   f->mask);
1292                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1293                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1294                          ntohl(mask->src));
1295                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1296                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1297                          ntohl(key->src));
1298
1299                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1300                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1301                          ntohl(mask->dst));
1302                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1303                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1304                          ntohl(key->dst));
1305
1306                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1307                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1308         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1309                 struct flow_dissector_key_ipv6_addrs *key =
1310                         skb_flow_dissector_target(f->dissector,
1311                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1312                                                   f->key);
1313                 struct flow_dissector_key_ipv6_addrs *mask =
1314                         skb_flow_dissector_target(f->dissector,
1315                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1316                                                   f->mask);
1317
1318                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1319                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1320                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1321                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1322                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1323                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1324
1325                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1326                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1327                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1328                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1329                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1330                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1331
1332                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1333                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1334         }
1335
1336         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1337                 struct flow_dissector_key_ip *key =
1338                         skb_flow_dissector_target(f->dissector,
1339                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1340                                                   f->key);
1341                 struct flow_dissector_key_ip *mask =
1342                         skb_flow_dissector_target(f->dissector,
1343                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1344                                                   f->mask);
1345
1346                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1347                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1348
1349                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1350                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1351
1352                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1353                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1354
1355                 if (mask->ttl &&
1356                     !MLX5_CAP_ESW_FLOWTABLE_FDB
1357                         (priv->mdev,
1358                          ft_field_support.outer_ipv4_ttl)) {
1359                         NL_SET_ERR_MSG_MOD(extack,
1360                                            "Matching on TTL is not supported");
1361                         return -EOPNOTSUPP;
1362                 }
1363
1364         }
1365
1366         /* Enforce DMAC when offloading incoming tunneled flows.
1367          * Flow counters require a match on the DMAC.
1368          */
1369         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1370         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1371         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1372                                      dmac_47_16), priv->netdev->dev_addr);
1373
1374         /* let software handle IP fragments */
1375         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1376         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1377
1378         return 0;
1379 }
1380
1381 static int __parse_cls_flower(struct mlx5e_priv *priv,
1382                               struct mlx5_flow_spec *spec,
1383                               struct tc_cls_flower_offload *f,
1384                               u8 *match_level)
1385 {
1386         struct netlink_ext_ack *extack = f->common.extack;
1387         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1388                                        outer_headers);
1389         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1390                                        outer_headers);
1391         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1392                                     misc_parameters);
1393         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1394                                     misc_parameters);
1395         u16 addr_type = 0;
1396         u8 ip_proto = 0;
1397
1398         *match_level = MLX5_MATCH_NONE;
1399
1400         if (f->dissector->used_keys &
1401             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1402               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1403               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1404               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1405               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1406               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1407               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1408               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1409               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1410               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1411               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1412               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1413               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1414               BIT(FLOW_DISSECTOR_KEY_TCP) |
1415               BIT(FLOW_DISSECTOR_KEY_IP)  |
1416               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1417                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
1418                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1419                             f->dissector->used_keys);
1420                 return -EOPNOTSUPP;
1421         }
1422
1423         if ((dissector_uses_key(f->dissector,
1424                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1425              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1426              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1427             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1428                 struct flow_dissector_key_control *key =
1429                         skb_flow_dissector_target(f->dissector,
1430                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1431                                                   f->key);
1432                 switch (key->addr_type) {
1433                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1434                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1435                         if (parse_tunnel_attr(priv, spec, f))
1436                                 return -EOPNOTSUPP;
1437                         break;
1438                 default:
1439                         return -EOPNOTSUPP;
1440                 }
1441
1442                 /* In decap flow, header pointers should point to the inner
1443                  * headers, outer header were already set by parse_tunnel_attr
1444                  */
1445                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1446                                          inner_headers);
1447                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1448                                          inner_headers);
1449         }
1450
1451         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1452                 struct flow_dissector_key_basic *key =
1453                         skb_flow_dissector_target(f->dissector,
1454                                                   FLOW_DISSECTOR_KEY_BASIC,
1455                                                   f->key);
1456                 struct flow_dissector_key_basic *mask =
1457                         skb_flow_dissector_target(f->dissector,
1458                                                   FLOW_DISSECTOR_KEY_BASIC,
1459                                                   f->mask);
1460                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1461                          ntohs(mask->n_proto));
1462                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1463                          ntohs(key->n_proto));
1464
1465                 if (mask->n_proto)
1466                         *match_level = MLX5_MATCH_L2;
1467         }
1468
1469         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1470                 struct flow_dissector_key_vlan *key =
1471                         skb_flow_dissector_target(f->dissector,
1472                                                   FLOW_DISSECTOR_KEY_VLAN,
1473                                                   f->key);
1474                 struct flow_dissector_key_vlan *mask =
1475                         skb_flow_dissector_target(f->dissector,
1476                                                   FLOW_DISSECTOR_KEY_VLAN,
1477                                                   f->mask);
1478                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1479                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1480                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1481                                          svlan_tag, 1);
1482                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1483                                          svlan_tag, 1);
1484                         } else {
1485                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1486                                          cvlan_tag, 1);
1487                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1488                                          cvlan_tag, 1);
1489                         }
1490
1491                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1492                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1493
1494                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1495                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1496
1497                         *match_level = MLX5_MATCH_L2;
1498                 }
1499         } else if (*match_level != MLX5_MATCH_NONE) {
1500                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1);
1501                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1502                 *match_level = MLX5_MATCH_L2;
1503         }
1504
1505         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1506                 struct flow_dissector_key_vlan *key =
1507                         skb_flow_dissector_target(f->dissector,
1508                                                   FLOW_DISSECTOR_KEY_CVLAN,
1509                                                   f->key);
1510                 struct flow_dissector_key_vlan *mask =
1511                         skb_flow_dissector_target(f->dissector,
1512                                                   FLOW_DISSECTOR_KEY_CVLAN,
1513                                                   f->mask);
1514                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1515                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1516                                 MLX5_SET(fte_match_set_misc, misc_c,
1517                                          outer_second_svlan_tag, 1);
1518                                 MLX5_SET(fte_match_set_misc, misc_v,
1519                                          outer_second_svlan_tag, 1);
1520                         } else {
1521                                 MLX5_SET(fte_match_set_misc, misc_c,
1522                                          outer_second_cvlan_tag, 1);
1523                                 MLX5_SET(fte_match_set_misc, misc_v,
1524                                          outer_second_cvlan_tag, 1);
1525                         }
1526
1527                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1528                                  mask->vlan_id);
1529                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1530                                  key->vlan_id);
1531                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1532                                  mask->vlan_priority);
1533                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1534                                  key->vlan_priority);
1535
1536                         *match_level = MLX5_MATCH_L2;
1537                 }
1538         }
1539
1540         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1541                 struct flow_dissector_key_eth_addrs *key =
1542                         skb_flow_dissector_target(f->dissector,
1543                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1544                                                   f->key);
1545                 struct flow_dissector_key_eth_addrs *mask =
1546                         skb_flow_dissector_target(f->dissector,
1547                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1548                                                   f->mask);
1549
1550                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1551                                              dmac_47_16),
1552                                 mask->dst);
1553                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1554                                              dmac_47_16),
1555                                 key->dst);
1556
1557                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1558                                              smac_47_16),
1559                                 mask->src);
1560                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1561                                              smac_47_16),
1562                                 key->src);
1563
1564                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1565                         *match_level = MLX5_MATCH_L2;
1566         }
1567
1568         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1569                 struct flow_dissector_key_control *key =
1570                         skb_flow_dissector_target(f->dissector,
1571                                                   FLOW_DISSECTOR_KEY_CONTROL,
1572                                                   f->key);
1573
1574                 struct flow_dissector_key_control *mask =
1575                         skb_flow_dissector_target(f->dissector,
1576                                                   FLOW_DISSECTOR_KEY_CONTROL,
1577                                                   f->mask);
1578                 addr_type = key->addr_type;
1579
1580                 /* the HW doesn't support frag first/later */
1581                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1582                         return -EOPNOTSUPP;
1583
1584                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1585                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1586                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1587                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1588
1589                         /* the HW doesn't need L3 inline to match on frag=no */
1590                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1591                                 *match_level = MLX5_MATCH_L2;
1592         /* ***  L2 attributes parsing up to here *** */
1593                         else
1594                                 *match_level = MLX5_MATCH_L3;
1595                 }
1596         }
1597
1598         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1599                 struct flow_dissector_key_basic *key =
1600                         skb_flow_dissector_target(f->dissector,
1601                                                   FLOW_DISSECTOR_KEY_BASIC,
1602                                                   f->key);
1603                 struct flow_dissector_key_basic *mask =
1604                         skb_flow_dissector_target(f->dissector,
1605                                                   FLOW_DISSECTOR_KEY_BASIC,
1606                                                   f->mask);
1607                 ip_proto = key->ip_proto;
1608
1609                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1610                          mask->ip_proto);
1611                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1612                          key->ip_proto);
1613
1614                 if (mask->ip_proto)
1615                         *match_level = MLX5_MATCH_L3;
1616         }
1617
1618         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1619                 struct flow_dissector_key_ipv4_addrs *key =
1620                         skb_flow_dissector_target(f->dissector,
1621                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1622                                                   f->key);
1623                 struct flow_dissector_key_ipv4_addrs *mask =
1624                         skb_flow_dissector_target(f->dissector,
1625                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1626                                                   f->mask);
1627
1628                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1629                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1630                        &mask->src, sizeof(mask->src));
1631                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1632                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1633                        &key->src, sizeof(key->src));
1634                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1635                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1636                        &mask->dst, sizeof(mask->dst));
1637                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1638                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1639                        &key->dst, sizeof(key->dst));
1640
1641                 if (mask->src || mask->dst)
1642                         *match_level = MLX5_MATCH_L3;
1643         }
1644
1645         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1646                 struct flow_dissector_key_ipv6_addrs *key =
1647                         skb_flow_dissector_target(f->dissector,
1648                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1649                                                   f->key);
1650                 struct flow_dissector_key_ipv6_addrs *mask =
1651                         skb_flow_dissector_target(f->dissector,
1652                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1653                                                   f->mask);
1654
1655                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1656                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1657                        &mask->src, sizeof(mask->src));
1658                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1659                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1660                        &key->src, sizeof(key->src));
1661
1662                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1663                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1664                        &mask->dst, sizeof(mask->dst));
1665                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1666                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1667                        &key->dst, sizeof(key->dst));
1668
1669                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1670                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1671                         *match_level = MLX5_MATCH_L3;
1672         }
1673
1674         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1675                 struct flow_dissector_key_ip *key =
1676                         skb_flow_dissector_target(f->dissector,
1677                                                   FLOW_DISSECTOR_KEY_IP,
1678                                                   f->key);
1679                 struct flow_dissector_key_ip *mask =
1680                         skb_flow_dissector_target(f->dissector,
1681                                                   FLOW_DISSECTOR_KEY_IP,
1682                                                   f->mask);
1683
1684                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1685                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1686
1687                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1688                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1689
1690                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1691                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1692
1693                 if (mask->ttl &&
1694                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1695                                                 ft_field_support.outer_ipv4_ttl)) {
1696                         NL_SET_ERR_MSG_MOD(extack,
1697                                            "Matching on TTL is not supported");
1698                         return -EOPNOTSUPP;
1699                 }
1700
1701                 if (mask->tos || mask->ttl)
1702                         *match_level = MLX5_MATCH_L3;
1703         }
1704
1705         /* ***  L3 attributes parsing up to here *** */
1706
1707         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1708                 struct flow_dissector_key_ports *key =
1709                         skb_flow_dissector_target(f->dissector,
1710                                                   FLOW_DISSECTOR_KEY_PORTS,
1711                                                   f->key);
1712                 struct flow_dissector_key_ports *mask =
1713                         skb_flow_dissector_target(f->dissector,
1714                                                   FLOW_DISSECTOR_KEY_PORTS,
1715                                                   f->mask);
1716                 switch (ip_proto) {
1717                 case IPPROTO_TCP:
1718                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1719                                  tcp_sport, ntohs(mask->src));
1720                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1721                                  tcp_sport, ntohs(key->src));
1722
1723                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1724                                  tcp_dport, ntohs(mask->dst));
1725                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1726                                  tcp_dport, ntohs(key->dst));
1727                         break;
1728
1729                 case IPPROTO_UDP:
1730                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1731                                  udp_sport, ntohs(mask->src));
1732                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1733                                  udp_sport, ntohs(key->src));
1734
1735                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1736                                  udp_dport, ntohs(mask->dst));
1737                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1738                                  udp_dport, ntohs(key->dst));
1739                         break;
1740                 default:
1741                         NL_SET_ERR_MSG_MOD(extack,
1742                                            "Only UDP and TCP transports are supported for L4 matching");
1743                         netdev_err(priv->netdev,
1744                                    "Only UDP and TCP transport are supported\n");
1745                         return -EINVAL;
1746                 }
1747
1748                 if (mask->src || mask->dst)
1749                         *match_level = MLX5_MATCH_L4;
1750         }
1751
1752         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1753                 struct flow_dissector_key_tcp *key =
1754                         skb_flow_dissector_target(f->dissector,
1755                                                   FLOW_DISSECTOR_KEY_TCP,
1756                                                   f->key);
1757                 struct flow_dissector_key_tcp *mask =
1758                         skb_flow_dissector_target(f->dissector,
1759                                                   FLOW_DISSECTOR_KEY_TCP,
1760                                                   f->mask);
1761
1762                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1763                          ntohs(mask->flags));
1764                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1765                          ntohs(key->flags));
1766
1767                 if (mask->flags)
1768                         *match_level = MLX5_MATCH_L4;
1769         }
1770
1771         return 0;
1772 }
1773
1774 static int parse_cls_flower(struct mlx5e_priv *priv,
1775                             struct mlx5e_tc_flow *flow,
1776                             struct mlx5_flow_spec *spec,
1777                             struct tc_cls_flower_offload *f)
1778 {
1779         struct netlink_ext_ack *extack = f->common.extack;
1780         struct mlx5_core_dev *dev = priv->mdev;
1781         struct mlx5_eswitch *esw = dev->priv.eswitch;
1782         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1783         struct mlx5_eswitch_rep *rep;
1784         u8 match_level;
1785         int err;
1786
1787         err = __parse_cls_flower(priv, spec, f, &match_level);
1788
1789         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1790                 rep = rpriv->rep;
1791                 if (rep->vport != FDB_UPLINK_VPORT &&
1792                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1793                     esw->offloads.inline_mode < match_level)) {
1794                         NL_SET_ERR_MSG_MOD(extack,
1795                                            "Flow is not offloaded due to min inline setting");
1796                         netdev_warn(priv->netdev,
1797                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1798                                     match_level, esw->offloads.inline_mode);
1799                         return -EOPNOTSUPP;
1800                 }
1801         }
1802
1803         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1804                 flow->esw_attr->match_level = match_level;
1805         else
1806                 flow->nic_attr->match_level = match_level;
1807
1808         return err;
1809 }
1810
1811 struct pedit_headers {
1812         struct ethhdr  eth;
1813         struct iphdr   ip4;
1814         struct ipv6hdr ip6;
1815         struct tcphdr  tcp;
1816         struct udphdr  udp;
1817 };
1818
1819 static int pedit_header_offsets[] = {
1820         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1821         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1822         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1823         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1824         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1825 };
1826
1827 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1828
1829 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1830                          struct pedit_headers *masks,
1831                          struct pedit_headers *vals)
1832 {
1833         u32 *curr_pmask, *curr_pval;
1834
1835         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1836                 goto out_err;
1837
1838         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1839         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1840
1841         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1842                 goto out_err;
1843
1844         *curr_pmask |= mask;
1845         *curr_pval  |= (val & mask);
1846
1847         return 0;
1848
1849 out_err:
1850         return -EOPNOTSUPP;
1851 }
1852
1853 struct mlx5_fields {
1854         u8  field;
1855         u8  size;
1856         u32 offset;
1857 };
1858
1859 #define OFFLOAD(fw_field, size, field, off) \
1860                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1861
1862 static struct mlx5_fields fields[] = {
1863         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1864         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1865         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1866         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1867         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1868
1869         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1870         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1871         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1872
1873         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1874         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1875         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1876         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1877         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1878         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1879         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1880         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1881         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1882
1883         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1884         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1885         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1886
1887         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1888         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1889 };
1890
1891 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1892  * max from the SW pedit action. On success, it says how many HW actions were
1893  * actually parsed.
1894  */
1895 static int offload_pedit_fields(struct pedit_headers *masks,
1896                                 struct pedit_headers *vals,
1897                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1898                                 struct netlink_ext_ack *extack)
1899 {
1900         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1901         int i, action_size, nactions, max_actions, first, last, next_z;
1902         void *s_masks_p, *a_masks_p, *vals_p;
1903         struct mlx5_fields *f;
1904         u8 cmd, field_bsize;
1905         u32 s_mask, a_mask;
1906         unsigned long mask;
1907         __be32 mask_be32;
1908         __be16 mask_be16;
1909         void *action;
1910
1911         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1912         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1913         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1914         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1915
1916         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1917         action = parse_attr->mod_hdr_actions;
1918         max_actions = parse_attr->num_mod_hdr_actions;
1919         nactions = 0;
1920
1921         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1922                 f = &fields[i];
1923                 /* avoid seeing bits set from previous iterations */
1924                 s_mask = 0;
1925                 a_mask = 0;
1926
1927                 s_masks_p = (void *)set_masks + f->offset;
1928                 a_masks_p = (void *)add_masks + f->offset;
1929
1930                 memcpy(&s_mask, s_masks_p, f->size);
1931                 memcpy(&a_mask, a_masks_p, f->size);
1932
1933                 if (!s_mask && !a_mask) /* nothing to offload here */
1934                         continue;
1935
1936                 if (s_mask && a_mask) {
1937                         NL_SET_ERR_MSG_MOD(extack,
1938                                            "can't set and add to the same HW field");
1939                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1940                         return -EOPNOTSUPP;
1941                 }
1942
1943                 if (nactions == max_actions) {
1944                         NL_SET_ERR_MSG_MOD(extack,
1945                                            "too many pedit actions, can't offload");
1946                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1947                         return -EOPNOTSUPP;
1948                 }
1949
1950                 if (s_mask) {
1951                         cmd  = MLX5_ACTION_TYPE_SET;
1952                         mask = s_mask;
1953                         vals_p = (void *)set_vals + f->offset;
1954                         /* clear to denote we consumed this field */
1955                         memset(s_masks_p, 0, f->size);
1956                 } else {
1957                         cmd  = MLX5_ACTION_TYPE_ADD;
1958                         mask = a_mask;
1959                         vals_p = (void *)add_vals + f->offset;
1960                         /* clear to denote we consumed this field */
1961                         memset(a_masks_p, 0, f->size);
1962                 }
1963
1964                 field_bsize = f->size * BITS_PER_BYTE;
1965
1966                 if (field_bsize == 32) {
1967                         mask_be32 = *(__be32 *)&mask;
1968                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1969                 } else if (field_bsize == 16) {
1970                         mask_be16 = *(__be16 *)&mask;
1971                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1972                 }
1973
1974                 first = find_first_bit(&mask, field_bsize);
1975                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1976                 last  = find_last_bit(&mask, field_bsize);
1977                 if (first < next_z && next_z < last) {
1978                         NL_SET_ERR_MSG_MOD(extack,
1979                                            "rewrite of few sub-fields isn't supported");
1980                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1981                                mask);
1982                         return -EOPNOTSUPP;
1983                 }
1984
1985                 MLX5_SET(set_action_in, action, action_type, cmd);
1986                 MLX5_SET(set_action_in, action, field, f->field);
1987
1988                 if (cmd == MLX5_ACTION_TYPE_SET) {
1989                         MLX5_SET(set_action_in, action, offset, first);
1990                         /* length is num of bits to be written, zero means length of 32 */
1991                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1992                 }
1993
1994                 if (field_bsize == 32)
1995                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1996                 else if (field_bsize == 16)
1997                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1998                 else if (field_bsize == 8)
1999                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
2000
2001                 action += action_size;
2002                 nactions++;
2003         }
2004
2005         parse_attr->num_mod_hdr_actions = nactions;
2006         return 0;
2007 }
2008
2009 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
2010                                  const struct tc_action *a, int namespace,
2011                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
2012 {
2013         int nkeys, action_size, max_actions;
2014
2015         nkeys = tcf_pedit_nkeys(a);
2016         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
2017
2018         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2019                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
2020         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2021                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
2022
2023         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
2024         max_actions = min(max_actions, nkeys * 16);
2025
2026         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
2027         if (!parse_attr->mod_hdr_actions)
2028                 return -ENOMEM;
2029
2030         parse_attr->num_mod_hdr_actions = max_actions;
2031         return 0;
2032 }
2033
2034 static const struct pedit_headers zero_masks = {};
2035
2036 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
2037                                  const struct tc_action *a, int namespace,
2038                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2039                                  struct netlink_ext_ack *extack)
2040 {
2041         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
2042         int nkeys, i, err = -EOPNOTSUPP;
2043         u32 mask, val, offset;
2044         u8 cmd, htype;
2045
2046         nkeys = tcf_pedit_nkeys(a);
2047
2048         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
2049         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
2050
2051         for (i = 0; i < nkeys; i++) {
2052                 htype = tcf_pedit_htype(a, i);
2053                 cmd = tcf_pedit_cmd(a, i);
2054                 err = -EOPNOTSUPP; /* can't be all optimistic */
2055
2056                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
2057                         NL_SET_ERR_MSG_MOD(extack,
2058                                            "legacy pedit isn't offloaded");
2059                         goto out_err;
2060                 }
2061
2062                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
2063                         NL_SET_ERR_MSG_MOD(extack, "pedit cmd isn't offloaded");
2064                         goto out_err;
2065                 }
2066
2067                 mask = tcf_pedit_mask(a, i);
2068                 val = tcf_pedit_val(a, i);
2069                 offset = tcf_pedit_offset(a, i);
2070
2071                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
2072                 if (err)
2073                         goto out_err;
2074         }
2075
2076         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
2077         if (err)
2078                 goto out_err;
2079
2080         err = offload_pedit_fields(masks, vals, parse_attr, extack);
2081         if (err < 0)
2082                 goto out_dealloc_parsed_actions;
2083
2084         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
2085                 cmd_masks = &masks[cmd];
2086                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
2087                         NL_SET_ERR_MSG_MOD(extack,
2088                                            "attempt to offload an unsupported field");
2089                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
2090                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
2091                                        16, 1, cmd_masks, sizeof(zero_masks), true);
2092                         err = -EOPNOTSUPP;
2093                         goto out_dealloc_parsed_actions;
2094                 }
2095         }
2096
2097         return 0;
2098
2099 out_dealloc_parsed_actions:
2100         kfree(parse_attr->mod_hdr_actions);
2101 out_err:
2102         return err;
2103 }
2104
2105 static bool csum_offload_supported(struct mlx5e_priv *priv,
2106                                    u32 action,
2107                                    u32 update_flags,
2108                                    struct netlink_ext_ack *extack)
2109 {
2110         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2111                          TCA_CSUM_UPDATE_FLAG_UDP;
2112
2113         /*  The HW recalcs checksums only if re-writing headers */
2114         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2115                 NL_SET_ERR_MSG_MOD(extack,
2116                                    "TC csum action is only offloaded with pedit");
2117                 netdev_warn(priv->netdev,
2118                             "TC csum action is only offloaded with pedit\n");
2119                 return false;
2120         }
2121
2122         if (update_flags & ~prot_flags) {
2123                 NL_SET_ERR_MSG_MOD(extack,
2124                                    "can't offload TC csum action for some header/s");
2125                 netdev_warn(priv->netdev,
2126                             "can't offload TC csum action for some header/s - flags %#x\n",
2127                             update_flags);
2128                 return false;
2129         }
2130
2131         return true;
2132 }
2133
2134 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
2135                                           struct tcf_exts *exts,
2136                                           struct netlink_ext_ack *extack)
2137 {
2138         const struct tc_action *a;
2139         bool modify_ip_header;
2140         LIST_HEAD(actions);
2141         u8 htype, ip_proto;
2142         void *headers_v;
2143         u16 ethertype;
2144         int nkeys, i;
2145
2146         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
2147         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2148
2149         /* for non-IP we only re-write MACs, so we're okay */
2150         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
2151                 goto out_ok;
2152
2153         modify_ip_header = false;
2154         tcf_exts_for_each_action(i, a, exts) {
2155                 int k;
2156
2157                 if (!is_tcf_pedit(a))
2158                         continue;
2159
2160                 nkeys = tcf_pedit_nkeys(a);
2161                 for (k = 0; k < nkeys; k++) {
2162                         htype = tcf_pedit_htype(a, k);
2163                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
2164                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
2165                                 modify_ip_header = true;
2166                                 break;
2167                         }
2168                 }
2169         }
2170
2171         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2172         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2173             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2174                 NL_SET_ERR_MSG_MOD(extack,
2175                                    "can't offload re-write of non TCP/UDP");
2176                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2177                 return false;
2178         }
2179
2180 out_ok:
2181         return true;
2182 }
2183
2184 static bool actions_match_supported(struct mlx5e_priv *priv,
2185                                     struct tcf_exts *exts,
2186                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2187                                     struct mlx5e_tc_flow *flow,
2188                                     struct netlink_ext_ack *extack)
2189 {
2190         u32 actions;
2191
2192         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2193                 actions = flow->esw_attr->action;
2194         else
2195                 actions = flow->nic_attr->action;
2196
2197         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2198             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2199                 return false;
2200
2201         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2202                 return modify_header_match_supported(&parse_attr->spec, exts,
2203                                                      extack);
2204
2205         return true;
2206 }
2207
2208 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2209 {
2210         struct mlx5_core_dev *fmdev, *pmdev;
2211         u64 fsystem_guid, psystem_guid;
2212
2213         fmdev = priv->mdev;
2214         pmdev = peer_priv->mdev;
2215
2216         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2217         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2218
2219         return (fsystem_guid == psystem_guid);
2220 }
2221
2222 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2223                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2224                                 struct mlx5e_tc_flow *flow,
2225                                 struct netlink_ext_ack *extack)
2226 {
2227         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2228         const struct tc_action *a;
2229         LIST_HEAD(actions);
2230         u32 action = 0;
2231         int err, i;
2232
2233         if (!tcf_exts_has_actions(exts))
2234                 return -EINVAL;
2235
2236         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2237
2238         tcf_exts_for_each_action(i, a, exts) {
2239                 if (is_tcf_gact_shot(a)) {
2240                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2241                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2242                                                flow_table_properties_nic_receive.flow_counter))
2243                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2244                         continue;
2245                 }
2246
2247                 if (is_tcf_pedit(a)) {
2248                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2249                                                     parse_attr, extack);
2250                         if (err)
2251                                 return err;
2252
2253                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2254                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2255                         continue;
2256                 }
2257
2258                 if (is_tcf_csum(a)) {
2259                         if (csum_offload_supported(priv, action,
2260                                                    tcf_csum_update_flags(a),
2261                                                    extack))
2262                                 continue;
2263
2264                         return -EOPNOTSUPP;
2265                 }
2266
2267                 if (is_tcf_mirred_egress_redirect(a)) {
2268                         struct net_device *peer_dev = tcf_mirred_dev(a);
2269
2270                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2271                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2272                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2273                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2274                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2275                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2276                         } else {
2277                                 NL_SET_ERR_MSG_MOD(extack,
2278                                                    "device is not on same HW, can't offload");
2279                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2280                                             peer_dev->name);
2281                                 return -EINVAL;
2282                         }
2283                         continue;
2284                 }
2285
2286                 if (is_tcf_skbedit_mark(a)) {
2287                         u32 mark = tcf_skbedit_mark(a);
2288
2289                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2290                                 NL_SET_ERR_MSG_MOD(extack,
2291                                                    "Bad flow mark - only 16 bit is supported");
2292                                 return -EINVAL;
2293                         }
2294
2295                         attr->flow_tag = mark;
2296                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2297                         continue;
2298                 }
2299
2300                 return -EINVAL;
2301         }
2302
2303         attr->action = action;
2304         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2305                 return -EOPNOTSUPP;
2306
2307         return 0;
2308 }
2309
2310 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2311                                  struct ip_tunnel_key *b)
2312 {
2313         return memcmp(a, b, sizeof(*a));
2314 }
2315
2316 static inline int hash_encap_info(struct ip_tunnel_key *key)
2317 {
2318         return jhash(key, sizeof(*key), 0);
2319 }
2320
2321 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2322                                    struct net_device *mirred_dev,
2323                                    struct net_device **out_dev,
2324                                    struct flowi4 *fl4,
2325                                    struct neighbour **out_n,
2326                                    u8 *out_ttl)
2327 {
2328         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2329         struct mlx5e_rep_priv *uplink_rpriv;
2330         struct rtable *rt;
2331         struct neighbour *n = NULL;
2332
2333 #if IS_ENABLED(CONFIG_INET)
2334         int ret;
2335
2336         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2337         ret = PTR_ERR_OR_ZERO(rt);
2338         if (ret)
2339                 return ret;
2340 #else
2341         return -EOPNOTSUPP;
2342 #endif
2343         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2344         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2345         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2346                 *out_dev = uplink_rpriv->netdev;
2347         else
2348                 *out_dev = rt->dst.dev;
2349
2350         if (!(*out_ttl))
2351                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2352         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2353         ip_rt_put(rt);
2354         if (!n)
2355                 return -ENOMEM;
2356
2357         *out_n = n;
2358         return 0;
2359 }
2360
2361 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2362                                   struct net_device *peer_netdev)
2363 {
2364         struct mlx5e_priv *peer_priv;
2365
2366         peer_priv = netdev_priv(peer_netdev);
2367
2368         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2369                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2370                 same_hw_devs(priv, peer_priv) &&
2371                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2372                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2373 }
2374
2375 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2376                                    struct net_device *mirred_dev,
2377                                    struct net_device **out_dev,
2378                                    struct flowi6 *fl6,
2379                                    struct neighbour **out_n,
2380                                    u8 *out_ttl)
2381 {
2382         struct neighbour *n = NULL;
2383         struct dst_entry *dst;
2384
2385 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2386         struct mlx5e_rep_priv *uplink_rpriv;
2387         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2388         int ret;
2389
2390         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2391                                          fl6);
2392         if (ret < 0)
2393                 return ret;
2394
2395         if (!(*out_ttl))
2396                 *out_ttl = ip6_dst_hoplimit(dst);
2397
2398         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2399         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2400         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2401                 *out_dev = uplink_rpriv->netdev;
2402         else
2403                 *out_dev = dst->dev;
2404 #else
2405         return -EOPNOTSUPP;
2406 #endif
2407
2408         n = dst_neigh_lookup(dst, &fl6->daddr);
2409         dst_release(dst);
2410         if (!n)
2411                 return -ENOMEM;
2412
2413         *out_n = n;
2414         return 0;
2415 }
2416
2417 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2418                                   char buf[], int encap_size,
2419                                   unsigned char h_dest[ETH_ALEN],
2420                                   u8 tos, u8 ttl,
2421                                   __be32 daddr,
2422                                   __be32 saddr,
2423                                   __be16 udp_dst_port,
2424                                   __be32 vx_vni)
2425 {
2426         struct ethhdr *eth = (struct ethhdr *)buf;
2427         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2428         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2429         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2430
2431         memset(buf, 0, encap_size);
2432
2433         ether_addr_copy(eth->h_dest, h_dest);
2434         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2435         eth->h_proto = htons(ETH_P_IP);
2436
2437         ip->daddr = daddr;
2438         ip->saddr = saddr;
2439
2440         ip->tos = tos;
2441         ip->ttl = ttl;
2442         ip->protocol = IPPROTO_UDP;
2443         ip->version = 0x4;
2444         ip->ihl = 0x5;
2445
2446         udp->dest = udp_dst_port;
2447         vxh->vx_flags = VXLAN_HF_VNI;
2448         vxh->vx_vni = vxlan_vni_field(vx_vni);
2449 }
2450
2451 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2452                                   char buf[], int encap_size,
2453                                   unsigned char h_dest[ETH_ALEN],
2454                                   u8 tos, u8 ttl,
2455                                   struct in6_addr *daddr,
2456                                   struct in6_addr *saddr,
2457                                   __be16 udp_dst_port,
2458                                   __be32 vx_vni)
2459 {
2460         struct ethhdr *eth = (struct ethhdr *)buf;
2461         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2462         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2463         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2464
2465         memset(buf, 0, encap_size);
2466
2467         ether_addr_copy(eth->h_dest, h_dest);
2468         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2469         eth->h_proto = htons(ETH_P_IPV6);
2470
2471         ip6_flow_hdr(ip6h, tos, 0);
2472         /* the HW fills up ipv6 payload len */
2473         ip6h->nexthdr     = IPPROTO_UDP;
2474         ip6h->hop_limit   = ttl;
2475         ip6h->daddr       = *daddr;
2476         ip6h->saddr       = *saddr;
2477
2478         udp->dest = udp_dst_port;
2479         vxh->vx_flags = VXLAN_HF_VNI;
2480         vxh->vx_vni = vxlan_vni_field(vx_vni);
2481 }
2482
2483 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2484                                           struct net_device *mirred_dev,
2485                                           struct mlx5e_encap_entry *e)
2486 {
2487         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2488         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2489         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2490         struct net_device *out_dev;
2491         struct neighbour *n = NULL;
2492         struct flowi4 fl4 = {};
2493         u8 nud_state, tos, ttl;
2494         char *encap_header;
2495         int err;
2496
2497         if (max_encap_size < ipv4_encap_size) {
2498                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2499                                ipv4_encap_size, max_encap_size);
2500                 return -EOPNOTSUPP;
2501         }
2502
2503         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2504         if (!encap_header)
2505                 return -ENOMEM;
2506
2507         switch (e->tunnel_type) {
2508         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2509                 fl4.flowi4_proto = IPPROTO_UDP;
2510                 fl4.fl4_dport = tun_key->tp_dst;
2511                 break;
2512         default:
2513                 err = -EOPNOTSUPP;
2514                 goto free_encap;
2515         }
2516
2517         tos = tun_key->tos;
2518         ttl = tun_key->ttl;
2519
2520         fl4.flowi4_tos = tun_key->tos;
2521         fl4.daddr = tun_key->u.ipv4.dst;
2522         fl4.saddr = tun_key->u.ipv4.src;
2523
2524         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2525                                       &fl4, &n, &ttl);
2526         if (err)
2527                 goto free_encap;
2528
2529         /* used by mlx5e_detach_encap to lookup a neigh hash table
2530          * entry in the neigh hash table when a user deletes a rule
2531          */
2532         e->m_neigh.dev = n->dev;
2533         e->m_neigh.family = n->ops->family;
2534         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2535         e->out_dev = out_dev;
2536
2537         /* It's importent to add the neigh to the hash table before checking
2538          * the neigh validity state. So if we'll get a notification, in case the
2539          * neigh changes it's validity state, we would find the relevant neigh
2540          * in the hash.
2541          */
2542         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2543         if (err)
2544                 goto free_encap;
2545
2546         read_lock_bh(&n->lock);
2547         nud_state = n->nud_state;
2548         ether_addr_copy(e->h_dest, n->ha);
2549         read_unlock_bh(&n->lock);
2550
2551         switch (e->tunnel_type) {
2552         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2553                 gen_vxlan_header_ipv4(out_dev, encap_header,
2554                                       ipv4_encap_size, e->h_dest, tos, ttl,
2555                                       fl4.daddr,
2556                                       fl4.saddr, tun_key->tp_dst,
2557                                       tunnel_id_to_key32(tun_key->tun_id));
2558                 break;
2559         default:
2560                 err = -EOPNOTSUPP;
2561                 goto destroy_neigh_entry;
2562         }
2563         e->encap_size = ipv4_encap_size;
2564         e->encap_header = encap_header;
2565
2566         if (!(nud_state & NUD_VALID)) {
2567                 neigh_event_send(n, NULL);
2568                 err = -EAGAIN;
2569                 goto out;
2570         }
2571
2572         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2573                                          ipv4_encap_size, encap_header,
2574                                          MLX5_FLOW_NAMESPACE_FDB,
2575                                          &e->encap_id);
2576         if (err)
2577                 goto destroy_neigh_entry;
2578
2579         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2580         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2581         neigh_release(n);
2582         return err;
2583
2584 destroy_neigh_entry:
2585         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2586 free_encap:
2587         kfree(encap_header);
2588 out:
2589         if (n)
2590                 neigh_release(n);
2591         return err;
2592 }
2593
2594 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2595                                           struct net_device *mirred_dev,
2596                                           struct mlx5e_encap_entry *e)
2597 {
2598         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2599         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2600         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2601         struct net_device *out_dev;
2602         struct neighbour *n = NULL;
2603         struct flowi6 fl6 = {};
2604         u8 nud_state, tos, ttl;
2605         char *encap_header;
2606         int err;
2607
2608         if (max_encap_size < ipv6_encap_size) {
2609                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2610                                ipv6_encap_size, max_encap_size);
2611                 return -EOPNOTSUPP;
2612         }
2613
2614         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2615         if (!encap_header)
2616                 return -ENOMEM;
2617
2618         switch (e->tunnel_type) {
2619         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2620                 fl6.flowi6_proto = IPPROTO_UDP;
2621                 fl6.fl6_dport = tun_key->tp_dst;
2622                 break;
2623         default:
2624                 err = -EOPNOTSUPP;
2625                 goto free_encap;
2626         }
2627
2628         tos = tun_key->tos;
2629         ttl = tun_key->ttl;
2630
2631         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2632         fl6.daddr = tun_key->u.ipv6.dst;
2633         fl6.saddr = tun_key->u.ipv6.src;
2634
2635         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2636                                       &fl6, &n, &ttl);
2637         if (err)
2638                 goto free_encap;
2639
2640         /* used by mlx5e_detach_encap to lookup a neigh hash table
2641          * entry in the neigh hash table when a user deletes a rule
2642          */
2643         e->m_neigh.dev = n->dev;
2644         e->m_neigh.family = n->ops->family;
2645         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2646         e->out_dev = out_dev;
2647
2648         /* It's importent to add the neigh to the hash table before checking
2649          * the neigh validity state. So if we'll get a notification, in case the
2650          * neigh changes it's validity state, we would find the relevant neigh
2651          * in the hash.
2652          */
2653         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2654         if (err)
2655                 goto free_encap;
2656
2657         read_lock_bh(&n->lock);
2658         nud_state = n->nud_state;
2659         ether_addr_copy(e->h_dest, n->ha);
2660         read_unlock_bh(&n->lock);
2661
2662         switch (e->tunnel_type) {
2663         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2664                 gen_vxlan_header_ipv6(out_dev, encap_header,
2665                                       ipv6_encap_size, e->h_dest, tos, ttl,
2666                                       &fl6.daddr,
2667                                       &fl6.saddr, tun_key->tp_dst,
2668                                       tunnel_id_to_key32(tun_key->tun_id));
2669                 break;
2670         default:
2671                 err = -EOPNOTSUPP;
2672                 goto destroy_neigh_entry;
2673         }
2674
2675         e->encap_size = ipv6_encap_size;
2676         e->encap_header = encap_header;
2677
2678         if (!(nud_state & NUD_VALID)) {
2679                 neigh_event_send(n, NULL);
2680                 err = -EAGAIN;
2681                 goto out;
2682         }
2683
2684         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2685                                          ipv6_encap_size, encap_header,
2686                                          MLX5_FLOW_NAMESPACE_FDB,
2687                                          &e->encap_id);
2688         if (err)
2689                 goto destroy_neigh_entry;
2690
2691         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2692         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2693         neigh_release(n);
2694         return err;
2695
2696 destroy_neigh_entry:
2697         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2698 free_encap:
2699         kfree(encap_header);
2700 out:
2701         if (n)
2702                 neigh_release(n);
2703         return err;
2704 }
2705
2706 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2707                               struct ip_tunnel_info *tun_info,
2708                               struct net_device *mirred_dev,
2709                               struct net_device **encap_dev,
2710                               struct mlx5e_tc_flow *flow,
2711                               struct netlink_ext_ack *extack)
2712 {
2713         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2714         unsigned short family = ip_tunnel_info_af(tun_info);
2715         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2716         struct ip_tunnel_key *key = &tun_info->key;
2717         struct mlx5e_encap_entry *e;
2718         int tunnel_type, err = 0;
2719         uintptr_t hash_key;
2720         bool found = false;
2721
2722         /* udp dst port must be set */
2723         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2724                 goto vxlan_encap_offload_err;
2725
2726         /* setting udp src port isn't supported */
2727         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2728 vxlan_encap_offload_err:
2729                 NL_SET_ERR_MSG_MOD(extack,
2730                                    "must set udp dst port and not set udp src port");
2731                 netdev_warn(priv->netdev,
2732                             "must set udp dst port and not set udp src port\n");
2733                 return -EOPNOTSUPP;
2734         }
2735
2736         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2737             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2738                 tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
2739         } else {
2740                 NL_SET_ERR_MSG_MOD(extack,
2741                                    "port isn't an offloaded vxlan udp dport");
2742                 netdev_warn(priv->netdev,
2743                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2744                 return -EOPNOTSUPP;
2745         }
2746
2747         hash_key = hash_encap_info(key);
2748
2749         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2750                                    encap_hlist, hash_key) {
2751                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2752                         found = true;
2753                         break;
2754                 }
2755         }
2756
2757         /* must verify if encap is valid or not */
2758         if (found)
2759                 goto attach_flow;
2760
2761         e = kzalloc(sizeof(*e), GFP_KERNEL);
2762         if (!e)
2763                 return -ENOMEM;
2764
2765         e->tun_info = *tun_info;
2766         e->tunnel_type = tunnel_type;
2767         INIT_LIST_HEAD(&e->flows);
2768
2769         if (family == AF_INET)
2770                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2771         else if (family == AF_INET6)
2772                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2773
2774         if (err && err != -EAGAIN)
2775                 goto out_err;
2776
2777         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2778
2779 attach_flow:
2780         list_add(&flow->encap, &e->flows);
2781         *encap_dev = e->out_dev;
2782         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2783                 attr->encap_id = e->encap_id;
2784         else
2785                 err = -EAGAIN;
2786
2787         return err;
2788
2789 out_err:
2790         kfree(e);
2791         return err;
2792 }
2793
2794 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2795                                 const struct tc_action *a,
2796                                 struct mlx5_esw_flow_attr *attr,
2797                                 u32 *action)
2798 {
2799         u8 vlan_idx = attr->total_vlan;
2800
2801         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2802                 return -EOPNOTSUPP;
2803
2804         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2805                 if (vlan_idx) {
2806                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2807                                                                  MLX5_FS_VLAN_DEPTH))
2808                                 return -EOPNOTSUPP;
2809
2810                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2811                 } else {
2812                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2813                 }
2814         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2815                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2816                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2817                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2818                 if (!attr->vlan_proto[vlan_idx])
2819                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2820
2821                 if (vlan_idx) {
2822                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2823                                                                  MLX5_FS_VLAN_DEPTH))
2824                                 return -EOPNOTSUPP;
2825
2826                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2827                 } else {
2828                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2829                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2830                              tcf_vlan_push_prio(a)))
2831                                 return -EOPNOTSUPP;
2832
2833                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2834                 }
2835         } else { /* action is TCA_VLAN_ACT_MODIFY */
2836                 return -EOPNOTSUPP;
2837         }
2838
2839         attr->total_vlan = vlan_idx + 1;
2840
2841         return 0;
2842 }
2843
2844 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2845                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2846                                 struct mlx5e_tc_flow *flow,
2847                                 struct netlink_ext_ack *extack)
2848 {
2849         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2850         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2851         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2852         struct ip_tunnel_info *info = NULL;
2853         const struct tc_action *a;
2854         LIST_HEAD(actions);
2855         bool encap = false;
2856         u32 action = 0;
2857         int err, i;
2858
2859         if (!tcf_exts_has_actions(exts))
2860                 return -EINVAL;
2861
2862         attr->in_rep = rpriv->rep;
2863         attr->in_mdev = priv->mdev;
2864
2865         tcf_exts_for_each_action(i, a, exts) {
2866                 if (is_tcf_gact_shot(a)) {
2867                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2868                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2869                         continue;
2870                 }
2871
2872                 if (is_tcf_pedit(a)) {
2873                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2874                                                     parse_attr, extack);
2875                         if (err)
2876                                 return err;
2877
2878                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2879                         attr->mirror_count = attr->out_count;
2880                         continue;
2881                 }
2882
2883                 if (is_tcf_csum(a)) {
2884                         if (csum_offload_supported(priv, action,
2885                                                    tcf_csum_update_flags(a),
2886                                                    extack))
2887                                 continue;
2888
2889                         return -EOPNOTSUPP;
2890                 }
2891
2892                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2893                         struct mlx5e_priv *out_priv;
2894                         struct net_device *out_dev;
2895
2896                         out_dev = tcf_mirred_dev(a);
2897
2898                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2899                                 NL_SET_ERR_MSG_MOD(extack,
2900                                                    "can't support more output ports, can't offload forwarding");
2901                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2902                                        attr->out_count);
2903                                 return -EOPNOTSUPP;
2904                         }
2905
2906                         if (switchdev_port_same_parent_id(priv->netdev,
2907                                                           out_dev) ||
2908                             is_merged_eswitch_dev(priv, out_dev)) {
2909                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2910                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2911                                 out_priv = netdev_priv(out_dev);
2912                                 rpriv = out_priv->ppriv;
2913                                 attr->out_rep[attr->out_count] = rpriv->rep;
2914                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2915                         } else if (encap) {
2916                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2917                                 parse_attr->tun_info = *info;
2918                                 attr->parse_attr = parse_attr;
2919                                 action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
2920                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2921                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2922                                 /* attr->out_rep is resolved when we handle encap */
2923                         } else {
2924                                 NL_SET_ERR_MSG_MOD(extack,
2925                                                    "devices are not on same switch HW, can't offload forwarding");
2926                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2927                                        priv->netdev->name, out_dev->name);
2928                                 return -EINVAL;
2929                         }
2930                         continue;
2931                 }
2932
2933                 if (is_tcf_tunnel_set(a)) {
2934                         info = tcf_tunnel_info(a);
2935                         if (info)
2936                                 encap = true;
2937                         else
2938                                 return -EOPNOTSUPP;
2939                         attr->mirror_count = attr->out_count;
2940                         continue;
2941                 }
2942
2943                 if (is_tcf_vlan(a)) {
2944                         err = parse_tc_vlan_action(priv, a, attr, &action);
2945
2946                         if (err)
2947                                 return err;
2948
2949                         attr->mirror_count = attr->out_count;
2950                         continue;
2951                 }
2952
2953                 if (is_tcf_tunnel_release(a)) {
2954                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2955                         continue;
2956                 }
2957
2958                 if (is_tcf_gact_goto_chain(a)) {
2959                         u32 dest_chain = tcf_gact_goto_chain_index(a);
2960                         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
2961
2962                         if (dest_chain <= attr->chain) {
2963                                 NL_SET_ERR_MSG(extack, "Goto earlier chain isn't supported");
2964                                 return -EOPNOTSUPP;
2965                         }
2966                         if (dest_chain > max_chain) {
2967                                 NL_SET_ERR_MSG(extack, "Requested destination chain is out of supported range");
2968                                 return -EOPNOTSUPP;
2969                         }
2970                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2971                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2972                         attr->dest_chain = dest_chain;
2973
2974                         continue;
2975                 }
2976
2977                 return -EINVAL;
2978         }
2979
2980         attr->action = action;
2981         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2982                 return -EOPNOTSUPP;
2983
2984         if (attr->mirror_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2985                 NL_SET_ERR_MSG_MOD(extack,
2986                                    "current firmware doesn't support split rule for port mirroring");
2987                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2988                 return -EOPNOTSUPP;
2989         }
2990
2991         return 0;
2992 }
2993
2994 static void get_flags(int flags, u16 *flow_flags)
2995 {
2996         u16 __flow_flags = 0;
2997
2998         if (flags & MLX5E_TC_INGRESS)
2999                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
3000         if (flags & MLX5E_TC_EGRESS)
3001                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
3002
3003         *flow_flags = __flow_flags;
3004 }
3005
3006 static const struct rhashtable_params tc_ht_params = {
3007         .head_offset = offsetof(struct mlx5e_tc_flow, node),
3008         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
3009         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
3010         .automatic_shrinking = true,
3011 };
3012
3013 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
3014 {
3015         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3016         struct mlx5e_rep_priv *uplink_rpriv;
3017
3018         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
3019                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
3020                 return &uplink_rpriv->tc_ht;
3021         } else
3022                 return &priv->fs.tc.ht;
3023 }
3024
3025 static int
3026 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
3027                  struct tc_cls_flower_offload *f, u16 flow_flags,
3028                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
3029                  struct mlx5e_tc_flow **__flow)
3030 {
3031         struct mlx5e_tc_flow_parse_attr *parse_attr;
3032         struct mlx5e_tc_flow *flow;
3033         int err;
3034
3035         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
3036         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
3037         if (!parse_attr || !flow) {
3038                 err = -ENOMEM;
3039                 goto err_free;
3040         }
3041
3042         flow->cookie = f->cookie;
3043         flow->flags = flow_flags;
3044         flow->priv = priv;
3045
3046         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
3047         if (err)
3048                 goto err_free;
3049
3050         *__flow = flow;
3051         *__parse_attr = parse_attr;
3052
3053         return 0;
3054
3055 err_free:
3056         kfree(flow);
3057         kvfree(parse_attr);
3058         return err;
3059 }
3060
3061 static int
3062 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
3063                    struct tc_cls_flower_offload *f,
3064                    u16 flow_flags,
3065                    struct mlx5e_tc_flow **__flow)
3066 {
3067         struct netlink_ext_ack *extack = f->common.extack;
3068         struct mlx5e_tc_flow_parse_attr *parse_attr;
3069         struct mlx5e_tc_flow *flow;
3070         int attr_size, err;
3071
3072         flow_flags |= MLX5E_TC_FLOW_ESWITCH;
3073         attr_size  = sizeof(struct mlx5_esw_flow_attr);
3074         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3075                                &parse_attr, &flow);
3076         if (err)
3077                 goto out;
3078
3079         flow->esw_attr->chain = f->common.chain_index;
3080         flow->esw_attr->prio = TC_H_MAJ(f->common.prio) >> 16;
3081         err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow, extack);
3082         if (err)
3083                 goto err_free;
3084
3085         err = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow, extack);
3086         if (err)
3087                 goto err_free;
3088
3089         if (!(flow->esw_attr->action &
3090               MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT))
3091                 kvfree(parse_attr);
3092
3093         *__flow = flow;
3094
3095         return 0;
3096
3097 err_free:
3098         kfree(flow);
3099         kvfree(parse_attr);
3100 out:
3101         return err;
3102 }
3103
3104 static int
3105 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
3106                    struct tc_cls_flower_offload *f,
3107                    u16 flow_flags,
3108                    struct mlx5e_tc_flow **__flow)
3109 {
3110         struct netlink_ext_ack *extack = f->common.extack;
3111         struct mlx5e_tc_flow_parse_attr *parse_attr;
3112         struct mlx5e_tc_flow *flow;
3113         int attr_size, err;
3114
3115         /* multi-chain not supported for NIC rules */
3116         if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
3117                 return -EOPNOTSUPP;
3118
3119         flow_flags |= MLX5E_TC_FLOW_NIC;
3120         attr_size  = sizeof(struct mlx5_nic_flow_attr);
3121         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3122                                &parse_attr, &flow);
3123         if (err)
3124                 goto out;
3125
3126         err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow, extack);
3127         if (err)
3128                 goto err_free;
3129
3130         err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
3131         if (err)
3132                 goto err_free;
3133
3134         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
3135         kvfree(parse_attr);
3136         *__flow = flow;
3137
3138         return 0;
3139
3140 err_free:
3141         kfree(flow);
3142         kvfree(parse_attr);
3143 out:
3144         return err;
3145 }
3146
3147 static int
3148 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
3149                   struct tc_cls_flower_offload *f,
3150                   int flags,
3151                   struct mlx5e_tc_flow **flow)
3152 {
3153         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3154         u16 flow_flags;
3155         int err;
3156
3157         get_flags(flags, &flow_flags);
3158
3159         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
3160                 return -EOPNOTSUPP;
3161
3162         if (esw && esw->mode == SRIOV_OFFLOADS)
3163                 err = mlx5e_add_fdb_flow(priv, f, flow_flags, flow);
3164         else
3165                 err = mlx5e_add_nic_flow(priv, f, flow_flags, flow);
3166
3167         return err;
3168 }
3169
3170 int mlx5e_configure_flower(struct mlx5e_priv *priv,
3171                            struct tc_cls_flower_offload *f, int flags)
3172 {
3173         struct netlink_ext_ack *extack = f->common.extack;
3174         struct rhashtable *tc_ht = get_tc_ht(priv);
3175         struct mlx5e_tc_flow *flow;
3176         int err = 0;
3177
3178         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3179         if (flow) {
3180                 NL_SET_ERR_MSG_MOD(extack,
3181                                    "flow cookie already exists, ignoring");
3182                 netdev_warn_once(priv->netdev,
3183                                  "flow cookie %lx already exists, ignoring\n",
3184                                  f->cookie);
3185                 goto out;
3186         }
3187
3188         err = mlx5e_tc_add_flow(priv, f, flags, &flow);
3189         if (err)
3190                 goto out;
3191
3192         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
3193         if (err)
3194                 goto err_free;
3195
3196         return 0;
3197
3198 err_free:
3199         mlx5e_tc_del_flow(priv, flow);
3200         kfree(flow);
3201 out:
3202         return err;
3203 }
3204
3205 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
3206 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
3207
3208 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
3209 {
3210         if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
3211                 return true;
3212
3213         return false;
3214 }
3215
3216 int mlx5e_delete_flower(struct mlx5e_priv *priv,
3217                         struct tc_cls_flower_offload *f, int flags)
3218 {
3219         struct rhashtable *tc_ht = get_tc_ht(priv);
3220         struct mlx5e_tc_flow *flow;
3221
3222         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3223         if (!flow || !same_flow_direction(flow, flags))
3224                 return -EINVAL;
3225
3226         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
3227
3228         mlx5e_tc_del_flow(priv, flow);
3229
3230         kfree(flow);
3231
3232         return 0;
3233 }
3234
3235 int mlx5e_stats_flower(struct mlx5e_priv *priv,
3236                        struct tc_cls_flower_offload *f, int flags)
3237 {
3238         struct rhashtable *tc_ht = get_tc_ht(priv);
3239         struct mlx5e_tc_flow *flow;
3240         struct mlx5_fc *counter;
3241         u64 bytes;
3242         u64 packets;
3243         u64 lastuse;
3244
3245         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3246         if (!flow || !same_flow_direction(flow, flags))
3247                 return -EINVAL;
3248
3249         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
3250                 return 0;
3251
3252         counter = mlx5e_tc_get_counter(flow);
3253         if (!counter)
3254                 return 0;
3255
3256         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
3257
3258         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
3259
3260         return 0;
3261 }
3262
3263 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
3264                                               struct mlx5e_priv *peer_priv)
3265 {
3266         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
3267         struct mlx5e_hairpin_entry *hpe;
3268         u16 peer_vhca_id;
3269         int bkt;
3270
3271         if (!same_hw_devs(priv, peer_priv))
3272                 return;
3273
3274         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
3275
3276         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) {
3277                 if (hpe->peer_vhca_id == peer_vhca_id)
3278                         hpe->hp->pair->peer_gone = true;
3279         }
3280 }
3281
3282 static int mlx5e_tc_netdev_event(struct notifier_block *this,
3283                                  unsigned long event, void *ptr)
3284 {
3285         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
3286         struct mlx5e_flow_steering *fs;
3287         struct mlx5e_priv *peer_priv;
3288         struct mlx5e_tc_table *tc;
3289         struct mlx5e_priv *priv;
3290
3291         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
3292             event != NETDEV_UNREGISTER ||
3293             ndev->reg_state == NETREG_REGISTERED)
3294                 return NOTIFY_DONE;
3295
3296         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
3297         fs = container_of(tc, struct mlx5e_flow_steering, tc);
3298         priv = container_of(fs, struct mlx5e_priv, fs);
3299         peer_priv = netdev_priv(ndev);
3300         if (priv == peer_priv ||
3301             !(priv->netdev->features & NETIF_F_HW_TC))
3302                 return NOTIFY_DONE;
3303
3304         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
3305
3306         return NOTIFY_DONE;
3307 }
3308
3309 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
3310 {
3311         struct mlx5e_tc_table *tc = &priv->fs.tc;
3312         int err;
3313
3314         hash_init(tc->mod_hdr_tbl);
3315         hash_init(tc->hairpin_tbl);
3316
3317         err = rhashtable_init(&tc->ht, &tc_ht_params);
3318         if (err)
3319                 return err;
3320
3321         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
3322         if (register_netdevice_notifier(&tc->netdevice_nb)) {
3323                 tc->netdevice_nb.notifier_call = NULL;
3324                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
3325         }
3326
3327         return err;
3328 }
3329
3330 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
3331 {
3332         struct mlx5e_tc_flow *flow = ptr;
3333         struct mlx5e_priv *priv = flow->priv;
3334
3335         mlx5e_tc_del_flow(priv, flow);
3336         kfree(flow);
3337 }
3338
3339 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
3340 {
3341         struct mlx5e_tc_table *tc = &priv->fs.tc;
3342
3343         if (tc->netdevice_nb.notifier_call)
3344                 unregister_netdevice_notifier(&tc->netdevice_nb);
3345
3346         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
3347
3348         if (!IS_ERR_OR_NULL(tc->t)) {
3349                 mlx5_destroy_flow_table(tc->t);
3350                 tc->t = NULL;
3351         }
3352 }
3353
3354 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
3355 {
3356         return rhashtable_init(tc_ht, &tc_ht_params);
3357 }
3358
3359 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
3360 {
3361         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
3362 }
3363
3364 int mlx5e_tc_num_filters(struct mlx5e_priv *priv)
3365 {
3366         struct rhashtable *tc_ht = get_tc_ht(priv);
3367
3368         return atomic_read(&tc_ht->nelems);
3369 }