2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
56 struct mlx5_nic_flow_attr {
62 struct mlx5_flow_table *hairpin_ft;
66 MLX5E_TC_FLOW_ESWITCH = BIT(0),
67 MLX5E_TC_FLOW_NIC = BIT(1),
68 MLX5E_TC_FLOW_OFFLOADED = BIT(2),
69 MLX5E_TC_FLOW_HAIRPIN = BIT(3),
70 MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(4),
73 struct mlx5e_tc_flow {
74 struct rhash_head node;
77 struct mlx5_flow_handle *rule;
78 struct list_head encap; /* flows sharing the same encap ID */
79 struct list_head mod_hdr; /* flows sharing the same mod hdr ID */
80 struct list_head hairpin; /* flows sharing the same hairpin */
82 struct mlx5_esw_flow_attr esw_attr[0];
83 struct mlx5_nic_flow_attr nic_attr[0];
87 struct mlx5e_tc_flow_parse_attr {
88 struct ip_tunnel_info tun_info;
89 struct mlx5_flow_spec spec;
90 int num_mod_hdr_actions;
91 void *mod_hdr_actions;
96 MLX5_HEADER_TYPE_VXLAN = 0x0,
97 MLX5_HEADER_TYPE_NVGRE = 0x1,
100 #define MLX5E_TC_TABLE_NUM_GROUPS 4
101 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
103 struct mlx5e_hairpin {
104 struct mlx5_hairpin *pair;
106 struct mlx5_core_dev *func_mdev;
107 struct mlx5e_priv *func_priv;
112 struct mlx5e_rqt indir_rqt;
113 u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
114 struct mlx5e_ttc_table ttc;
117 struct mlx5e_hairpin_entry {
118 /* a node of a hash table which keeps all the hairpin entries */
119 struct hlist_node hairpin_hlist;
121 /* flows sharing the same hairpin */
122 struct list_head flows;
126 struct mlx5e_hairpin *hp;
134 struct mlx5e_mod_hdr_entry {
135 /* a node of a hash table which keeps all the mod_hdr entries */
136 struct hlist_node mod_hdr_hlist;
138 /* flows sharing the same mod_hdr entry */
139 struct list_head flows;
141 struct mod_hdr_key key;
146 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
148 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
150 return jhash(key->actions,
151 key->num_actions * MLX5_MH_ACT_SZ, 0);
154 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
155 struct mod_hdr_key *b)
157 if (a->num_actions != b->num_actions)
160 return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
163 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
164 struct mlx5e_tc_flow *flow,
165 struct mlx5e_tc_flow_parse_attr *parse_attr)
167 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
168 int num_actions, actions_size, namespace, err;
169 struct mlx5e_mod_hdr_entry *mh;
170 struct mod_hdr_key key;
174 num_actions = parse_attr->num_mod_hdr_actions;
175 actions_size = MLX5_MH_ACT_SZ * num_actions;
177 key.actions = parse_attr->mod_hdr_actions;
178 key.num_actions = num_actions;
180 hash_key = hash_mod_hdr_info(&key);
182 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
183 namespace = MLX5_FLOW_NAMESPACE_FDB;
184 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
185 mod_hdr_hlist, hash_key) {
186 if (!cmp_mod_hdr_info(&mh->key, &key)) {
192 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
193 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
194 mod_hdr_hlist, hash_key) {
195 if (!cmp_mod_hdr_info(&mh->key, &key)) {
205 mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
209 mh->key.actions = (void *)mh + sizeof(*mh);
210 memcpy(mh->key.actions, key.actions, actions_size);
211 mh->key.num_actions = num_actions;
212 INIT_LIST_HEAD(&mh->flows);
214 err = mlx5_modify_header_alloc(priv->mdev, namespace,
221 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
222 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
224 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
227 list_add(&flow->mod_hdr, &mh->flows);
228 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
229 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
231 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
240 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
241 struct mlx5e_tc_flow *flow)
243 struct list_head *next = flow->mod_hdr.next;
245 list_del(&flow->mod_hdr);
247 if (list_empty(next)) {
248 struct mlx5e_mod_hdr_entry *mh;
250 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
252 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
253 hash_del(&mh->mod_hdr_hlist);
259 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
261 struct net_device *netdev;
262 struct mlx5e_priv *priv;
264 netdev = __dev_get_by_index(net, ifindex);
265 priv = netdev_priv(netdev);
269 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
271 u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
275 err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
279 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
281 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
282 MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
283 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
285 err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
292 mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
297 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
299 mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
300 mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
303 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
305 u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
306 struct mlx5e_priv *priv = hp->func_priv;
307 int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
309 mlx5e_build_default_indir_rqt(indirection_rqt, sz,
312 for (i = 0; i < sz; i++) {
314 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
315 ix = mlx5e_bits_invert(i, ilog2(sz));
316 ix = indirection_rqt[ix];
317 rqn = hp->pair->rqn[ix];
318 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
322 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
324 int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
325 struct mlx5e_priv *priv = hp->func_priv;
326 struct mlx5_core_dev *mdev = priv->mdev;
330 inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
331 in = kvzalloc(inlen, GFP_KERNEL);
335 rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
337 MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
338 MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
340 mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
342 err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
344 hp->indir_rqt.enabled = true;
350 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
352 struct mlx5e_priv *priv = hp->func_priv;
353 u32 in[MLX5_ST_SZ_DW(create_tir_in)];
357 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
358 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
359 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
361 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
362 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
363 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
364 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
366 err = mlx5_core_create_tir(hp->func_mdev, in,
367 MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
369 mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
370 goto err_destroy_tirs;
376 for (i = 0; i < tt; i++)
377 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
381 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
385 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
386 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
389 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
390 struct ttc_params *ttc_params)
392 struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
395 memset(ttc_params, 0, sizeof(*ttc_params));
397 ttc_params->any_tt_tirn = hp->tirn;
399 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
400 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
402 ft_attr->max_fte = MLX5E_NUM_TT;
403 ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
404 ft_attr->prio = MLX5E_TC_PRIO;
407 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
409 struct mlx5e_priv *priv = hp->func_priv;
410 struct ttc_params ttc_params;
413 err = mlx5e_hairpin_create_indirect_rqt(hp);
417 err = mlx5e_hairpin_create_indirect_tirs(hp);
419 goto err_create_indirect_tirs;
421 mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
422 err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
424 goto err_create_ttc_table;
426 netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
427 hp->num_channels, hp->ttc.ft.t->id);
431 err_create_ttc_table:
432 mlx5e_hairpin_destroy_indirect_tirs(hp);
433 err_create_indirect_tirs:
434 mlx5e_destroy_rqt(priv, &hp->indir_rqt);
439 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
441 struct mlx5e_priv *priv = hp->func_priv;
443 mlx5e_destroy_ttc_table(priv, &hp->ttc);
444 mlx5e_hairpin_destroy_indirect_tirs(hp);
445 mlx5e_destroy_rqt(priv, &hp->indir_rqt);
448 static struct mlx5e_hairpin *
449 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
452 struct mlx5_core_dev *func_mdev, *peer_mdev;
453 struct mlx5e_hairpin *hp;
454 struct mlx5_hairpin *pair;
457 hp = kzalloc(sizeof(*hp), GFP_KERNEL);
459 return ERR_PTR(-ENOMEM);
461 func_mdev = priv->mdev;
462 peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
464 pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
467 goto create_pair_err;
470 hp->func_mdev = func_mdev;
471 hp->func_priv = priv;
472 hp->num_channels = params->num_channels;
474 err = mlx5e_hairpin_create_transport(hp);
476 goto create_transport_err;
478 if (hp->num_channels > 1) {
479 err = mlx5e_hairpin_rss_init(hp);
487 mlx5e_hairpin_destroy_transport(hp);
488 create_transport_err:
489 mlx5_core_hairpin_destroy(hp->pair);
495 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
497 if (hp->num_channels > 1)
498 mlx5e_hairpin_rss_cleanup(hp);
499 mlx5e_hairpin_destroy_transport(hp);
500 mlx5_core_hairpin_destroy(hp->pair);
504 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
506 return (peer_vhca_id << 16 | prio);
509 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
510 u16 peer_vhca_id, u8 prio)
512 struct mlx5e_hairpin_entry *hpe;
513 u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
515 hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
516 hairpin_hlist, hash_key) {
517 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
524 #define UNKNOWN_MATCH_PRIO 8
526 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
527 struct mlx5_flow_spec *spec, u8 *match_prio)
529 void *headers_c, *headers_v;
530 u8 prio_val, prio_mask = 0;
533 #ifdef CONFIG_MLX5_CORE_EN_DCB
534 if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
535 netdev_warn(priv->netdev,
536 "only PCP trust state supported for hairpin\n");
540 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
541 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
543 vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
545 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
546 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
549 if (!vlan_present || !prio_mask) {
550 prio_val = UNKNOWN_MATCH_PRIO;
551 } else if (prio_mask != 0x7) {
552 netdev_warn(priv->netdev,
553 "masked priority match not supported for hairpin\n");
557 *match_prio = prio_val;
561 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
562 struct mlx5e_tc_flow *flow,
563 struct mlx5e_tc_flow_parse_attr *parse_attr)
565 int peer_ifindex = parse_attr->mirred_ifindex;
566 struct mlx5_hairpin_params params;
567 struct mlx5_core_dev *peer_mdev;
568 struct mlx5e_hairpin_entry *hpe;
569 struct mlx5e_hairpin *hp;
576 peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
577 if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
578 netdev_warn(priv->netdev, "hairpin is not supported\n");
582 peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
583 err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
586 hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
590 hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
594 INIT_LIST_HEAD(&hpe->flows);
595 hpe->peer_vhca_id = peer_id;
596 hpe->prio = match_prio;
598 params.log_data_size = 15;
599 params.log_data_size = min_t(u8, params.log_data_size,
600 MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
601 params.log_data_size = max_t(u8, params.log_data_size,
602 MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
604 params.log_num_packets = params.log_data_size -
605 MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
606 params.log_num_packets = min_t(u8, params.log_num_packets,
607 MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
609 params.q_counter = priv->q_counter;
610 /* set hairpin pair per each 50Gbs share of the link */
611 mlx5e_get_max_linkspeed(priv->mdev, &link_speed);
612 link_speed = max_t(u32, link_speed, 50000);
613 link_speed64 = link_speed;
614 do_div(link_speed64, 50000);
615 params.num_channels = link_speed64;
617 hp = mlx5e_hairpin_create(priv, ¶ms, peer_ifindex);
620 goto create_hairpin_err;
623 netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
624 hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
625 hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
628 hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
629 hash_hairpin_info(peer_id, match_prio));
632 if (hpe->hp->num_channels > 1) {
633 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
634 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
636 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
638 list_add(&flow->hairpin, &hpe->flows);
647 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
648 struct mlx5e_tc_flow *flow)
650 struct list_head *next = flow->hairpin.next;
652 list_del(&flow->hairpin);
654 /* no more hairpin flows for us, release the hairpin pair */
655 if (list_empty(next)) {
656 struct mlx5e_hairpin_entry *hpe;
658 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
660 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
661 hpe->hp->pair->peer_mdev->priv.name);
663 mlx5e_hairpin_destroy(hpe->hp);
664 hash_del(&hpe->hairpin_hlist);
669 static struct mlx5_flow_handle *
670 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
671 struct mlx5e_tc_flow_parse_attr *parse_attr,
672 struct mlx5e_tc_flow *flow)
674 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
675 struct mlx5_core_dev *dev = priv->mdev;
676 struct mlx5_flow_destination dest[2] = {};
677 struct mlx5_flow_act flow_act = {
678 .action = attr->action,
679 .has_flow_tag = true,
680 .flow_tag = attr->flow_tag,
683 struct mlx5_fc *counter = NULL;
684 struct mlx5_flow_handle *rule;
685 bool table_created = false;
686 int err, dest_ix = 0;
688 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
689 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
692 goto err_add_hairpin_flow;
694 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
695 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
696 dest[dest_ix].ft = attr->hairpin_ft;
698 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
699 dest[dest_ix].tir_num = attr->hairpin_tirn;
702 } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
703 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
704 dest[dest_ix].ft = priv->fs.vlan.ft.t;
708 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
709 counter = mlx5_fc_create(dev, true);
710 if (IS_ERR(counter)) {
711 rule = ERR_CAST(counter);
714 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
715 dest[dest_ix].counter = counter;
719 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
720 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
721 flow_act.modify_id = attr->mod_hdr_id;
722 kfree(parse_attr->mod_hdr_actions);
725 goto err_create_mod_hdr_id;
729 if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
730 int tc_grp_size, tc_tbl_size;
731 u32 max_flow_counter;
733 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
734 MLX5_CAP_GEN(dev, max_flow_counter_15_0);
736 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
738 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
739 BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
742 mlx5_create_auto_grouped_flow_table(priv->fs.ns,
745 MLX5E_TC_TABLE_NUM_GROUPS,
746 MLX5E_TC_FT_LEVEL, 0);
747 if (IS_ERR(priv->fs.tc.t)) {
748 netdev_err(priv->netdev,
749 "Failed to create tc offload table\n");
750 rule = ERR_CAST(priv->fs.tc.t);
754 table_created = true;
757 if (attr->match_level != MLX5_MATCH_NONE)
758 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
760 rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
761 &flow_act, dest, dest_ix);
770 mlx5_destroy_flow_table(priv->fs.tc.t);
771 priv->fs.tc.t = NULL;
774 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
775 mlx5e_detach_mod_hdr(priv, flow);
776 err_create_mod_hdr_id:
777 mlx5_fc_destroy(dev, counter);
779 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
780 mlx5e_hairpin_flow_del(priv, flow);
781 err_add_hairpin_flow:
785 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
786 struct mlx5e_tc_flow *flow)
788 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
789 struct mlx5_fc *counter = NULL;
791 counter = mlx5_flow_rule_counter(flow->rule);
792 mlx5_del_flow_rules(flow->rule);
793 mlx5_fc_destroy(priv->mdev, counter);
795 if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
796 mlx5_destroy_flow_table(priv->fs.tc.t);
797 priv->fs.tc.t = NULL;
800 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
801 mlx5e_detach_mod_hdr(priv, flow);
803 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
804 mlx5e_hairpin_flow_del(priv, flow);
807 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
808 struct mlx5e_tc_flow *flow);
810 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
811 struct ip_tunnel_info *tun_info,
812 struct net_device *mirred_dev,
813 struct net_device **encap_dev,
814 struct mlx5e_tc_flow *flow);
816 static struct mlx5_flow_handle *
817 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
818 struct mlx5e_tc_flow_parse_attr *parse_attr,
819 struct mlx5e_tc_flow *flow)
821 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
822 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
823 struct net_device *out_dev, *encap_dev = NULL;
824 struct mlx5_flow_handle *rule = NULL;
825 struct mlx5e_rep_priv *rpriv;
826 struct mlx5e_priv *out_priv;
829 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
830 out_dev = __dev_get_by_index(dev_net(priv->netdev),
831 attr->parse_attr->mirred_ifindex);
832 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
833 out_dev, &encap_dev, flow);
837 goto err_attach_encap;
839 out_priv = netdev_priv(encap_dev);
840 rpriv = out_priv->ppriv;
841 attr->out_rep = rpriv->rep;
844 err = mlx5_eswitch_add_vlan_action(esw, attr);
850 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
851 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
852 kfree(parse_attr->mod_hdr_actions);
859 /* we get here if (1) there's no error (rule being null) or when
860 * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
862 if (rule != ERR_PTR(-EAGAIN)) {
863 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
870 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
871 mlx5e_detach_mod_hdr(priv, flow);
873 mlx5_eswitch_del_vlan_action(esw, attr);
875 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
876 mlx5e_detach_encap(priv, flow);
881 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
882 struct mlx5e_tc_flow *flow)
884 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
885 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
887 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
888 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
889 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
892 mlx5_eswitch_del_vlan_action(esw, attr);
894 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
895 mlx5e_detach_encap(priv, flow);
896 kvfree(attr->parse_attr);
899 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
900 mlx5e_detach_mod_hdr(priv, flow);
903 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
904 struct mlx5e_encap_entry *e)
906 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
907 struct mlx5_esw_flow_attr *esw_attr;
908 struct mlx5e_tc_flow *flow;
911 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
912 e->encap_size, e->encap_header,
915 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
919 e->flags |= MLX5_ENCAP_ENTRY_VALID;
920 mlx5e_rep_queue_neigh_stats_work(priv);
922 list_for_each_entry(flow, &e->flows, encap) {
923 esw_attr = flow->esw_attr;
924 esw_attr->encap_id = e->encap_id;
925 flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
926 if (IS_ERR(flow->rule)) {
927 err = PTR_ERR(flow->rule);
928 mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
932 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
936 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
937 struct mlx5e_encap_entry *e)
939 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
940 struct mlx5e_tc_flow *flow;
942 list_for_each_entry(flow, &e->flows, encap) {
943 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
944 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
945 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr);
949 if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
950 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
951 mlx5_encap_dealloc(priv->mdev, e->encap_id);
955 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
957 struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
958 u64 bytes, packets, lastuse = 0;
959 struct mlx5e_tc_flow *flow;
960 struct mlx5e_encap_entry *e;
961 struct mlx5_fc *counter;
962 struct neigh_table *tbl;
963 bool neigh_used = false;
966 if (m_neigh->family == AF_INET)
968 #if IS_ENABLED(CONFIG_IPV6)
969 else if (m_neigh->family == AF_INET6)
975 list_for_each_entry(e, &nhe->encap_list, encap_list) {
976 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
978 list_for_each_entry(flow, &e->flows, encap) {
979 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
980 counter = mlx5_flow_rule_counter(flow->rule);
981 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
982 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
993 nhe->reported_lastuse = jiffies;
995 /* find the relevant neigh according to the cached device and
998 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1000 WARN(1, "The neighbour already freed\n");
1004 neigh_event_send(n, NULL);
1009 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1010 struct mlx5e_tc_flow *flow)
1012 struct list_head *next = flow->encap.next;
1014 list_del(&flow->encap);
1015 if (list_empty(next)) {
1016 struct mlx5e_encap_entry *e;
1018 e = list_entry(next, struct mlx5e_encap_entry, flows);
1019 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1021 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1022 mlx5_encap_dealloc(priv->mdev, e->encap_id);
1024 hash_del_rcu(&e->encap_hlist);
1025 kfree(e->encap_header);
1030 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1031 struct mlx5e_tc_flow *flow)
1033 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1034 mlx5e_tc_del_fdb_flow(priv, flow);
1036 mlx5e_tc_del_nic_flow(priv, flow);
1039 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1040 struct tc_cls_flower_offload *f)
1042 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1044 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1046 void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1048 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1051 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1052 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1054 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1055 struct flow_dissector_key_keyid *key =
1056 skb_flow_dissector_target(f->dissector,
1057 FLOW_DISSECTOR_KEY_ENC_KEYID,
1059 struct flow_dissector_key_keyid *mask =
1060 skb_flow_dissector_target(f->dissector,
1061 FLOW_DISSECTOR_KEY_ENC_KEYID,
1063 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1064 be32_to_cpu(mask->keyid));
1065 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1066 be32_to_cpu(key->keyid));
1070 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1071 struct mlx5_flow_spec *spec,
1072 struct tc_cls_flower_offload *f)
1074 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1076 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1079 struct flow_dissector_key_control *enc_control =
1080 skb_flow_dissector_target(f->dissector,
1081 FLOW_DISSECTOR_KEY_ENC_CONTROL,
1084 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1085 struct flow_dissector_key_ports *key =
1086 skb_flow_dissector_target(f->dissector,
1087 FLOW_DISSECTOR_KEY_ENC_PORTS,
1089 struct flow_dissector_key_ports *mask =
1090 skb_flow_dissector_target(f->dissector,
1091 FLOW_DISSECTOR_KEY_ENC_PORTS,
1093 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1094 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1095 struct net_device *up_dev = uplink_rpriv->netdev;
1096 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1098 /* Full udp dst port must be given */
1099 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1100 goto vxlan_match_offload_err;
1102 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
1103 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1104 parse_vxlan_attr(spec, f);
1106 netdev_warn(priv->netdev,
1107 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1111 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1112 udp_dport, ntohs(mask->dst));
1113 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1114 udp_dport, ntohs(key->dst));
1116 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1117 udp_sport, ntohs(mask->src));
1118 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1119 udp_sport, ntohs(key->src));
1120 } else { /* udp dst port must be given */
1121 vxlan_match_offload_err:
1122 netdev_warn(priv->netdev,
1123 "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1127 if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1128 struct flow_dissector_key_ipv4_addrs *key =
1129 skb_flow_dissector_target(f->dissector,
1130 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1132 struct flow_dissector_key_ipv4_addrs *mask =
1133 skb_flow_dissector_target(f->dissector,
1134 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1136 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1137 src_ipv4_src_ipv6.ipv4_layout.ipv4,
1139 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1140 src_ipv4_src_ipv6.ipv4_layout.ipv4,
1143 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1144 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1146 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1147 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1150 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1151 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1152 } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1153 struct flow_dissector_key_ipv6_addrs *key =
1154 skb_flow_dissector_target(f->dissector,
1155 FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1157 struct flow_dissector_key_ipv6_addrs *mask =
1158 skb_flow_dissector_target(f->dissector,
1159 FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1162 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1163 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1164 &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1165 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1166 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1167 &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1169 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1170 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1171 &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1172 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1173 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1174 &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1176 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1177 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1180 /* Enforce DMAC when offloading incoming tunneled flows.
1181 * Flow counters require a match on the DMAC.
1183 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1184 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1185 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1186 dmac_47_16), priv->netdev->dev_addr);
1188 /* let software handle IP fragments */
1189 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1190 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1195 static int __parse_cls_flower(struct mlx5e_priv *priv,
1196 struct mlx5_flow_spec *spec,
1197 struct tc_cls_flower_offload *f,
1200 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1202 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1207 *match_level = MLX5_MATCH_NONE;
1209 if (f->dissector->used_keys &
1210 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1211 BIT(FLOW_DISSECTOR_KEY_BASIC) |
1212 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1213 BIT(FLOW_DISSECTOR_KEY_VLAN) |
1214 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1215 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1216 BIT(FLOW_DISSECTOR_KEY_PORTS) |
1217 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1218 BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1219 BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1220 BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1221 BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1222 BIT(FLOW_DISSECTOR_KEY_TCP) |
1223 BIT(FLOW_DISSECTOR_KEY_IP))) {
1224 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1225 f->dissector->used_keys);
1229 if ((dissector_uses_key(f->dissector,
1230 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1231 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1232 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1233 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1234 struct flow_dissector_key_control *key =
1235 skb_flow_dissector_target(f->dissector,
1236 FLOW_DISSECTOR_KEY_ENC_CONTROL,
1238 switch (key->addr_type) {
1239 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1240 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1241 if (parse_tunnel_attr(priv, spec, f))
1248 /* In decap flow, header pointers should point to the inner
1249 * headers, outer header were already set by parse_tunnel_attr
1251 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1253 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1257 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1258 struct flow_dissector_key_eth_addrs *key =
1259 skb_flow_dissector_target(f->dissector,
1260 FLOW_DISSECTOR_KEY_ETH_ADDRS,
1262 struct flow_dissector_key_eth_addrs *mask =
1263 skb_flow_dissector_target(f->dissector,
1264 FLOW_DISSECTOR_KEY_ETH_ADDRS,
1267 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1270 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1274 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1277 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1281 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1282 *match_level = MLX5_MATCH_L2;
1285 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1286 struct flow_dissector_key_vlan *key =
1287 skb_flow_dissector_target(f->dissector,
1288 FLOW_DISSECTOR_KEY_VLAN,
1290 struct flow_dissector_key_vlan *mask =
1291 skb_flow_dissector_target(f->dissector,
1292 FLOW_DISSECTOR_KEY_VLAN,
1294 if (mask->vlan_id || mask->vlan_priority) {
1295 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1296 MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
1298 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1299 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1301 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1302 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1304 *match_level = MLX5_MATCH_L2;
1308 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1309 struct flow_dissector_key_basic *key =
1310 skb_flow_dissector_target(f->dissector,
1311 FLOW_DISSECTOR_KEY_BASIC,
1313 struct flow_dissector_key_basic *mask =
1314 skb_flow_dissector_target(f->dissector,
1315 FLOW_DISSECTOR_KEY_BASIC,
1317 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1318 ntohs(mask->n_proto));
1319 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1320 ntohs(key->n_proto));
1323 *match_level = MLX5_MATCH_L2;
1326 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1327 struct flow_dissector_key_control *key =
1328 skb_flow_dissector_target(f->dissector,
1329 FLOW_DISSECTOR_KEY_CONTROL,
1332 struct flow_dissector_key_control *mask =
1333 skb_flow_dissector_target(f->dissector,
1334 FLOW_DISSECTOR_KEY_CONTROL,
1336 addr_type = key->addr_type;
1338 /* the HW doesn't support frag first/later */
1339 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1342 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1343 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1344 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1345 key->flags & FLOW_DIS_IS_FRAGMENT);
1347 /* the HW doesn't need L3 inline to match on frag=no */
1348 if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1349 *match_level = MLX5_INLINE_MODE_L2;
1350 /* *** L2 attributes parsing up to here *** */
1352 *match_level = MLX5_INLINE_MODE_IP;
1356 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1357 struct flow_dissector_key_basic *key =
1358 skb_flow_dissector_target(f->dissector,
1359 FLOW_DISSECTOR_KEY_BASIC,
1361 struct flow_dissector_key_basic *mask =
1362 skb_flow_dissector_target(f->dissector,
1363 FLOW_DISSECTOR_KEY_BASIC,
1365 ip_proto = key->ip_proto;
1367 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1369 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1373 *match_level = MLX5_MATCH_L3;
1376 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1377 struct flow_dissector_key_ipv4_addrs *key =
1378 skb_flow_dissector_target(f->dissector,
1379 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1381 struct flow_dissector_key_ipv4_addrs *mask =
1382 skb_flow_dissector_target(f->dissector,
1383 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1386 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1387 src_ipv4_src_ipv6.ipv4_layout.ipv4),
1388 &mask->src, sizeof(mask->src));
1389 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1390 src_ipv4_src_ipv6.ipv4_layout.ipv4),
1391 &key->src, sizeof(key->src));
1392 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1393 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1394 &mask->dst, sizeof(mask->dst));
1395 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1396 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1397 &key->dst, sizeof(key->dst));
1399 if (mask->src || mask->dst)
1400 *match_level = MLX5_MATCH_L3;
1403 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1404 struct flow_dissector_key_ipv6_addrs *key =
1405 skb_flow_dissector_target(f->dissector,
1406 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1408 struct flow_dissector_key_ipv6_addrs *mask =
1409 skb_flow_dissector_target(f->dissector,
1410 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1413 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1414 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1415 &mask->src, sizeof(mask->src));
1416 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1417 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1418 &key->src, sizeof(key->src));
1420 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1421 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1422 &mask->dst, sizeof(mask->dst));
1423 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1424 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1425 &key->dst, sizeof(key->dst));
1427 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1428 ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1429 *match_level = MLX5_MATCH_L3;
1432 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1433 struct flow_dissector_key_ip *key =
1434 skb_flow_dissector_target(f->dissector,
1435 FLOW_DISSECTOR_KEY_IP,
1437 struct flow_dissector_key_ip *mask =
1438 skb_flow_dissector_target(f->dissector,
1439 FLOW_DISSECTOR_KEY_IP,
1442 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1443 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1445 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1446 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2);
1448 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1449 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1452 !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1453 ft_field_support.outer_ipv4_ttl))
1456 if (mask->tos || mask->ttl)
1457 *match_level = MLX5_MATCH_L3;
1460 /* *** L3 attributes parsing up to here *** */
1462 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1463 struct flow_dissector_key_ports *key =
1464 skb_flow_dissector_target(f->dissector,
1465 FLOW_DISSECTOR_KEY_PORTS,
1467 struct flow_dissector_key_ports *mask =
1468 skb_flow_dissector_target(f->dissector,
1469 FLOW_DISSECTOR_KEY_PORTS,
1473 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1474 tcp_sport, ntohs(mask->src));
1475 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1476 tcp_sport, ntohs(key->src));
1478 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1479 tcp_dport, ntohs(mask->dst));
1480 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1481 tcp_dport, ntohs(key->dst));
1485 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1486 udp_sport, ntohs(mask->src));
1487 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1488 udp_sport, ntohs(key->src));
1490 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1491 udp_dport, ntohs(mask->dst));
1492 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1493 udp_dport, ntohs(key->dst));
1496 netdev_err(priv->netdev,
1497 "Only UDP and TCP transport are supported\n");
1501 if (mask->src || mask->dst)
1502 *match_level = MLX5_MATCH_L4;
1505 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1506 struct flow_dissector_key_tcp *key =
1507 skb_flow_dissector_target(f->dissector,
1508 FLOW_DISSECTOR_KEY_TCP,
1510 struct flow_dissector_key_tcp *mask =
1511 skb_flow_dissector_target(f->dissector,
1512 FLOW_DISSECTOR_KEY_TCP,
1515 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1516 ntohs(mask->flags));
1517 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1521 *match_level = MLX5_MATCH_L4;
1527 static int parse_cls_flower(struct mlx5e_priv *priv,
1528 struct mlx5e_tc_flow *flow,
1529 struct mlx5_flow_spec *spec,
1530 struct tc_cls_flower_offload *f)
1532 struct mlx5_core_dev *dev = priv->mdev;
1533 struct mlx5_eswitch *esw = dev->priv.eswitch;
1534 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1535 struct mlx5_eswitch_rep *rep;
1539 err = __parse_cls_flower(priv, spec, f, &match_level);
1541 if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1543 if (rep->vport != FDB_UPLINK_VPORT &&
1544 (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1545 esw->offloads.inline_mode < match_level)) {
1546 netdev_warn(priv->netdev,
1547 "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1548 match_level, esw->offloads.inline_mode);
1553 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1554 flow->esw_attr->match_level = match_level;
1556 flow->nic_attr->match_level = match_level;
1561 struct pedit_headers {
1569 static int pedit_header_offsets[] = {
1570 [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1571 [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1572 [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1573 [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1574 [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1577 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1579 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1580 struct pedit_headers *masks,
1581 struct pedit_headers *vals)
1583 u32 *curr_pmask, *curr_pval;
1585 if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1588 curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1589 curr_pval = (u32 *)(pedit_header(vals, hdr_type) + offset);
1591 if (*curr_pmask & mask) /* disallow acting twice on the same location */
1594 *curr_pmask |= mask;
1595 *curr_pval |= (val & mask);
1603 struct mlx5_fields {
1609 #define OFFLOAD(fw_field, size, field, off) \
1610 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1612 static struct mlx5_fields fields[] = {
1613 OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1614 OFFLOAD(DMAC_15_0, 2, eth.h_dest[4], 0),
1615 OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1616 OFFLOAD(SMAC_15_0, 2, eth.h_source[4], 0),
1617 OFFLOAD(ETHERTYPE, 2, eth.h_proto, 0),
1619 OFFLOAD(IP_TTL, 1, ip4.ttl, 0),
1620 OFFLOAD(SIPV4, 4, ip4.saddr, 0),
1621 OFFLOAD(DIPV4, 4, ip4.daddr, 0),
1623 OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1624 OFFLOAD(SIPV6_95_64, 4, ip6.saddr.s6_addr32[1], 0),
1625 OFFLOAD(SIPV6_63_32, 4, ip6.saddr.s6_addr32[2], 0),
1626 OFFLOAD(SIPV6_31_0, 4, ip6.saddr.s6_addr32[3], 0),
1627 OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1628 OFFLOAD(DIPV6_95_64, 4, ip6.daddr.s6_addr32[1], 0),
1629 OFFLOAD(DIPV6_63_32, 4, ip6.daddr.s6_addr32[2], 0),
1630 OFFLOAD(DIPV6_31_0, 4, ip6.daddr.s6_addr32[3], 0),
1631 OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1633 OFFLOAD(TCP_SPORT, 2, tcp.source, 0),
1634 OFFLOAD(TCP_DPORT, 2, tcp.dest, 0),
1635 OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1637 OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1638 OFFLOAD(UDP_DPORT, 2, udp.dest, 0),
1641 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1642 * max from the SW pedit action. On success, it says how many HW actions were
1645 static int offload_pedit_fields(struct pedit_headers *masks,
1646 struct pedit_headers *vals,
1647 struct mlx5e_tc_flow_parse_attr *parse_attr)
1649 struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1650 int i, action_size, nactions, max_actions, first, last, next_z;
1651 void *s_masks_p, *a_masks_p, *vals_p;
1652 struct mlx5_fields *f;
1653 u8 cmd, field_bsize;
1660 set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1661 add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1662 set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1663 add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1665 action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1666 action = parse_attr->mod_hdr_actions;
1667 max_actions = parse_attr->num_mod_hdr_actions;
1670 for (i = 0; i < ARRAY_SIZE(fields); i++) {
1672 /* avoid seeing bits set from previous iterations */
1676 s_masks_p = (void *)set_masks + f->offset;
1677 a_masks_p = (void *)add_masks + f->offset;
1679 memcpy(&s_mask, s_masks_p, f->size);
1680 memcpy(&a_mask, a_masks_p, f->size);
1682 if (!s_mask && !a_mask) /* nothing to offload here */
1685 if (s_mask && a_mask) {
1686 printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1690 if (nactions == max_actions) {
1691 printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1696 cmd = MLX5_ACTION_TYPE_SET;
1698 vals_p = (void *)set_vals + f->offset;
1699 /* clear to denote we consumed this field */
1700 memset(s_masks_p, 0, f->size);
1702 cmd = MLX5_ACTION_TYPE_ADD;
1704 vals_p = (void *)add_vals + f->offset;
1705 /* clear to denote we consumed this field */
1706 memset(a_masks_p, 0, f->size);
1709 field_bsize = f->size * BITS_PER_BYTE;
1711 if (field_bsize == 32) {
1712 mask_be32 = *(__be32 *)&mask;
1713 mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1714 } else if (field_bsize == 16) {
1715 mask_be16 = *(__be16 *)&mask;
1716 mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1719 first = find_first_bit(&mask, field_bsize);
1720 next_z = find_next_zero_bit(&mask, field_bsize, first);
1721 last = find_last_bit(&mask, field_bsize);
1722 if (first < next_z && next_z < last) {
1723 printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1728 MLX5_SET(set_action_in, action, action_type, cmd);
1729 MLX5_SET(set_action_in, action, field, f->field);
1731 if (cmd == MLX5_ACTION_TYPE_SET) {
1732 MLX5_SET(set_action_in, action, offset, first);
1733 /* length is num of bits to be written, zero means length of 32 */
1734 MLX5_SET(set_action_in, action, length, (last - first + 1));
1737 if (field_bsize == 32)
1738 MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1739 else if (field_bsize == 16)
1740 MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1741 else if (field_bsize == 8)
1742 MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1744 action += action_size;
1748 parse_attr->num_mod_hdr_actions = nactions;
1752 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1753 const struct tc_action *a, int namespace,
1754 struct mlx5e_tc_flow_parse_attr *parse_attr)
1756 int nkeys, action_size, max_actions;
1758 nkeys = tcf_pedit_nkeys(a);
1759 action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1761 if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1762 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1763 else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1764 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1766 /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1767 max_actions = min(max_actions, nkeys * 16);
1769 parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1770 if (!parse_attr->mod_hdr_actions)
1773 parse_attr->num_mod_hdr_actions = max_actions;
1777 static const struct pedit_headers zero_masks = {};
1779 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1780 const struct tc_action *a, int namespace,
1781 struct mlx5e_tc_flow_parse_attr *parse_attr)
1783 struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1784 int nkeys, i, err = -EOPNOTSUPP;
1785 u32 mask, val, offset;
1788 nkeys = tcf_pedit_nkeys(a);
1790 memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1791 memset(vals, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1793 for (i = 0; i < nkeys; i++) {
1794 htype = tcf_pedit_htype(a, i);
1795 cmd = tcf_pedit_cmd(a, i);
1796 err = -EOPNOTSUPP; /* can't be all optimistic */
1798 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1799 netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1803 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1804 netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1808 mask = tcf_pedit_mask(a, i);
1809 val = tcf_pedit_val(a, i);
1810 offset = tcf_pedit_offset(a, i);
1812 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1817 err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1821 err = offload_pedit_fields(masks, vals, parse_attr);
1823 goto out_dealloc_parsed_actions;
1825 for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1826 cmd_masks = &masks[cmd];
1827 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1828 netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1829 print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1830 16, 1, cmd_masks, sizeof(zero_masks), true);
1832 goto out_dealloc_parsed_actions;
1838 out_dealloc_parsed_actions:
1839 kfree(parse_attr->mod_hdr_actions);
1844 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1846 u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1847 TCA_CSUM_UPDATE_FLAG_UDP;
1849 /* The HW recalcs checksums only if re-writing headers */
1850 if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1851 netdev_warn(priv->netdev,
1852 "TC csum action is only offloaded with pedit\n");
1856 if (update_flags & ~prot_flags) {
1857 netdev_warn(priv->netdev,
1858 "can't offload TC csum action for some header/s - flags %#x\n",
1866 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1867 struct tcf_exts *exts)
1869 const struct tc_action *a;
1870 bool modify_ip_header;
1877 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1878 ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1880 /* for non-IP we only re-write MACs, so we're okay */
1881 if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1884 modify_ip_header = false;
1885 tcf_exts_to_list(exts, &actions);
1886 list_for_each_entry(a, &actions, list) {
1887 if (!is_tcf_pedit(a))
1890 nkeys = tcf_pedit_nkeys(a);
1891 for (i = 0; i < nkeys; i++) {
1892 htype = tcf_pedit_htype(a, i);
1893 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1894 htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1895 modify_ip_header = true;
1901 ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1902 if (modify_ip_header && ip_proto != IPPROTO_TCP &&
1903 ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
1904 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
1912 static bool actions_match_supported(struct mlx5e_priv *priv,
1913 struct tcf_exts *exts,
1914 struct mlx5e_tc_flow_parse_attr *parse_attr,
1915 struct mlx5e_tc_flow *flow)
1919 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1920 actions = flow->esw_attr->action;
1922 actions = flow->nic_attr->action;
1924 if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1925 return modify_header_match_supported(&parse_attr->spec, exts);
1930 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
1932 struct mlx5_core_dev *fmdev, *pmdev;
1933 u16 func_id, peer_id;
1936 pmdev = peer_priv->mdev;
1938 func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn));
1939 peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn));
1941 return (func_id == peer_id);
1944 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1945 struct mlx5e_tc_flow_parse_attr *parse_attr,
1946 struct mlx5e_tc_flow *flow)
1948 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1949 const struct tc_action *a;
1954 if (!tcf_exts_has_actions(exts))
1957 attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1959 tcf_exts_to_list(exts, &actions);
1960 list_for_each_entry(a, &actions, list) {
1961 if (is_tcf_gact_shot(a)) {
1962 action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1963 if (MLX5_CAP_FLOWTABLE(priv->mdev,
1964 flow_table_properties_nic_receive.flow_counter))
1965 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1969 if (is_tcf_pedit(a)) {
1970 err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1975 action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1976 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1980 if (is_tcf_csum(a)) {
1981 if (csum_offload_supported(priv, action,
1982 tcf_csum_update_flags(a)))
1988 if (is_tcf_mirred_egress_redirect(a)) {
1989 struct net_device *peer_dev = tcf_mirred_dev(a);
1991 if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
1992 same_hw_devs(priv, netdev_priv(peer_dev))) {
1993 parse_attr->mirred_ifindex = peer_dev->ifindex;
1994 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
1995 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
1996 MLX5_FLOW_CONTEXT_ACTION_COUNT;
1998 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2005 if (is_tcf_skbedit_mark(a)) {
2006 u32 mark = tcf_skbedit_mark(a);
2008 if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2009 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2014 attr->flow_tag = mark;
2015 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2022 attr->action = action;
2023 if (!actions_match_supported(priv, exts, parse_attr, flow))
2029 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2030 struct ip_tunnel_key *b)
2032 return memcmp(a, b, sizeof(*a));
2035 static inline int hash_encap_info(struct ip_tunnel_key *key)
2037 return jhash(key, sizeof(*key), 0);
2040 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2041 struct net_device *mirred_dev,
2042 struct net_device **out_dev,
2044 struct neighbour **out_n,
2047 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2048 struct mlx5e_rep_priv *uplink_rpriv;
2050 struct neighbour *n = NULL;
2052 #if IS_ENABLED(CONFIG_INET)
2055 rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2056 ret = PTR_ERR_OR_ZERO(rt);
2062 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2063 /* if the egress device isn't on the same HW e-switch, we use the uplink */
2064 if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2065 *out_dev = uplink_rpriv->netdev;
2067 *out_dev = rt->dst.dev;
2069 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2070 n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2079 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2080 struct net_device *mirred_dev,
2081 struct net_device **out_dev,
2083 struct neighbour **out_n,
2086 struct neighbour *n = NULL;
2087 struct dst_entry *dst;
2089 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2090 struct mlx5e_rep_priv *uplink_rpriv;
2091 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2094 ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2099 *out_ttl = ip6_dst_hoplimit(dst);
2101 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2102 /* if the egress device isn't on the same HW e-switch, we use the uplink */
2103 if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2104 *out_dev = uplink_rpriv->netdev;
2106 *out_dev = dst->dev;
2111 n = dst_neigh_lookup(dst, &fl6->daddr);
2120 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2121 char buf[], int encap_size,
2122 unsigned char h_dest[ETH_ALEN],
2126 __be16 udp_dst_port,
2129 struct ethhdr *eth = (struct ethhdr *)buf;
2130 struct iphdr *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2131 struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2132 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2134 memset(buf, 0, encap_size);
2136 ether_addr_copy(eth->h_dest, h_dest);
2137 ether_addr_copy(eth->h_source, out_dev->dev_addr);
2138 eth->h_proto = htons(ETH_P_IP);
2144 ip->protocol = IPPROTO_UDP;
2148 udp->dest = udp_dst_port;
2149 vxh->vx_flags = VXLAN_HF_VNI;
2150 vxh->vx_vni = vxlan_vni_field(vx_vni);
2153 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2154 char buf[], int encap_size,
2155 unsigned char h_dest[ETH_ALEN],
2157 struct in6_addr *daddr,
2158 struct in6_addr *saddr,
2159 __be16 udp_dst_port,
2162 struct ethhdr *eth = (struct ethhdr *)buf;
2163 struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2164 struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2165 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2167 memset(buf, 0, encap_size);
2169 ether_addr_copy(eth->h_dest, h_dest);
2170 ether_addr_copy(eth->h_source, out_dev->dev_addr);
2171 eth->h_proto = htons(ETH_P_IPV6);
2173 ip6_flow_hdr(ip6h, 0, 0);
2174 /* the HW fills up ipv6 payload len */
2175 ip6h->nexthdr = IPPROTO_UDP;
2176 ip6h->hop_limit = ttl;
2177 ip6h->daddr = *daddr;
2178 ip6h->saddr = *saddr;
2180 udp->dest = udp_dst_port;
2181 vxh->vx_flags = VXLAN_HF_VNI;
2182 vxh->vx_vni = vxlan_vni_field(vx_vni);
2185 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2186 struct net_device *mirred_dev,
2187 struct mlx5e_encap_entry *e)
2189 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2190 int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2191 struct ip_tunnel_key *tun_key = &e->tun_info.key;
2192 struct net_device *out_dev;
2193 struct neighbour *n = NULL;
2194 struct flowi4 fl4 = {};
2199 if (max_encap_size < ipv4_encap_size) {
2200 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2201 ipv4_encap_size, max_encap_size);
2205 encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2209 switch (e->tunnel_type) {
2210 case MLX5_HEADER_TYPE_VXLAN:
2211 fl4.flowi4_proto = IPPROTO_UDP;
2212 fl4.fl4_dport = tun_key->tp_dst;
2218 fl4.flowi4_tos = tun_key->tos;
2219 fl4.daddr = tun_key->u.ipv4.dst;
2220 fl4.saddr = tun_key->u.ipv4.src;
2222 err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2227 /* used by mlx5e_detach_encap to lookup a neigh hash table
2228 * entry in the neigh hash table when a user deletes a rule
2230 e->m_neigh.dev = n->dev;
2231 e->m_neigh.family = n->ops->family;
2232 memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2233 e->out_dev = out_dev;
2235 /* It's importent to add the neigh to the hash table before checking
2236 * the neigh validity state. So if we'll get a notification, in case the
2237 * neigh changes it's validity state, we would find the relevant neigh
2240 err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2244 read_lock_bh(&n->lock);
2245 nud_state = n->nud_state;
2246 ether_addr_copy(e->h_dest, n->ha);
2247 read_unlock_bh(&n->lock);
2249 switch (e->tunnel_type) {
2250 case MLX5_HEADER_TYPE_VXLAN:
2251 gen_vxlan_header_ipv4(out_dev, encap_header,
2252 ipv4_encap_size, e->h_dest, ttl,
2254 fl4.saddr, tun_key->tp_dst,
2255 tunnel_id_to_key32(tun_key->tun_id));
2259 goto destroy_neigh_entry;
2261 e->encap_size = ipv4_encap_size;
2262 e->encap_header = encap_header;
2264 if (!(nud_state & NUD_VALID)) {
2265 neigh_event_send(n, NULL);
2270 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2271 ipv4_encap_size, encap_header, &e->encap_id);
2273 goto destroy_neigh_entry;
2275 e->flags |= MLX5_ENCAP_ENTRY_VALID;
2276 mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2280 destroy_neigh_entry:
2281 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2283 kfree(encap_header);
2290 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2291 struct net_device *mirred_dev,
2292 struct mlx5e_encap_entry *e)
2294 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2295 int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2296 struct ip_tunnel_key *tun_key = &e->tun_info.key;
2297 struct net_device *out_dev;
2298 struct neighbour *n = NULL;
2299 struct flowi6 fl6 = {};
2304 if (max_encap_size < ipv6_encap_size) {
2305 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2306 ipv6_encap_size, max_encap_size);
2310 encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2314 switch (e->tunnel_type) {
2315 case MLX5_HEADER_TYPE_VXLAN:
2316 fl6.flowi6_proto = IPPROTO_UDP;
2317 fl6.fl6_dport = tun_key->tp_dst;
2324 fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2325 fl6.daddr = tun_key->u.ipv6.dst;
2326 fl6.saddr = tun_key->u.ipv6.src;
2328 err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2333 /* used by mlx5e_detach_encap to lookup a neigh hash table
2334 * entry in the neigh hash table when a user deletes a rule
2336 e->m_neigh.dev = n->dev;
2337 e->m_neigh.family = n->ops->family;
2338 memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2339 e->out_dev = out_dev;
2341 /* It's importent to add the neigh to the hash table before checking
2342 * the neigh validity state. So if we'll get a notification, in case the
2343 * neigh changes it's validity state, we would find the relevant neigh
2346 err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2350 read_lock_bh(&n->lock);
2351 nud_state = n->nud_state;
2352 ether_addr_copy(e->h_dest, n->ha);
2353 read_unlock_bh(&n->lock);
2355 switch (e->tunnel_type) {
2356 case MLX5_HEADER_TYPE_VXLAN:
2357 gen_vxlan_header_ipv6(out_dev, encap_header,
2358 ipv6_encap_size, e->h_dest, ttl,
2360 &fl6.saddr, tun_key->tp_dst,
2361 tunnel_id_to_key32(tun_key->tun_id));
2365 goto destroy_neigh_entry;
2368 e->encap_size = ipv6_encap_size;
2369 e->encap_header = encap_header;
2371 if (!(nud_state & NUD_VALID)) {
2372 neigh_event_send(n, NULL);
2377 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2378 ipv6_encap_size, encap_header, &e->encap_id);
2380 goto destroy_neigh_entry;
2382 e->flags |= MLX5_ENCAP_ENTRY_VALID;
2383 mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2387 destroy_neigh_entry:
2388 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2390 kfree(encap_header);
2397 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2398 struct ip_tunnel_info *tun_info,
2399 struct net_device *mirred_dev,
2400 struct net_device **encap_dev,
2401 struct mlx5e_tc_flow *flow)
2403 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2404 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw,
2406 struct net_device *up_dev = uplink_rpriv->netdev;
2407 unsigned short family = ip_tunnel_info_af(tun_info);
2408 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
2409 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2410 struct ip_tunnel_key *key = &tun_info->key;
2411 struct mlx5e_encap_entry *e;
2412 int tunnel_type, err = 0;
2416 /* udp dst port must be set */
2417 if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2418 goto vxlan_encap_offload_err;
2420 /* setting udp src port isn't supported */
2421 if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2422 vxlan_encap_offload_err:
2423 netdev_warn(priv->netdev,
2424 "must set udp dst port and not set udp src port\n");
2428 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
2429 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2430 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2432 netdev_warn(priv->netdev,
2433 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2437 hash_key = hash_encap_info(key);
2439 hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2440 encap_hlist, hash_key) {
2441 if (!cmp_encap_info(&e->tun_info.key, key)) {
2447 /* must verify if encap is valid or not */
2451 e = kzalloc(sizeof(*e), GFP_KERNEL);
2455 e->tun_info = *tun_info;
2456 e->tunnel_type = tunnel_type;
2457 INIT_LIST_HEAD(&e->flows);
2459 if (family == AF_INET)
2460 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2461 else if (family == AF_INET6)
2462 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2464 if (err && err != -EAGAIN)
2467 hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2470 list_add(&flow->encap, &e->flows);
2471 *encap_dev = e->out_dev;
2472 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2473 attr->encap_id = e->encap_id;
2484 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2485 struct mlx5e_tc_flow_parse_attr *parse_attr,
2486 struct mlx5e_tc_flow *flow)
2488 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2489 struct mlx5e_rep_priv *rpriv = priv->ppriv;
2490 struct ip_tunnel_info *info = NULL;
2491 const struct tc_action *a;
2496 if (!tcf_exts_has_actions(exts))
2499 attr->in_rep = rpriv->rep;
2501 tcf_exts_to_list(exts, &actions);
2502 list_for_each_entry(a, &actions, list) {
2503 if (is_tcf_gact_shot(a)) {
2504 action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2505 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2509 if (is_tcf_pedit(a)) {
2512 err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2517 action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2521 if (is_tcf_csum(a)) {
2522 if (csum_offload_supported(priv, action,
2523 tcf_csum_update_flags(a)))
2529 if (is_tcf_mirred_egress_redirect(a)) {
2530 struct net_device *out_dev;
2531 struct mlx5e_priv *out_priv;
2533 out_dev = tcf_mirred_dev(a);
2535 if (switchdev_port_same_parent_id(priv->netdev,
2537 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2538 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2539 out_priv = netdev_priv(out_dev);
2540 rpriv = out_priv->ppriv;
2541 attr->out_rep = rpriv->rep;
2543 parse_attr->mirred_ifindex = out_dev->ifindex;
2544 parse_attr->tun_info = *info;
2545 attr->parse_attr = parse_attr;
2546 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2547 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2548 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2549 /* attr->out_rep is resolved when we handle encap */
2551 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2552 priv->netdev->name, out_dev->name);
2558 if (is_tcf_tunnel_set(a)) {
2559 info = tcf_tunnel_info(a);
2567 if (is_tcf_vlan(a)) {
2568 if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2569 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2570 } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2571 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2572 attr->vlan_vid = tcf_vlan_push_vid(a);
2573 if (mlx5_eswitch_vlan_actions_supported(priv->mdev)) {
2574 attr->vlan_prio = tcf_vlan_push_prio(a);
2575 attr->vlan_proto = tcf_vlan_push_proto(a);
2576 if (!attr->vlan_proto)
2577 attr->vlan_proto = htons(ETH_P_8021Q);
2578 } else if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2579 tcf_vlan_push_prio(a)) {
2582 } else { /* action is TCA_VLAN_ACT_MODIFY */
2588 if (is_tcf_tunnel_release(a)) {
2589 action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2596 attr->action = action;
2597 if (!actions_match_supported(priv, exts, parse_attr, flow))
2603 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2604 struct tc_cls_flower_offload *f)
2606 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2607 struct mlx5e_tc_flow_parse_attr *parse_attr;
2608 struct mlx5e_tc_table *tc = &priv->fs.tc;
2609 struct mlx5e_tc_flow *flow;
2610 int attr_size, err = 0;
2613 if (esw && esw->mode == SRIOV_OFFLOADS) {
2614 flow_flags = MLX5E_TC_FLOW_ESWITCH;
2615 attr_size = sizeof(struct mlx5_esw_flow_attr);
2617 flow_flags = MLX5E_TC_FLOW_NIC;
2618 attr_size = sizeof(struct mlx5_nic_flow_attr);
2621 flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2622 parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2623 if (!parse_attr || !flow) {
2628 flow->cookie = f->cookie;
2629 flow->flags = flow_flags;
2631 err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2635 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2636 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2639 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2641 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2644 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2647 if (IS_ERR(flow->rule)) {
2648 err = PTR_ERR(flow->rule);
2654 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2656 if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2657 !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2660 err = rhashtable_insert_fast(&tc->ht, &flow->node,
2663 mlx5e_tc_del_flow(priv, flow);
2675 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2676 struct tc_cls_flower_offload *f)
2678 struct mlx5e_tc_flow *flow;
2679 struct mlx5e_tc_table *tc = &priv->fs.tc;
2681 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2686 rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
2688 mlx5e_tc_del_flow(priv, flow);
2695 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2696 struct tc_cls_flower_offload *f)
2698 struct mlx5e_tc_table *tc = &priv->fs.tc;
2699 struct mlx5e_tc_flow *flow;
2700 struct mlx5_fc *counter;
2705 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2710 if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2713 counter = mlx5_flow_rule_counter(flow->rule);
2717 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2719 tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2724 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
2725 .head_offset = offsetof(struct mlx5e_tc_flow, node),
2726 .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2727 .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2728 .automatic_shrinking = true,
2731 int mlx5e_tc_init(struct mlx5e_priv *priv)
2733 struct mlx5e_tc_table *tc = &priv->fs.tc;
2735 hash_init(tc->mod_hdr_tbl);
2736 hash_init(tc->hairpin_tbl);
2738 tc->ht_params = mlx5e_tc_flow_ht_params;
2739 return rhashtable_init(&tc->ht, &tc->ht_params);
2742 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2744 struct mlx5e_tc_flow *flow = ptr;
2745 struct mlx5e_priv *priv = arg;
2747 mlx5e_tc_del_flow(priv, flow);
2751 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
2753 struct mlx5e_tc_table *tc = &priv->fs.tc;
2755 rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
2757 if (!IS_ERR_OR_NULL(tc->t)) {
2758 mlx5_destroy_flow_table(tc->t);