drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "vxlan.h"
  54 #include "fs_core.h"
  55
  56 struct mlx5_nic_flow_attr {
  57         u32 action;
  58         u32 flow_tag;
  59         u32 mod_hdr_id;
  60         u32 hairpin_tirn;
  61         struct mlx5_flow_table  *hairpin_ft;
  62 };
  63
  64 enum {
  65         MLX5E_TC_FLOW_ESWITCH   = BIT(0),
  66         MLX5E_TC_FLOW_NIC       = BIT(1),
  67         MLX5E_TC_FLOW_OFFLOADED = BIT(2),
  68         MLX5E_TC_FLOW_HAIRPIN   = BIT(3),
  69         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(4),
  70 };
  71
  72 struct mlx5e_tc_flow {
  73         struct rhash_head       node;
  74         u64                     cookie;
  75         u8                      flags;
  76         struct mlx5_flow_handle *rule;
  77         struct list_head        encap;   /* flows sharing the same encap ID */
  78         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  79         struct list_head        hairpin; /* flows sharing the same hairpin */
  80         union {
  81                 struct mlx5_esw_flow_attr esw_attr[0];
  82                 struct mlx5_nic_flow_attr nic_attr[0];
  83         };
  84 };
  85
  86 struct mlx5e_tc_flow_parse_attr {
  87         struct ip_tunnel_info tun_info;
  88         struct mlx5_flow_spec spec;
  89         int num_mod_hdr_actions;
  90         void *mod_hdr_actions;
  91         int mirred_ifindex;
  92 };
  93
  94 enum {
  95         MLX5_HEADER_TYPE_VXLAN = 0x0,
  96         MLX5_HEADER_TYPE_NVGRE = 0x1,
  97 };
  98
  99 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 100 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 101
 102 struct mlx5e_hairpin {
 103         struct mlx5_hairpin *pair;
 104
 105         struct mlx5_core_dev *func_mdev;
 106         struct mlx5e_priv *func_priv;
 107         u32 tdn;
 108         u32 tirn;
 109
 110         int num_channels;
 111         struct mlx5e_rqt indir_rqt;
 112         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 113         struct mlx5e_ttc_table ttc;
 114 };
 115
 116 struct mlx5e_hairpin_entry {
 117         /* a node of a hash table which keeps all the  hairpin entries */
 118         struct hlist_node hairpin_hlist;
 119
 120         /* flows sharing the same hairpin */
 121         struct list_head flows;
 122
 123         u16 peer_vhca_id;
 124         u8 prio;
 125         struct mlx5e_hairpin *hp;
 126 };
 127
 128 struct mod_hdr_key {
 129         int num_actions;
 130         void *actions;
 131 };
 132
 133 struct mlx5e_mod_hdr_entry {
 134         /* a node of a hash table which keeps all the mod_hdr entries */
 135         struct hlist_node mod_hdr_hlist;
 136
 137         /* flows sharing the same mod_hdr entry */
 138         struct list_head flows;
 139
 140         struct mod_hdr_key key;
 141
 142         u32 mod_hdr_id;
 143 };
 144
 145 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 146
 147 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 148 {
 149         return jhash(key->actions,
 150                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 151 }
 152
 153 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 154                                    struct mod_hdr_key *b)
 155 {
 156         if (a->num_actions != b->num_actions)
 157                 return 1;
 158
 159         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 160 }
 161
 162 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 163                                 struct mlx5e_tc_flow *flow,
 164                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 165 {
 166         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 167         int num_actions, actions_size, namespace, err;
 168         struct mlx5e_mod_hdr_entry *mh;
 169         struct mod_hdr_key key;
 170         bool found = false;
 171         u32 hash_key;
 172
 173         num_actions  = parse_attr->num_mod_hdr_actions;
 174         actions_size = MLX5_MH_ACT_SZ * num_actions;
 175
 176         key.actions = parse_attr->mod_hdr_actions;
 177         key.num_actions = num_actions;
 178
 179         hash_key = hash_mod_hdr_info(&key);
 180
 181         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 182                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 183                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 184                                        mod_hdr_hlist, hash_key) {
 185                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 186                                 found = true;
 187                                 break;
 188                         }
 189                 }
 190         } else {
 191                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 192                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 193                                        mod_hdr_hlist, hash_key) {
 194                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 195                                 found = true;
 196                                 break;
 197                         }
 198                 }
 199         }
 200
 201         if (found)
 202                 goto attach_flow;
 203
 204         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 205         if (!mh)
 206                 return -ENOMEM;
 207
 208         mh->key.actions = (void *)mh + sizeof(*mh);
 209         memcpy(mh->key.actions, key.actions, actions_size);
 210         mh->key.num_actions = num_actions;
 211         INIT_LIST_HEAD(&mh->flows);
 212
 213         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 214                                        mh->key.num_actions,
 215                                        mh->key.actions,
 216                                        &mh->mod_hdr_id);
 217         if (err)
 218                 goto out_err;
 219
 220         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 221                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 222         else
 223                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 224
 225 attach_flow:
 226         list_add(&flow->mod_hdr, &mh->flows);
 227         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 228                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 229         else
 230                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 231
 232         return 0;
 233
 234 out_err:
 235         kfree(mh);
 236         return err;
 237 }
 238
 239 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 240                                  struct mlx5e_tc_flow *flow)
 241 {
 242         struct list_head *next = flow->mod_hdr.next;
 243
 244         list_del(&flow->mod_hdr);
 245
 246         if (list_empty(next)) {
 247                 struct mlx5e_mod_hdr_entry *mh;
 248
 249                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 250
 251                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 252                 hash_del(&mh->mod_hdr_hlist);
 253                 kfree(mh);
 254         }
 255 }
 256
 257 static
 258 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 259 {
 260         struct net_device *netdev;
 261         struct mlx5e_priv *priv;
 262
 263         netdev = __dev_get_by_index(net, ifindex);
 264         priv = netdev_priv(netdev);
 265         return priv->mdev;
 266 }
 267
 268 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 269 {
 270         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 271         void *tirc;
 272         int err;
 273
 274         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 275         if (err)
 276                 goto alloc_tdn_err;
 277
 278         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 279
 280         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 281         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 282         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 283
 284         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 285         if (err)
 286                 goto create_tir_err;
 287
 288         return 0;
 289
 290 create_tir_err:
 291         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 292 alloc_tdn_err:
 293         return err;
 294 }
 295
 296 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 297 {
 298         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 299         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 300 }
 301
 302 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 303 {
 304         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 305         struct mlx5e_priv *priv = hp->func_priv;
 306         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 307
 308         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 309                                       hp->num_channels);
 310
 311         for (i = 0; i < sz; i++) {
 312                 ix = i;
 313                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
 314                         ix = mlx5e_bits_invert(i, ilog2(sz));
 315                 ix = indirection_rqt[ix];
 316                 rqn = hp->pair->rqn[ix];
 317                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 318         }
 319 }
 320
 321 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 322 {
 323         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 324         struct mlx5e_priv *priv = hp->func_priv;
 325         struct mlx5_core_dev *mdev = priv->mdev;
 326         void *rqtc;
 327         u32 *in;
 328
 329         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 330         in = kvzalloc(inlen, GFP_KERNEL);
 331         if (!in)
 332                 return -ENOMEM;
 333
 334         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 335
 336         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 337         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 338
 339         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 340
 341         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 342         if (!err)
 343                 hp->indir_rqt.enabled = true;
 344
 345         kvfree(in);
 346         return err;
 347 }
 348
 349 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 350 {
 351         struct mlx5e_priv *priv = hp->func_priv;
 352         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 353         int tt, i, err;
 354         void *tirc;
 355
 356         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 357                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 358                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 359
 360                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 361                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 362                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 363                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
 364
 365                 err = mlx5_core_create_tir(hp->func_mdev, in,
 366                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 367                 if (err) {
 368                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 369                         goto err_destroy_tirs;
 370                 }
 371         }
 372         return 0;
 373
 374 err_destroy_tirs:
 375         for (i = 0; i < tt; i++)
 376                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 377         return err;
 378 }
 379
 380 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 381 {
 382         int tt;
 383
 384         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 385                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 386 }
 387
 388 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 389                                          struct ttc_params *ttc_params)
 390 {
 391         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 392         int tt;
 393
 394         memset(ttc_params, 0, sizeof(*ttc_params));
 395
 396         ttc_params->any_tt_tirn = hp->tirn;
 397
 398         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 399                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 400
 401         ft_attr->max_fte = MLX5E_NUM_TT;
 402         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 403         ft_attr->prio = MLX5E_TC_PRIO;
 404 }
 405
 406 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 407 {
 408         struct mlx5e_priv *priv = hp->func_priv;
 409         struct ttc_params ttc_params;
 410         int err;
 411
 412         err = mlx5e_hairpin_create_indirect_rqt(hp);
 413         if (err)
 414                 return err;
 415
 416         err = mlx5e_hairpin_create_indirect_tirs(hp);
 417         if (err)
 418                 goto err_create_indirect_tirs;
 419
 420         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 421         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 422         if (err)
 423                 goto err_create_ttc_table;
 424
 425         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 426                    hp->num_channels, hp->ttc.ft.t->id);
 427
 428         return 0;
 429
 430 err_create_ttc_table:
 431         mlx5e_hairpin_destroy_indirect_tirs(hp);
 432 err_create_indirect_tirs:
 433         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 434
 435         return err;
 436 }
 437
 438 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 439 {
 440         struct mlx5e_priv *priv = hp->func_priv;
 441
 442         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 443         mlx5e_hairpin_destroy_indirect_tirs(hp);
 444         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 445 }
 446
 447 static struct mlx5e_hairpin *
 448 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 449                      int peer_ifindex)
 450 {
 451         struct mlx5_core_dev *func_mdev, *peer_mdev;
 452         struct mlx5e_hairpin *hp;
 453         struct mlx5_hairpin *pair;
 454         int err;
 455
 456         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 457         if (!hp)
 458                 return ERR_PTR(-ENOMEM);
 459
 460         func_mdev = priv->mdev;
 461         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 462
 463         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 464         if (IS_ERR(pair)) {
 465                 err = PTR_ERR(pair);
 466                 goto create_pair_err;
 467         }
 468         hp->pair = pair;
 469         hp->func_mdev = func_mdev;
 470         hp->func_priv = priv;
 471         hp->num_channels = params->num_channels;
 472
 473         err = mlx5e_hairpin_create_transport(hp);
 474         if (err)
 475                 goto create_transport_err;
 476
 477         if (hp->num_channels > 1) {
 478                 err = mlx5e_hairpin_rss_init(hp);
 479                 if (err)
 480                         goto rss_init_err;
 481         }
 482
 483         return hp;
 484
 485 rss_init_err:
 486         mlx5e_hairpin_destroy_transport(hp);
 487 create_transport_err:
 488         mlx5_core_hairpin_destroy(hp->pair);
 489 create_pair_err:
 490         kfree(hp);
 491         return ERR_PTR(err);
 492 }
 493
 494 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 495 {
 496         if (hp->num_channels > 1)
 497                 mlx5e_hairpin_rss_cleanup(hp);
 498         mlx5e_hairpin_destroy_transport(hp);
 499         mlx5_core_hairpin_destroy(hp->pair);
 500         kvfree(hp);
 501 }
 502
 503 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 504 {
 505         return (peer_vhca_id << 16 | prio);
 506 }
 507
 508 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 509                                                      u16 peer_vhca_id, u8 prio)
 510 {
 511         struct mlx5e_hairpin_entry *hpe;
 512         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 513
 514         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 515                                hairpin_hlist, hash_key) {
 516                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 517                         return hpe;
 518         }
 519
 520         return NULL;
 521 }
 522
 523 #define UNKNOWN_MATCH_PRIO 8
 524
 525 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 526                                   struct mlx5_flow_spec *spec, u8 *match_prio)
 527 {
 528         void *headers_c, *headers_v;
 529         u8 prio_val, prio_mask = 0;
 530         bool vlan_present;
 531
 532 #ifdef CONFIG_MLX5_CORE_EN_DCB
 533         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 534                 netdev_warn(priv->netdev,
 535                             "only PCP trust state supported for hairpin\n");
 536                 return -EOPNOTSUPP;
 537         }
 538 #endif
 539         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 540         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 541
 542         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 543         if (vlan_present) {
 544                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 545                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 546         }
 547
 548         if (!vlan_present || !prio_mask) {
 549                 prio_val = UNKNOWN_MATCH_PRIO;
 550         } else if (prio_mask != 0x7) {
 551                 netdev_warn(priv->netdev,
 552                             "masked priority match not supported for hairpin\n");
 553                 return -EOPNOTSUPP;
 554         }
 555
 556         *match_prio = prio_val;
 557         return 0;
 558 }
 559
 560 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 561                                   struct mlx5e_tc_flow *flow,
 562                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
 563 {
 564         int peer_ifindex = parse_attr->mirred_ifindex;
 565         struct mlx5_hairpin_params params;
 566         struct mlx5_core_dev *peer_mdev;
 567         struct mlx5e_hairpin_entry *hpe;
 568         struct mlx5e_hairpin *hp;
 569         u64 link_speed64;
 570         u32 link_speed;
 571         u8 match_prio;
 572         u16 peer_id;
 573         int err;
 574
 575         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 576         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 577                 netdev_warn(priv->netdev, "hairpin is not supported\n");
 578                 return -EOPNOTSUPP;
 579         }
 580
 581         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 582         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
 583         if (err)
 584                 return err;
 585         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 586         if (hpe)
 587                 goto attach_flow;
 588
 589         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 590         if (!hpe)
 591                 return -ENOMEM;
 592
 593         INIT_LIST_HEAD(&hpe->flows);
 594         hpe->peer_vhca_id = peer_id;
 595         hpe->prio = match_prio;
 596
 597         params.log_data_size = 15;
 598         params.log_data_size = min_t(u8, params.log_data_size,
 599                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 600         params.log_data_size = max_t(u8, params.log_data_size,
 601                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 602
 603         params.log_num_packets = params.log_data_size -
 604                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 605         params.log_num_packets = min_t(u8, params.log_num_packets,
 606                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 607
 608         params.q_counter = priv->q_counter;
 609         /* set hairpin pair per each 50Gbs share of the link */
 610         mlx5e_get_max_linkspeed(priv->mdev, &link_speed);
 611         link_speed = max_t(u32, link_speed, 50000);
 612         link_speed64 = link_speed;
 613         do_div(link_speed64, 50000);
 614         params.num_channels = link_speed64;
 615
 616         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 617         if (IS_ERR(hp)) {
 618                 err = PTR_ERR(hp);
 619                 goto create_hairpin_err;
 620         }
 621
 622         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 623                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 624                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 625
 626         hpe->hp = hp;
 627         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 628                  hash_hairpin_info(peer_id, match_prio));
 629
 630 attach_flow:
 631         if (hpe->hp->num_channels > 1) {
 632                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 633                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 634         } else {
 635                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 636         }
 637         list_add(&flow->hairpin, &hpe->flows);
 638
 639         return 0;
 640
 641 create_hairpin_err:
 642         kfree(hpe);
 643         return err;
 644 }
 645
 646 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 647                                    struct mlx5e_tc_flow *flow)
 648 {
 649         struct list_head *next = flow->hairpin.next;
 650
 651         list_del(&flow->hairpin);
 652
 653         /* no more hairpin flows for us, release the hairpin pair */
 654         if (list_empty(next)) {
 655                 struct mlx5e_hairpin_entry *hpe;
 656
 657                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 658
 659                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 660                            hpe->hp->pair->peer_mdev->priv.name);
 661
 662                 mlx5e_hairpin_destroy(hpe->hp);
 663                 hash_del(&hpe->hairpin_hlist);
 664                 kfree(hpe);
 665         }
 666 }
 667
 668 static struct mlx5_flow_handle *
 669 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 670                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 671                       struct mlx5e_tc_flow *flow)
 672 {
 673         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 674         struct mlx5_core_dev *dev = priv->mdev;
 675         struct mlx5_flow_destination dest[2] = {};
 676         struct mlx5_flow_act flow_act = {
 677                 .action = attr->action,
 678                 .has_flow_tag = true,
 679                 .flow_tag = attr->flow_tag,
 680                 .encap_id = 0,
 681         };
 682         struct mlx5_fc *counter = NULL;
 683         struct mlx5_flow_handle *rule;
 684         bool table_created = false;
 685         int err, dest_ix = 0;
 686
 687         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 688                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
 689                 if (err) {
 690                         rule = ERR_PTR(err);
 691                         goto err_add_hairpin_flow;
 692                 }
 693                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 694                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 695                         dest[dest_ix].ft = attr->hairpin_ft;
 696                 } else {
 697                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 698                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 699                 }
 700                 dest_ix++;
 701         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 702                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 703                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 704                 dest_ix++;
 705         }
 706
 707         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 708                 counter = mlx5_fc_create(dev, true);
 709                 if (IS_ERR(counter)) {
 710                         rule = ERR_CAST(counter);
 711                         goto err_fc_create;
 712                 }
 713                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 714                 dest[dest_ix].counter = counter;
 715                 dest_ix++;
 716         }
 717
 718         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 719                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 720                 flow_act.modify_id = attr->mod_hdr_id;
 721                 kfree(parse_attr->mod_hdr_actions);
 722                 if (err) {
 723                         rule = ERR_PTR(err);
 724                         goto err_create_mod_hdr_id;
 725                 }
 726         }
 727
 728         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 729                 int tc_grp_size, tc_tbl_size;
 730                 u32 max_flow_counter;
 731
 732                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 733                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 734
 735                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 736
 737                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 738                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 739
 740                 priv->fs.tc.t =
 741                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 742                                                             MLX5E_TC_PRIO,
 743                                                             tc_tbl_size,
 744                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 745                                                             MLX5E_TC_FT_LEVEL, 0);
 746                 if (IS_ERR(priv->fs.tc.t)) {
 747                         netdev_err(priv->netdev,
 748                                    "Failed to create tc offload table\n");
 749                         rule = ERR_CAST(priv->fs.tc.t);
 750                         goto err_create_ft;
 751                 }
 752
 753                 table_created = true;
 754         }
 755
 756         parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 757         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 758                                    &flow_act, dest, dest_ix);
 759
 760         if (IS_ERR(rule))
 761                 goto err_add_rule;
 762
 763         return rule;
 764
 765 err_add_rule:
 766         if (table_created) {
 767                 mlx5_destroy_flow_table(priv->fs.tc.t);
 768                 priv->fs.tc.t = NULL;
 769         }
 770 err_create_ft:
 771         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 772                 mlx5e_detach_mod_hdr(priv, flow);
 773 err_create_mod_hdr_id:
 774         mlx5_fc_destroy(dev, counter);
 775 err_fc_create:
 776         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 777                 mlx5e_hairpin_flow_del(priv, flow);
 778 err_add_hairpin_flow:
 779         return rule;
 780 }
 781
 782 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 783                                   struct mlx5e_tc_flow *flow)
 784 {
 785         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 786         struct mlx5_fc *counter = NULL;
 787
 788         counter = mlx5_flow_rule_counter(flow->rule);
 789         mlx5_del_flow_rules(flow->rule);
 790         mlx5_fc_destroy(priv->mdev, counter);
 791
 792         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
 793                 mlx5_destroy_flow_table(priv->fs.tc.t);
 794                 priv->fs.tc.t = NULL;
 795         }
 796
 797         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 798                 mlx5e_detach_mod_hdr(priv, flow);
 799
 800         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 801                 mlx5e_hairpin_flow_del(priv, flow);
 802 }
 803
 804 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 805                                struct mlx5e_tc_flow *flow);
 806
 807 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 808                               struct ip_tunnel_info *tun_info,
 809                               struct net_device *mirred_dev,
 810                               struct net_device **encap_dev,
 811                               struct mlx5e_tc_flow *flow);
 812
 813 static struct mlx5_flow_handle *
 814 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 815                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 816                       struct mlx5e_tc_flow *flow)
 817 {
 818         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 819         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 820         struct net_device *out_dev, *encap_dev = NULL;
 821         struct mlx5_flow_handle *rule = NULL;
 822         struct mlx5e_rep_priv *rpriv;
 823         struct mlx5e_priv *out_priv;
 824         int err;
 825
 826         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 827                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 828                                              attr->parse_attr->mirred_ifindex);
 829                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 830                                          out_dev, &encap_dev, flow);
 831                 if (err) {
 832                         rule = ERR_PTR(err);
 833                         if (err != -EAGAIN)
 834                                 goto err_attach_encap;
 835                 }
 836                 out_priv = netdev_priv(encap_dev);
 837                 rpriv = out_priv->ppriv;
 838                 attr->out_rep = rpriv->rep;
 839         }
 840
 841         err = mlx5_eswitch_add_vlan_action(esw, attr);
 842         if (err) {
 843                 rule = ERR_PTR(err);
 844                 goto err_add_vlan;
 845         }
 846
 847         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 848                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 849                 kfree(parse_attr->mod_hdr_actions);
 850                 if (err) {
 851                         rule = ERR_PTR(err);
 852                         goto err_mod_hdr;
 853                 }
 854         }
 855
 856         /* we get here if (1) there's no error (rule being null) or when
 857          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 858          */
 859         if (rule != ERR_PTR(-EAGAIN)) {
 860                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
 861                 if (IS_ERR(rule))
 862                         goto err_add_rule;
 863         }
 864         return rule;
 865
 866 err_add_rule:
 867         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 868                 mlx5e_detach_mod_hdr(priv, flow);
 869 err_mod_hdr:
 870         mlx5_eswitch_del_vlan_action(esw, attr);
 871 err_add_vlan:
 872         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
 873                 mlx5e_detach_encap(priv, flow);
 874 err_attach_encap:
 875         return rule;
 876 }
 877
 878 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
 879                                   struct mlx5e_tc_flow *flow)
 880 {
 881         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 882         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 883
 884         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 885                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 886                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
 887         }
 888
 889         mlx5_eswitch_del_vlan_action(esw, attr);
 890
 891         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 892                 mlx5e_detach_encap(priv, flow);
 893                 kvfree(attr->parse_attr);
 894         }
 895
 896         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 897                 mlx5e_detach_mod_hdr(priv, flow);
 898 }
 899
 900 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
 901                               struct mlx5e_encap_entry *e)
 902 {
 903         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 904         struct mlx5_esw_flow_attr *esw_attr;
 905         struct mlx5e_tc_flow *flow;
 906         int err;
 907
 908         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
 909                                e->encap_size, e->encap_header,
 910                                &e->encap_id);
 911         if (err) {
 912                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
 913                                err);
 914                 return;
 915         }
 916         e->flags |= MLX5_ENCAP_ENTRY_VALID;
 917         mlx5e_rep_queue_neigh_stats_work(priv);
 918
 919         list_for_each_entry(flow, &e->flows, encap) {
 920                 esw_attr = flow->esw_attr;
 921                 esw_attr->encap_id = e->encap_id;
 922                 flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
 923                 if (IS_ERR(flow->rule)) {
 924                         err = PTR_ERR(flow->rule);
 925                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
 926                                        err);
 927                         continue;
 928                 }
 929                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 930         }
 931 }
 932
 933 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
 934                               struct mlx5e_encap_entry *e)
 935 {
 936         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 937         struct mlx5e_tc_flow *flow;
 938
 939         list_for_each_entry(flow, &e->flows, encap) {
 940                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 941                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 942                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr);
 943                 }
 944         }
 945
 946         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
 947                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
 948                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
 949         }
 950 }
 951
 952 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
 953 {
 954         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
 955         u64 bytes, packets, lastuse = 0;
 956         struct mlx5e_tc_flow *flow;
 957         struct mlx5e_encap_entry *e;
 958         struct mlx5_fc *counter;
 959         struct neigh_table *tbl;
 960         bool neigh_used = false;
 961         struct neighbour *n;
 962
 963         if (m_neigh->family == AF_INET)
 964                 tbl = &arp_tbl;
 965 #if IS_ENABLED(CONFIG_IPV6)
 966         else if (m_neigh->family == AF_INET6)
 967                 tbl = &nd_tbl;
 968 #endif
 969         else
 970                 return;
 971
 972         list_for_each_entry(e, &nhe->encap_list, encap_list) {
 973                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
 974                         continue;
 975                 list_for_each_entry(flow, &e->flows, encap) {
 976                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 977                                 counter = mlx5_flow_rule_counter(flow->rule);
 978                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
 979                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
 980                                         neigh_used = true;
 981                                         break;
 982                                 }
 983                         }
 984                 }
 985                 if (neigh_used)
 986                         break;
 987         }
 988
 989         if (neigh_used) {
 990                 nhe->reported_lastuse = jiffies;
 991
 992                 /* find the relevant neigh according to the cached device and
 993                  * dst ip pair
 994                  */
 995                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
 996                 if (!n) {
 997                         WARN(1, "The neighbour already freed\n");
 998                         return;
 999                 }
1000
1001                 neigh_event_send(n, NULL);
1002                 neigh_release(n);
1003         }
1004 }
1005
1006 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1007                                struct mlx5e_tc_flow *flow)
1008 {
1009         struct list_head *next = flow->encap.next;
1010
1011         list_del(&flow->encap);
1012         if (list_empty(next)) {
1013                 struct mlx5e_encap_entry *e;
1014
1015                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1016                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1017
1018                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1019                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1020
1021                 hash_del_rcu(&e->encap_hlist);
1022                 kfree(e->encap_header);
1023                 kfree(e);
1024         }
1025 }
1026
1027 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1028                               struct mlx5e_tc_flow *flow)
1029 {
1030         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1031                 mlx5e_tc_del_fdb_flow(priv, flow);
1032         else
1033                 mlx5e_tc_del_nic_flow(priv, flow);
1034 }
1035
1036 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1037                              struct tc_cls_flower_offload *f)
1038 {
1039         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1040                                        outer_headers);
1041         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1042                                        outer_headers);
1043         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1044                                     misc_parameters);
1045         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1046                                     misc_parameters);
1047
1048         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1049         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1050
1051         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1052                 struct flow_dissector_key_keyid *key =
1053                         skb_flow_dissector_target(f->dissector,
1054                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1055                                                   f->key);
1056                 struct flow_dissector_key_keyid *mask =
1057                         skb_flow_dissector_target(f->dissector,
1058                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1059                                                   f->mask);
1060                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1061                          be32_to_cpu(mask->keyid));
1062                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1063                          be32_to_cpu(key->keyid));
1064         }
1065 }
1066
1067 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1068                              struct mlx5_flow_spec *spec,
1069                              struct tc_cls_flower_offload *f)
1070 {
1071         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1072                                        outer_headers);
1073         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1074                                        outer_headers);
1075
1076         struct flow_dissector_key_control *enc_control =
1077                 skb_flow_dissector_target(f->dissector,
1078                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1079                                           f->key);
1080
1081         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1082                 struct flow_dissector_key_ports *key =
1083                         skb_flow_dissector_target(f->dissector,
1084                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1085                                                   f->key);
1086                 struct flow_dissector_key_ports *mask =
1087                         skb_flow_dissector_target(f->dissector,
1088                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1089                                                   f->mask);
1090                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1091                 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1092                 struct net_device *up_dev = uplink_rpriv->netdev;
1093                 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1094
1095                 /* Full udp dst port must be given */
1096                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1097                         goto vxlan_match_offload_err;
1098
1099                 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
1100                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1101                         parse_vxlan_attr(spec, f);
1102                 else {
1103                         netdev_warn(priv->netdev,
1104                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1105                         return -EOPNOTSUPP;
1106                 }
1107
1108                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1109                          udp_dport, ntohs(mask->dst));
1110                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1111                          udp_dport, ntohs(key->dst));
1112
1113                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1114                          udp_sport, ntohs(mask->src));
1115                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1116                          udp_sport, ntohs(key->src));
1117         } else { /* udp dst port must be given */
1118 vxlan_match_offload_err:
1119                 netdev_warn(priv->netdev,
1120                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1121                 return -EOPNOTSUPP;
1122         }
1123
1124         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1125                 struct flow_dissector_key_ipv4_addrs *key =
1126                         skb_flow_dissector_target(f->dissector,
1127                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1128                                                   f->key);
1129                 struct flow_dissector_key_ipv4_addrs *mask =
1130                         skb_flow_dissector_target(f->dissector,
1131                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1132                                                   f->mask);
1133                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1134                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1135                          ntohl(mask->src));
1136                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1137                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1138                          ntohl(key->src));
1139
1140                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1141                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1142                          ntohl(mask->dst));
1143                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1144                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1145                          ntohl(key->dst));
1146
1147                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1148                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1149         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1150                 struct flow_dissector_key_ipv6_addrs *key =
1151                         skb_flow_dissector_target(f->dissector,
1152                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1153                                                   f->key);
1154                 struct flow_dissector_key_ipv6_addrs *mask =
1155                         skb_flow_dissector_target(f->dissector,
1156                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1157                                                   f->mask);
1158
1159                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1160                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1161                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1162                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1163                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1164                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1165
1166                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1167                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1168                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1169                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1170                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1171                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1172
1173                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1174                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1175         }
1176
1177         /* Enforce DMAC when offloading incoming tunneled flows.
1178          * Flow counters require a match on the DMAC.
1179          */
1180         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1181         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1182         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1183                                      dmac_47_16), priv->netdev->dev_addr);
1184
1185         /* let software handle IP fragments */
1186         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1187         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1188
1189         return 0;
1190 }
1191
1192 static int __parse_cls_flower(struct mlx5e_priv *priv,
1193                               struct mlx5_flow_spec *spec,
1194                               struct tc_cls_flower_offload *f,
1195                               u8 *min_inline)
1196 {
1197         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1198                                        outer_headers);
1199         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1200                                        outer_headers);
1201         u16 addr_type = 0;
1202         u8 ip_proto = 0;
1203
1204         *min_inline = MLX5_INLINE_MODE_L2;
1205
1206         if (f->dissector->used_keys &
1207             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1208               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1209               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1210               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1211               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1212               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1213               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1214               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1215               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1216               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1217               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1218               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1219               BIT(FLOW_DISSECTOR_KEY_TCP) |
1220               BIT(FLOW_DISSECTOR_KEY_IP))) {
1221                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1222                             f->dissector->used_keys);
1223                 return -EOPNOTSUPP;
1224         }
1225
1226         if ((dissector_uses_key(f->dissector,
1227                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1228              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1229              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1230             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1231                 struct flow_dissector_key_control *key =
1232                         skb_flow_dissector_target(f->dissector,
1233                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1234                                                   f->key);
1235                 switch (key->addr_type) {
1236                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1237                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1238                         if (parse_tunnel_attr(priv, spec, f))
1239                                 return -EOPNOTSUPP;
1240                         break;
1241                 default:
1242                         return -EOPNOTSUPP;
1243                 }
1244
1245                 /* In decap flow, header pointers should point to the inner
1246                  * headers, outer header were already set by parse_tunnel_attr
1247                  */
1248                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1249                                          inner_headers);
1250                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1251                                          inner_headers);
1252         }
1253
1254         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1255                 struct flow_dissector_key_control *key =
1256                         skb_flow_dissector_target(f->dissector,
1257                                                   FLOW_DISSECTOR_KEY_CONTROL,
1258                                                   f->key);
1259
1260                 struct flow_dissector_key_control *mask =
1261                         skb_flow_dissector_target(f->dissector,
1262                                                   FLOW_DISSECTOR_KEY_CONTROL,
1263                                                   f->mask);
1264                 addr_type = key->addr_type;
1265
1266                 /* the HW doesn't support frag first/later */
1267                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1268                         return -EOPNOTSUPP;
1269
1270                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1271                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1272                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1273                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1274
1275                         /* the HW doesn't need L3 inline to match on frag=no */
1276                         if (key->flags & FLOW_DIS_IS_FRAGMENT)
1277                                 *min_inline = MLX5_INLINE_MODE_IP;
1278                 }
1279         }
1280
1281         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1282                 struct flow_dissector_key_basic *key =
1283                         skb_flow_dissector_target(f->dissector,
1284                                                   FLOW_DISSECTOR_KEY_BASIC,
1285                                                   f->key);
1286                 struct flow_dissector_key_basic *mask =
1287                         skb_flow_dissector_target(f->dissector,
1288                                                   FLOW_DISSECTOR_KEY_BASIC,
1289                                                   f->mask);
1290                 ip_proto = key->ip_proto;
1291
1292                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1293                          ntohs(mask->n_proto));
1294                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1295                          ntohs(key->n_proto));
1296
1297                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1298                          mask->ip_proto);
1299                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1300                          key->ip_proto);
1301
1302                 if (mask->ip_proto)
1303                         *min_inline = MLX5_INLINE_MODE_IP;
1304         }
1305
1306         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1307                 struct flow_dissector_key_eth_addrs *key =
1308                         skb_flow_dissector_target(f->dissector,
1309                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1310                                                   f->key);
1311                 struct flow_dissector_key_eth_addrs *mask =
1312                         skb_flow_dissector_target(f->dissector,
1313                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1314                                                   f->mask);
1315
1316                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1317                                              dmac_47_16),
1318                                 mask->dst);
1319                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1320                                              dmac_47_16),
1321                                 key->dst);
1322
1323                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1324                                              smac_47_16),
1325                                 mask->src);
1326                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1327                                              smac_47_16),
1328                                 key->src);
1329         }
1330
1331         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1332                 struct flow_dissector_key_vlan *key =
1333                         skb_flow_dissector_target(f->dissector,
1334                                                   FLOW_DISSECTOR_KEY_VLAN,
1335                                                   f->key);
1336                 struct flow_dissector_key_vlan *mask =
1337                         skb_flow_dissector_target(f->dissector,
1338                                                   FLOW_DISSECTOR_KEY_VLAN,
1339                                                   f->mask);
1340                 if (mask->vlan_id || mask->vlan_priority) {
1341                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1342                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
1343
1344                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1345                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1346
1347                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1348                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1349                 }
1350         }
1351
1352         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1353                 struct flow_dissector_key_ipv4_addrs *key =
1354                         skb_flow_dissector_target(f->dissector,
1355                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1356                                                   f->key);
1357                 struct flow_dissector_key_ipv4_addrs *mask =
1358                         skb_flow_dissector_target(f->dissector,
1359                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1360                                                   f->mask);
1361
1362                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1363                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1364                        &mask->src, sizeof(mask->src));
1365                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1366                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1367                        &key->src, sizeof(key->src));
1368                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1369                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1370                        &mask->dst, sizeof(mask->dst));
1371                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1372                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1373                        &key->dst, sizeof(key->dst));
1374
1375                 if (mask->src || mask->dst)
1376                         *min_inline = MLX5_INLINE_MODE_IP;
1377         }
1378
1379         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1380                 struct flow_dissector_key_ipv6_addrs *key =
1381                         skb_flow_dissector_target(f->dissector,
1382                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1383                                                   f->key);
1384                 struct flow_dissector_key_ipv6_addrs *mask =
1385                         skb_flow_dissector_target(f->dissector,
1386                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1387                                                   f->mask);
1388
1389                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1390                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1391                        &mask->src, sizeof(mask->src));
1392                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1393                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1394                        &key->src, sizeof(key->src));
1395
1396                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1397                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1398                        &mask->dst, sizeof(mask->dst));
1399                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1400                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1401                        &key->dst, sizeof(key->dst));
1402
1403                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1404                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1405                         *min_inline = MLX5_INLINE_MODE_IP;
1406         }
1407
1408         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1409                 struct flow_dissector_key_ip *key =
1410                         skb_flow_dissector_target(f->dissector,
1411                                                   FLOW_DISSECTOR_KEY_IP,
1412                                                   f->key);
1413                 struct flow_dissector_key_ip *mask =
1414                         skb_flow_dissector_target(f->dissector,
1415                                                   FLOW_DISSECTOR_KEY_IP,
1416                                                   f->mask);
1417
1418                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1419                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1420
1421                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1422                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1423
1424                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1425                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1426
1427                 if (mask->ttl &&
1428                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1429                                                 ft_field_support.outer_ipv4_ttl))
1430                         return -EOPNOTSUPP;
1431
1432                 if (mask->tos || mask->ttl)
1433                         *min_inline = MLX5_INLINE_MODE_IP;
1434         }
1435
1436         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1437                 struct flow_dissector_key_ports *key =
1438                         skb_flow_dissector_target(f->dissector,
1439                                                   FLOW_DISSECTOR_KEY_PORTS,
1440                                                   f->key);
1441                 struct flow_dissector_key_ports *mask =
1442                         skb_flow_dissector_target(f->dissector,
1443                                                   FLOW_DISSECTOR_KEY_PORTS,
1444                                                   f->mask);
1445                 switch (ip_proto) {
1446                 case IPPROTO_TCP:
1447                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1448                                  tcp_sport, ntohs(mask->src));
1449                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1450                                  tcp_sport, ntohs(key->src));
1451
1452                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1453                                  tcp_dport, ntohs(mask->dst));
1454                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1455                                  tcp_dport, ntohs(key->dst));
1456                         break;
1457
1458                 case IPPROTO_UDP:
1459                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1460                                  udp_sport, ntohs(mask->src));
1461                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1462                                  udp_sport, ntohs(key->src));
1463
1464                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1465                                  udp_dport, ntohs(mask->dst));
1466                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1467                                  udp_dport, ntohs(key->dst));
1468                         break;
1469                 default:
1470                         netdev_err(priv->netdev,
1471                                    "Only UDP and TCP transport are supported\n");
1472                         return -EINVAL;
1473                 }
1474
1475                 if (mask->src || mask->dst)
1476                         *min_inline = MLX5_INLINE_MODE_TCP_UDP;
1477         }
1478
1479         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1480                 struct flow_dissector_key_tcp *key =
1481                         skb_flow_dissector_target(f->dissector,
1482                                                   FLOW_DISSECTOR_KEY_TCP,
1483                                                   f->key);
1484                 struct flow_dissector_key_tcp *mask =
1485                         skb_flow_dissector_target(f->dissector,
1486                                                   FLOW_DISSECTOR_KEY_TCP,
1487                                                   f->mask);
1488
1489                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1490                          ntohs(mask->flags));
1491                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1492                          ntohs(key->flags));
1493
1494                 if (mask->flags)
1495                         *min_inline = MLX5_INLINE_MODE_TCP_UDP;
1496         }
1497
1498         return 0;
1499 }
1500
1501 static int parse_cls_flower(struct mlx5e_priv *priv,
1502                             struct mlx5e_tc_flow *flow,
1503                             struct mlx5_flow_spec *spec,
1504                             struct tc_cls_flower_offload *f)
1505 {
1506         struct mlx5_core_dev *dev = priv->mdev;
1507         struct mlx5_eswitch *esw = dev->priv.eswitch;
1508         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1509         struct mlx5_eswitch_rep *rep;
1510         u8 min_inline;
1511         int err;
1512
1513         err = __parse_cls_flower(priv, spec, f, &min_inline);
1514
1515         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1516                 rep = rpriv->rep;
1517                 if (rep->vport != FDB_UPLINK_VPORT &&
1518                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1519                     esw->offloads.inline_mode < min_inline)) {
1520                         netdev_warn(priv->netdev,
1521                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1522                                     min_inline, esw->offloads.inline_mode);
1523                         return -EOPNOTSUPP;
1524                 }
1525         }
1526
1527         return err;
1528 }
1529
1530 struct pedit_headers {
1531         struct ethhdr  eth;
1532         struct iphdr   ip4;
1533         struct ipv6hdr ip6;
1534         struct tcphdr  tcp;
1535         struct udphdr  udp;
1536 };
1537
1538 static int pedit_header_offsets[] = {
1539         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1540         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1541         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1542         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1543         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1544 };
1545
1546 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1547
1548 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1549                          struct pedit_headers *masks,
1550                          struct pedit_headers *vals)
1551 {
1552         u32 *curr_pmask, *curr_pval;
1553
1554         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1555                 goto out_err;
1556
1557         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1558         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1559
1560         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1561                 goto out_err;
1562
1563         *curr_pmask |= mask;
1564         *curr_pval  |= (val & mask);
1565
1566         return 0;
1567
1568 out_err:
1569         return -EOPNOTSUPP;
1570 }
1571
1572 struct mlx5_fields {
1573         u8  field;
1574         u8  size;
1575         u32 offset;
1576 };
1577
1578 #define OFFLOAD(fw_field, size, field, off) \
1579                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1580
1581 static struct mlx5_fields fields[] = {
1582         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1583         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1584         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1585         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1586         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1587
1588         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1589         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1590         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1591
1592         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1593         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1594         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1595         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1596         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1597         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1598         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1599         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1600         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1601
1602         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1603         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1604         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1605
1606         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1607         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1608 };
1609
1610 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1611  * max from the SW pedit action. On success, it says how many HW actions were
1612  * actually parsed.
1613  */
1614 static int offload_pedit_fields(struct pedit_headers *masks,
1615                                 struct pedit_headers *vals,
1616                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1617 {
1618         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1619         int i, action_size, nactions, max_actions, first, last, next_z;
1620         void *s_masks_p, *a_masks_p, *vals_p;
1621         struct mlx5_fields *f;
1622         u8 cmd, field_bsize;
1623         u32 s_mask, a_mask;
1624         unsigned long mask;
1625         __be32 mask_be32;
1626         __be16 mask_be16;
1627         void *action;
1628
1629         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1630         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1631         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1632         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1633
1634         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1635         action = parse_attr->mod_hdr_actions;
1636         max_actions = parse_attr->num_mod_hdr_actions;
1637         nactions = 0;
1638
1639         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1640                 f = &fields[i];
1641                 /* avoid seeing bits set from previous iterations */
1642                 s_mask = 0;
1643                 a_mask = 0;
1644
1645                 s_masks_p = (void *)set_masks + f->offset;
1646                 a_masks_p = (void *)add_masks + f->offset;
1647
1648                 memcpy(&s_mask, s_masks_p, f->size);
1649                 memcpy(&a_mask, a_masks_p, f->size);
1650
1651                 if (!s_mask && !a_mask) /* nothing to offload here */
1652                         continue;
1653
1654                 if (s_mask && a_mask) {
1655                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1656                         return -EOPNOTSUPP;
1657                 }
1658
1659                 if (nactions == max_actions) {
1660                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1661                         return -EOPNOTSUPP;
1662                 }
1663
1664                 if (s_mask) {
1665                         cmd  = MLX5_ACTION_TYPE_SET;
1666                         mask = s_mask;
1667                         vals_p = (void *)set_vals + f->offset;
1668                         /* clear to denote we consumed this field */
1669                         memset(s_masks_p, 0, f->size);
1670                 } else {
1671                         cmd  = MLX5_ACTION_TYPE_ADD;
1672                         mask = a_mask;
1673                         vals_p = (void *)add_vals + f->offset;
1674                         /* clear to denote we consumed this field */
1675                         memset(a_masks_p, 0, f->size);
1676                 }
1677
1678                 field_bsize = f->size * BITS_PER_BYTE;
1679
1680                 if (field_bsize == 32) {
1681                         mask_be32 = *(__be32 *)&mask;
1682                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1683                 } else if (field_bsize == 16) {
1684                         mask_be16 = *(__be16 *)&mask;
1685                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1686                 }
1687
1688                 first = find_first_bit(&mask, field_bsize);
1689                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1690                 last  = find_last_bit(&mask, field_bsize);
1691                 if (first < next_z && next_z < last) {
1692                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1693                                mask);
1694                         return -EOPNOTSUPP;
1695                 }
1696
1697                 MLX5_SET(set_action_in, action, action_type, cmd);
1698                 MLX5_SET(set_action_in, action, field, f->field);
1699
1700                 if (cmd == MLX5_ACTION_TYPE_SET) {
1701                         MLX5_SET(set_action_in, action, offset, first);
1702                         /* length is num of bits to be written, zero means length of 32 */
1703                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1704                 }
1705
1706                 if (field_bsize == 32)
1707                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1708                 else if (field_bsize == 16)
1709                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1710                 else if (field_bsize == 8)
1711                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1712
1713                 action += action_size;
1714                 nactions++;
1715         }
1716
1717         parse_attr->num_mod_hdr_actions = nactions;
1718         return 0;
1719 }
1720
1721 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1722                                  const struct tc_action *a, int namespace,
1723                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1724 {
1725         int nkeys, action_size, max_actions;
1726
1727         nkeys = tcf_pedit_nkeys(a);
1728         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1729
1730         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1731                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1732         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1733                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1734
1735         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1736         max_actions = min(max_actions, nkeys * 16);
1737
1738         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1739         if (!parse_attr->mod_hdr_actions)
1740                 return -ENOMEM;
1741
1742         parse_attr->num_mod_hdr_actions = max_actions;
1743         return 0;
1744 }
1745
1746 static const struct pedit_headers zero_masks = {};
1747
1748 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1749                                  const struct tc_action *a, int namespace,
1750                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1751 {
1752         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1753         int nkeys, i, err = -EOPNOTSUPP;
1754         u32 mask, val, offset;
1755         u8 cmd, htype;
1756
1757         nkeys = tcf_pedit_nkeys(a);
1758
1759         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1760         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1761
1762         for (i = 0; i < nkeys; i++) {
1763                 htype = tcf_pedit_htype(a, i);
1764                 cmd = tcf_pedit_cmd(a, i);
1765                 err = -EOPNOTSUPP; /* can't be all optimistic */
1766
1767                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1768                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1769                         goto out_err;
1770                 }
1771
1772                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1773                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1774                         goto out_err;
1775                 }
1776
1777                 mask = tcf_pedit_mask(a, i);
1778                 val = tcf_pedit_val(a, i);
1779                 offset = tcf_pedit_offset(a, i);
1780
1781                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1782                 if (err)
1783                         goto out_err;
1784         }
1785
1786         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1787         if (err)
1788                 goto out_err;
1789
1790         err = offload_pedit_fields(masks, vals, parse_attr);
1791         if (err < 0)
1792                 goto out_dealloc_parsed_actions;
1793
1794         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1795                 cmd_masks = &masks[cmd];
1796                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1797                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1798                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1799                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1800                         err = -EOPNOTSUPP;
1801                         goto out_dealloc_parsed_actions;
1802                 }
1803         }
1804
1805         return 0;
1806
1807 out_dealloc_parsed_actions:
1808         kfree(parse_attr->mod_hdr_actions);
1809 out_err:
1810         return err;
1811 }
1812
1813 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1814 {
1815         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1816                          TCA_CSUM_UPDATE_FLAG_UDP;
1817
1818         /*  The HW recalcs checksums only if re-writing headers */
1819         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1820                 netdev_warn(priv->netdev,
1821                             "TC csum action is only offloaded with pedit\n");
1822                 return false;
1823         }
1824
1825         if (update_flags & ~prot_flags) {
1826                 netdev_warn(priv->netdev,
1827                             "can't offload TC csum action for some header/s - flags %#x\n",
1828                             update_flags);
1829                 return false;
1830         }
1831
1832         return true;
1833 }
1834
1835 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1836                                           struct tcf_exts *exts)
1837 {
1838         const struct tc_action *a;
1839         bool modify_ip_header;
1840         LIST_HEAD(actions);
1841         u8 htype, ip_proto;
1842         void *headers_v;
1843         u16 ethertype;
1844         int nkeys, i;
1845
1846         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1847         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1848
1849         /* for non-IP we only re-write MACs, so we're okay */
1850         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1851                 goto out_ok;
1852
1853         modify_ip_header = false;
1854         tcf_exts_to_list(exts, &actions);
1855         list_for_each_entry(a, &actions, list) {
1856                 if (!is_tcf_pedit(a))
1857                         continue;
1858
1859                 nkeys = tcf_pedit_nkeys(a);
1860                 for (i = 0; i < nkeys; i++) {
1861                         htype = tcf_pedit_htype(a, i);
1862                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1863                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1864                                 modify_ip_header = true;
1865                                 break;
1866                         }
1867                 }
1868         }
1869
1870         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1871         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
1872             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
1873                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
1874                 return false;
1875         }
1876
1877 out_ok:
1878         return true;
1879 }
1880
1881 static bool actions_match_supported(struct mlx5e_priv *priv,
1882                                     struct tcf_exts *exts,
1883                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
1884                                     struct mlx5e_tc_flow *flow)
1885 {
1886         u32 actions;
1887
1888         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1889                 actions = flow->esw_attr->action;
1890         else
1891                 actions = flow->nic_attr->action;
1892
1893         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1894                 return modify_header_match_supported(&parse_attr->spec, exts);
1895
1896         return true;
1897 }
1898
1899 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
1900 {
1901         struct mlx5_core_dev *fmdev, *pmdev;
1902         u16 func_id, peer_id;
1903
1904         fmdev = priv->mdev;
1905         pmdev = peer_priv->mdev;
1906
1907         func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn));
1908         peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn));
1909
1910         return (func_id == peer_id);
1911 }
1912
1913 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1914                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1915                                 struct mlx5e_tc_flow *flow)
1916 {
1917         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1918         const struct tc_action *a;
1919         LIST_HEAD(actions);
1920         u32 action = 0;
1921         int err;
1922
1923         if (!tcf_exts_has_actions(exts))
1924                 return -EINVAL;
1925
1926         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1927
1928         tcf_exts_to_list(exts, &actions);
1929         list_for_each_entry(a, &actions, list) {
1930                 if (is_tcf_gact_shot(a)) {
1931                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1932                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
1933                                                flow_table_properties_nic_receive.flow_counter))
1934                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1935                         continue;
1936                 }
1937
1938                 if (is_tcf_pedit(a)) {
1939                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1940                                                     parse_attr);
1941                         if (err)
1942                                 return err;
1943
1944                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1945                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1946                         continue;
1947                 }
1948
1949                 if (is_tcf_csum(a)) {
1950                         if (csum_offload_supported(priv, action,
1951                                                    tcf_csum_update_flags(a)))
1952                                 continue;
1953
1954                         return -EOPNOTSUPP;
1955                 }
1956
1957                 if (is_tcf_mirred_egress_redirect(a)) {
1958                         struct net_device *peer_dev = tcf_mirred_dev(a);
1959
1960                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
1961                             same_hw_devs(priv, netdev_priv(peer_dev))) {
1962                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
1963                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
1964                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
1965                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
1966                         } else {
1967                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
1968                                             peer_dev->name);
1969                                 return -EINVAL;
1970                         }
1971                         continue;
1972                 }
1973
1974                 if (is_tcf_skbedit_mark(a)) {
1975                         u32 mark = tcf_skbedit_mark(a);
1976
1977                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
1978                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
1979                                             mark);
1980                                 return -EINVAL;
1981                         }
1982
1983                         attr->flow_tag = mark;
1984                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1985                         continue;
1986                 }
1987
1988                 return -EINVAL;
1989         }
1990
1991         attr->action = action;
1992         if (!actions_match_supported(priv, exts, parse_attr, flow))
1993                 return -EOPNOTSUPP;
1994
1995         return 0;
1996 }
1997
1998 static inline int cmp_encap_info(struct ip_tunnel_key *a,
1999                                  struct ip_tunnel_key *b)
2000 {
2001         return memcmp(a, b, sizeof(*a));
2002 }
2003
2004 static inline int hash_encap_info(struct ip_tunnel_key *key)
2005 {
2006         return jhash(key, sizeof(*key), 0);
2007 }
2008
2009 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2010                                    struct net_device *mirred_dev,
2011                                    struct net_device **out_dev,
2012                                    struct flowi4 *fl4,
2013                                    struct neighbour **out_n,
2014                                    int *out_ttl)
2015 {
2016         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2017         struct mlx5e_rep_priv *uplink_rpriv;
2018         struct rtable *rt;
2019         struct neighbour *n = NULL;
2020
2021 #if IS_ENABLED(CONFIG_INET)
2022         int ret;
2023
2024         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2025         ret = PTR_ERR_OR_ZERO(rt);
2026         if (ret)
2027                 return ret;
2028 #else
2029         return -EOPNOTSUPP;
2030 #endif
2031         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2032         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2033         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2034                 *out_dev = uplink_rpriv->netdev;
2035         else
2036                 *out_dev = rt->dst.dev;
2037
2038         *out_ttl = ip4_dst_hoplimit(&rt->dst);
2039         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2040         ip_rt_put(rt);
2041         if (!n)
2042                 return -ENOMEM;
2043
2044         *out_n = n;
2045         return 0;
2046 }
2047
2048 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2049                                    struct net_device *mirred_dev,
2050                                    struct net_device **out_dev,
2051                                    struct flowi6 *fl6,
2052                                    struct neighbour **out_n,
2053                                    int *out_ttl)
2054 {
2055         struct neighbour *n = NULL;
2056         struct dst_entry *dst;
2057
2058 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2059         struct mlx5e_rep_priv *uplink_rpriv;
2060         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2061         int ret;
2062
2063         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2064                                          fl6);
2065         if (ret < 0)
2066                 return ret;
2067
2068         *out_ttl = ip6_dst_hoplimit(dst);
2069
2070         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2071         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2072         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2073                 *out_dev = uplink_rpriv->netdev;
2074         else
2075                 *out_dev = dst->dev;
2076 #else
2077         return -EOPNOTSUPP;
2078 #endif
2079
2080         n = dst_neigh_lookup(dst, &fl6->daddr);
2081         dst_release(dst);
2082         if (!n)
2083                 return -ENOMEM;
2084
2085         *out_n = n;
2086         return 0;
2087 }
2088
2089 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2090                                   char buf[], int encap_size,
2091                                   unsigned char h_dest[ETH_ALEN],
2092                                   int ttl,
2093                                   __be32 daddr,
2094                                   __be32 saddr,
2095                                   __be16 udp_dst_port,
2096                                   __be32 vx_vni)
2097 {
2098         struct ethhdr *eth = (struct ethhdr *)buf;
2099         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2100         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2101         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2102
2103         memset(buf, 0, encap_size);
2104
2105         ether_addr_copy(eth->h_dest, h_dest);
2106         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2107         eth->h_proto = htons(ETH_P_IP);
2108
2109         ip->daddr = daddr;
2110         ip->saddr = saddr;
2111
2112         ip->ttl = ttl;
2113         ip->protocol = IPPROTO_UDP;
2114         ip->version = 0x4;
2115         ip->ihl = 0x5;
2116
2117         udp->dest = udp_dst_port;
2118         vxh->vx_flags = VXLAN_HF_VNI;
2119         vxh->vx_vni = vxlan_vni_field(vx_vni);
2120 }
2121
2122 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2123                                   char buf[], int encap_size,
2124                                   unsigned char h_dest[ETH_ALEN],
2125                                   int ttl,
2126                                   struct in6_addr *daddr,
2127                                   struct in6_addr *saddr,
2128                                   __be16 udp_dst_port,
2129                                   __be32 vx_vni)
2130 {
2131         struct ethhdr *eth = (struct ethhdr *)buf;
2132         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2133         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2134         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2135
2136         memset(buf, 0, encap_size);
2137
2138         ether_addr_copy(eth->h_dest, h_dest);
2139         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2140         eth->h_proto = htons(ETH_P_IPV6);
2141
2142         ip6_flow_hdr(ip6h, 0, 0);
2143         /* the HW fills up ipv6 payload len */
2144         ip6h->nexthdr     = IPPROTO_UDP;
2145         ip6h->hop_limit   = ttl;
2146         ip6h->daddr       = *daddr;
2147         ip6h->saddr       = *saddr;
2148
2149         udp->dest = udp_dst_port;
2150         vxh->vx_flags = VXLAN_HF_VNI;
2151         vxh->vx_vni = vxlan_vni_field(vx_vni);
2152 }
2153
2154 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2155                                           struct net_device *mirred_dev,
2156                                           struct mlx5e_encap_entry *e)
2157 {
2158         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2159         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2160         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2161         struct net_device *out_dev;
2162         struct neighbour *n = NULL;
2163         struct flowi4 fl4 = {};
2164         char *encap_header;
2165         int ttl, err;
2166         u8 nud_state;
2167
2168         if (max_encap_size < ipv4_encap_size) {
2169                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2170                                ipv4_encap_size, max_encap_size);
2171                 return -EOPNOTSUPP;
2172         }
2173
2174         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2175         if (!encap_header)
2176                 return -ENOMEM;
2177
2178         switch (e->tunnel_type) {
2179         case MLX5_HEADER_TYPE_VXLAN:
2180                 fl4.flowi4_proto = IPPROTO_UDP;
2181                 fl4.fl4_dport = tun_key->tp_dst;
2182                 break;
2183         default:
2184                 err = -EOPNOTSUPP;
2185                 goto free_encap;
2186         }
2187         fl4.flowi4_tos = tun_key->tos;
2188         fl4.daddr = tun_key->u.ipv4.dst;
2189         fl4.saddr = tun_key->u.ipv4.src;
2190
2191         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2192                                       &fl4, &n, &ttl);
2193         if (err)
2194                 goto free_encap;
2195
2196         /* used by mlx5e_detach_encap to lookup a neigh hash table
2197          * entry in the neigh hash table when a user deletes a rule
2198          */
2199         e->m_neigh.dev = n->dev;
2200         e->m_neigh.family = n->ops->family;
2201         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2202         e->out_dev = out_dev;
2203
2204         /* It's importent to add the neigh to the hash table before checking
2205          * the neigh validity state. So if we'll get a notification, in case the
2206          * neigh changes it's validity state, we would find the relevant neigh
2207          * in the hash.
2208          */
2209         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2210         if (err)
2211                 goto free_encap;
2212
2213         read_lock_bh(&n->lock);
2214         nud_state = n->nud_state;
2215         ether_addr_copy(e->h_dest, n->ha);
2216         read_unlock_bh(&n->lock);
2217
2218         switch (e->tunnel_type) {
2219         case MLX5_HEADER_TYPE_VXLAN:
2220                 gen_vxlan_header_ipv4(out_dev, encap_header,
2221                                       ipv4_encap_size, e->h_dest, ttl,
2222                                       fl4.daddr,
2223                                       fl4.saddr, tun_key->tp_dst,
2224                                       tunnel_id_to_key32(tun_key->tun_id));
2225                 break;
2226         default:
2227                 err = -EOPNOTSUPP;
2228                 goto destroy_neigh_entry;
2229         }
2230         e->encap_size = ipv4_encap_size;
2231         e->encap_header = encap_header;
2232
2233         if (!(nud_state & NUD_VALID)) {
2234                 neigh_event_send(n, NULL);
2235                 err = -EAGAIN;
2236                 goto out;
2237         }
2238
2239         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2240                                ipv4_encap_size, encap_header, &e->encap_id);
2241         if (err)
2242                 goto destroy_neigh_entry;
2243
2244         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2245         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2246         neigh_release(n);
2247         return err;
2248
2249 destroy_neigh_entry:
2250         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2251 free_encap:
2252         kfree(encap_header);
2253 out:
2254         if (n)
2255                 neigh_release(n);
2256         return err;
2257 }
2258
2259 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2260                                           struct net_device *mirred_dev,
2261                                           struct mlx5e_encap_entry *e)
2262 {
2263         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2264         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2265         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2266         struct net_device *out_dev;
2267         struct neighbour *n = NULL;
2268         struct flowi6 fl6 = {};
2269         char *encap_header;
2270         int err, ttl = 0;
2271         u8 nud_state;
2272
2273         if (max_encap_size < ipv6_encap_size) {
2274                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2275                                ipv6_encap_size, max_encap_size);
2276                 return -EOPNOTSUPP;
2277         }
2278
2279         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2280         if (!encap_header)
2281                 return -ENOMEM;
2282
2283         switch (e->tunnel_type) {
2284         case MLX5_HEADER_TYPE_VXLAN:
2285                 fl6.flowi6_proto = IPPROTO_UDP;
2286                 fl6.fl6_dport = tun_key->tp_dst;
2287                 break;
2288         default:
2289                 err = -EOPNOTSUPP;
2290                 goto free_encap;
2291         }
2292
2293         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2294         fl6.daddr = tun_key->u.ipv6.dst;
2295         fl6.saddr = tun_key->u.ipv6.src;
2296
2297         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2298                                       &fl6, &n, &ttl);
2299         if (err)
2300                 goto free_encap;
2301
2302         /* used by mlx5e_detach_encap to lookup a neigh hash table
2303          * entry in the neigh hash table when a user deletes a rule
2304          */
2305         e->m_neigh.dev = n->dev;
2306         e->m_neigh.family = n->ops->family;
2307         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2308         e->out_dev = out_dev;
2309
2310         /* It's importent to add the neigh to the hash table before checking
2311          * the neigh validity state. So if we'll get a notification, in case the
2312          * neigh changes it's validity state, we would find the relevant neigh
2313          * in the hash.
2314          */
2315         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2316         if (err)
2317                 goto free_encap;
2318
2319         read_lock_bh(&n->lock);
2320         nud_state = n->nud_state;
2321         ether_addr_copy(e->h_dest, n->ha);
2322         read_unlock_bh(&n->lock);
2323
2324         switch (e->tunnel_type) {
2325         case MLX5_HEADER_TYPE_VXLAN:
2326                 gen_vxlan_header_ipv6(out_dev, encap_header,
2327                                       ipv6_encap_size, e->h_dest, ttl,
2328                                       &fl6.daddr,
2329                                       &fl6.saddr, tun_key->tp_dst,
2330                                       tunnel_id_to_key32(tun_key->tun_id));
2331                 break;
2332         default:
2333                 err = -EOPNOTSUPP;
2334                 goto destroy_neigh_entry;
2335         }
2336
2337         e->encap_size = ipv6_encap_size;
2338         e->encap_header = encap_header;
2339
2340         if (!(nud_state & NUD_VALID)) {
2341                 neigh_event_send(n, NULL);
2342                 err = -EAGAIN;
2343                 goto out;
2344         }
2345
2346         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2347                                ipv6_encap_size, encap_header, &e->encap_id);
2348         if (err)
2349                 goto destroy_neigh_entry;
2350
2351         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2352         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2353         neigh_release(n);
2354         return err;
2355
2356 destroy_neigh_entry:
2357         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2358 free_encap:
2359         kfree(encap_header);
2360 out:
2361         if (n)
2362                 neigh_release(n);
2363         return err;
2364 }
2365
2366 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2367                               struct ip_tunnel_info *tun_info,
2368                               struct net_device *mirred_dev,
2369                               struct net_device **encap_dev,
2370                               struct mlx5e_tc_flow *flow)
2371 {
2372         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2373         struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw,
2374                                                                            REP_ETH);
2375         struct net_device *up_dev = uplink_rpriv->netdev;
2376         unsigned short family = ip_tunnel_info_af(tun_info);
2377         struct mlx5e_priv *up_priv = netdev_priv(up_dev);
2378         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2379         struct ip_tunnel_key *key = &tun_info->key;
2380         struct mlx5e_encap_entry *e;
2381         int tunnel_type, err = 0;
2382         uintptr_t hash_key;
2383         bool found = false;
2384
2385         /* udp dst port must be set */
2386         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2387                 goto vxlan_encap_offload_err;
2388
2389         /* setting udp src port isn't supported */
2390         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2391 vxlan_encap_offload_err:
2392                 netdev_warn(priv->netdev,
2393                             "must set udp dst port and not set udp src port\n");
2394                 return -EOPNOTSUPP;
2395         }
2396
2397         if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
2398             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2399                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2400         } else {
2401                 netdev_warn(priv->netdev,
2402                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2403                 return -EOPNOTSUPP;
2404         }
2405
2406         hash_key = hash_encap_info(key);
2407
2408         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2409                                    encap_hlist, hash_key) {
2410                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2411                         found = true;
2412                         break;
2413                 }
2414         }
2415
2416         /* must verify if encap is valid or not */
2417         if (found)
2418                 goto attach_flow;
2419
2420         e = kzalloc(sizeof(*e), GFP_KERNEL);
2421         if (!e)
2422                 return -ENOMEM;
2423
2424         e->tun_info = *tun_info;
2425         e->tunnel_type = tunnel_type;
2426         INIT_LIST_HEAD(&e->flows);
2427
2428         if (family == AF_INET)
2429                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2430         else if (family == AF_INET6)
2431                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2432
2433         if (err && err != -EAGAIN)
2434                 goto out_err;
2435
2436         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2437
2438 attach_flow:
2439         list_add(&flow->encap, &e->flows);
2440         *encap_dev = e->out_dev;
2441         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2442                 attr->encap_id = e->encap_id;
2443         else
2444                 err = -EAGAIN;
2445
2446         return err;
2447
2448 out_err:
2449         kfree(e);
2450         return err;
2451 }
2452
2453 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2454                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2455                                 struct mlx5e_tc_flow *flow)
2456 {
2457         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2458         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2459         struct ip_tunnel_info *info = NULL;
2460         const struct tc_action *a;
2461         LIST_HEAD(actions);
2462         bool encap = false;
2463         u32 action = 0;
2464
2465         if (!tcf_exts_has_actions(exts))
2466                 return -EINVAL;
2467
2468         attr->in_rep = rpriv->rep;
2469
2470         tcf_exts_to_list(exts, &actions);
2471         list_for_each_entry(a, &actions, list) {
2472                 if (is_tcf_gact_shot(a)) {
2473                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2474                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2475                         continue;
2476                 }
2477
2478                 if (is_tcf_pedit(a)) {
2479                         int err;
2480
2481                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2482                                                     parse_attr);
2483                         if (err)
2484                                 return err;
2485
2486                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2487                         continue;
2488                 }
2489
2490                 if (is_tcf_csum(a)) {
2491                         if (csum_offload_supported(priv, action,
2492                                                    tcf_csum_update_flags(a)))
2493                                 continue;
2494
2495                         return -EOPNOTSUPP;
2496                 }
2497
2498                 if (is_tcf_mirred_egress_redirect(a)) {
2499                         struct net_device *out_dev;
2500                         struct mlx5e_priv *out_priv;
2501
2502                         out_dev = tcf_mirred_dev(a);
2503
2504                         if (switchdev_port_same_parent_id(priv->netdev,
2505                                                           out_dev)) {
2506                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2507                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2508                                 out_priv = netdev_priv(out_dev);
2509                                 rpriv = out_priv->ppriv;
2510                                 attr->out_rep = rpriv->rep;
2511                         } else if (encap) {
2512                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2513                                 parse_attr->tun_info = *info;
2514                                 attr->parse_attr = parse_attr;
2515                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2516                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2517                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2518                                 /* attr->out_rep is resolved when we handle encap */
2519                         } else {
2520                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2521                                        priv->netdev->name, out_dev->name);
2522                                 return -EINVAL;
2523                         }
2524                         continue;
2525                 }
2526
2527                 if (is_tcf_tunnel_set(a)) {
2528                         info = tcf_tunnel_info(a);
2529                         if (info)
2530                                 encap = true;
2531                         else
2532                                 return -EOPNOTSUPP;
2533                         continue;
2534                 }
2535
2536                 if (is_tcf_vlan(a)) {
2537                         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2538                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2539                         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2540                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2541                                 attr->vlan_vid = tcf_vlan_push_vid(a);
2542                                 if (mlx5_eswitch_vlan_actions_supported(priv->mdev)) {
2543                                         attr->vlan_prio = tcf_vlan_push_prio(a);
2544                                         attr->vlan_proto = tcf_vlan_push_proto(a);
2545                                         if (!attr->vlan_proto)
2546                                                 attr->vlan_proto = htons(ETH_P_8021Q);
2547                                 } else if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2548                                            tcf_vlan_push_prio(a)) {
2549                                         return -EOPNOTSUPP;
2550                                 }
2551                         } else { /* action is TCA_VLAN_ACT_MODIFY */
2552                                 return -EOPNOTSUPP;
2553                         }
2554                         continue;
2555                 }
2556
2557                 if (is_tcf_tunnel_release(a)) {
2558                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2559                         continue;
2560                 }
2561
2562                 return -EINVAL;
2563         }
2564
2565         attr->action = action;
2566         if (!actions_match_supported(priv, exts, parse_attr, flow))
2567                 return -EOPNOTSUPP;
2568
2569         return 0;
2570 }
2571
2572 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2573                            struct tc_cls_flower_offload *f)
2574 {
2575         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2576         struct mlx5e_tc_flow_parse_attr *parse_attr;
2577         struct mlx5e_tc_table *tc = &priv->fs.tc;
2578         struct mlx5e_tc_flow *flow;
2579         int attr_size, err = 0;
2580         u8 flow_flags = 0;
2581
2582         if (esw && esw->mode == SRIOV_OFFLOADS) {
2583                 flow_flags = MLX5E_TC_FLOW_ESWITCH;
2584                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2585         } else {
2586                 flow_flags = MLX5E_TC_FLOW_NIC;
2587                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2588         }
2589
2590         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2591         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2592         if (!parse_attr || !flow) {
2593                 err = -ENOMEM;
2594                 goto err_free;
2595         }
2596
2597         flow->cookie = f->cookie;
2598         flow->flags = flow_flags;
2599
2600         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2601         if (err < 0)
2602                 goto err_free;
2603
2604         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2605                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2606                 if (err < 0)
2607                         goto err_free;
2608                 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2609         } else {
2610                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2611                 if (err < 0)
2612                         goto err_free;
2613                 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2614         }
2615
2616         if (IS_ERR(flow->rule)) {
2617                 err = PTR_ERR(flow->rule);
2618                 if (err != -EAGAIN)
2619                         goto err_free;
2620         }
2621
2622         if (err != -EAGAIN)
2623                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2624
2625         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2626             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2627                 kvfree(parse_attr);
2628
2629         err = rhashtable_insert_fast(&tc->ht, &flow->node,
2630                                      tc->ht_params);
2631         if (err) {
2632                 mlx5e_tc_del_flow(priv, flow);
2633                 kfree(flow);
2634         }
2635
2636         return err;
2637
2638 err_free:
2639         kvfree(parse_attr);
2640         kfree(flow);
2641         return err;
2642 }
2643
2644 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2645                         struct tc_cls_flower_offload *f)
2646 {
2647         struct mlx5e_tc_flow *flow;
2648         struct mlx5e_tc_table *tc = &priv->fs.tc;
2649
2650         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2651                                       tc->ht_params);
2652         if (!flow)
2653                 return -EINVAL;
2654
2655         rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
2656
2657         mlx5e_tc_del_flow(priv, flow);
2658
2659         kfree(flow);
2660
2661         return 0;
2662 }
2663
2664 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2665                        struct tc_cls_flower_offload *f)
2666 {
2667         struct mlx5e_tc_table *tc = &priv->fs.tc;
2668         struct mlx5e_tc_flow *flow;
2669         struct mlx5_fc *counter;
2670         u64 bytes;
2671         u64 packets;
2672         u64 lastuse;
2673
2674         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2675                                       tc->ht_params);
2676         if (!flow)
2677                 return -EINVAL;
2678
2679         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2680                 return 0;
2681
2682         counter = mlx5_flow_rule_counter(flow->rule);
2683         if (!counter)
2684                 return 0;
2685
2686         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2687
2688         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2689
2690         return 0;
2691 }
2692
2693 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
2694         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2695         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2696         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2697         .automatic_shrinking = true,
2698 };
2699
2700 int mlx5e_tc_init(struct mlx5e_priv *priv)
2701 {
2702         struct mlx5e_tc_table *tc = &priv->fs.tc;
2703
2704         hash_init(tc->mod_hdr_tbl);
2705         hash_init(tc->hairpin_tbl);
2706
2707         tc->ht_params = mlx5e_tc_flow_ht_params;
2708         return rhashtable_init(&tc->ht, &tc->ht_params);
2709 }
2710
2711 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2712 {
2713         struct mlx5e_tc_flow *flow = ptr;
2714         struct mlx5e_priv *priv = arg;
2715
2716         mlx5e_tc_del_flow(priv, flow);
2717         kfree(flow);
2718 }
2719
2720 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
2721 {
2722         struct mlx5e_tc_table *tc = &priv->fs.tc;
2723
2724         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
2725
2726         if (!IS_ERR_OR_NULL(tc->t)) {
2727                 mlx5_destroy_flow_table(tc->t);
2728                 tc->t = NULL;
2729         }
2730 }