2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/vxlan.h>
51 struct mlx5e_tc_flow {
52 struct rhash_head node;
54 struct mlx5_flow_handle *rule;
55 struct list_head encap; /* flows sharing the same encap */
56 struct mlx5_esw_flow_attr *attr;
60 MLX5_HEADER_TYPE_VXLAN = 0x0,
61 MLX5_HEADER_TYPE_NVGRE = 0x1,
64 #define MLX5E_TC_TABLE_NUM_ENTRIES 1024
65 #define MLX5E_TC_TABLE_NUM_GROUPS 4
67 static struct mlx5_flow_handle *
68 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
69 struct mlx5_flow_spec *spec,
70 u32 action, u32 flow_tag)
72 struct mlx5_core_dev *dev = priv->mdev;
73 struct mlx5_flow_destination dest = { 0 };
74 struct mlx5_flow_act flow_act = {
79 struct mlx5_fc *counter = NULL;
80 struct mlx5_flow_handle *rule;
81 bool table_created = false;
83 if (action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
84 dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
85 dest.ft = priv->fs.vlan.ft.t;
86 } else if (action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
87 counter = mlx5_fc_create(dev, true);
89 return ERR_CAST(counter);
91 dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
92 dest.counter = counter;
95 if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
97 mlx5_create_auto_grouped_flow_table(priv->fs.ns,
99 MLX5E_TC_TABLE_NUM_ENTRIES,
100 MLX5E_TC_TABLE_NUM_GROUPS,
102 if (IS_ERR(priv->fs.tc.t)) {
103 netdev_err(priv->netdev,
104 "Failed to create tc offload table\n");
105 rule = ERR_CAST(priv->fs.tc.t);
109 table_created = true;
112 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
113 rule = mlx5_add_flow_rules(priv->fs.tc.t, spec, &flow_act, &dest, 1);
122 mlx5_destroy_flow_table(priv->fs.tc.t);
123 priv->fs.tc.t = NULL;
126 mlx5_fc_destroy(dev, counter);
131 static struct mlx5_flow_handle *
132 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
133 struct mlx5_flow_spec *spec,
134 struct mlx5_esw_flow_attr *attr)
136 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
139 err = mlx5_eswitch_add_vlan_action(esw, attr);
143 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
146 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
147 struct mlx5e_tc_flow *flow) {
148 struct list_head *next = flow->encap.next;
150 list_del(&flow->encap);
151 if (list_empty(next)) {
152 struct mlx5_encap_entry *e;
154 e = list_entry(next, struct mlx5_encap_entry, flows);
156 mlx5_encap_dealloc(priv->mdev, e->encap_id);
159 hlist_del_rcu(&e->encap_hlist);
164 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
165 struct mlx5e_tc_flow *flow)
167 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
168 struct mlx5_fc *counter = NULL;
170 counter = mlx5_flow_rule_counter(flow->rule);
172 mlx5_del_flow_rules(flow->rule);
174 if (esw && esw->mode == SRIOV_OFFLOADS) {
175 mlx5_eswitch_del_vlan_action(esw, flow->attr);
176 if (flow->attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
177 mlx5e_detach_encap(priv, flow);
180 mlx5_fc_destroy(priv->mdev, counter);
182 if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) {
183 mlx5_destroy_flow_table(priv->fs.tc.t);
184 priv->fs.tc.t = NULL;
188 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
189 struct tc_cls_flower_offload *f)
191 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
193 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
195 void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
197 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
200 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
201 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
203 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
204 struct flow_dissector_key_keyid *key =
205 skb_flow_dissector_target(f->dissector,
206 FLOW_DISSECTOR_KEY_ENC_KEYID,
208 struct flow_dissector_key_keyid *mask =
209 skb_flow_dissector_target(f->dissector,
210 FLOW_DISSECTOR_KEY_ENC_KEYID,
212 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
213 be32_to_cpu(mask->keyid));
214 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
215 be32_to_cpu(key->keyid));
219 static int parse_tunnel_attr(struct mlx5e_priv *priv,
220 struct mlx5_flow_spec *spec,
221 struct tc_cls_flower_offload *f)
223 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
225 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
228 struct flow_dissector_key_control *enc_control =
229 skb_flow_dissector_target(f->dissector,
230 FLOW_DISSECTOR_KEY_ENC_CONTROL,
233 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
234 struct flow_dissector_key_ports *key =
235 skb_flow_dissector_target(f->dissector,
236 FLOW_DISSECTOR_KEY_ENC_PORTS,
238 struct flow_dissector_key_ports *mask =
239 skb_flow_dissector_target(f->dissector,
240 FLOW_DISSECTOR_KEY_ENC_PORTS,
243 /* Full udp dst port must be given */
244 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
245 goto vxlan_match_offload_err;
247 if (mlx5e_vxlan_lookup_port(priv, be16_to_cpu(key->dst)) &&
248 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
249 parse_vxlan_attr(spec, f);
251 netdev_warn(priv->netdev,
252 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
256 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
257 udp_dport, ntohs(mask->dst));
258 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
259 udp_dport, ntohs(key->dst));
261 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
262 udp_sport, ntohs(mask->src));
263 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
264 udp_sport, ntohs(key->src));
265 } else { /* udp dst port must be given */
266 vxlan_match_offload_err:
267 netdev_warn(priv->netdev,
268 "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
272 if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
273 struct flow_dissector_key_ipv4_addrs *key =
274 skb_flow_dissector_target(f->dissector,
275 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
277 struct flow_dissector_key_ipv4_addrs *mask =
278 skb_flow_dissector_target(f->dissector,
279 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
281 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
282 src_ipv4_src_ipv6.ipv4_layout.ipv4,
284 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
285 src_ipv4_src_ipv6.ipv4_layout.ipv4,
288 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
289 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
291 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
292 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
295 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
296 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
299 /* Enforce DMAC when offloading incoming tunneled flows.
300 * Flow counters require a match on the DMAC.
302 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
303 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
304 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
305 dmac_47_16), priv->netdev->dev_addr);
307 /* let software handle IP fragments */
308 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
309 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
314 static int __parse_cls_flower(struct mlx5e_priv *priv,
315 struct mlx5_flow_spec *spec,
316 struct tc_cls_flower_offload *f,
319 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
321 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
326 *min_inline = MLX5_INLINE_MODE_L2;
328 if (f->dissector->used_keys &
329 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
330 BIT(FLOW_DISSECTOR_KEY_BASIC) |
331 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
332 BIT(FLOW_DISSECTOR_KEY_VLAN) |
333 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
334 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
335 BIT(FLOW_DISSECTOR_KEY_PORTS) |
336 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
337 BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
338 BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
339 BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
340 BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL))) {
341 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
342 f->dissector->used_keys);
346 if ((dissector_uses_key(f->dissector,
347 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
348 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
349 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
350 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
351 struct flow_dissector_key_control *key =
352 skb_flow_dissector_target(f->dissector,
353 FLOW_DISSECTOR_KEY_ENC_CONTROL,
355 switch (key->addr_type) {
356 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
357 if (parse_tunnel_attr(priv, spec, f))
360 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
361 netdev_warn(priv->netdev,
362 "IPv6 tunnel decap offload isn't supported\n");
367 /* In decap flow, header pointers should point to the inner
368 * headers, outer header were already set by parse_tunnel_attr
370 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
372 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
376 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
377 struct flow_dissector_key_control *key =
378 skb_flow_dissector_target(f->dissector,
379 FLOW_DISSECTOR_KEY_CONTROL,
382 struct flow_dissector_key_control *mask =
383 skb_flow_dissector_target(f->dissector,
384 FLOW_DISSECTOR_KEY_CONTROL,
386 addr_type = key->addr_type;
388 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
389 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
390 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
391 key->flags & FLOW_DIS_IS_FRAGMENT);
393 /* the HW doesn't need L3 inline to match on frag=no */
394 if (key->flags & FLOW_DIS_IS_FRAGMENT)
395 *min_inline = MLX5_INLINE_MODE_IP;
399 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
400 struct flow_dissector_key_basic *key =
401 skb_flow_dissector_target(f->dissector,
402 FLOW_DISSECTOR_KEY_BASIC,
404 struct flow_dissector_key_basic *mask =
405 skb_flow_dissector_target(f->dissector,
406 FLOW_DISSECTOR_KEY_BASIC,
408 ip_proto = key->ip_proto;
410 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
411 ntohs(mask->n_proto));
412 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
413 ntohs(key->n_proto));
415 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
417 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
421 *min_inline = MLX5_INLINE_MODE_IP;
424 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
425 struct flow_dissector_key_eth_addrs *key =
426 skb_flow_dissector_target(f->dissector,
427 FLOW_DISSECTOR_KEY_ETH_ADDRS,
429 struct flow_dissector_key_eth_addrs *mask =
430 skb_flow_dissector_target(f->dissector,
431 FLOW_DISSECTOR_KEY_ETH_ADDRS,
434 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
437 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
441 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
444 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
449 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
450 struct flow_dissector_key_vlan *key =
451 skb_flow_dissector_target(f->dissector,
452 FLOW_DISSECTOR_KEY_VLAN,
454 struct flow_dissector_key_vlan *mask =
455 skb_flow_dissector_target(f->dissector,
456 FLOW_DISSECTOR_KEY_VLAN,
458 if (mask->vlan_id || mask->vlan_priority) {
459 MLX5_SET(fte_match_set_lyr_2_4, headers_c, vlan_tag, 1);
460 MLX5_SET(fte_match_set_lyr_2_4, headers_v, vlan_tag, 1);
462 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
463 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
465 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
466 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
470 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
471 struct flow_dissector_key_ipv4_addrs *key =
472 skb_flow_dissector_target(f->dissector,
473 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
475 struct flow_dissector_key_ipv4_addrs *mask =
476 skb_flow_dissector_target(f->dissector,
477 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
480 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
481 src_ipv4_src_ipv6.ipv4_layout.ipv4),
482 &mask->src, sizeof(mask->src));
483 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
484 src_ipv4_src_ipv6.ipv4_layout.ipv4),
485 &key->src, sizeof(key->src));
486 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
487 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
488 &mask->dst, sizeof(mask->dst));
489 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
490 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
491 &key->dst, sizeof(key->dst));
493 if (mask->src || mask->dst)
494 *min_inline = MLX5_INLINE_MODE_IP;
497 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
498 struct flow_dissector_key_ipv6_addrs *key =
499 skb_flow_dissector_target(f->dissector,
500 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
502 struct flow_dissector_key_ipv6_addrs *mask =
503 skb_flow_dissector_target(f->dissector,
504 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
507 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
508 src_ipv4_src_ipv6.ipv6_layout.ipv6),
509 &mask->src, sizeof(mask->src));
510 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
511 src_ipv4_src_ipv6.ipv6_layout.ipv6),
512 &key->src, sizeof(key->src));
514 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
515 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
516 &mask->dst, sizeof(mask->dst));
517 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
518 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
519 &key->dst, sizeof(key->dst));
521 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
522 ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
523 *min_inline = MLX5_INLINE_MODE_IP;
526 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
527 struct flow_dissector_key_ports *key =
528 skb_flow_dissector_target(f->dissector,
529 FLOW_DISSECTOR_KEY_PORTS,
531 struct flow_dissector_key_ports *mask =
532 skb_flow_dissector_target(f->dissector,
533 FLOW_DISSECTOR_KEY_PORTS,
537 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
538 tcp_sport, ntohs(mask->src));
539 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
540 tcp_sport, ntohs(key->src));
542 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
543 tcp_dport, ntohs(mask->dst));
544 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
545 tcp_dport, ntohs(key->dst));
549 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
550 udp_sport, ntohs(mask->src));
551 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
552 udp_sport, ntohs(key->src));
554 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
555 udp_dport, ntohs(mask->dst));
556 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
557 udp_dport, ntohs(key->dst));
560 netdev_err(priv->netdev,
561 "Only UDP and TCP transport are supported\n");
565 if (mask->src || mask->dst)
566 *min_inline = MLX5_INLINE_MODE_TCP_UDP;
572 static int parse_cls_flower(struct mlx5e_priv *priv,
573 struct mlx5_flow_spec *spec,
574 struct tc_cls_flower_offload *f)
576 struct mlx5_core_dev *dev = priv->mdev;
577 struct mlx5_eswitch *esw = dev->priv.eswitch;
578 struct mlx5_eswitch_rep *rep = priv->ppriv;
582 err = __parse_cls_flower(priv, spec, f, &min_inline);
584 if (!err && esw->mode == SRIOV_OFFLOADS &&
585 rep->vport != FDB_UPLINK_VPORT) {
586 if (min_inline > esw->offloads.inline_mode) {
587 netdev_warn(priv->netdev,
588 "Flow is not offloaded due to min inline setting, required %d actual %d\n",
589 min_inline, esw->offloads.inline_mode);
597 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
598 u32 *action, u32 *flow_tag)
600 const struct tc_action *a;
603 if (tc_no_actions(exts))
606 *flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
609 tcf_exts_to_list(exts, &actions);
610 list_for_each_entry(a, &actions, list) {
611 /* Only support a single action per rule */
615 if (is_tcf_gact_shot(a)) {
616 *action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
617 if (MLX5_CAP_FLOWTABLE(priv->mdev,
618 flow_table_properties_nic_receive.flow_counter))
619 *action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
623 if (is_tcf_skbedit_mark(a)) {
624 u32 mark = tcf_skbedit_mark(a);
626 if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
627 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
633 *action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
643 static inline int cmp_encap_info(struct mlx5_encap_info *a,
644 struct mlx5_encap_info *b)
646 return memcmp(a, b, sizeof(*a));
649 static inline int hash_encap_info(struct mlx5_encap_info *info)
651 return jhash(info, sizeof(*info), 0);
654 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
655 struct net_device *mirred_dev,
656 struct net_device **out_dev,
658 struct neighbour **out_n,
663 struct neighbour *n = NULL;
666 #if IS_ENABLED(CONFIG_INET)
667 rt = ip_route_output_key(dev_net(mirred_dev), fl4);
674 if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev)) {
675 pr_warn("%s: can't offload, devices not on same HW e-switch\n", __func__);
680 ttl = ip4_dst_hoplimit(&rt->dst);
681 n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
689 *out_dev = rt->dst.dev;
694 static int gen_vxlan_header_ipv4(struct net_device *out_dev,
696 unsigned char h_dest[ETH_ALEN],
703 int encap_size = VXLAN_HLEN + sizeof(struct iphdr) + ETH_HLEN;
704 struct ethhdr *eth = (struct ethhdr *)buf;
705 struct iphdr *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
706 struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
707 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
709 memset(buf, 0, encap_size);
711 ether_addr_copy(eth->h_dest, h_dest);
712 ether_addr_copy(eth->h_source, out_dev->dev_addr);
713 eth->h_proto = htons(ETH_P_IP);
719 ip->protocol = IPPROTO_UDP;
723 udp->dest = udp_dst_port;
724 vxh->vx_flags = VXLAN_HF_VNI;
725 vxh->vx_vni = vxlan_vni_field(vx_vni);
730 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
731 struct net_device *mirred_dev,
732 struct mlx5_encap_entry *e,
733 struct net_device **out_dev)
735 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
736 struct neighbour *n = NULL;
737 struct flowi4 fl4 = {};
744 encap_header = kzalloc(max_encap_size, GFP_KERNEL);
748 switch (e->tunnel_type) {
749 case MLX5_HEADER_TYPE_VXLAN:
750 fl4.flowi4_proto = IPPROTO_UDP;
751 fl4.fl4_dport = e->tun_info.tp_dst;
757 fl4.daddr = e->tun_info.daddr;
759 err = mlx5e_route_lookup_ipv4(priv, mirred_dev, out_dev,
760 &fl4, &n, &saddr, &ttl);
765 e->out_dev = *out_dev;
767 if (!(n->nud_state & NUD_VALID)) {
768 pr_warn("%s: can't offload, neighbour to %pI4 invalid\n", __func__, &fl4.daddr);
773 neigh_ha_snapshot(e->h_dest, n, *out_dev);
775 switch (e->tunnel_type) {
776 case MLX5_HEADER_TYPE_VXLAN:
777 encap_size = gen_vxlan_header_ipv4(*out_dev, encap_header,
780 saddr, e->tun_info.tp_dst,
788 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
789 encap_size, encap_header, &e->encap_id);
797 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
798 struct ip_tunnel_info *tun_info,
799 struct net_device *mirred_dev,
800 struct mlx5_esw_flow_attr *attr)
802 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
803 unsigned short family = ip_tunnel_info_af(tun_info);
804 struct ip_tunnel_key *key = &tun_info->key;
805 struct mlx5_encap_info info;
806 struct mlx5_encap_entry *e;
807 struct net_device *out_dev;
813 /* udp dst port must be set */
814 if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
815 goto vxlan_encap_offload_err;
817 /* setting udp src port isn't supported */
818 if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
819 vxlan_encap_offload_err:
820 netdev_warn(priv->netdev,
821 "must set udp dst port and not set udp src port\n");
825 if (mlx5e_vxlan_lookup_port(priv, be16_to_cpu(key->tp_dst)) &&
826 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
827 info.tp_dst = key->tp_dst;
828 info.tun_id = tunnel_id_to_key32(key->tun_id);
829 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
831 netdev_warn(priv->netdev,
832 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
838 info.daddr = key->u.ipv4.dst;
841 netdev_warn(priv->netdev,
842 "IPv6 tunnel encap offload isn't supported\n");
847 hash_key = hash_encap_info(&info);
849 hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
850 encap_hlist, hash_key) {
851 if (!cmp_encap_info(&e->tun_info, &info)) {
862 e = kzalloc(sizeof(*e), GFP_KERNEL);
867 e->tunnel_type = tunnel_type;
868 INIT_LIST_HEAD(&e->flows);
870 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e, &out_dev);
875 hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
884 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
885 struct mlx5e_tc_flow *flow)
887 struct mlx5_esw_flow_attr *attr = flow->attr;
888 struct ip_tunnel_info *info = NULL;
889 const struct tc_action *a;
894 if (tc_no_actions(exts))
897 memset(attr, 0, sizeof(*attr));
898 attr->in_rep = priv->ppriv;
900 tcf_exts_to_list(exts, &actions);
901 list_for_each_entry(a, &actions, list) {
902 if (is_tcf_gact_shot(a)) {
903 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
904 MLX5_FLOW_CONTEXT_ACTION_COUNT;
908 if (is_tcf_mirred_egress_redirect(a)) {
909 int ifindex = tcf_mirred_ifindex(a);
910 struct net_device *out_dev;
911 struct mlx5e_priv *out_priv;
913 out_dev = __dev_get_by_index(dev_net(priv->netdev), ifindex);
915 if (switchdev_port_same_parent_id(priv->netdev,
917 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
918 MLX5_FLOW_CONTEXT_ACTION_COUNT;
919 out_priv = netdev_priv(out_dev);
920 attr->out_rep = out_priv->ppriv;
922 err = mlx5e_attach_encap(priv, info,
926 list_add(&flow->encap, &attr->encap->flows);
927 attr->action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
928 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
929 MLX5_FLOW_CONTEXT_ACTION_COUNT;
930 out_priv = netdev_priv(attr->encap->out_dev);
931 attr->out_rep = out_priv->ppriv;
933 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
934 priv->netdev->name, out_dev->name);
940 if (is_tcf_tunnel_set(a)) {
941 info = tcf_tunnel_info(a);
949 if (is_tcf_vlan(a)) {
950 if (tcf_vlan_action(a) == VLAN_F_POP) {
951 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
952 } else if (tcf_vlan_action(a) == VLAN_F_PUSH) {
953 if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q))
956 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
957 attr->vlan = tcf_vlan_push_vid(a);
962 if (is_tcf_tunnel_release(a)) {
963 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
972 int mlx5e_configure_flower(struct mlx5e_priv *priv, __be16 protocol,
973 struct tc_cls_flower_offload *f)
975 struct mlx5e_tc_table *tc = &priv->fs.tc;
977 bool fdb_flow = false;
978 u32 flow_tag, action;
979 struct mlx5e_tc_flow *flow;
980 struct mlx5_flow_spec *spec;
981 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
983 if (esw && esw->mode == SRIOV_OFFLOADS)
987 flow = kzalloc(sizeof(*flow) +
988 sizeof(struct mlx5_esw_flow_attr),
991 flow = kzalloc(sizeof(*flow), GFP_KERNEL);
993 spec = mlx5_vzalloc(sizeof(*spec));
994 if (!spec || !flow) {
999 flow->cookie = f->cookie;
1001 err = parse_cls_flower(priv, spec, f);
1006 flow->attr = (struct mlx5_esw_flow_attr *)(flow + 1);
1007 err = parse_tc_fdb_actions(priv, f->exts, flow);
1010 flow->rule = mlx5e_tc_add_fdb_flow(priv, spec, flow->attr);
1012 err = parse_tc_nic_actions(priv, f->exts, &action, &flow_tag);
1015 flow->rule = mlx5e_tc_add_nic_flow(priv, spec, action, flow_tag);
1018 if (IS_ERR(flow->rule)) {
1019 err = PTR_ERR(flow->rule);
1023 err = rhashtable_insert_fast(&tc->ht, &flow->node,
1031 mlx5_del_flow_rules(flow->rule);
1040 int mlx5e_delete_flower(struct mlx5e_priv *priv,
1041 struct tc_cls_flower_offload *f)
1043 struct mlx5e_tc_flow *flow;
1044 struct mlx5e_tc_table *tc = &priv->fs.tc;
1046 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
1051 rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
1053 mlx5e_tc_del_flow(priv, flow);
1061 int mlx5e_stats_flower(struct mlx5e_priv *priv,
1062 struct tc_cls_flower_offload *f)
1064 struct mlx5e_tc_table *tc = &priv->fs.tc;
1065 struct mlx5e_tc_flow *flow;
1066 struct tc_action *a;
1067 struct mlx5_fc *counter;
1073 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
1078 counter = mlx5_flow_rule_counter(flow->rule);
1082 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1084 tcf_exts_to_list(f->exts, &actions);
1085 list_for_each_entry(a, &actions, list)
1086 tcf_action_stats_update(a, bytes, packets, lastuse);
1091 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
1092 .head_offset = offsetof(struct mlx5e_tc_flow, node),
1093 .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
1094 .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
1095 .automatic_shrinking = true,
1098 int mlx5e_tc_init(struct mlx5e_priv *priv)
1100 struct mlx5e_tc_table *tc = &priv->fs.tc;
1102 tc->ht_params = mlx5e_tc_flow_ht_params;
1103 return rhashtable_init(&tc->ht, &tc->ht_params);
1106 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
1108 struct mlx5e_tc_flow *flow = ptr;
1109 struct mlx5e_priv *priv = arg;
1111 mlx5e_tc_del_flow(priv, flow);
1115 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
1117 struct mlx5e_tc_table *tc = &priv->fs.tc;
1119 rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
1121 if (!IS_ERR_OR_NULL(tc->t)) {
1122 mlx5_destroy_flow_table(tc->t);