drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "lib/vxlan.h"
  54 #include "fs_core.h"
  55 #include "en/port.h"
  56
  57 struct mlx5_nic_flow_attr {
  58         u32 action;
  59         u32 flow_tag;
  60         u32 mod_hdr_id;
  61         u32 hairpin_tirn;
  62         u8 match_level;
  63         struct mlx5_flow_table  *hairpin_ft;
  64         struct mlx5_fc          *counter;
  65 };
  66
  67 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
  68
  69 enum {
  70         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
  71         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
  72         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
  73         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
  74         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
  75         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
  76         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
  77         MLX5E_TC_FLOW_SLOW        = BIT(MLX5E_TC_FLOW_BASE + 5),
  78 };
  79
  80 #define MLX5E_TC_MAX_SPLITS 1
  81
  82 struct mlx5e_tc_flow {
  83         struct rhash_head       node;
  84         struct mlx5e_priv       *priv;
  85         u64                     cookie;
  86         u16                     flags;
  87         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
  88         struct list_head        encap;   /* flows sharing the same encap ID */
  89         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  90         struct list_head        hairpin; /* flows sharing the same hairpin */
  91         union {
  92                 struct mlx5_esw_flow_attr esw_attr[0];
  93                 struct mlx5_nic_flow_attr nic_attr[0];
  94         };
  95 };
  96
  97 struct mlx5e_tc_flow_parse_attr {
  98         struct ip_tunnel_info tun_info;
  99         struct mlx5_flow_spec spec;
 100         int num_mod_hdr_actions;
 101         void *mod_hdr_actions;
 102         int mirred_ifindex;
 103 };
 104
 105 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 106 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 107
 108 struct mlx5e_hairpin {
 109         struct mlx5_hairpin *pair;
 110
 111         struct mlx5_core_dev *func_mdev;
 112         struct mlx5e_priv *func_priv;
 113         u32 tdn;
 114         u32 tirn;
 115
 116         int num_channels;
 117         struct mlx5e_rqt indir_rqt;
 118         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 119         struct mlx5e_ttc_table ttc;
 120 };
 121
 122 struct mlx5e_hairpin_entry {
 123         /* a node of a hash table which keeps all the  hairpin entries */
 124         struct hlist_node hairpin_hlist;
 125
 126         /* flows sharing the same hairpin */
 127         struct list_head flows;
 128
 129         u16 peer_vhca_id;
 130         u8 prio;
 131         struct mlx5e_hairpin *hp;
 132 };
 133
 134 struct mod_hdr_key {
 135         int num_actions;
 136         void *actions;
 137 };
 138
 139 struct mlx5e_mod_hdr_entry {
 140         /* a node of a hash table which keeps all the mod_hdr entries */
 141         struct hlist_node mod_hdr_hlist;
 142
 143         /* flows sharing the same mod_hdr entry */
 144         struct list_head flows;
 145
 146         struct mod_hdr_key key;
 147
 148         u32 mod_hdr_id;
 149 };
 150
 151 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 152
 153 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 154 {
 155         return jhash(key->actions,
 156                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 157 }
 158
 159 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 160                                    struct mod_hdr_key *b)
 161 {
 162         if (a->num_actions != b->num_actions)
 163                 return 1;
 164
 165         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 166 }
 167
 168 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 169                                 struct mlx5e_tc_flow *flow,
 170                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 171 {
 172         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 173         int num_actions, actions_size, namespace, err;
 174         struct mlx5e_mod_hdr_entry *mh;
 175         struct mod_hdr_key key;
 176         bool found = false;
 177         u32 hash_key;
 178
 179         num_actions  = parse_attr->num_mod_hdr_actions;
 180         actions_size = MLX5_MH_ACT_SZ * num_actions;
 181
 182         key.actions = parse_attr->mod_hdr_actions;
 183         key.num_actions = num_actions;
 184
 185         hash_key = hash_mod_hdr_info(&key);
 186
 187         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 188                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 189                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 190                                        mod_hdr_hlist, hash_key) {
 191                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 192                                 found = true;
 193                                 break;
 194                         }
 195                 }
 196         } else {
 197                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 198                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 199                                        mod_hdr_hlist, hash_key) {
 200                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 201                                 found = true;
 202                                 break;
 203                         }
 204                 }
 205         }
 206
 207         if (found)
 208                 goto attach_flow;
 209
 210         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 211         if (!mh)
 212                 return -ENOMEM;
 213
 214         mh->key.actions = (void *)mh + sizeof(*mh);
 215         memcpy(mh->key.actions, key.actions, actions_size);
 216         mh->key.num_actions = num_actions;
 217         INIT_LIST_HEAD(&mh->flows);
 218
 219         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 220                                        mh->key.num_actions,
 221                                        mh->key.actions,
 222                                        &mh->mod_hdr_id);
 223         if (err)
 224                 goto out_err;
 225
 226         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 227                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 228         else
 229                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 230
 231 attach_flow:
 232         list_add(&flow->mod_hdr, &mh->flows);
 233         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 234                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 235         else
 236                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 237
 238         return 0;
 239
 240 out_err:
 241         kfree(mh);
 242         return err;
 243 }
 244
 245 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 246                                  struct mlx5e_tc_flow *flow)
 247 {
 248         struct list_head *next = flow->mod_hdr.next;
 249
 250         list_del(&flow->mod_hdr);
 251
 252         if (list_empty(next)) {
 253                 struct mlx5e_mod_hdr_entry *mh;
 254
 255                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 256
 257                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 258                 hash_del(&mh->mod_hdr_hlist);
 259                 kfree(mh);
 260         }
 261 }
 262
 263 static
 264 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 265 {
 266         struct net_device *netdev;
 267         struct mlx5e_priv *priv;
 268
 269         netdev = __dev_get_by_index(net, ifindex);
 270         priv = netdev_priv(netdev);
 271         return priv->mdev;
 272 }
 273
 274 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 275 {
 276         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 277         void *tirc;
 278         int err;
 279
 280         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 281         if (err)
 282                 goto alloc_tdn_err;
 283
 284         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 285
 286         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 287         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 288         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 289
 290         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 291         if (err)
 292                 goto create_tir_err;
 293
 294         return 0;
 295
 296 create_tir_err:
 297         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 298 alloc_tdn_err:
 299         return err;
 300 }
 301
 302 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 303 {
 304         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 305         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 306 }
 307
 308 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 309 {
 310         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 311         struct mlx5e_priv *priv = hp->func_priv;
 312         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 313
 314         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 315                                       hp->num_channels);
 316
 317         for (i = 0; i < sz; i++) {
 318                 ix = i;
 319                 if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR)
 320                         ix = mlx5e_bits_invert(i, ilog2(sz));
 321                 ix = indirection_rqt[ix];
 322                 rqn = hp->pair->rqn[ix];
 323                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 324         }
 325 }
 326
 327 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 328 {
 329         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 330         struct mlx5e_priv *priv = hp->func_priv;
 331         struct mlx5_core_dev *mdev = priv->mdev;
 332         void *rqtc;
 333         u32 *in;
 334
 335         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 336         in = kvzalloc(inlen, GFP_KERNEL);
 337         if (!in)
 338                 return -ENOMEM;
 339
 340         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 341
 342         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 343         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 344
 345         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 346
 347         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 348         if (!err)
 349                 hp->indir_rqt.enabled = true;
 350
 351         kvfree(in);
 352         return err;
 353 }
 354
 355 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 356 {
 357         struct mlx5e_priv *priv = hp->func_priv;
 358         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 359         int tt, i, err;
 360         void *tirc;
 361
 362         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 363                 struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt);
 364
 365                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 366                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 367
 368                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 369                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 370                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 371                 mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
 372
 373                 err = mlx5_core_create_tir(hp->func_mdev, in,
 374                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 375                 if (err) {
 376                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 377                         goto err_destroy_tirs;
 378                 }
 379         }
 380         return 0;
 381
 382 err_destroy_tirs:
 383         for (i = 0; i < tt; i++)
 384                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 385         return err;
 386 }
 387
 388 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 389 {
 390         int tt;
 391
 392         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 393                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 394 }
 395
 396 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 397                                          struct ttc_params *ttc_params)
 398 {
 399         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 400         int tt;
 401
 402         memset(ttc_params, 0, sizeof(*ttc_params));
 403
 404         ttc_params->any_tt_tirn = hp->tirn;
 405
 406         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 407                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 408
 409         ft_attr->max_fte = MLX5E_NUM_TT;
 410         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 411         ft_attr->prio = MLX5E_TC_PRIO;
 412 }
 413
 414 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 415 {
 416         struct mlx5e_priv *priv = hp->func_priv;
 417         struct ttc_params ttc_params;
 418         int err;
 419
 420         err = mlx5e_hairpin_create_indirect_rqt(hp);
 421         if (err)
 422                 return err;
 423
 424         err = mlx5e_hairpin_create_indirect_tirs(hp);
 425         if (err)
 426                 goto err_create_indirect_tirs;
 427
 428         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 429         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 430         if (err)
 431                 goto err_create_ttc_table;
 432
 433         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 434                    hp->num_channels, hp->ttc.ft.t->id);
 435
 436         return 0;
 437
 438 err_create_ttc_table:
 439         mlx5e_hairpin_destroy_indirect_tirs(hp);
 440 err_create_indirect_tirs:
 441         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 442
 443         return err;
 444 }
 445
 446 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 447 {
 448         struct mlx5e_priv *priv = hp->func_priv;
 449
 450         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 451         mlx5e_hairpin_destroy_indirect_tirs(hp);
 452         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 453 }
 454
 455 static struct mlx5e_hairpin *
 456 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 457                      int peer_ifindex)
 458 {
 459         struct mlx5_core_dev *func_mdev, *peer_mdev;
 460         struct mlx5e_hairpin *hp;
 461         struct mlx5_hairpin *pair;
 462         int err;
 463
 464         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 465         if (!hp)
 466                 return ERR_PTR(-ENOMEM);
 467
 468         func_mdev = priv->mdev;
 469         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 470
 471         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 472         if (IS_ERR(pair)) {
 473                 err = PTR_ERR(pair);
 474                 goto create_pair_err;
 475         }
 476         hp->pair = pair;
 477         hp->func_mdev = func_mdev;
 478         hp->func_priv = priv;
 479         hp->num_channels = params->num_channels;
 480
 481         err = mlx5e_hairpin_create_transport(hp);
 482         if (err)
 483                 goto create_transport_err;
 484
 485         if (hp->num_channels > 1) {
 486                 err = mlx5e_hairpin_rss_init(hp);
 487                 if (err)
 488                         goto rss_init_err;
 489         }
 490
 491         return hp;
 492
 493 rss_init_err:
 494         mlx5e_hairpin_destroy_transport(hp);
 495 create_transport_err:
 496         mlx5_core_hairpin_destroy(hp->pair);
 497 create_pair_err:
 498         kfree(hp);
 499         return ERR_PTR(err);
 500 }
 501
 502 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 503 {
 504         if (hp->num_channels > 1)
 505                 mlx5e_hairpin_rss_cleanup(hp);
 506         mlx5e_hairpin_destroy_transport(hp);
 507         mlx5_core_hairpin_destroy(hp->pair);
 508         kvfree(hp);
 509 }
 510
 511 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 512 {
 513         return (peer_vhca_id << 16 | prio);
 514 }
 515
 516 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 517                                                      u16 peer_vhca_id, u8 prio)
 518 {
 519         struct mlx5e_hairpin_entry *hpe;
 520         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 521
 522         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 523                                hairpin_hlist, hash_key) {
 524                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 525                         return hpe;
 526         }
 527
 528         return NULL;
 529 }
 530
 531 #define UNKNOWN_MATCH_PRIO 8
 532
 533 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 534                                   struct mlx5_flow_spec *spec, u8 *match_prio,
 535                                   struct netlink_ext_ack *extack)
 536 {
 537         void *headers_c, *headers_v;
 538         u8 prio_val, prio_mask = 0;
 539         bool vlan_present;
 540
 541 #ifdef CONFIG_MLX5_CORE_EN_DCB
 542         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 543                 NL_SET_ERR_MSG_MOD(extack,
 544                                    "only PCP trust state supported for hairpin");
 545                 return -EOPNOTSUPP;
 546         }
 547 #endif
 548         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 549         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 550
 551         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 552         if (vlan_present) {
 553                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 554                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 555         }
 556
 557         if (!vlan_present || !prio_mask) {
 558                 prio_val = UNKNOWN_MATCH_PRIO;
 559         } else if (prio_mask != 0x7) {
 560                 NL_SET_ERR_MSG_MOD(extack,
 561                                    "masked priority match not supported for hairpin");
 562                 return -EOPNOTSUPP;
 563         }
 564
 565         *match_prio = prio_val;
 566         return 0;
 567 }
 568
 569 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 570                                   struct mlx5e_tc_flow *flow,
 571                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
 572                                   struct netlink_ext_ack *extack)
 573 {
 574         int peer_ifindex = parse_attr->mirred_ifindex;
 575         struct mlx5_hairpin_params params;
 576         struct mlx5_core_dev *peer_mdev;
 577         struct mlx5e_hairpin_entry *hpe;
 578         struct mlx5e_hairpin *hp;
 579         u64 link_speed64;
 580         u32 link_speed;
 581         u8 match_prio;
 582         u16 peer_id;
 583         int err;
 584
 585         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 586         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 587                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
 588                 return -EOPNOTSUPP;
 589         }
 590
 591         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 592         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
 593                                      extack);
 594         if (err)
 595                 return err;
 596         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 597         if (hpe)
 598                 goto attach_flow;
 599
 600         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 601         if (!hpe)
 602                 return -ENOMEM;
 603
 604         INIT_LIST_HEAD(&hpe->flows);
 605         hpe->peer_vhca_id = peer_id;
 606         hpe->prio = match_prio;
 607
 608         params.log_data_size = 15;
 609         params.log_data_size = min_t(u8, params.log_data_size,
 610                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 611         params.log_data_size = max_t(u8, params.log_data_size,
 612                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 613
 614         params.log_num_packets = params.log_data_size -
 615                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 616         params.log_num_packets = min_t(u8, params.log_num_packets,
 617                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 618
 619         params.q_counter = priv->q_counter;
 620         /* set hairpin pair per each 50Gbs share of the link */
 621         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 622         link_speed = max_t(u32, link_speed, 50000);
 623         link_speed64 = link_speed;
 624         do_div(link_speed64, 50000);
 625         params.num_channels = link_speed64;
 626
 627         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 628         if (IS_ERR(hp)) {
 629                 err = PTR_ERR(hp);
 630                 goto create_hairpin_err;
 631         }
 632
 633         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 634                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 635                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 636
 637         hpe->hp = hp;
 638         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 639                  hash_hairpin_info(peer_id, match_prio));
 640
 641 attach_flow:
 642         if (hpe->hp->num_channels > 1) {
 643                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 644                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 645         } else {
 646                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 647         }
 648         list_add(&flow->hairpin, &hpe->flows);
 649
 650         return 0;
 651
 652 create_hairpin_err:
 653         kfree(hpe);
 654         return err;
 655 }
 656
 657 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 658                                    struct mlx5e_tc_flow *flow)
 659 {
 660         struct list_head *next = flow->hairpin.next;
 661
 662         list_del(&flow->hairpin);
 663
 664         /* no more hairpin flows for us, release the hairpin pair */
 665         if (list_empty(next)) {
 666                 struct mlx5e_hairpin_entry *hpe;
 667
 668                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 669
 670                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 671                            hpe->hp->pair->peer_mdev->priv.name);
 672
 673                 mlx5e_hairpin_destroy(hpe->hp);
 674                 hash_del(&hpe->hairpin_hlist);
 675                 kfree(hpe);
 676         }
 677 }
 678
 679 static int
 680 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 681                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 682                       struct mlx5e_tc_flow *flow,
 683                       struct netlink_ext_ack *extack)
 684 {
 685         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 686         struct mlx5_core_dev *dev = priv->mdev;
 687         struct mlx5_flow_destination dest[2] = {};
 688         struct mlx5_flow_act flow_act = {
 689                 .action = attr->action,
 690                 .flow_tag = attr->flow_tag,
 691                 .reformat_id = 0,
 692                 .flags    = FLOW_ACT_HAS_TAG | FLOW_ACT_NO_APPEND,
 693         };
 694         struct mlx5_fc *counter = NULL;
 695         bool table_created = false;
 696         int err, dest_ix = 0;
 697
 698         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 699                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
 700                 if (err) {
 701                         goto err_add_hairpin_flow;
 702                 }
 703                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 704                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 705                         dest[dest_ix].ft = attr->hairpin_ft;
 706                 } else {
 707                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 708                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 709                 }
 710                 dest_ix++;
 711         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 712                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 713                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 714                 dest_ix++;
 715         }
 716
 717         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 718                 counter = mlx5_fc_create(dev, true);
 719                 if (IS_ERR(counter)) {
 720                         err = PTR_ERR(counter);
 721                         goto err_fc_create;
 722                 }
 723                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 724                 dest[dest_ix].counter_id = mlx5_fc_id(counter);
 725                 dest_ix++;
 726                 attr->counter = counter;
 727         }
 728
 729         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 730                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 731                 flow_act.modify_id = attr->mod_hdr_id;
 732                 kfree(parse_attr->mod_hdr_actions);
 733                 if (err)
 734                         goto err_create_mod_hdr_id;
 735         }
 736
 737         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 738                 int tc_grp_size, tc_tbl_size;
 739                 u32 max_flow_counter;
 740
 741                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 742                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 743
 744                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 745
 746                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 747                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 748
 749                 priv->fs.tc.t =
 750                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 751                                                             MLX5E_TC_PRIO,
 752                                                             tc_tbl_size,
 753                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 754                                                             MLX5E_TC_FT_LEVEL, 0);
 755                 if (IS_ERR(priv->fs.tc.t)) {
 756                         NL_SET_ERR_MSG_MOD(extack,
 757                                            "Failed to create tc offload table\n");
 758                         netdev_err(priv->netdev,
 759                                    "Failed to create tc offload table\n");
 760                         err = PTR_ERR(priv->fs.tc.t);
 761                         goto err_create_ft;
 762                 }
 763
 764                 table_created = true;
 765         }
 766
 767         if (attr->match_level != MLX5_MATCH_NONE)
 768                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 769
 770         flow->rule[0] = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 771                                             &flow_act, dest, dest_ix);
 772
 773         if (IS_ERR(flow->rule[0])) {
 774                 err = PTR_ERR(flow->rule[0]);
 775                 goto err_add_rule;
 776         }
 777
 778         return 0;
 779
 780 err_add_rule:
 781         if (table_created) {
 782                 mlx5_destroy_flow_table(priv->fs.tc.t);
 783                 priv->fs.tc.t = NULL;
 784         }
 785 err_create_ft:
 786         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 787                 mlx5e_detach_mod_hdr(priv, flow);
 788 err_create_mod_hdr_id:
 789         mlx5_fc_destroy(dev, counter);
 790 err_fc_create:
 791         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 792                 mlx5e_hairpin_flow_del(priv, flow);
 793 err_add_hairpin_flow:
 794         return err;
 795 }
 796
 797 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 798                                   struct mlx5e_tc_flow *flow)
 799 {
 800         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 801         struct mlx5_fc *counter = NULL;
 802
 803         counter = attr->counter;
 804         mlx5_del_flow_rules(flow->rule[0]);
 805         mlx5_fc_destroy(priv->mdev, counter);
 806
 807         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
 808                 mlx5_destroy_flow_table(priv->fs.tc.t);
 809                 priv->fs.tc.t = NULL;
 810         }
 811
 812         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 813                 mlx5e_detach_mod_hdr(priv, flow);
 814
 815         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 816                 mlx5e_hairpin_flow_del(priv, flow);
 817 }
 818
 819 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 820                                struct mlx5e_tc_flow *flow);
 821
 822 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 823                               struct ip_tunnel_info *tun_info,
 824                               struct net_device *mirred_dev,
 825                               struct net_device **encap_dev,
 826                               struct mlx5e_tc_flow *flow,
 827                               struct netlink_ext_ack *extack);
 828
 829 static struct mlx5_flow_handle *
 830 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
 831                            struct mlx5e_tc_flow *flow,
 832                            struct mlx5_flow_spec *spec,
 833                            struct mlx5_esw_flow_attr *attr)
 834 {
 835         struct mlx5_flow_handle *rule;
 836
 837         rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 838         if (IS_ERR(rule))
 839                 return rule;
 840
 841         if (attr->mirror_count) {
 842                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
 843                 if (IS_ERR(flow->rule[1])) {
 844                         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 845                         return flow->rule[1];
 846                 }
 847         }
 848
 849         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 850         return rule;
 851 }
 852
 853 static void
 854 mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
 855                              struct mlx5e_tc_flow *flow,
 856                            struct mlx5_esw_flow_attr *attr)
 857 {
 858         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 859
 860         if (attr->mirror_count)
 861                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
 862
 863         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
 864 }
 865
 866 static struct mlx5_flow_handle *
 867 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
 868                               struct mlx5e_tc_flow *flow,
 869                               struct mlx5_flow_spec *spec,
 870                               struct mlx5_esw_flow_attr *slow_attr)
 871 {
 872         struct mlx5_flow_handle *rule;
 873
 874         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 875         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
 876         slow_attr->mirror_count = 0,
 877         slow_attr->dest_chain = FDB_SLOW_PATH_CHAIN,
 878
 879         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
 880         if (!IS_ERR(rule))
 881                 flow->flags |= MLX5E_TC_FLOW_SLOW;
 882
 883         return rule;
 884 }
 885
 886 static void
 887 mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
 888                                   struct mlx5e_tc_flow *flow,
 889                                   struct mlx5_esw_flow_attr *slow_attr)
 890 {
 891         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 892         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
 893         flow->flags &= ~MLX5E_TC_FLOW_SLOW;
 894 }
 895
 896 static int
 897 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 898                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 899                       struct mlx5e_tc_flow *flow,
 900                       struct netlink_ext_ack *extack)
 901 {
 902         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 903         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
 904         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 905         u16 max_prio = mlx5_eswitch_get_prio_range(esw);
 906         struct net_device *out_dev, *encap_dev = NULL;
 907         struct mlx5_fc *counter = NULL;
 908         struct mlx5e_rep_priv *rpriv;
 909         struct mlx5e_priv *out_priv;
 910         int err = 0, encap_err = 0;
 911
 912         /* if prios are not supported, keep the old behaviour of using same prio
 913          * for all offloaded rules.
 914          */
 915         if (!mlx5_eswitch_prios_supported(esw))
 916                 attr->prio = 1;
 917
 918         if (attr->chain > max_chain) {
 919                 NL_SET_ERR_MSG(extack, "Requested chain is out of supported range");
 920                 err = -EOPNOTSUPP;
 921                 goto err_max_prio_chain;
 922         }
 923
 924         if (attr->prio > max_prio) {
 925                 NL_SET_ERR_MSG(extack, "Requested priority is out of supported range");
 926                 err = -EOPNOTSUPP;
 927                 goto err_max_prio_chain;
 928         }
 929
 930         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
 931                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 932                                              attr->parse_attr->mirred_ifindex);
 933                 encap_err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 934                                                out_dev, &encap_dev, flow,
 935                                                extack);
 936                 if (encap_err && encap_err != -EAGAIN) {
 937                         err = encap_err;
 938                         goto err_attach_encap;
 939                 }
 940                 out_priv = netdev_priv(encap_dev);
 941                 rpriv = out_priv->ppriv;
 942                 attr->out_rep[attr->out_count] = rpriv->rep;
 943                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
 944         }
 945
 946         err = mlx5_eswitch_add_vlan_action(esw, attr);
 947         if (err)
 948                 goto err_add_vlan;
 949
 950         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 951                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 952                 kfree(parse_attr->mod_hdr_actions);
 953                 if (err)
 954                         goto err_mod_hdr;
 955         }
 956
 957         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 958                 counter = mlx5_fc_create(esw->dev, true);
 959                 if (IS_ERR(counter)) {
 960                         err = PTR_ERR(counter);
 961                         goto err_create_counter;
 962                 }
 963
 964                 attr->counter = counter;
 965         }
 966
 967         /* we get here if (1) there's no error or when
 968          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 969          */
 970         if (encap_err == -EAGAIN) {
 971                 /* continue with goto slow path rule instead */
 972                 struct mlx5_esw_flow_attr slow_attr;
 973
 974                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec, &slow_attr);
 975         } else {
 976                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
 977         }
 978
 979         if (IS_ERR(flow->rule[0])) {
 980                 err = PTR_ERR(flow->rule[0]);
 981                 goto err_add_rule;
 982         }
 983
 984         return 0;
 985
 986 err_add_rule:
 987         mlx5_fc_destroy(esw->dev, counter);
 988 err_create_counter:
 989         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 990                 mlx5e_detach_mod_hdr(priv, flow);
 991 err_mod_hdr:
 992         mlx5_eswitch_del_vlan_action(esw, attr);
 993 err_add_vlan:
 994         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
 995                 mlx5e_detach_encap(priv, flow);
 996 err_attach_encap:
 997 err_max_prio_chain:
 998         return err;
 999 }
1000
1001 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1002                                   struct mlx5e_tc_flow *flow)
1003 {
1004         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1005         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1006         struct mlx5_esw_flow_attr slow_attr;
1007
1008         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1009                 if (flow->flags & MLX5E_TC_FLOW_SLOW)
1010                         mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1011                 else
1012                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1013         }
1014
1015         mlx5_eswitch_del_vlan_action(esw, attr);
1016
1017         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
1018                 mlx5e_detach_encap(priv, flow);
1019                 kvfree(attr->parse_attr);
1020         }
1021
1022         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1023                 mlx5e_detach_mod_hdr(priv, flow);
1024
1025         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1026                 mlx5_fc_destroy(esw->dev, attr->counter);
1027 }
1028
1029 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
1030                               struct mlx5e_encap_entry *e)
1031 {
1032         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1033         struct mlx5_esw_flow_attr slow_attr, *esw_attr;
1034         struct mlx5_flow_handle *rule;
1035         struct mlx5_flow_spec *spec;
1036         struct mlx5e_tc_flow *flow;
1037         int err;
1038
1039         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
1040                                          e->encap_size, e->encap_header,
1041                                          MLX5_FLOW_NAMESPACE_FDB,
1042                                          &e->encap_id);
1043         if (err) {
1044                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
1045                                err);
1046                 return;
1047         }
1048         e->flags |= MLX5_ENCAP_ENTRY_VALID;
1049         mlx5e_rep_queue_neigh_stats_work(priv);
1050
1051         list_for_each_entry(flow, &e->flows, encap) {
1052                 esw_attr = flow->esw_attr;
1053                 esw_attr->encap_id = e->encap_id;
1054                 spec = &esw_attr->parse_attr->spec;
1055
1056                 /* update from slow path rule to encap rule */
1057                 rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, esw_attr);
1058                 if (IS_ERR(rule)) {
1059                         err = PTR_ERR(rule);
1060                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
1061                                        err);
1062                         continue;
1063                 }
1064
1065                 mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1066                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when slow path rule removed */
1067                 flow->rule[0] = rule;
1068         }
1069 }
1070
1071 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
1072                               struct mlx5e_encap_entry *e)
1073 {
1074         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1075         struct mlx5_esw_flow_attr slow_attr;
1076         struct mlx5_flow_handle *rule;
1077         struct mlx5_flow_spec *spec;
1078         struct mlx5e_tc_flow *flow;
1079         int err;
1080
1081         list_for_each_entry(flow, &e->flows, encap) {
1082                 spec = &flow->esw_attr->parse_attr->spec;
1083
1084                 /* update from encap rule to slow path rule */
1085                 rule = mlx5e_tc_offload_to_slow_path(esw, flow, spec, &slow_attr);
1086
1087                 if (IS_ERR(rule)) {
1088                         err = PTR_ERR(rule);
1089                         mlx5_core_warn(priv->mdev, "Failed to update slow path (encap) flow, %d\n",
1090                                        err);
1091                         continue;
1092                 }
1093
1094                 mlx5e_tc_unoffload_fdb_rules(esw, flow, flow->esw_attr);
1095                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when fast path rule removed */
1096                 flow->rule[0] = rule;
1097         }
1098
1099         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
1100                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
1101                 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1102         }
1103 }
1104
1105 static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1106 {
1107         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1108                 return flow->esw_attr->counter;
1109         else
1110                 return flow->nic_attr->counter;
1111 }
1112
1113 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1114 {
1115         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1116         u64 bytes, packets, lastuse = 0;
1117         struct mlx5e_tc_flow *flow;
1118         struct mlx5e_encap_entry *e;
1119         struct mlx5_fc *counter;
1120         struct neigh_table *tbl;
1121         bool neigh_used = false;
1122         struct neighbour *n;
1123
1124         if (m_neigh->family == AF_INET)
1125                 tbl = &arp_tbl;
1126 #if IS_ENABLED(CONFIG_IPV6)
1127         else if (m_neigh->family == AF_INET6)
1128                 tbl = &nd_tbl;
1129 #endif
1130         else
1131                 return;
1132
1133         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1134                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1135                         continue;
1136                 list_for_each_entry(flow, &e->flows, encap) {
1137                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1138                                 counter = mlx5e_tc_get_counter(flow);
1139                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1140                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1141                                         neigh_used = true;
1142                                         break;
1143                                 }
1144                         }
1145                 }
1146                 if (neigh_used)
1147                         break;
1148         }
1149
1150         if (neigh_used) {
1151                 nhe->reported_lastuse = jiffies;
1152
1153                 /* find the relevant neigh according to the cached device and
1154                  * dst ip pair
1155                  */
1156                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1157                 if (!n)
1158                         return;
1159
1160                 neigh_event_send(n, NULL);
1161                 neigh_release(n);
1162         }
1163 }
1164
1165 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1166                                struct mlx5e_tc_flow *flow)
1167 {
1168         struct list_head *next = flow->encap.next;
1169
1170         list_del(&flow->encap);
1171         if (list_empty(next)) {
1172                 struct mlx5e_encap_entry *e;
1173
1174                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1175                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1176
1177                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1178                         mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1179
1180                 hash_del_rcu(&e->encap_hlist);
1181                 kfree(e->encap_header);
1182                 kfree(e);
1183         }
1184 }
1185
1186 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1187                               struct mlx5e_tc_flow *flow)
1188 {
1189         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1190                 mlx5e_tc_del_fdb_flow(priv, flow);
1191         else
1192                 mlx5e_tc_del_nic_flow(priv, flow);
1193 }
1194
1195 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1196                              struct tc_cls_flower_offload *f)
1197 {
1198         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1199                                        outer_headers);
1200         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1201                                        outer_headers);
1202         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1203                                     misc_parameters);
1204         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1205                                     misc_parameters);
1206
1207         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1208         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1209
1210         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1211                 struct flow_dissector_key_keyid *key =
1212                         skb_flow_dissector_target(f->dissector,
1213                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1214                                                   f->key);
1215                 struct flow_dissector_key_keyid *mask =
1216                         skb_flow_dissector_target(f->dissector,
1217                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1218                                                   f->mask);
1219                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1220                          be32_to_cpu(mask->keyid));
1221                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1222                          be32_to_cpu(key->keyid));
1223         }
1224 }
1225
1226 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1227                              struct mlx5_flow_spec *spec,
1228                              struct tc_cls_flower_offload *f)
1229 {
1230         struct netlink_ext_ack *extack = f->common.extack;
1231         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1232                                        outer_headers);
1233         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1234                                        outer_headers);
1235
1236         struct flow_dissector_key_control *enc_control =
1237                 skb_flow_dissector_target(f->dissector,
1238                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1239                                           f->key);
1240
1241         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1242                 struct flow_dissector_key_ports *key =
1243                         skb_flow_dissector_target(f->dissector,
1244                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1245                                                   f->key);
1246                 struct flow_dissector_key_ports *mask =
1247                         skb_flow_dissector_target(f->dissector,
1248                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1249                                                   f->mask);
1250
1251                 /* Full udp dst port must be given */
1252                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1253                         goto vxlan_match_offload_err;
1254
1255                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1256                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1257                         parse_vxlan_attr(spec, f);
1258                 else {
1259                         NL_SET_ERR_MSG_MOD(extack,
1260                                            "port isn't an offloaded vxlan udp dport");
1261                         netdev_warn(priv->netdev,
1262                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1263                         return -EOPNOTSUPP;
1264                 }
1265
1266                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1267                          udp_dport, ntohs(mask->dst));
1268                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1269                          udp_dport, ntohs(key->dst));
1270
1271                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1272                          udp_sport, ntohs(mask->src));
1273                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1274                          udp_sport, ntohs(key->src));
1275         } else { /* udp dst port must be given */
1276 vxlan_match_offload_err:
1277                 NL_SET_ERR_MSG_MOD(extack,
1278                                    "IP tunnel decap offload supported only for vxlan, must set UDP dport");
1279                 netdev_warn(priv->netdev,
1280                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1281                 return -EOPNOTSUPP;
1282         }
1283
1284         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1285                 struct flow_dissector_key_ipv4_addrs *key =
1286                         skb_flow_dissector_target(f->dissector,
1287                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1288                                                   f->key);
1289                 struct flow_dissector_key_ipv4_addrs *mask =
1290                         skb_flow_dissector_target(f->dissector,
1291                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1292                                                   f->mask);
1293                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1294                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1295                          ntohl(mask->src));
1296                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1297                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1298                          ntohl(key->src));
1299
1300                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1301                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1302                          ntohl(mask->dst));
1303                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1304                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1305                          ntohl(key->dst));
1306
1307                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1308                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1309         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1310                 struct flow_dissector_key_ipv6_addrs *key =
1311                         skb_flow_dissector_target(f->dissector,
1312                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1313                                                   f->key);
1314                 struct flow_dissector_key_ipv6_addrs *mask =
1315                         skb_flow_dissector_target(f->dissector,
1316                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1317                                                   f->mask);
1318
1319                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1320                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1321                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1322                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1323                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1324                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1325
1326                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1327                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1328                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1329                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1330                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1331                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1332
1333                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1334                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1335         }
1336
1337         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1338                 struct flow_dissector_key_ip *key =
1339                         skb_flow_dissector_target(f->dissector,
1340                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1341                                                   f->key);
1342                 struct flow_dissector_key_ip *mask =
1343                         skb_flow_dissector_target(f->dissector,
1344                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1345                                                   f->mask);
1346
1347                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1348                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1349
1350                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1351                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1352
1353                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1354                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1355
1356                 if (mask->ttl &&
1357                     !MLX5_CAP_ESW_FLOWTABLE_FDB
1358                         (priv->mdev,
1359                          ft_field_support.outer_ipv4_ttl)) {
1360                         NL_SET_ERR_MSG_MOD(extack,
1361                                            "Matching on TTL is not supported");
1362                         return -EOPNOTSUPP;
1363                 }
1364
1365         }
1366
1367         /* Enforce DMAC when offloading incoming tunneled flows.
1368          * Flow counters require a match on the DMAC.
1369          */
1370         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1371         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1372         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1373                                      dmac_47_16), priv->netdev->dev_addr);
1374
1375         /* let software handle IP fragments */
1376         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1377         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1378
1379         return 0;
1380 }
1381
1382 static int __parse_cls_flower(struct mlx5e_priv *priv,
1383                               struct mlx5_flow_spec *spec,
1384                               struct tc_cls_flower_offload *f,
1385                               u8 *match_level)
1386 {
1387         struct netlink_ext_ack *extack = f->common.extack;
1388         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1389                                        outer_headers);
1390         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1391                                        outer_headers);
1392         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1393                                     misc_parameters);
1394         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1395                                     misc_parameters);
1396         u16 addr_type = 0;
1397         u8 ip_proto = 0;
1398
1399         *match_level = MLX5_MATCH_NONE;
1400
1401         if (f->dissector->used_keys &
1402             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1403               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1404               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1405               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1406               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1407               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1408               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1409               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1410               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1411               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1412               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1413               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1414               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1415               BIT(FLOW_DISSECTOR_KEY_TCP) |
1416               BIT(FLOW_DISSECTOR_KEY_IP)  |
1417               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1418                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
1419                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1420                             f->dissector->used_keys);
1421                 return -EOPNOTSUPP;
1422         }
1423
1424         if ((dissector_uses_key(f->dissector,
1425                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1426              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1427              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1428             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1429                 struct flow_dissector_key_control *key =
1430                         skb_flow_dissector_target(f->dissector,
1431                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1432                                                   f->key);
1433                 switch (key->addr_type) {
1434                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1435                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1436                         if (parse_tunnel_attr(priv, spec, f))
1437                                 return -EOPNOTSUPP;
1438                         break;
1439                 default:
1440                         return -EOPNOTSUPP;
1441                 }
1442
1443                 /* In decap flow, header pointers should point to the inner
1444                  * headers, outer header were already set by parse_tunnel_attr
1445                  */
1446                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1447                                          inner_headers);
1448                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1449                                          inner_headers);
1450         }
1451
1452         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1453                 struct flow_dissector_key_basic *key =
1454                         skb_flow_dissector_target(f->dissector,
1455                                                   FLOW_DISSECTOR_KEY_BASIC,
1456                                                   f->key);
1457                 struct flow_dissector_key_basic *mask =
1458                         skb_flow_dissector_target(f->dissector,
1459                                                   FLOW_DISSECTOR_KEY_BASIC,
1460                                                   f->mask);
1461                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1462                          ntohs(mask->n_proto));
1463                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1464                          ntohs(key->n_proto));
1465
1466                 if (mask->n_proto)
1467                         *match_level = MLX5_MATCH_L2;
1468         }
1469
1470         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1471                 struct flow_dissector_key_vlan *key =
1472                         skb_flow_dissector_target(f->dissector,
1473                                                   FLOW_DISSECTOR_KEY_VLAN,
1474                                                   f->key);
1475                 struct flow_dissector_key_vlan *mask =
1476                         skb_flow_dissector_target(f->dissector,
1477                                                   FLOW_DISSECTOR_KEY_VLAN,
1478                                                   f->mask);
1479                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1480                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1481                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1482                                          svlan_tag, 1);
1483                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1484                                          svlan_tag, 1);
1485                         } else {
1486                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1487                                          cvlan_tag, 1);
1488                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1489                                          cvlan_tag, 1);
1490                         }
1491
1492                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1493                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1494
1495                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1496                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1497
1498                         *match_level = MLX5_MATCH_L2;
1499                 }
1500         } else if (*match_level != MLX5_MATCH_NONE) {
1501                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1);
1502                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1503                 *match_level = MLX5_MATCH_L2;
1504         }
1505
1506         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1507                 struct flow_dissector_key_vlan *key =
1508                         skb_flow_dissector_target(f->dissector,
1509                                                   FLOW_DISSECTOR_KEY_CVLAN,
1510                                                   f->key);
1511                 struct flow_dissector_key_vlan *mask =
1512                         skb_flow_dissector_target(f->dissector,
1513                                                   FLOW_DISSECTOR_KEY_CVLAN,
1514                                                   f->mask);
1515                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1516                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1517                                 MLX5_SET(fte_match_set_misc, misc_c,
1518                                          outer_second_svlan_tag, 1);
1519                                 MLX5_SET(fte_match_set_misc, misc_v,
1520                                          outer_second_svlan_tag, 1);
1521                         } else {
1522                                 MLX5_SET(fte_match_set_misc, misc_c,
1523                                          outer_second_cvlan_tag, 1);
1524                                 MLX5_SET(fte_match_set_misc, misc_v,
1525                                          outer_second_cvlan_tag, 1);
1526                         }
1527
1528                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1529                                  mask->vlan_id);
1530                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1531                                  key->vlan_id);
1532                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1533                                  mask->vlan_priority);
1534                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1535                                  key->vlan_priority);
1536
1537                         *match_level = MLX5_MATCH_L2;
1538                 }
1539         }
1540
1541         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1542                 struct flow_dissector_key_eth_addrs *key =
1543                         skb_flow_dissector_target(f->dissector,
1544                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1545                                                   f->key);
1546                 struct flow_dissector_key_eth_addrs *mask =
1547                         skb_flow_dissector_target(f->dissector,
1548                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1549                                                   f->mask);
1550
1551                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1552                                              dmac_47_16),
1553                                 mask->dst);
1554                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1555                                              dmac_47_16),
1556                                 key->dst);
1557
1558                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1559                                              smac_47_16),
1560                                 mask->src);
1561                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1562                                              smac_47_16),
1563                                 key->src);
1564
1565                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1566                         *match_level = MLX5_MATCH_L2;
1567         }
1568
1569         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1570                 struct flow_dissector_key_control *key =
1571                         skb_flow_dissector_target(f->dissector,
1572                                                   FLOW_DISSECTOR_KEY_CONTROL,
1573                                                   f->key);
1574
1575                 struct flow_dissector_key_control *mask =
1576                         skb_flow_dissector_target(f->dissector,
1577                                                   FLOW_DISSECTOR_KEY_CONTROL,
1578                                                   f->mask);
1579                 addr_type = key->addr_type;
1580
1581                 /* the HW doesn't support frag first/later */
1582                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1583                         return -EOPNOTSUPP;
1584
1585                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1586                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1587                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1588                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1589
1590                         /* the HW doesn't need L3 inline to match on frag=no */
1591                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1592                                 *match_level = MLX5_MATCH_L2;
1593         /* ***  L2 attributes parsing up to here *** */
1594                         else
1595                                 *match_level = MLX5_MATCH_L3;
1596                 }
1597         }
1598
1599         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1600                 struct flow_dissector_key_basic *key =
1601                         skb_flow_dissector_target(f->dissector,
1602                                                   FLOW_DISSECTOR_KEY_BASIC,
1603                                                   f->key);
1604                 struct flow_dissector_key_basic *mask =
1605                         skb_flow_dissector_target(f->dissector,
1606                                                   FLOW_DISSECTOR_KEY_BASIC,
1607                                                   f->mask);
1608                 ip_proto = key->ip_proto;
1609
1610                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1611                          mask->ip_proto);
1612                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1613                          key->ip_proto);
1614
1615                 if (mask->ip_proto)
1616                         *match_level = MLX5_MATCH_L3;
1617         }
1618
1619         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1620                 struct flow_dissector_key_ipv4_addrs *key =
1621                         skb_flow_dissector_target(f->dissector,
1622                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1623                                                   f->key);
1624                 struct flow_dissector_key_ipv4_addrs *mask =
1625                         skb_flow_dissector_target(f->dissector,
1626                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1627                                                   f->mask);
1628
1629                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1630                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1631                        &mask->src, sizeof(mask->src));
1632                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1633                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1634                        &key->src, sizeof(key->src));
1635                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1636                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1637                        &mask->dst, sizeof(mask->dst));
1638                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1639                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1640                        &key->dst, sizeof(key->dst));
1641
1642                 if (mask->src || mask->dst)
1643                         *match_level = MLX5_MATCH_L3;
1644         }
1645
1646         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1647                 struct flow_dissector_key_ipv6_addrs *key =
1648                         skb_flow_dissector_target(f->dissector,
1649                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1650                                                   f->key);
1651                 struct flow_dissector_key_ipv6_addrs *mask =
1652                         skb_flow_dissector_target(f->dissector,
1653                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1654                                                   f->mask);
1655
1656                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1657                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1658                        &mask->src, sizeof(mask->src));
1659                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1660                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1661                        &key->src, sizeof(key->src));
1662
1663                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1664                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1665                        &mask->dst, sizeof(mask->dst));
1666                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1667                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1668                        &key->dst, sizeof(key->dst));
1669
1670                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1671                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1672                         *match_level = MLX5_MATCH_L3;
1673         }
1674
1675         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1676                 struct flow_dissector_key_ip *key =
1677                         skb_flow_dissector_target(f->dissector,
1678                                                   FLOW_DISSECTOR_KEY_IP,
1679                                                   f->key);
1680                 struct flow_dissector_key_ip *mask =
1681                         skb_flow_dissector_target(f->dissector,
1682                                                   FLOW_DISSECTOR_KEY_IP,
1683                                                   f->mask);
1684
1685                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1686                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1687
1688                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1689                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1690
1691                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1692                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1693
1694                 if (mask->ttl &&
1695                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1696                                                 ft_field_support.outer_ipv4_ttl)) {
1697                         NL_SET_ERR_MSG_MOD(extack,
1698                                            "Matching on TTL is not supported");
1699                         return -EOPNOTSUPP;
1700                 }
1701
1702                 if (mask->tos || mask->ttl)
1703                         *match_level = MLX5_MATCH_L3;
1704         }
1705
1706         /* ***  L3 attributes parsing up to here *** */
1707
1708         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1709                 struct flow_dissector_key_ports *key =
1710                         skb_flow_dissector_target(f->dissector,
1711                                                   FLOW_DISSECTOR_KEY_PORTS,
1712                                                   f->key);
1713                 struct flow_dissector_key_ports *mask =
1714                         skb_flow_dissector_target(f->dissector,
1715                                                   FLOW_DISSECTOR_KEY_PORTS,
1716                                                   f->mask);
1717                 switch (ip_proto) {
1718                 case IPPROTO_TCP:
1719                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1720                                  tcp_sport, ntohs(mask->src));
1721                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1722                                  tcp_sport, ntohs(key->src));
1723
1724                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1725                                  tcp_dport, ntohs(mask->dst));
1726                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1727                                  tcp_dport, ntohs(key->dst));
1728                         break;
1729
1730                 case IPPROTO_UDP:
1731                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1732                                  udp_sport, ntohs(mask->src));
1733                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1734                                  udp_sport, ntohs(key->src));
1735
1736                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1737                                  udp_dport, ntohs(mask->dst));
1738                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1739                                  udp_dport, ntohs(key->dst));
1740                         break;
1741                 default:
1742                         NL_SET_ERR_MSG_MOD(extack,
1743                                            "Only UDP and TCP transports are supported for L4 matching");
1744                         netdev_err(priv->netdev,
1745                                    "Only UDP and TCP transport are supported\n");
1746                         return -EINVAL;
1747                 }
1748
1749                 if (mask->src || mask->dst)
1750                         *match_level = MLX5_MATCH_L4;
1751         }
1752
1753         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1754                 struct flow_dissector_key_tcp *key =
1755                         skb_flow_dissector_target(f->dissector,
1756                                                   FLOW_DISSECTOR_KEY_TCP,
1757                                                   f->key);
1758                 struct flow_dissector_key_tcp *mask =
1759                         skb_flow_dissector_target(f->dissector,
1760                                                   FLOW_DISSECTOR_KEY_TCP,
1761                                                   f->mask);
1762
1763                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1764                          ntohs(mask->flags));
1765                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1766                          ntohs(key->flags));
1767
1768                 if (mask->flags)
1769                         *match_level = MLX5_MATCH_L4;
1770         }
1771
1772         return 0;
1773 }
1774
1775 static int parse_cls_flower(struct mlx5e_priv *priv,
1776                             struct mlx5e_tc_flow *flow,
1777                             struct mlx5_flow_spec *spec,
1778                             struct tc_cls_flower_offload *f)
1779 {
1780         struct netlink_ext_ack *extack = f->common.extack;
1781         struct mlx5_core_dev *dev = priv->mdev;
1782         struct mlx5_eswitch *esw = dev->priv.eswitch;
1783         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1784         struct mlx5_eswitch_rep *rep;
1785         u8 match_level;
1786         int err;
1787
1788         err = __parse_cls_flower(priv, spec, f, &match_level);
1789
1790         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1791                 rep = rpriv->rep;
1792                 if (rep->vport != FDB_UPLINK_VPORT &&
1793                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1794                     esw->offloads.inline_mode < match_level)) {
1795                         NL_SET_ERR_MSG_MOD(extack,
1796                                            "Flow is not offloaded due to min inline setting");
1797                         netdev_warn(priv->netdev,
1798                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1799                                     match_level, esw->offloads.inline_mode);
1800                         return -EOPNOTSUPP;
1801                 }
1802         }
1803
1804         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1805                 flow->esw_attr->match_level = match_level;
1806         else
1807                 flow->nic_attr->match_level = match_level;
1808
1809         return err;
1810 }
1811
1812 struct pedit_headers {
1813         struct ethhdr  eth;
1814         struct iphdr   ip4;
1815         struct ipv6hdr ip6;
1816         struct tcphdr  tcp;
1817         struct udphdr  udp;
1818 };
1819
1820 static int pedit_header_offsets[] = {
1821         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1822         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1823         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1824         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1825         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1826 };
1827
1828 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1829
1830 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1831                          struct pedit_headers *masks,
1832                          struct pedit_headers *vals)
1833 {
1834         u32 *curr_pmask, *curr_pval;
1835
1836         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1837                 goto out_err;
1838
1839         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1840         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1841
1842         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1843                 goto out_err;
1844
1845         *curr_pmask |= mask;
1846         *curr_pval  |= (val & mask);
1847
1848         return 0;
1849
1850 out_err:
1851         return -EOPNOTSUPP;
1852 }
1853
1854 struct mlx5_fields {
1855         u8  field;
1856         u8  size;
1857         u32 offset;
1858 };
1859
1860 #define OFFLOAD(fw_field, size, field, off) \
1861                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1862
1863 static struct mlx5_fields fields[] = {
1864         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1865         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1866         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1867         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1868         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1869
1870         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1871         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1872         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1873
1874         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1875         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1876         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1877         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1878         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1879         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1880         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1881         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1882         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1883
1884         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1885         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1886         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1887
1888         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1889         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1890 };
1891
1892 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1893  * max from the SW pedit action. On success, it says how many HW actions were
1894  * actually parsed.
1895  */
1896 static int offload_pedit_fields(struct pedit_headers *masks,
1897                                 struct pedit_headers *vals,
1898                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1899                                 struct netlink_ext_ack *extack)
1900 {
1901         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1902         int i, action_size, nactions, max_actions, first, last, next_z;
1903         void *s_masks_p, *a_masks_p, *vals_p;
1904         struct mlx5_fields *f;
1905         u8 cmd, field_bsize;
1906         u32 s_mask, a_mask;
1907         unsigned long mask;
1908         __be32 mask_be32;
1909         __be16 mask_be16;
1910         void *action;
1911
1912         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1913         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1914         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1915         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1916
1917         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1918         action = parse_attr->mod_hdr_actions;
1919         max_actions = parse_attr->num_mod_hdr_actions;
1920         nactions = 0;
1921
1922         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1923                 f = &fields[i];
1924                 /* avoid seeing bits set from previous iterations */
1925                 s_mask = 0;
1926                 a_mask = 0;
1927
1928                 s_masks_p = (void *)set_masks + f->offset;
1929                 a_masks_p = (void *)add_masks + f->offset;
1930
1931                 memcpy(&s_mask, s_masks_p, f->size);
1932                 memcpy(&a_mask, a_masks_p, f->size);
1933
1934                 if (!s_mask && !a_mask) /* nothing to offload here */
1935                         continue;
1936
1937                 if (s_mask && a_mask) {
1938                         NL_SET_ERR_MSG_MOD(extack,
1939                                            "can't set and add to the same HW field");
1940                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1941                         return -EOPNOTSUPP;
1942                 }
1943
1944                 if (nactions == max_actions) {
1945                         NL_SET_ERR_MSG_MOD(extack,
1946                                            "too many pedit actions, can't offload");
1947                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1948                         return -EOPNOTSUPP;
1949                 }
1950
1951                 if (s_mask) {
1952                         cmd  = MLX5_ACTION_TYPE_SET;
1953                         mask = s_mask;
1954                         vals_p = (void *)set_vals + f->offset;
1955                         /* clear to denote we consumed this field */
1956                         memset(s_masks_p, 0, f->size);
1957                 } else {
1958                         cmd  = MLX5_ACTION_TYPE_ADD;
1959                         mask = a_mask;
1960                         vals_p = (void *)add_vals + f->offset;
1961                         /* clear to denote we consumed this field */
1962                         memset(a_masks_p, 0, f->size);
1963                 }
1964
1965                 field_bsize = f->size * BITS_PER_BYTE;
1966
1967                 if (field_bsize == 32) {
1968                         mask_be32 = *(__be32 *)&mask;
1969                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1970                 } else if (field_bsize == 16) {
1971                         mask_be16 = *(__be16 *)&mask;
1972                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1973                 }
1974
1975                 first = find_first_bit(&mask, field_bsize);
1976                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1977                 last  = find_last_bit(&mask, field_bsize);
1978                 if (first < next_z && next_z < last) {
1979                         NL_SET_ERR_MSG_MOD(extack,
1980                                            "rewrite of few sub-fields isn't supported");
1981                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1982                                mask);
1983                         return -EOPNOTSUPP;
1984                 }
1985
1986                 MLX5_SET(set_action_in, action, action_type, cmd);
1987                 MLX5_SET(set_action_in, action, field, f->field);
1988
1989                 if (cmd == MLX5_ACTION_TYPE_SET) {
1990                         MLX5_SET(set_action_in, action, offset, first);
1991                         /* length is num of bits to be written, zero means length of 32 */
1992                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1993                 }
1994
1995                 if (field_bsize == 32)
1996                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1997                 else if (field_bsize == 16)
1998                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1999                 else if (field_bsize == 8)
2000                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
2001
2002                 action += action_size;
2003                 nactions++;
2004         }
2005
2006         parse_attr->num_mod_hdr_actions = nactions;
2007         return 0;
2008 }
2009
2010 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
2011                                  const struct tc_action *a, int namespace,
2012                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
2013 {
2014         int nkeys, action_size, max_actions;
2015
2016         nkeys = tcf_pedit_nkeys(a);
2017         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
2018
2019         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2020                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
2021         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2022                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
2023
2024         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
2025         max_actions = min(max_actions, nkeys * 16);
2026
2027         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
2028         if (!parse_attr->mod_hdr_actions)
2029                 return -ENOMEM;
2030
2031         parse_attr->num_mod_hdr_actions = max_actions;
2032         return 0;
2033 }
2034
2035 static const struct pedit_headers zero_masks = {};
2036
2037 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
2038                                  const struct tc_action *a, int namespace,
2039                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2040                                  struct netlink_ext_ack *extack)
2041 {
2042         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
2043         int nkeys, i, err = -EOPNOTSUPP;
2044         u32 mask, val, offset;
2045         u8 cmd, htype;
2046
2047         nkeys = tcf_pedit_nkeys(a);
2048
2049         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
2050         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
2051
2052         for (i = 0; i < nkeys; i++) {
2053                 htype = tcf_pedit_htype(a, i);
2054                 cmd = tcf_pedit_cmd(a, i);
2055                 err = -EOPNOTSUPP; /* can't be all optimistic */
2056
2057                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
2058                         NL_SET_ERR_MSG_MOD(extack,
2059                                            "legacy pedit isn't offloaded");
2060                         goto out_err;
2061                 }
2062
2063                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
2064                         NL_SET_ERR_MSG_MOD(extack, "pedit cmd isn't offloaded");
2065                         goto out_err;
2066                 }
2067
2068                 mask = tcf_pedit_mask(a, i);
2069                 val = tcf_pedit_val(a, i);
2070                 offset = tcf_pedit_offset(a, i);
2071
2072                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
2073                 if (err)
2074                         goto out_err;
2075         }
2076
2077         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
2078         if (err)
2079                 goto out_err;
2080
2081         err = offload_pedit_fields(masks, vals, parse_attr, extack);
2082         if (err < 0)
2083                 goto out_dealloc_parsed_actions;
2084
2085         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
2086                 cmd_masks = &masks[cmd];
2087                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
2088                         NL_SET_ERR_MSG_MOD(extack,
2089                                            "attempt to offload an unsupported field");
2090                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
2091                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
2092                                        16, 1, cmd_masks, sizeof(zero_masks), true);
2093                         err = -EOPNOTSUPP;
2094                         goto out_dealloc_parsed_actions;
2095                 }
2096         }
2097
2098         return 0;
2099
2100 out_dealloc_parsed_actions:
2101         kfree(parse_attr->mod_hdr_actions);
2102 out_err:
2103         return err;
2104 }
2105
2106 static bool csum_offload_supported(struct mlx5e_priv *priv,
2107                                    u32 action,
2108                                    u32 update_flags,
2109                                    struct netlink_ext_ack *extack)
2110 {
2111         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2112                          TCA_CSUM_UPDATE_FLAG_UDP;
2113
2114         /*  The HW recalcs checksums only if re-writing headers */
2115         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2116                 NL_SET_ERR_MSG_MOD(extack,
2117                                    "TC csum action is only offloaded with pedit");
2118                 netdev_warn(priv->netdev,
2119                             "TC csum action is only offloaded with pedit\n");
2120                 return false;
2121         }
2122
2123         if (update_flags & ~prot_flags) {
2124                 NL_SET_ERR_MSG_MOD(extack,
2125                                    "can't offload TC csum action for some header/s");
2126                 netdev_warn(priv->netdev,
2127                             "can't offload TC csum action for some header/s - flags %#x\n",
2128                             update_flags);
2129                 return false;
2130         }
2131
2132         return true;
2133 }
2134
2135 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
2136                                           struct tcf_exts *exts,
2137                                           struct netlink_ext_ack *extack)
2138 {
2139         const struct tc_action *a;
2140         bool modify_ip_header;
2141         LIST_HEAD(actions);
2142         u8 htype, ip_proto;
2143         void *headers_v;
2144         u16 ethertype;
2145         int nkeys, i;
2146
2147         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
2148         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2149
2150         /* for non-IP we only re-write MACs, so we're okay */
2151         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
2152                 goto out_ok;
2153
2154         modify_ip_header = false;
2155         tcf_exts_for_each_action(i, a, exts) {
2156                 int k;
2157
2158                 if (!is_tcf_pedit(a))
2159                         continue;
2160
2161                 nkeys = tcf_pedit_nkeys(a);
2162                 for (k = 0; k < nkeys; k++) {
2163                         htype = tcf_pedit_htype(a, k);
2164                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
2165                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
2166                                 modify_ip_header = true;
2167                                 break;
2168                         }
2169                 }
2170         }
2171
2172         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2173         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2174             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2175                 NL_SET_ERR_MSG_MOD(extack,
2176                                    "can't offload re-write of non TCP/UDP");
2177                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2178                 return false;
2179         }
2180
2181 out_ok:
2182         return true;
2183 }
2184
2185 static bool actions_match_supported(struct mlx5e_priv *priv,
2186                                     struct tcf_exts *exts,
2187                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2188                                     struct mlx5e_tc_flow *flow,
2189                                     struct netlink_ext_ack *extack)
2190 {
2191         u32 actions;
2192
2193         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2194                 actions = flow->esw_attr->action;
2195         else
2196                 actions = flow->nic_attr->action;
2197
2198         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2199             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2200                 return false;
2201
2202         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2203                 return modify_header_match_supported(&parse_attr->spec, exts,
2204                                                      extack);
2205
2206         return true;
2207 }
2208
2209 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2210 {
2211         struct mlx5_core_dev *fmdev, *pmdev;
2212         u64 fsystem_guid, psystem_guid;
2213
2214         fmdev = priv->mdev;
2215         pmdev = peer_priv->mdev;
2216
2217         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2218         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2219
2220         return (fsystem_guid == psystem_guid);
2221 }
2222
2223 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2224                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2225                                 struct mlx5e_tc_flow *flow,
2226                                 struct netlink_ext_ack *extack)
2227 {
2228         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2229         const struct tc_action *a;
2230         LIST_HEAD(actions);
2231         u32 action = 0;
2232         int err, i;
2233
2234         if (!tcf_exts_has_actions(exts))
2235                 return -EINVAL;
2236
2237         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2238
2239         tcf_exts_for_each_action(i, a, exts) {
2240                 if (is_tcf_gact_shot(a)) {
2241                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2242                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2243                                                flow_table_properties_nic_receive.flow_counter))
2244                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2245                         continue;
2246                 }
2247
2248                 if (is_tcf_pedit(a)) {
2249                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2250                                                     parse_attr, extack);
2251                         if (err)
2252                                 return err;
2253
2254                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2255                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2256                         continue;
2257                 }
2258
2259                 if (is_tcf_csum(a)) {
2260                         if (csum_offload_supported(priv, action,
2261                                                    tcf_csum_update_flags(a),
2262                                                    extack))
2263                                 continue;
2264
2265                         return -EOPNOTSUPP;
2266                 }
2267
2268                 if (is_tcf_mirred_egress_redirect(a)) {
2269                         struct net_device *peer_dev = tcf_mirred_dev(a);
2270
2271                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2272                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2273                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2274                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2275                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2276                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2277                         } else {
2278                                 NL_SET_ERR_MSG_MOD(extack,
2279                                                    "device is not on same HW, can't offload");
2280                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2281                                             peer_dev->name);
2282                                 return -EINVAL;
2283                         }
2284                         continue;
2285                 }
2286
2287                 if (is_tcf_skbedit_mark(a)) {
2288                         u32 mark = tcf_skbedit_mark(a);
2289
2290                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2291                                 NL_SET_ERR_MSG_MOD(extack,
2292                                                    "Bad flow mark - only 16 bit is supported");
2293                                 return -EINVAL;
2294                         }
2295
2296                         attr->flow_tag = mark;
2297                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2298                         continue;
2299                 }
2300
2301                 return -EINVAL;
2302         }
2303
2304         attr->action = action;
2305         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2306                 return -EOPNOTSUPP;
2307
2308         return 0;
2309 }
2310
2311 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2312                                  struct ip_tunnel_key *b)
2313 {
2314         return memcmp(a, b, sizeof(*a));
2315 }
2316
2317 static inline int hash_encap_info(struct ip_tunnel_key *key)
2318 {
2319         return jhash(key, sizeof(*key), 0);
2320 }
2321
2322 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2323                                    struct net_device *mirred_dev,
2324                                    struct net_device **out_dev,
2325                                    struct flowi4 *fl4,
2326                                    struct neighbour **out_n,
2327                                    u8 *out_ttl)
2328 {
2329         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2330         struct mlx5e_rep_priv *uplink_rpriv;
2331         struct rtable *rt;
2332         struct neighbour *n = NULL;
2333
2334 #if IS_ENABLED(CONFIG_INET)
2335         int ret;
2336
2337         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2338         ret = PTR_ERR_OR_ZERO(rt);
2339         if (ret)
2340                 return ret;
2341 #else
2342         return -EOPNOTSUPP;
2343 #endif
2344         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2345         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2346         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2347                 *out_dev = uplink_rpriv->netdev;
2348         else
2349                 *out_dev = rt->dst.dev;
2350
2351         if (!(*out_ttl))
2352                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2353         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2354         ip_rt_put(rt);
2355         if (!n)
2356                 return -ENOMEM;
2357
2358         *out_n = n;
2359         return 0;
2360 }
2361
2362 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2363                                   struct net_device *peer_netdev)
2364 {
2365         struct mlx5e_priv *peer_priv;
2366
2367         peer_priv = netdev_priv(peer_netdev);
2368
2369         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2370                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2371                 same_hw_devs(priv, peer_priv) &&
2372                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2373                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2374 }
2375
2376 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2377                                    struct net_device *mirred_dev,
2378                                    struct net_device **out_dev,
2379                                    struct flowi6 *fl6,
2380                                    struct neighbour **out_n,
2381                                    u8 *out_ttl)
2382 {
2383         struct neighbour *n = NULL;
2384         struct dst_entry *dst;
2385
2386 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2387         struct mlx5e_rep_priv *uplink_rpriv;
2388         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2389         int ret;
2390
2391         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2392                                          fl6);
2393         if (ret < 0)
2394                 return ret;
2395
2396         if (!(*out_ttl))
2397                 *out_ttl = ip6_dst_hoplimit(dst);
2398
2399         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2400         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2401         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2402                 *out_dev = uplink_rpriv->netdev;
2403         else
2404                 *out_dev = dst->dev;
2405 #else
2406         return -EOPNOTSUPP;
2407 #endif
2408
2409         n = dst_neigh_lookup(dst, &fl6->daddr);
2410         dst_release(dst);
2411         if (!n)
2412                 return -ENOMEM;
2413
2414         *out_n = n;
2415         return 0;
2416 }
2417
2418 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2419                                   char buf[], int encap_size,
2420                                   unsigned char h_dest[ETH_ALEN],
2421                                   u8 tos, u8 ttl,
2422                                   __be32 daddr,
2423                                   __be32 saddr,
2424                                   __be16 udp_dst_port,
2425                                   __be32 vx_vni)
2426 {
2427         struct ethhdr *eth = (struct ethhdr *)buf;
2428         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2429         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2430         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2431
2432         memset(buf, 0, encap_size);
2433
2434         ether_addr_copy(eth->h_dest, h_dest);
2435         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2436         eth->h_proto = htons(ETH_P_IP);
2437
2438         ip->daddr = daddr;
2439         ip->saddr = saddr;
2440
2441         ip->tos = tos;
2442         ip->ttl = ttl;
2443         ip->protocol = IPPROTO_UDP;
2444         ip->version = 0x4;
2445         ip->ihl = 0x5;
2446
2447         udp->dest = udp_dst_port;
2448         vxh->vx_flags = VXLAN_HF_VNI;
2449         vxh->vx_vni = vxlan_vni_field(vx_vni);
2450 }
2451
2452 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2453                                   char buf[], int encap_size,
2454                                   unsigned char h_dest[ETH_ALEN],
2455                                   u8 tos, u8 ttl,
2456                                   struct in6_addr *daddr,
2457                                   struct in6_addr *saddr,
2458                                   __be16 udp_dst_port,
2459                                   __be32 vx_vni)
2460 {
2461         struct ethhdr *eth = (struct ethhdr *)buf;
2462         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2463         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2464         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2465
2466         memset(buf, 0, encap_size);
2467
2468         ether_addr_copy(eth->h_dest, h_dest);
2469         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2470         eth->h_proto = htons(ETH_P_IPV6);
2471
2472         ip6_flow_hdr(ip6h, tos, 0);
2473         /* the HW fills up ipv6 payload len */
2474         ip6h->nexthdr     = IPPROTO_UDP;
2475         ip6h->hop_limit   = ttl;
2476         ip6h->daddr       = *daddr;
2477         ip6h->saddr       = *saddr;
2478
2479         udp->dest = udp_dst_port;
2480         vxh->vx_flags = VXLAN_HF_VNI;
2481         vxh->vx_vni = vxlan_vni_field(vx_vni);
2482 }
2483
2484 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2485                                           struct net_device *mirred_dev,
2486                                           struct mlx5e_encap_entry *e)
2487 {
2488         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2489         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2490         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2491         struct net_device *out_dev;
2492         struct neighbour *n = NULL;
2493         struct flowi4 fl4 = {};
2494         u8 nud_state, tos, ttl;
2495         char *encap_header;
2496         int err;
2497
2498         if (max_encap_size < ipv4_encap_size) {
2499                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2500                                ipv4_encap_size, max_encap_size);
2501                 return -EOPNOTSUPP;
2502         }
2503
2504         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2505         if (!encap_header)
2506                 return -ENOMEM;
2507
2508         switch (e->tunnel_type) {
2509         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2510                 fl4.flowi4_proto = IPPROTO_UDP;
2511                 fl4.fl4_dport = tun_key->tp_dst;
2512                 break;
2513         default:
2514                 err = -EOPNOTSUPP;
2515                 goto free_encap;
2516         }
2517
2518         tos = tun_key->tos;
2519         ttl = tun_key->ttl;
2520
2521         fl4.flowi4_tos = tun_key->tos;
2522         fl4.daddr = tun_key->u.ipv4.dst;
2523         fl4.saddr = tun_key->u.ipv4.src;
2524
2525         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2526                                       &fl4, &n, &ttl);
2527         if (err)
2528                 goto free_encap;
2529
2530         /* used by mlx5e_detach_encap to lookup a neigh hash table
2531          * entry in the neigh hash table when a user deletes a rule
2532          */
2533         e->m_neigh.dev = n->dev;
2534         e->m_neigh.family = n->ops->family;
2535         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2536         e->out_dev = out_dev;
2537
2538         /* It's importent to add the neigh to the hash table before checking
2539          * the neigh validity state. So if we'll get a notification, in case the
2540          * neigh changes it's validity state, we would find the relevant neigh
2541          * in the hash.
2542          */
2543         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2544         if (err)
2545                 goto free_encap;
2546
2547         read_lock_bh(&n->lock);
2548         nud_state = n->nud_state;
2549         ether_addr_copy(e->h_dest, n->ha);
2550         read_unlock_bh(&n->lock);
2551
2552         switch (e->tunnel_type) {
2553         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2554                 gen_vxlan_header_ipv4(out_dev, encap_header,
2555                                       ipv4_encap_size, e->h_dest, tos, ttl,
2556                                       fl4.daddr,
2557                                       fl4.saddr, tun_key->tp_dst,
2558                                       tunnel_id_to_key32(tun_key->tun_id));
2559                 break;
2560         default:
2561                 err = -EOPNOTSUPP;
2562                 goto destroy_neigh_entry;
2563         }
2564         e->encap_size = ipv4_encap_size;
2565         e->encap_header = encap_header;
2566
2567         if (!(nud_state & NUD_VALID)) {
2568                 neigh_event_send(n, NULL);
2569                 err = -EAGAIN;
2570                 goto out;
2571         }
2572
2573         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2574                                          ipv4_encap_size, encap_header,
2575                                          MLX5_FLOW_NAMESPACE_FDB,
2576                                          &e->encap_id);
2577         if (err)
2578                 goto destroy_neigh_entry;
2579
2580         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2581         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2582         neigh_release(n);
2583         return err;
2584
2585 destroy_neigh_entry:
2586         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2587 free_encap:
2588         kfree(encap_header);
2589 out:
2590         if (n)
2591                 neigh_release(n);
2592         return err;
2593 }
2594
2595 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2596                                           struct net_device *mirred_dev,
2597                                           struct mlx5e_encap_entry *e)
2598 {
2599         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2600         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2601         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2602         struct net_device *out_dev;
2603         struct neighbour *n = NULL;
2604         struct flowi6 fl6 = {};
2605         u8 nud_state, tos, ttl;
2606         char *encap_header;
2607         int err;
2608
2609         if (max_encap_size < ipv6_encap_size) {
2610                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2611                                ipv6_encap_size, max_encap_size);
2612                 return -EOPNOTSUPP;
2613         }
2614
2615         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2616         if (!encap_header)
2617                 return -ENOMEM;
2618
2619         switch (e->tunnel_type) {
2620         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2621                 fl6.flowi6_proto = IPPROTO_UDP;
2622                 fl6.fl6_dport = tun_key->tp_dst;
2623                 break;
2624         default:
2625                 err = -EOPNOTSUPP;
2626                 goto free_encap;
2627         }
2628
2629         tos = tun_key->tos;
2630         ttl = tun_key->ttl;
2631
2632         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2633         fl6.daddr = tun_key->u.ipv6.dst;
2634         fl6.saddr = tun_key->u.ipv6.src;
2635
2636         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2637                                       &fl6, &n, &ttl);
2638         if (err)
2639                 goto free_encap;
2640
2641         /* used by mlx5e_detach_encap to lookup a neigh hash table
2642          * entry in the neigh hash table when a user deletes a rule
2643          */
2644         e->m_neigh.dev = n->dev;
2645         e->m_neigh.family = n->ops->family;
2646         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2647         e->out_dev = out_dev;
2648
2649         /* It's importent to add the neigh to the hash table before checking
2650          * the neigh validity state. So if we'll get a notification, in case the
2651          * neigh changes it's validity state, we would find the relevant neigh
2652          * in the hash.
2653          */
2654         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2655         if (err)
2656                 goto free_encap;
2657
2658         read_lock_bh(&n->lock);
2659         nud_state = n->nud_state;
2660         ether_addr_copy(e->h_dest, n->ha);
2661         read_unlock_bh(&n->lock);
2662
2663         switch (e->tunnel_type) {
2664         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2665                 gen_vxlan_header_ipv6(out_dev, encap_header,
2666                                       ipv6_encap_size, e->h_dest, tos, ttl,
2667                                       &fl6.daddr,
2668                                       &fl6.saddr, tun_key->tp_dst,
2669                                       tunnel_id_to_key32(tun_key->tun_id));
2670                 break;
2671         default:
2672                 err = -EOPNOTSUPP;
2673                 goto destroy_neigh_entry;
2674         }
2675
2676         e->encap_size = ipv6_encap_size;
2677         e->encap_header = encap_header;
2678
2679         if (!(nud_state & NUD_VALID)) {
2680                 neigh_event_send(n, NULL);
2681                 err = -EAGAIN;
2682                 goto out;
2683         }
2684
2685         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2686                                          ipv6_encap_size, encap_header,
2687                                          MLX5_FLOW_NAMESPACE_FDB,
2688                                          &e->encap_id);
2689         if (err)
2690                 goto destroy_neigh_entry;
2691
2692         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2693         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2694         neigh_release(n);
2695         return err;
2696
2697 destroy_neigh_entry:
2698         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2699 free_encap:
2700         kfree(encap_header);
2701 out:
2702         if (n)
2703                 neigh_release(n);
2704         return err;
2705 }
2706
2707 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2708                               struct ip_tunnel_info *tun_info,
2709                               struct net_device *mirred_dev,
2710                               struct net_device **encap_dev,
2711                               struct mlx5e_tc_flow *flow,
2712                               struct netlink_ext_ack *extack)
2713 {
2714         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2715         unsigned short family = ip_tunnel_info_af(tun_info);
2716         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2717         struct ip_tunnel_key *key = &tun_info->key;
2718         struct mlx5e_encap_entry *e;
2719         int tunnel_type, err = 0;
2720         uintptr_t hash_key;
2721         bool found = false;
2722
2723         /* udp dst port must be set */
2724         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2725                 goto vxlan_encap_offload_err;
2726
2727         /* setting udp src port isn't supported */
2728         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2729 vxlan_encap_offload_err:
2730                 NL_SET_ERR_MSG_MOD(extack,
2731                                    "must set udp dst port and not set udp src port");
2732                 netdev_warn(priv->netdev,
2733                             "must set udp dst port and not set udp src port\n");
2734                 return -EOPNOTSUPP;
2735         }
2736
2737         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2738             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2739                 tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
2740         } else {
2741                 NL_SET_ERR_MSG_MOD(extack,
2742                                    "port isn't an offloaded vxlan udp dport");
2743                 netdev_warn(priv->netdev,
2744                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2745                 return -EOPNOTSUPP;
2746         }
2747
2748         hash_key = hash_encap_info(key);
2749
2750         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2751                                    encap_hlist, hash_key) {
2752                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2753                         found = true;
2754                         break;
2755                 }
2756         }
2757
2758         /* must verify if encap is valid or not */
2759         if (found)
2760                 goto attach_flow;
2761
2762         e = kzalloc(sizeof(*e), GFP_KERNEL);
2763         if (!e)
2764                 return -ENOMEM;
2765
2766         e->tun_info = *tun_info;
2767         e->tunnel_type = tunnel_type;
2768         INIT_LIST_HEAD(&e->flows);
2769
2770         if (family == AF_INET)
2771                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2772         else if (family == AF_INET6)
2773                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2774
2775         if (err && err != -EAGAIN)
2776                 goto out_err;
2777
2778         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2779
2780 attach_flow:
2781         list_add(&flow->encap, &e->flows);
2782         *encap_dev = e->out_dev;
2783         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2784                 attr->encap_id = e->encap_id;
2785         else
2786                 err = -EAGAIN;
2787
2788         return err;
2789
2790 out_err:
2791         kfree(e);
2792         return err;
2793 }
2794
2795 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2796                                 const struct tc_action *a,
2797                                 struct mlx5_esw_flow_attr *attr,
2798                                 u32 *action)
2799 {
2800         u8 vlan_idx = attr->total_vlan;
2801
2802         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2803                 return -EOPNOTSUPP;
2804
2805         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2806                 if (vlan_idx) {
2807                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2808                                                                  MLX5_FS_VLAN_DEPTH))
2809                                 return -EOPNOTSUPP;
2810
2811                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2812                 } else {
2813                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2814                 }
2815         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2816                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2817                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2818                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2819                 if (!attr->vlan_proto[vlan_idx])
2820                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2821
2822                 if (vlan_idx) {
2823                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2824                                                                  MLX5_FS_VLAN_DEPTH))
2825                                 return -EOPNOTSUPP;
2826
2827                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2828                 } else {
2829                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2830                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2831                              tcf_vlan_push_prio(a)))
2832                                 return -EOPNOTSUPP;
2833
2834                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2835                 }
2836         } else { /* action is TCA_VLAN_ACT_MODIFY */
2837                 return -EOPNOTSUPP;
2838         }
2839
2840         attr->total_vlan = vlan_idx + 1;
2841
2842         return 0;
2843 }
2844
2845 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2846                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2847                                 struct mlx5e_tc_flow *flow,
2848                                 struct netlink_ext_ack *extack)
2849 {
2850         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2851         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2852         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2853         struct ip_tunnel_info *info = NULL;
2854         const struct tc_action *a;
2855         LIST_HEAD(actions);
2856         bool encap = false;
2857         u32 action = 0;
2858         int err, i;
2859
2860         if (!tcf_exts_has_actions(exts))
2861                 return -EINVAL;
2862
2863         attr->in_rep = rpriv->rep;
2864         attr->in_mdev = priv->mdev;
2865
2866         tcf_exts_for_each_action(i, a, exts) {
2867                 if (is_tcf_gact_shot(a)) {
2868                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2869                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2870                         continue;
2871                 }
2872
2873                 if (is_tcf_pedit(a)) {
2874                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2875                                                     parse_attr, extack);
2876                         if (err)
2877                                 return err;
2878
2879                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2880                         attr->mirror_count = attr->out_count;
2881                         continue;
2882                 }
2883
2884                 if (is_tcf_csum(a)) {
2885                         if (csum_offload_supported(priv, action,
2886                                                    tcf_csum_update_flags(a),
2887                                                    extack))
2888                                 continue;
2889
2890                         return -EOPNOTSUPP;
2891                 }
2892
2893                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2894                         struct mlx5e_priv *out_priv;
2895                         struct net_device *out_dev;
2896
2897                         out_dev = tcf_mirred_dev(a);
2898
2899                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2900                                 NL_SET_ERR_MSG_MOD(extack,
2901                                                    "can't support more output ports, can't offload forwarding");
2902                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2903                                        attr->out_count);
2904                                 return -EOPNOTSUPP;
2905                         }
2906
2907                         if (switchdev_port_same_parent_id(priv->netdev,
2908                                                           out_dev) ||
2909                             is_merged_eswitch_dev(priv, out_dev)) {
2910                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2911                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2912                                 out_priv = netdev_priv(out_dev);
2913                                 rpriv = out_priv->ppriv;
2914                                 attr->out_rep[attr->out_count] = rpriv->rep;
2915                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2916                         } else if (encap) {
2917                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2918                                 parse_attr->tun_info = *info;
2919                                 attr->parse_attr = parse_attr;
2920                                 action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
2921                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2922                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2923                                 /* attr->out_rep is resolved when we handle encap */
2924                         } else {
2925                                 NL_SET_ERR_MSG_MOD(extack,
2926                                                    "devices are not on same switch HW, can't offload forwarding");
2927                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2928                                        priv->netdev->name, out_dev->name);
2929                                 return -EINVAL;
2930                         }
2931                         continue;
2932                 }
2933
2934                 if (is_tcf_tunnel_set(a)) {
2935                         info = tcf_tunnel_info(a);
2936                         if (info)
2937                                 encap = true;
2938                         else
2939                                 return -EOPNOTSUPP;
2940                         attr->mirror_count = attr->out_count;
2941                         continue;
2942                 }
2943
2944                 if (is_tcf_vlan(a)) {
2945                         err = parse_tc_vlan_action(priv, a, attr, &action);
2946
2947                         if (err)
2948                                 return err;
2949
2950                         attr->mirror_count = attr->out_count;
2951                         continue;
2952                 }
2953
2954                 if (is_tcf_tunnel_release(a)) {
2955                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2956                         continue;
2957                 }
2958
2959                 if (is_tcf_gact_goto_chain(a)) {
2960                         u32 dest_chain = tcf_gact_goto_chain_index(a);
2961                         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
2962
2963                         if (dest_chain <= attr->chain) {
2964                                 NL_SET_ERR_MSG(extack, "Goto earlier chain isn't supported");
2965                                 return -EOPNOTSUPP;
2966                         }
2967                         if (dest_chain > max_chain) {
2968                                 NL_SET_ERR_MSG(extack, "Requested destination chain is out of supported range");
2969                                 return -EOPNOTSUPP;
2970                         }
2971                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2972                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2973                         attr->dest_chain = dest_chain;
2974
2975                         continue;
2976                 }
2977
2978                 return -EINVAL;
2979         }
2980
2981         attr->action = action;
2982         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2983                 return -EOPNOTSUPP;
2984
2985         if (attr->mirror_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2986                 NL_SET_ERR_MSG_MOD(extack,
2987                                    "current firmware doesn't support split rule for port mirroring");
2988                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2989                 return -EOPNOTSUPP;
2990         }
2991
2992         return 0;
2993 }
2994
2995 static void get_flags(int flags, u16 *flow_flags)
2996 {
2997         u16 __flow_flags = 0;
2998
2999         if (flags & MLX5E_TC_INGRESS)
3000                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
3001         if (flags & MLX5E_TC_EGRESS)
3002                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
3003
3004         *flow_flags = __flow_flags;
3005 }
3006
3007 static const struct rhashtable_params tc_ht_params = {
3008         .head_offset = offsetof(struct mlx5e_tc_flow, node),
3009         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
3010         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
3011         .automatic_shrinking = true,
3012 };
3013
3014 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
3015 {
3016         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3017         struct mlx5e_rep_priv *uplink_rpriv;
3018
3019         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
3020                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
3021                 return &uplink_rpriv->tc_ht;
3022         } else
3023                 return &priv->fs.tc.ht;
3024 }
3025
3026 static int
3027 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
3028                  struct tc_cls_flower_offload *f, u16 flow_flags,
3029                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
3030                  struct mlx5e_tc_flow **__flow)
3031 {
3032         struct mlx5e_tc_flow_parse_attr *parse_attr;
3033         struct mlx5e_tc_flow *flow;
3034         int err;
3035
3036         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
3037         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
3038         if (!parse_attr || !flow) {
3039                 err = -ENOMEM;
3040                 goto err_free;
3041         }
3042
3043         flow->cookie = f->cookie;
3044         flow->flags = flow_flags;
3045         flow->priv = priv;
3046
3047         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
3048         if (err)
3049                 goto err_free;
3050
3051         *__flow = flow;
3052         *__parse_attr = parse_attr;
3053
3054         return 0;
3055
3056 err_free:
3057         kfree(flow);
3058         kvfree(parse_attr);
3059         return err;
3060 }
3061
3062 static int
3063 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
3064                    struct tc_cls_flower_offload *f,
3065                    u16 flow_flags,
3066                    struct mlx5e_tc_flow **__flow)
3067 {
3068         struct netlink_ext_ack *extack = f->common.extack;
3069         struct mlx5e_tc_flow_parse_attr *parse_attr;
3070         struct mlx5e_tc_flow *flow;
3071         int attr_size, err;
3072
3073         flow_flags |= MLX5E_TC_FLOW_ESWITCH;
3074         attr_size  = sizeof(struct mlx5_esw_flow_attr);
3075         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3076                                &parse_attr, &flow);
3077         if (err)
3078                 goto out;
3079
3080         flow->esw_attr->chain = f->common.chain_index;
3081         flow->esw_attr->prio = TC_H_MAJ(f->common.prio) >> 16;
3082         err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow, extack);
3083         if (err)
3084                 goto err_free;
3085
3086         err = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow, extack);
3087         if (err)
3088                 goto err_free;
3089
3090         if (!(flow->esw_attr->action &
3091               MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT))
3092                 kvfree(parse_attr);
3093
3094         *__flow = flow;
3095
3096         return 0;
3097
3098 err_free:
3099         kfree(flow);
3100         kvfree(parse_attr);
3101 out:
3102         return err;
3103 }
3104
3105 static int
3106 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
3107                    struct tc_cls_flower_offload *f,
3108                    u16 flow_flags,
3109                    struct mlx5e_tc_flow **__flow)
3110 {
3111         struct netlink_ext_ack *extack = f->common.extack;
3112         struct mlx5e_tc_flow_parse_attr *parse_attr;
3113         struct mlx5e_tc_flow *flow;
3114         int attr_size, err;
3115
3116         /* multi-chain not supported for NIC rules */
3117         if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
3118                 return -EOPNOTSUPP;
3119
3120         flow_flags |= MLX5E_TC_FLOW_NIC;
3121         attr_size  = sizeof(struct mlx5_nic_flow_attr);
3122         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3123                                &parse_attr, &flow);
3124         if (err)
3125                 goto out;
3126
3127         err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow, extack);
3128         if (err)
3129                 goto err_free;
3130
3131         err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
3132         if (err)
3133                 goto err_free;
3134
3135         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
3136         kvfree(parse_attr);
3137         *__flow = flow;
3138
3139         return 0;
3140
3141 err_free:
3142         kfree(flow);
3143         kvfree(parse_attr);
3144 out:
3145         return err;
3146 }
3147
3148 static int
3149 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
3150                   struct tc_cls_flower_offload *f,
3151                   int flags,
3152                   struct mlx5e_tc_flow **flow)
3153 {
3154         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3155         u16 flow_flags;
3156         int err;
3157
3158         get_flags(flags, &flow_flags);
3159
3160         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
3161                 return -EOPNOTSUPP;
3162
3163         if (esw && esw->mode == SRIOV_OFFLOADS)
3164                 err = mlx5e_add_fdb_flow(priv, f, flow_flags, flow);
3165         else
3166                 err = mlx5e_add_nic_flow(priv, f, flow_flags, flow);
3167
3168         return err;
3169 }
3170
3171 int mlx5e_configure_flower(struct mlx5e_priv *priv,
3172                            struct tc_cls_flower_offload *f, int flags)
3173 {
3174         struct netlink_ext_ack *extack = f->common.extack;
3175         struct rhashtable *tc_ht = get_tc_ht(priv);
3176         struct mlx5e_tc_flow *flow;
3177         int err = 0;
3178
3179         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3180         if (flow) {
3181                 NL_SET_ERR_MSG_MOD(extack,
3182                                    "flow cookie already exists, ignoring");
3183                 netdev_warn_once(priv->netdev,
3184                                  "flow cookie %lx already exists, ignoring\n",
3185                                  f->cookie);
3186                 goto out;
3187         }
3188
3189         err = mlx5e_tc_add_flow(priv, f, flags, &flow);
3190         if (err)
3191                 goto out;
3192
3193         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
3194         if (err)
3195                 goto err_free;
3196
3197         return 0;
3198
3199 err_free:
3200         mlx5e_tc_del_flow(priv, flow);
3201         kfree(flow);
3202 out:
3203         return err;
3204 }
3205
3206 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
3207 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
3208
3209 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
3210 {
3211         if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
3212                 return true;
3213
3214         return false;
3215 }
3216
3217 int mlx5e_delete_flower(struct mlx5e_priv *priv,
3218                         struct tc_cls_flower_offload *f, int flags)
3219 {
3220         struct rhashtable *tc_ht = get_tc_ht(priv);
3221         struct mlx5e_tc_flow *flow;
3222
3223         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3224         if (!flow || !same_flow_direction(flow, flags))
3225                 return -EINVAL;
3226
3227         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
3228
3229         mlx5e_tc_del_flow(priv, flow);
3230
3231         kfree(flow);
3232
3233         return 0;
3234 }
3235
3236 int mlx5e_stats_flower(struct mlx5e_priv *priv,
3237                        struct tc_cls_flower_offload *f, int flags)
3238 {
3239         struct rhashtable *tc_ht = get_tc_ht(priv);
3240         struct mlx5e_tc_flow *flow;
3241         struct mlx5_fc *counter;
3242         u64 bytes;
3243         u64 packets;
3244         u64 lastuse;
3245
3246         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3247         if (!flow || !same_flow_direction(flow, flags))
3248                 return -EINVAL;
3249
3250         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
3251                 return 0;
3252
3253         counter = mlx5e_tc_get_counter(flow);
3254         if (!counter)
3255                 return 0;
3256
3257         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
3258
3259         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
3260
3261         return 0;
3262 }
3263
3264 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
3265                                               struct mlx5e_priv *peer_priv)
3266 {
3267         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
3268         struct mlx5e_hairpin_entry *hpe;
3269         u16 peer_vhca_id;
3270         int bkt;
3271
3272         if (!same_hw_devs(priv, peer_priv))
3273                 return;
3274
3275         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
3276
3277         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) {
3278                 if (hpe->peer_vhca_id == peer_vhca_id)
3279                         hpe->hp->pair->peer_gone = true;
3280         }
3281 }
3282
3283 static int mlx5e_tc_netdev_event(struct notifier_block *this,
3284                                  unsigned long event, void *ptr)
3285 {
3286         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
3287         struct mlx5e_flow_steering *fs;
3288         struct mlx5e_priv *peer_priv;
3289         struct mlx5e_tc_table *tc;
3290         struct mlx5e_priv *priv;
3291
3292         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
3293             event != NETDEV_UNREGISTER ||
3294             ndev->reg_state == NETREG_REGISTERED)
3295                 return NOTIFY_DONE;
3296
3297         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
3298         fs = container_of(tc, struct mlx5e_flow_steering, tc);
3299         priv = container_of(fs, struct mlx5e_priv, fs);
3300         peer_priv = netdev_priv(ndev);
3301         if (priv == peer_priv ||
3302             !(priv->netdev->features & NETIF_F_HW_TC))
3303                 return NOTIFY_DONE;
3304
3305         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
3306
3307         return NOTIFY_DONE;
3308 }
3309
3310 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
3311 {
3312         struct mlx5e_tc_table *tc = &priv->fs.tc;
3313         int err;
3314
3315         hash_init(tc->mod_hdr_tbl);
3316         hash_init(tc->hairpin_tbl);
3317
3318         err = rhashtable_init(&tc->ht, &tc_ht_params);
3319         if (err)
3320                 return err;
3321
3322         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
3323         if (register_netdevice_notifier(&tc->netdevice_nb)) {
3324                 tc->netdevice_nb.notifier_call = NULL;
3325                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
3326         }
3327
3328         return err;
3329 }
3330
3331 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
3332 {
3333         struct mlx5e_tc_flow *flow = ptr;
3334         struct mlx5e_priv *priv = flow->priv;
3335
3336         mlx5e_tc_del_flow(priv, flow);
3337         kfree(flow);
3338 }
3339
3340 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
3341 {
3342         struct mlx5e_tc_table *tc = &priv->fs.tc;
3343
3344         if (tc->netdevice_nb.notifier_call)
3345                 unregister_netdevice_notifier(&tc->netdevice_nb);
3346
3347         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
3348
3349         if (!IS_ERR_OR_NULL(tc->t)) {
3350                 mlx5_destroy_flow_table(tc->t);
3351                 tc->t = NULL;
3352         }
3353 }
3354
3355 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
3356 {
3357         return rhashtable_init(tc_ht, &tc_ht_params);
3358 }
3359
3360 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
3361 {
3362         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
3363 }
3364
3365 int mlx5e_tc_num_filters(struct mlx5e_priv *priv)
3366 {
3367         struct rhashtable *tc_ht = get_tc_ht(priv);
3368
3369         return atomic_read(&tc_ht->nelems);
3370 }