2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
41 #define UPLINK_VPORT 0xFFFF
49 /* E-Switch UC L2 table hash node */
51 struct l2addr_node node;
56 /* Vport UC/MC hash node */
58 struct l2addr_node node;
61 struct mlx5_flow_handle *flow_rule; /* SRIOV only */
62 /* A flag indicating that mac was added due to mc promiscuous vport */
67 UC_ADDR_CHANGE = BIT(0),
68 MC_ADDR_CHANGE = BIT(1),
69 PROMISC_CHANGE = BIT(3),
72 /* Vport context events */
73 #define SRIOV_VPORT_EVENTS (UC_ADDR_CHANGE | \
77 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
80 int in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
81 int out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
84 MLX5_SET(modify_nic_vport_context_in, in,
85 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
86 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
87 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
89 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
90 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
91 in, nic_vport_context);
93 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
95 if (events_mask & UC_ADDR_CHANGE)
96 MLX5_SET(nic_vport_context, nic_vport_ctx,
97 event_on_uc_address_change, 1);
98 if (events_mask & MC_ADDR_CHANGE)
99 MLX5_SET(nic_vport_context, nic_vport_ctx,
100 event_on_mc_address_change, 1);
101 if (events_mask & PROMISC_CHANGE)
102 MLX5_SET(nic_vport_context, nic_vport_ctx,
103 event_on_promisc_change, 1);
105 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
108 /* E-Switch vport context HW commands */
109 static int modify_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
112 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
114 MLX5_SET(modify_esw_vport_context_in, in, opcode,
115 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
116 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
118 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
119 return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
122 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
123 u16 vlan, u8 qos, u8 set_flags)
125 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {0};
127 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
128 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
131 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
132 vport, vlan, qos, set_flags);
134 if (set_flags & SET_VLAN_STRIP)
135 MLX5_SET(modify_esw_vport_context_in, in,
136 esw_vport_context.vport_cvlan_strip, 1);
138 if (set_flags & SET_VLAN_INSERT) {
139 /* insert only if no vlan in packet */
140 MLX5_SET(modify_esw_vport_context_in, in,
141 esw_vport_context.vport_cvlan_insert, 1);
143 MLX5_SET(modify_esw_vport_context_in, in,
144 esw_vport_context.cvlan_pcp, qos);
145 MLX5_SET(modify_esw_vport_context_in, in,
146 esw_vport_context.cvlan_id, vlan);
149 MLX5_SET(modify_esw_vport_context_in, in,
150 field_select.vport_cvlan_strip, 1);
151 MLX5_SET(modify_esw_vport_context_in, in,
152 field_select.vport_cvlan_insert, 1);
154 return modify_esw_vport_context_cmd(dev, vport, in, sizeof(in));
157 /* HW L2 Table (MPFS) management */
158 static int set_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index,
159 u8 *mac, u8 vlan_valid, u16 vlan)
161 u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)] = {0};
162 u32 out[MLX5_ST_SZ_DW(set_l2_table_entry_out)] = {0};
165 MLX5_SET(set_l2_table_entry_in, in, opcode,
166 MLX5_CMD_OP_SET_L2_TABLE_ENTRY);
167 MLX5_SET(set_l2_table_entry_in, in, table_index, index);
168 MLX5_SET(set_l2_table_entry_in, in, vlan_valid, vlan_valid);
169 MLX5_SET(set_l2_table_entry_in, in, vlan, vlan);
171 in_mac_addr = MLX5_ADDR_OF(set_l2_table_entry_in, in, mac_address);
172 ether_addr_copy(&in_mac_addr[2], mac);
174 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
177 static int del_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index)
179 u32 in[MLX5_ST_SZ_DW(delete_l2_table_entry_in)] = {0};
180 u32 out[MLX5_ST_SZ_DW(delete_l2_table_entry_out)] = {0};
182 MLX5_SET(delete_l2_table_entry_in, in, opcode,
183 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
184 MLX5_SET(delete_l2_table_entry_in, in, table_index, index);
185 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
188 static int alloc_l2_table_index(struct mlx5_l2_table *l2_table, u32 *ix)
192 *ix = find_first_zero_bit(l2_table->bitmap, l2_table->size);
193 if (*ix >= l2_table->size)
196 __set_bit(*ix, l2_table->bitmap);
201 static void free_l2_table_index(struct mlx5_l2_table *l2_table, u32 ix)
203 __clear_bit(ix, l2_table->bitmap);
206 static int set_l2_table_entry(struct mlx5_core_dev *dev, u8 *mac,
207 u8 vlan_valid, u16 vlan,
210 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
213 err = alloc_l2_table_index(l2_table, index);
217 err = set_l2_table_entry_cmd(dev, *index, mac, vlan_valid, vlan);
219 free_l2_table_index(l2_table, *index);
224 static void del_l2_table_entry(struct mlx5_core_dev *dev, u32 index)
226 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
228 del_l2_table_entry_cmd(dev, index);
229 free_l2_table_index(l2_table, index);
233 static struct mlx5_flow_handle *
234 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u32 vport, bool rx_rule,
235 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
237 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
238 MLX5_MATCH_OUTER_HEADERS);
239 struct mlx5_flow_handle *flow_rule = NULL;
240 struct mlx5_flow_act flow_act = {0};
241 struct mlx5_flow_destination dest;
242 struct mlx5_flow_spec *spec;
243 void *mv_misc = NULL;
244 void *mc_misc = NULL;
249 match_header |= MLX5_MATCH_MISC_PARAMETERS;
251 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
255 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
256 outer_headers.dmac_47_16);
257 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
258 outer_headers.dmac_47_16);
260 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
261 ether_addr_copy(dmac_v, mac_v);
262 ether_addr_copy(dmac_c, mac_c);
265 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
266 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
268 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
270 MLX5_SET(fte_match_set_misc, mv_misc, source_port, UPLINK_VPORT);
271 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
274 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
275 dest.vport_num = vport;
278 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
279 dmac_v, dmac_c, vport);
280 spec->match_criteria_enable = match_header;
281 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
283 mlx5_add_flow_rules(esw->fdb_table.fdb, spec,
284 &flow_act, &dest, 1);
285 if (IS_ERR(flow_rule)) {
287 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
288 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
296 static struct mlx5_flow_handle *
297 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
301 eth_broadcast_addr(mac_c);
302 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
305 static struct mlx5_flow_handle *
306 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u32 vport)
311 eth_zero_addr(mac_c);
312 eth_zero_addr(mac_v);
315 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
318 static struct mlx5_flow_handle *
319 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u32 vport)
324 eth_zero_addr(mac_c);
325 eth_zero_addr(mac_v);
326 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
329 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw, int nvports)
331 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
332 struct mlx5_flow_table_attr ft_attr = {};
333 struct mlx5_core_dev *dev = esw->dev;
334 struct mlx5_flow_namespace *root_ns;
335 struct mlx5_flow_table *fdb;
336 struct mlx5_flow_group *g;
337 void *match_criteria;
343 esw_debug(dev, "Create FDB log_max_size(%d)\n",
344 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
346 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
348 esw_warn(dev, "Failed to get FDB flow namespace\n");
352 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
356 table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
358 ft_attr.max_fte = table_size;
359 fdb = mlx5_create_flow_table(root_ns, &ft_attr);
362 esw_warn(dev, "Failed to create FDB Table err %d\n", err);
365 esw->fdb_table.fdb = fdb;
367 /* Addresses group : Full match unicast/multicast addresses */
368 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
369 MLX5_MATCH_OUTER_HEADERS);
370 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
371 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria, outer_headers.dmac_47_16);
372 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
373 /* Preserve 2 entries for allmulti and promisc rules*/
374 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
375 eth_broadcast_addr(dmac);
376 g = mlx5_create_flow_group(fdb, flow_group_in);
379 esw_warn(dev, "Failed to create flow group err(%d)\n", err);
382 esw->fdb_table.legacy.addr_grp = g;
384 /* Allmulti group : One rule that forwards any mcast traffic */
385 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
386 MLX5_MATCH_OUTER_HEADERS);
387 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 2);
388 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 2);
391 g = mlx5_create_flow_group(fdb, flow_group_in);
394 esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
397 esw->fdb_table.legacy.allmulti_grp = g;
399 /* Promiscuous group :
400 * One rule that forward all unmatched traffic from previous groups
403 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
404 MLX5_MATCH_MISC_PARAMETERS);
405 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
406 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
407 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
408 g = mlx5_create_flow_group(fdb, flow_group_in);
411 esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
414 esw->fdb_table.legacy.promisc_grp = g;
418 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.allmulti_grp)) {
419 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
420 esw->fdb_table.legacy.allmulti_grp = NULL;
422 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.addr_grp)) {
423 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
424 esw->fdb_table.legacy.addr_grp = NULL;
426 if (!IS_ERR_OR_NULL(esw->fdb_table.fdb)) {
427 mlx5_destroy_flow_table(esw->fdb_table.fdb);
428 esw->fdb_table.fdb = NULL;
432 kvfree(flow_group_in);
436 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)
438 if (!esw->fdb_table.fdb)
441 esw_debug(esw->dev, "Destroy FDB Table\n");
442 mlx5_destroy_flow_group(esw->fdb_table.legacy.promisc_grp);
443 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
444 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
445 mlx5_destroy_flow_table(esw->fdb_table.fdb);
446 esw->fdb_table.fdb = NULL;
447 esw->fdb_table.legacy.addr_grp = NULL;
448 esw->fdb_table.legacy.allmulti_grp = NULL;
449 esw->fdb_table.legacy.promisc_grp = NULL;
452 /* E-Switch vport UC/MC lists management */
453 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
454 struct vport_addr *vaddr);
456 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
458 struct hlist_head *hash = esw->l2_table.l2_hash;
459 struct esw_uc_addr *esw_uc;
460 u8 *mac = vaddr->node.addr;
461 u32 vport = vaddr->vport;
464 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
467 "Failed to set L2 mac(%pM) for vport(%d), mac is already in use by vport(%d)\n",
468 mac, vport, esw_uc->vport);
472 esw_uc = l2addr_hash_add(hash, mac, struct esw_uc_addr, GFP_KERNEL);
475 esw_uc->vport = vport;
477 err = set_l2_table_entry(esw->dev, mac, 0, 0, &esw_uc->table_index);
481 /* SRIOV is enabled: Forward UC MAC to vport */
482 if (esw->fdb_table.fdb && esw->mode == SRIOV_LEGACY)
483 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
485 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM index:%d fr(%p)\n",
486 vport, mac, esw_uc->table_index, vaddr->flow_rule);
489 l2addr_hash_del(esw_uc);
493 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
495 struct hlist_head *hash = esw->l2_table.l2_hash;
496 struct esw_uc_addr *esw_uc;
497 u8 *mac = vaddr->node.addr;
498 u32 vport = vaddr->vport;
500 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
501 if (!esw_uc || esw_uc->vport != vport) {
503 "MAC(%pM) doesn't belong to vport (%d)\n",
507 esw_debug(esw->dev, "\tDELETE UC MAC: vport[%d] %pM index:%d fr(%p)\n",
508 vport, mac, esw_uc->table_index, vaddr->flow_rule);
510 del_l2_table_entry(esw->dev, esw_uc->table_index);
512 if (vaddr->flow_rule)
513 mlx5_del_flow_rules(vaddr->flow_rule);
514 vaddr->flow_rule = NULL;
516 l2addr_hash_del(esw_uc);
520 static void update_allmulti_vports(struct mlx5_eswitch *esw,
521 struct vport_addr *vaddr,
522 struct esw_mc_addr *esw_mc)
524 u8 *mac = vaddr->node.addr;
527 for (vport_idx = 0; vport_idx < esw->total_vports; vport_idx++) {
528 struct mlx5_vport *vport = &esw->vports[vport_idx];
529 struct hlist_head *vport_hash = vport->mc_list;
530 struct vport_addr *iter_vaddr =
531 l2addr_hash_find(vport_hash,
534 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
535 vaddr->vport == vport_idx)
537 switch (vaddr->action) {
538 case MLX5_ACTION_ADD:
541 iter_vaddr = l2addr_hash_add(vport_hash, mac,
546 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
550 iter_vaddr->vport = vport_idx;
551 iter_vaddr->flow_rule =
552 esw_fdb_set_vport_rule(esw,
555 iter_vaddr->mc_promisc = true;
557 case MLX5_ACTION_DEL:
560 mlx5_del_flow_rules(iter_vaddr->flow_rule);
561 l2addr_hash_del(iter_vaddr);
567 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
569 struct hlist_head *hash = esw->mc_table;
570 struct esw_mc_addr *esw_mc;
571 u8 *mac = vaddr->node.addr;
572 u32 vport = vaddr->vport;
574 if (!esw->fdb_table.fdb)
577 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
581 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
585 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
586 esw_fdb_set_vport_rule(esw, mac, UPLINK_VPORT);
588 /* Add this multicast mac to all the mc promiscuous vports */
589 update_allmulti_vports(esw, vaddr, esw_mc);
592 /* If the multicast mac is added as a result of mc promiscuous vport,
593 * don't increment the multicast ref count
595 if (!vaddr->mc_promisc)
598 /* Forward MC MAC to vport */
599 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
601 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
602 vport, mac, vaddr->flow_rule,
603 esw_mc->refcnt, esw_mc->uplink_rule);
607 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
609 struct hlist_head *hash = esw->mc_table;
610 struct esw_mc_addr *esw_mc;
611 u8 *mac = vaddr->node.addr;
612 u32 vport = vaddr->vport;
614 if (!esw->fdb_table.fdb)
617 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
620 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
625 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
626 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
627 esw_mc->uplink_rule);
629 if (vaddr->flow_rule)
630 mlx5_del_flow_rules(vaddr->flow_rule);
631 vaddr->flow_rule = NULL;
633 /* If the multicast mac is added as a result of mc promiscuous vport,
634 * don't decrement the multicast ref count.
636 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
639 /* Remove this multicast mac from all the mc promiscuous vports */
640 update_allmulti_vports(esw, vaddr, esw_mc);
642 if (esw_mc->uplink_rule)
643 mlx5_del_flow_rules(esw_mc->uplink_rule);
645 l2addr_hash_del(esw_mc);
649 /* Apply vport UC/MC list to HW l2 table and FDB table */
650 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
651 u32 vport_num, int list_type)
653 struct mlx5_vport *vport = &esw->vports[vport_num];
654 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
655 vport_addr_action vport_addr_add;
656 vport_addr_action vport_addr_del;
657 struct vport_addr *addr;
658 struct l2addr_node *node;
659 struct hlist_head *hash;
660 struct hlist_node *tmp;
663 vport_addr_add = is_uc ? esw_add_uc_addr :
665 vport_addr_del = is_uc ? esw_del_uc_addr :
668 hash = is_uc ? vport->uc_list : vport->mc_list;
669 for_each_l2hash_node(node, tmp, hash, hi) {
670 addr = container_of(node, struct vport_addr, node);
671 switch (addr->action) {
672 case MLX5_ACTION_ADD:
673 vport_addr_add(esw, addr);
674 addr->action = MLX5_ACTION_NONE;
676 case MLX5_ACTION_DEL:
677 vport_addr_del(esw, addr);
678 l2addr_hash_del(addr);
684 /* Sync vport UC/MC list from vport context */
685 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
686 u32 vport_num, int list_type)
688 struct mlx5_vport *vport = &esw->vports[vport_num];
689 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
690 u8 (*mac_list)[ETH_ALEN];
691 struct l2addr_node *node;
692 struct vport_addr *addr;
693 struct hlist_head *hash;
694 struct hlist_node *tmp;
700 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
701 MLX5_MAX_MC_PER_VPORT(esw->dev);
703 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
707 hash = is_uc ? vport->uc_list : vport->mc_list;
709 for_each_l2hash_node(node, tmp, hash, hi) {
710 addr = container_of(node, struct vport_addr, node);
711 addr->action = MLX5_ACTION_DEL;
717 err = mlx5_query_nic_vport_mac_list(esw->dev, vport_num, list_type,
721 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
722 vport_num, is_uc ? "UC" : "MC", size);
724 for (i = 0; i < size; i++) {
725 if (is_uc && !is_valid_ether_addr(mac_list[i]))
728 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
731 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
733 addr->action = MLX5_ACTION_NONE;
734 /* If this mac was previously added because of allmulti
735 * promiscuous rx mode, its now converted to be original
738 if (addr->mc_promisc) {
739 struct esw_mc_addr *esw_mc =
740 l2addr_hash_find(esw->mc_table,
745 "Failed to MAC(%pM) in mcast DB\n",
750 addr->mc_promisc = false;
755 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
759 "Failed to add MAC(%pM) to vport[%d] DB\n",
760 mac_list[i], vport_num);
763 addr->vport = vport_num;
764 addr->action = MLX5_ACTION_ADD;
770 /* Sync vport UC/MC list from vport context
771 * Must be called after esw_update_vport_addr_list
773 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw, u32 vport_num)
775 struct mlx5_vport *vport = &esw->vports[vport_num];
776 struct l2addr_node *node;
777 struct vport_addr *addr;
778 struct hlist_head *hash;
779 struct hlist_node *tmp;
782 hash = vport->mc_list;
784 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
785 u8 *mac = node->addr;
787 addr = l2addr_hash_find(hash, mac, struct vport_addr);
789 if (addr->action == MLX5_ACTION_DEL)
790 addr->action = MLX5_ACTION_NONE;
793 addr = l2addr_hash_add(hash, mac, struct vport_addr,
797 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
801 addr->vport = vport_num;
802 addr->action = MLX5_ACTION_ADD;
803 addr->mc_promisc = true;
807 /* Apply vport rx mode to HW FDB table */
808 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num,
809 bool promisc, bool mc_promisc)
811 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
812 struct mlx5_vport *vport = &esw->vports[vport_num];
814 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
818 vport->allmulti_rule =
819 esw_fdb_set_vport_allmulti_rule(esw, vport_num);
820 if (!allmulti_addr->uplink_rule)
821 allmulti_addr->uplink_rule =
822 esw_fdb_set_vport_allmulti_rule(esw,
824 allmulti_addr->refcnt++;
825 } else if (vport->allmulti_rule) {
826 mlx5_del_flow_rules(vport->allmulti_rule);
827 vport->allmulti_rule = NULL;
829 if (--allmulti_addr->refcnt > 0)
832 if (allmulti_addr->uplink_rule)
833 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
834 allmulti_addr->uplink_rule = NULL;
838 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
842 vport->promisc_rule = esw_fdb_set_vport_promisc_rule(esw,
844 } else if (vport->promisc_rule) {
845 mlx5_del_flow_rules(vport->promisc_rule);
846 vport->promisc_rule = NULL;
850 /* Sync vport rx mode from vport context */
851 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num)
853 struct mlx5_vport *vport = &esw->vports[vport_num];
859 err = mlx5_query_nic_vport_promisc(esw->dev,
866 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
867 vport_num, promisc_all, promisc_mc);
869 if (!vport->info.trusted || !vport->enabled) {
875 esw_apply_vport_rx_mode(esw, vport_num, promisc_all,
876 (promisc_all || promisc_mc));
879 static void esw_vport_change_handle_locked(struct mlx5_vport *vport)
881 struct mlx5_core_dev *dev = vport->dev;
882 struct mlx5_eswitch *esw = dev->priv.eswitch;
885 mlx5_query_nic_vport_mac_address(dev, vport->vport, mac);
886 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
889 if (vport->enabled_events & UC_ADDR_CHANGE) {
890 esw_update_vport_addr_list(esw, vport->vport,
891 MLX5_NVPRT_LIST_TYPE_UC);
892 esw_apply_vport_addr_list(esw, vport->vport,
893 MLX5_NVPRT_LIST_TYPE_UC);
896 if (vport->enabled_events & MC_ADDR_CHANGE) {
897 esw_update_vport_addr_list(esw, vport->vport,
898 MLX5_NVPRT_LIST_TYPE_MC);
901 if (vport->enabled_events & PROMISC_CHANGE) {
902 esw_update_vport_rx_mode(esw, vport->vport);
903 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
904 esw_update_vport_mc_promisc(esw, vport->vport);
907 if (vport->enabled_events & (PROMISC_CHANGE | MC_ADDR_CHANGE)) {
908 esw_apply_vport_addr_list(esw, vport->vport,
909 MLX5_NVPRT_LIST_TYPE_MC);
912 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
914 arm_vport_context_events_cmd(dev, vport->vport,
915 vport->enabled_events);
918 static void esw_vport_change_handler(struct work_struct *work)
920 struct mlx5_vport *vport =
921 container_of(work, struct mlx5_vport, vport_change_handler);
922 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
924 mutex_lock(&esw->state_lock);
925 esw_vport_change_handle_locked(vport);
926 mutex_unlock(&esw->state_lock);
929 static int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
930 struct mlx5_vport *vport)
932 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
933 struct mlx5_flow_group *vlan_grp = NULL;
934 struct mlx5_flow_group *drop_grp = NULL;
935 struct mlx5_core_dev *dev = esw->dev;
936 struct mlx5_flow_namespace *root_ns;
937 struct mlx5_flow_table *acl;
938 void *match_criteria;
940 /* The egress acl table contains 2 rules:
941 * 1)Allow traffic with vlan_tag=vst_vlan_id
942 * 2)Drop all other traffic.
947 if (!MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
950 if (!IS_ERR_OR_NULL(vport->egress.acl))
953 esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
954 vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
956 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
958 esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
962 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
966 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
969 esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
974 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
975 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
976 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
977 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.first_vid);
978 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
979 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
981 vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
982 if (IS_ERR(vlan_grp)) {
983 err = PTR_ERR(vlan_grp);
984 esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
989 memset(flow_group_in, 0, inlen);
990 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
991 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
992 drop_grp = mlx5_create_flow_group(acl, flow_group_in);
993 if (IS_ERR(drop_grp)) {
994 err = PTR_ERR(drop_grp);
995 esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
1000 vport->egress.acl = acl;
1001 vport->egress.drop_grp = drop_grp;
1002 vport->egress.allowed_vlans_grp = vlan_grp;
1004 kvfree(flow_group_in);
1005 if (err && !IS_ERR_OR_NULL(vlan_grp))
1006 mlx5_destroy_flow_group(vlan_grp);
1007 if (err && !IS_ERR_OR_NULL(acl))
1008 mlx5_destroy_flow_table(acl);
1012 static void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
1013 struct mlx5_vport *vport)
1015 if (!IS_ERR_OR_NULL(vport->egress.allowed_vlan))
1016 mlx5_del_flow_rules(vport->egress.allowed_vlan);
1018 if (!IS_ERR_OR_NULL(vport->egress.drop_rule))
1019 mlx5_del_flow_rules(vport->egress.drop_rule);
1021 vport->egress.allowed_vlan = NULL;
1022 vport->egress.drop_rule = NULL;
1025 static void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
1026 struct mlx5_vport *vport)
1028 if (IS_ERR_OR_NULL(vport->egress.acl))
1031 esw_debug(esw->dev, "Destroy vport[%d] E-Switch egress ACL\n", vport->vport);
1033 esw_vport_cleanup_egress_rules(esw, vport);
1034 mlx5_destroy_flow_group(vport->egress.allowed_vlans_grp);
1035 mlx5_destroy_flow_group(vport->egress.drop_grp);
1036 mlx5_destroy_flow_table(vport->egress.acl);
1037 vport->egress.allowed_vlans_grp = NULL;
1038 vport->egress.drop_grp = NULL;
1039 vport->egress.acl = NULL;
1042 static int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
1043 struct mlx5_vport *vport)
1045 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
1046 struct mlx5_core_dev *dev = esw->dev;
1047 struct mlx5_flow_namespace *root_ns;
1048 struct mlx5_flow_table *acl;
1049 struct mlx5_flow_group *g;
1050 void *match_criteria;
1052 /* The ingress acl table contains 4 groups
1053 * (2 active rules at the same time -
1054 * 1 allow rule from one of the first 3 groups.
1055 * 1 drop rule from the last group):
1056 * 1)Allow untagged traffic with smac=original mac.
1057 * 2)Allow untagged traffic.
1058 * 3)Allow traffic with smac=original mac.
1059 * 4)Drop all other traffic.
1064 if (!MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1067 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1070 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
1071 vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
1073 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
1075 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n");
1079 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
1083 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1086 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1090 vport->ingress.acl = acl;
1092 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1094 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1095 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1096 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1097 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1098 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1099 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1101 g = mlx5_create_flow_group(acl, flow_group_in);
1104 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1108 vport->ingress.allow_untagged_spoofchk_grp = g;
1110 memset(flow_group_in, 0, inlen);
1111 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1112 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1113 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1114 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1116 g = mlx5_create_flow_group(acl, flow_group_in);
1119 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1123 vport->ingress.allow_untagged_only_grp = g;
1125 memset(flow_group_in, 0, inlen);
1126 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1127 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1128 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1129 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 2);
1130 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1132 g = mlx5_create_flow_group(acl, flow_group_in);
1135 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1139 vport->ingress.allow_spoofchk_only_grp = g;
1141 memset(flow_group_in, 0, inlen);
1142 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 3);
1143 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1145 g = mlx5_create_flow_group(acl, flow_group_in);
1148 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1152 vport->ingress.drop_grp = g;
1156 if (!IS_ERR_OR_NULL(vport->ingress.allow_spoofchk_only_grp))
1157 mlx5_destroy_flow_group(
1158 vport->ingress.allow_spoofchk_only_grp);
1159 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_only_grp))
1160 mlx5_destroy_flow_group(
1161 vport->ingress.allow_untagged_only_grp);
1162 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_spoofchk_grp))
1163 mlx5_destroy_flow_group(
1164 vport->ingress.allow_untagged_spoofchk_grp);
1165 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1166 mlx5_destroy_flow_table(vport->ingress.acl);
1169 kvfree(flow_group_in);
1173 static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
1174 struct mlx5_vport *vport)
1176 if (!IS_ERR_OR_NULL(vport->ingress.drop_rule))
1177 mlx5_del_flow_rules(vport->ingress.drop_rule);
1179 if (!IS_ERR_OR_NULL(vport->ingress.allow_rule))
1180 mlx5_del_flow_rules(vport->ingress.allow_rule);
1182 vport->ingress.drop_rule = NULL;
1183 vport->ingress.allow_rule = NULL;
1186 static void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
1187 struct mlx5_vport *vport)
1189 if (IS_ERR_OR_NULL(vport->ingress.acl))
1192 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport);
1194 esw_vport_cleanup_ingress_rules(esw, vport);
1195 mlx5_destroy_flow_group(vport->ingress.allow_spoofchk_only_grp);
1196 mlx5_destroy_flow_group(vport->ingress.allow_untagged_only_grp);
1197 mlx5_destroy_flow_group(vport->ingress.allow_untagged_spoofchk_grp);
1198 mlx5_destroy_flow_group(vport->ingress.drop_grp);
1199 mlx5_destroy_flow_table(vport->ingress.acl);
1200 vport->ingress.acl = NULL;
1201 vport->ingress.drop_grp = NULL;
1202 vport->ingress.allow_spoofchk_only_grp = NULL;
1203 vport->ingress.allow_untagged_only_grp = NULL;
1204 vport->ingress.allow_untagged_spoofchk_grp = NULL;
1207 static int esw_vport_ingress_config(struct mlx5_eswitch *esw,
1208 struct mlx5_vport *vport)
1210 struct mlx5_flow_act flow_act = {0};
1211 struct mlx5_flow_spec *spec;
1215 if (vport->info.spoofchk && !is_valid_ether_addr(vport->info.mac)) {
1216 mlx5_core_warn(esw->dev,
1217 "vport[%d] configure ingress rules failed, illegal mac with spoofchk\n",
1223 esw_vport_cleanup_ingress_rules(esw, vport);
1225 if (!vport->info.vlan && !vport->info.qos && !vport->info.spoofchk) {
1226 esw_vport_disable_ingress_acl(esw, vport);
1230 err = esw_vport_enable_ingress_acl(esw, vport);
1232 mlx5_core_warn(esw->dev,
1233 "failed to enable ingress acl (%d) on vport[%d]\n",
1239 "vport[%d] configure ingress rules, vlan(%d) qos(%d)\n",
1240 vport->vport, vport->info.vlan, vport->info.qos);
1242 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
1248 if (vport->info.vlan || vport->info.qos)
1249 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1251 if (vport->info.spoofchk) {
1252 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_47_16);
1253 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_15_0);
1254 smac_v = MLX5_ADDR_OF(fte_match_param,
1256 outer_headers.smac_47_16);
1257 ether_addr_copy(smac_v, vport->info.mac);
1260 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1261 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1262 vport->ingress.allow_rule =
1263 mlx5_add_flow_rules(vport->ingress.acl, spec,
1264 &flow_act, NULL, 0);
1265 if (IS_ERR(vport->ingress.allow_rule)) {
1266 err = PTR_ERR(vport->ingress.allow_rule);
1268 "vport[%d] configure ingress allow rule, err(%d)\n",
1270 vport->ingress.allow_rule = NULL;
1274 memset(spec, 0, sizeof(*spec));
1275 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1276 vport->ingress.drop_rule =
1277 mlx5_add_flow_rules(vport->ingress.acl, spec,
1278 &flow_act, NULL, 0);
1279 if (IS_ERR(vport->ingress.drop_rule)) {
1280 err = PTR_ERR(vport->ingress.drop_rule);
1282 "vport[%d] configure ingress drop rule, err(%d)\n",
1284 vport->ingress.drop_rule = NULL;
1290 esw_vport_cleanup_ingress_rules(esw, vport);
1295 static int esw_vport_egress_config(struct mlx5_eswitch *esw,
1296 struct mlx5_vport *vport)
1298 struct mlx5_flow_act flow_act = {0};
1299 struct mlx5_flow_spec *spec;
1302 esw_vport_cleanup_egress_rules(esw, vport);
1304 if (!vport->info.vlan && !vport->info.qos) {
1305 esw_vport_disable_egress_acl(esw, vport);
1309 err = esw_vport_enable_egress_acl(esw, vport);
1311 mlx5_core_warn(esw->dev,
1312 "failed to enable egress acl (%d) on vport[%d]\n",
1318 "vport[%d] configure egress rules, vlan(%d) qos(%d)\n",
1319 vport->vport, vport->info.vlan, vport->info.qos);
1321 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
1327 /* Allowed vlan rule */
1328 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1329 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.cvlan_tag);
1330 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.first_vid);
1331 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vport->info.vlan);
1333 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1334 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1335 vport->egress.allowed_vlan =
1336 mlx5_add_flow_rules(vport->egress.acl, spec,
1337 &flow_act, NULL, 0);
1338 if (IS_ERR(vport->egress.allowed_vlan)) {
1339 err = PTR_ERR(vport->egress.allowed_vlan);
1341 "vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1343 vport->egress.allowed_vlan = NULL;
1347 /* Drop others rule (star rule) */
1348 memset(spec, 0, sizeof(*spec));
1349 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1350 vport->egress.drop_rule =
1351 mlx5_add_flow_rules(vport->egress.acl, spec,
1352 &flow_act, NULL, 0);
1353 if (IS_ERR(vport->egress.drop_rule)) {
1354 err = PTR_ERR(vport->egress.drop_rule);
1356 "vport[%d] configure egress drop rule failed, err(%d)\n",
1358 vport->egress.drop_rule = NULL;
1365 /* Vport QoS management */
1366 static int esw_create_tsar(struct mlx5_eswitch *esw)
1368 u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1369 struct mlx5_core_dev *dev = esw->dev;
1372 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1375 if (esw->qos.enabled)
1378 err = mlx5_create_scheduling_element_cmd(dev,
1379 SCHEDULING_HIERARCHY_E_SWITCH,
1381 &esw->qos.root_tsar_id);
1383 esw_warn(esw->dev, "E-Switch create TSAR failed (%d)\n", err);
1387 esw->qos.enabled = true;
1391 static void esw_destroy_tsar(struct mlx5_eswitch *esw)
1395 if (!esw->qos.enabled)
1398 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1399 SCHEDULING_HIERARCHY_E_SWITCH,
1400 esw->qos.root_tsar_id);
1402 esw_warn(esw->dev, "E-Switch destroy TSAR failed (%d)\n", err);
1404 esw->qos.enabled = false;
1407 static int esw_vport_enable_qos(struct mlx5_eswitch *esw, int vport_num,
1408 u32 initial_max_rate, u32 initial_bw_share)
1410 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1411 struct mlx5_vport *vport = &esw->vports[vport_num];
1412 struct mlx5_core_dev *dev = esw->dev;
1416 if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) ||
1417 !MLX5_CAP_QOS(dev, esw_scheduling))
1420 if (vport->qos.enabled)
1423 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1424 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1425 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1426 element_attributes);
1427 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1428 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1429 esw->qos.root_tsar_id);
1430 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1432 MLX5_SET(scheduling_context, &sched_ctx, bw_share, initial_bw_share);
1434 err = mlx5_create_scheduling_element_cmd(dev,
1435 SCHEDULING_HIERARCHY_E_SWITCH,
1437 &vport->qos.esw_tsar_ix);
1439 esw_warn(esw->dev, "E-Switch create TSAR vport element failed (vport=%d,err=%d)\n",
1444 vport->qos.enabled = true;
1448 static void esw_vport_disable_qos(struct mlx5_eswitch *esw, int vport_num)
1450 struct mlx5_vport *vport = &esw->vports[vport_num];
1453 if (!vport->qos.enabled)
1456 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1457 SCHEDULING_HIERARCHY_E_SWITCH,
1458 vport->qos.esw_tsar_ix);
1460 esw_warn(esw->dev, "E-Switch destroy TSAR vport element failed (vport=%d,err=%d)\n",
1463 vport->qos.enabled = false;
1466 static int esw_vport_qos_config(struct mlx5_eswitch *esw, int vport_num,
1467 u32 max_rate, u32 bw_share)
1469 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1470 struct mlx5_vport *vport = &esw->vports[vport_num];
1471 struct mlx5_core_dev *dev = esw->dev;
1476 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1479 if (!vport->qos.enabled)
1482 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1483 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1484 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1485 element_attributes);
1486 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1487 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1488 esw->qos.root_tsar_id);
1489 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1491 MLX5_SET(scheduling_context, &sched_ctx, bw_share, bw_share);
1492 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;
1493 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;
1495 err = mlx5_modify_scheduling_element_cmd(dev,
1496 SCHEDULING_HIERARCHY_E_SWITCH,
1498 vport->qos.esw_tsar_ix,
1501 esw_warn(esw->dev, "E-Switch modify TSAR vport element failed (vport=%d,err=%d)\n",
1509 static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
1511 ((u8 *)node_guid)[7] = mac[0];
1512 ((u8 *)node_guid)[6] = mac[1];
1513 ((u8 *)node_guid)[5] = mac[2];
1514 ((u8 *)node_guid)[4] = 0xff;
1515 ((u8 *)node_guid)[3] = 0xfe;
1516 ((u8 *)node_guid)[2] = mac[3];
1517 ((u8 *)node_guid)[1] = mac[4];
1518 ((u8 *)node_guid)[0] = mac[5];
1521 static void esw_apply_vport_conf(struct mlx5_eswitch *esw,
1522 struct mlx5_vport *vport)
1524 int vport_num = vport->vport;
1529 mlx5_modify_vport_admin_state(esw->dev,
1530 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1532 vport->info.link_state);
1533 mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, vport->info.mac);
1534 mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, vport->info.node_guid);
1535 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan, vport->info.qos,
1536 (vport->info.vlan || vport->info.qos));
1538 /* Only legacy mode needs ACLs */
1539 if (esw->mode == SRIOV_LEGACY) {
1540 esw_vport_ingress_config(esw, vport);
1541 esw_vport_egress_config(esw, vport);
1545 static void esw_enable_vport(struct mlx5_eswitch *esw, int vport_num,
1548 struct mlx5_vport *vport = &esw->vports[vport_num];
1550 mutex_lock(&esw->state_lock);
1551 WARN_ON(vport->enabled);
1553 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
1555 /* Restore old vport configuration */
1556 esw_apply_vport_conf(esw, vport);
1558 /* Attach vport to the eswitch rate limiter */
1559 if (esw_vport_enable_qos(esw, vport_num, vport->info.max_rate,
1560 vport->qos.bw_share))
1561 esw_warn(esw->dev, "Failed to attach vport %d to eswitch rate limiter", vport_num);
1563 /* Sync with current vport context */
1564 vport->enabled_events = enable_events;
1565 vport->enabled = true;
1567 /* only PF is trusted by default */
1569 vport->info.trusted = true;
1571 esw_vport_change_handle_locked(vport);
1573 esw->enabled_vports++;
1574 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
1575 mutex_unlock(&esw->state_lock);
1578 static void esw_disable_vport(struct mlx5_eswitch *esw, int vport_num)
1580 struct mlx5_vport *vport = &esw->vports[vport_num];
1582 if (!vport->enabled)
1585 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
1586 /* Mark this vport as disabled to discard new events */
1587 vport->enabled = false;
1589 synchronize_irq(mlx5_get_msix_vec(esw->dev, MLX5_EQ_VEC_ASYNC));
1590 /* Wait for current already scheduled events to complete */
1591 flush_workqueue(esw->work_queue);
1592 /* Disable events from this vport */
1593 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
1594 mutex_lock(&esw->state_lock);
1595 /* We don't assume VFs will cleanup after themselves.
1596 * Calling vport change handler while vport is disabled will cleanup
1597 * the vport resources.
1599 esw_vport_change_handle_locked(vport);
1600 vport->enabled_events = 0;
1601 esw_vport_disable_qos(esw, vport_num);
1602 if (vport_num && esw->mode == SRIOV_LEGACY) {
1603 mlx5_modify_vport_admin_state(esw->dev,
1604 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1606 MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
1607 esw_vport_disable_egress_acl(esw, vport);
1608 esw_vport_disable_ingress_acl(esw, vport);
1610 esw->enabled_vports--;
1611 mutex_unlock(&esw->state_lock);
1614 /* Public E-Switch API */
1615 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
1618 int i, enabled_events;
1620 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1621 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1624 if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
1625 !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1626 esw_warn(esw->dev, "E-Switch FDB is not supported, aborting ...\n");
1630 if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
1631 esw_warn(esw->dev, "E-Switch ingress ACL is not supported by FW\n");
1633 if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
1634 esw_warn(esw->dev, "E-Switch engress ACL is not supported by FW\n");
1636 esw_info(esw->dev, "E-Switch enable SRIOV: nvfs(%d) mode (%d)\n", nvfs, mode);
1638 esw_disable_vport(esw, 0);
1640 if (mode == SRIOV_LEGACY)
1641 err = esw_create_legacy_fdb_table(esw, nvfs + 1);
1643 err = esw_offloads_init(esw, nvfs + 1);
1647 err = esw_create_tsar(esw);
1649 esw_warn(esw->dev, "Failed to create eswitch TSAR");
1651 enabled_events = (mode == SRIOV_LEGACY) ? SRIOV_VPORT_EVENTS : UC_ADDR_CHANGE;
1652 for (i = 0; i <= nvfs; i++)
1653 esw_enable_vport(esw, i, enabled_events);
1655 esw_info(esw->dev, "SRIOV enabled: active vports(%d)\n",
1656 esw->enabled_vports);
1660 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1661 esw->mode = SRIOV_NONE;
1665 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw)
1667 struct esw_mc_addr *mc_promisc;
1671 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1672 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1675 esw_info(esw->dev, "disable SRIOV: active vports(%d) mode(%d)\n",
1676 esw->enabled_vports, esw->mode);
1678 mc_promisc = &esw->mc_promisc;
1679 nvports = esw->enabled_vports;
1681 for (i = 0; i < esw->total_vports; i++)
1682 esw_disable_vport(esw, i);
1684 if (mc_promisc && mc_promisc->uplink_rule)
1685 mlx5_del_flow_rules(mc_promisc->uplink_rule);
1687 esw_destroy_tsar(esw);
1689 if (esw->mode == SRIOV_LEGACY)
1690 esw_destroy_legacy_fdb_table(esw);
1691 else if (esw->mode == SRIOV_OFFLOADS)
1692 esw_offloads_cleanup(esw, nvports);
1694 esw->mode = SRIOV_NONE;
1695 /* VPORT 0 (PF) must be enabled back with non-sriov configuration */
1696 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1699 void mlx5_eswitch_attach(struct mlx5_eswitch *esw)
1701 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1702 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1705 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1706 /* VF Vports will be enabled when SRIOV is enabled */
1709 void mlx5_eswitch_detach(struct mlx5_eswitch *esw)
1711 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1712 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1715 esw_disable_vport(esw, 0);
1718 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1720 int l2_table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table);
1721 int total_vports = MLX5_TOTAL_VPORTS(dev);
1722 struct mlx5_eswitch *esw;
1726 if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
1727 MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1731 "Total vports %d, l2 table size(%d), per vport: max uc(%d) max mc(%d)\n",
1732 total_vports, l2_table_size,
1733 MLX5_MAX_UC_PER_VPORT(dev),
1734 MLX5_MAX_MC_PER_VPORT(dev));
1736 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1742 esw->l2_table.bitmap = kcalloc(BITS_TO_LONGS(l2_table_size),
1743 sizeof(uintptr_t), GFP_KERNEL);
1744 if (!esw->l2_table.bitmap) {
1748 esw->l2_table.size = l2_table_size;
1750 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1751 if (!esw->work_queue) {
1756 esw->vports = kcalloc(total_vports, sizeof(struct mlx5_vport),
1763 esw->offloads.vport_reps =
1764 kzalloc(total_vports * sizeof(struct mlx5_eswitch_rep),
1766 if (!esw->offloads.vport_reps) {
1771 hash_init(esw->offloads.encap_tbl);
1772 hash_init(esw->offloads.mod_hdr_tbl);
1773 mutex_init(&esw->state_lock);
1775 for (vport_num = 0; vport_num < total_vports; vport_num++) {
1776 struct mlx5_vport *vport = &esw->vports[vport_num];
1778 vport->vport = vport_num;
1779 vport->info.link_state = MLX5_ESW_VPORT_ADMIN_STATE_AUTO;
1781 INIT_WORK(&vport->vport_change_handler,
1782 esw_vport_change_handler);
1785 esw->total_vports = total_vports;
1786 esw->enabled_vports = 0;
1787 esw->mode = SRIOV_NONE;
1788 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1789 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) &&
1790 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
1791 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
1793 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
1795 dev->priv.eswitch = esw;
1798 if (esw->work_queue)
1799 destroy_workqueue(esw->work_queue);
1800 kfree(esw->l2_table.bitmap);
1802 kfree(esw->offloads.vport_reps);
1807 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1809 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1810 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1813 esw_info(esw->dev, "cleanup\n");
1815 esw->dev->priv.eswitch = NULL;
1816 destroy_workqueue(esw->work_queue);
1817 kfree(esw->l2_table.bitmap);
1818 kfree(esw->offloads.vport_reps);
1823 void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe)
1825 struct mlx5_eqe_vport_change *vc_eqe = &eqe->data.vport_change;
1826 u16 vport_num = be16_to_cpu(vc_eqe->vport_num);
1827 struct mlx5_vport *vport;
1830 pr_warn("MLX5 E-Switch: vport %d got an event while eswitch is not initialized\n",
1835 vport = &esw->vports[vport_num];
1837 queue_work(esw->work_queue, &vport->vport_change_handler);
1840 /* Vport Administration */
1841 #define ESW_ALLOWED(esw) \
1842 (esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))
1843 #define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)
1845 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1846 int vport, u8 mac[ETH_ALEN])
1848 struct mlx5_vport *evport;
1852 if (!ESW_ALLOWED(esw))
1854 if (!LEGAL_VPORT(esw, vport) || is_multicast_ether_addr(mac))
1857 mutex_lock(&esw->state_lock);
1858 evport = &esw->vports[vport];
1860 if (evport->info.spoofchk && !is_valid_ether_addr(mac)) {
1861 mlx5_core_warn(esw->dev,
1862 "MAC invalidation is not allowed when spoofchk is on, vport(%d)\n",
1868 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport, mac);
1870 mlx5_core_warn(esw->dev,
1871 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
1876 node_guid_gen_from_mac(&node_guid, mac);
1877 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
1879 mlx5_core_warn(esw->dev,
1880 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
1883 ether_addr_copy(evport->info.mac, mac);
1884 evport->info.node_guid = node_guid;
1885 if (evport->enabled && esw->mode == SRIOV_LEGACY)
1886 err = esw_vport_ingress_config(esw, evport);
1889 mutex_unlock(&esw->state_lock);
1893 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
1894 int vport, int link_state)
1896 struct mlx5_vport *evport;
1899 if (!ESW_ALLOWED(esw))
1901 if (!LEGAL_VPORT(esw, vport))
1904 mutex_lock(&esw->state_lock);
1905 evport = &esw->vports[vport];
1907 err = mlx5_modify_vport_admin_state(esw->dev,
1908 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1911 mlx5_core_warn(esw->dev,
1912 "Failed to set vport %d link state, err = %d",
1917 evport->info.link_state = link_state;
1920 mutex_unlock(&esw->state_lock);
1924 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
1925 int vport, struct ifla_vf_info *ivi)
1927 struct mlx5_vport *evport;
1929 if (!ESW_ALLOWED(esw))
1931 if (!LEGAL_VPORT(esw, vport))
1934 evport = &esw->vports[vport];
1936 memset(ivi, 0, sizeof(*ivi));
1937 ivi->vf = vport - 1;
1939 mutex_lock(&esw->state_lock);
1940 ether_addr_copy(ivi->mac, evport->info.mac);
1941 ivi->linkstate = evport->info.link_state;
1942 ivi->vlan = evport->info.vlan;
1943 ivi->qos = evport->info.qos;
1944 ivi->spoofchk = evport->info.spoofchk;
1945 ivi->trusted = evport->info.trusted;
1946 ivi->min_tx_rate = evport->info.min_rate;
1947 ivi->max_tx_rate = evport->info.max_rate;
1948 mutex_unlock(&esw->state_lock);
1953 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1954 int vport, u16 vlan, u8 qos, u8 set_flags)
1956 struct mlx5_vport *evport;
1959 if (!ESW_ALLOWED(esw))
1961 if (!LEGAL_VPORT(esw, vport) || (vlan > 4095) || (qos > 7))
1964 mutex_lock(&esw->state_lock);
1965 evport = &esw->vports[vport];
1967 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
1971 evport->info.vlan = vlan;
1972 evport->info.qos = qos;
1973 if (evport->enabled && esw->mode == SRIOV_LEGACY) {
1974 err = esw_vport_ingress_config(esw, evport);
1977 err = esw_vport_egress_config(esw, evport);
1981 mutex_unlock(&esw->state_lock);
1985 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1986 int vport, u16 vlan, u8 qos)
1991 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;
1993 return __mlx5_eswitch_set_vport_vlan(esw, vport, vlan, qos, set_flags);
1996 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
1997 int vport, bool spoofchk)
1999 struct mlx5_vport *evport;
2003 if (!ESW_ALLOWED(esw))
2005 if (!LEGAL_VPORT(esw, vport))
2008 mutex_lock(&esw->state_lock);
2009 evport = &esw->vports[vport];
2010 pschk = evport->info.spoofchk;
2011 evport->info.spoofchk = spoofchk;
2012 if (evport->enabled && esw->mode == SRIOV_LEGACY)
2013 err = esw_vport_ingress_config(esw, evport);
2015 evport->info.spoofchk = pschk;
2016 mutex_unlock(&esw->state_lock);
2021 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
2022 int vport, bool setting)
2024 struct mlx5_vport *evport;
2026 if (!ESW_ALLOWED(esw))
2028 if (!LEGAL_VPORT(esw, vport))
2031 mutex_lock(&esw->state_lock);
2032 evport = &esw->vports[vport];
2033 evport->info.trusted = setting;
2034 if (evport->enabled)
2035 esw_vport_change_handle_locked(evport);
2036 mutex_unlock(&esw->state_lock);
2041 static u32 calculate_vports_min_rate_divider(struct mlx5_eswitch *esw)
2043 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2044 struct mlx5_vport *evport;
2045 u32 max_guarantee = 0;
2048 for (i = 0; i <= esw->total_vports; i++) {
2049 evport = &esw->vports[i];
2050 if (!evport->enabled || evport->info.min_rate < max_guarantee)
2052 max_guarantee = evport->info.min_rate;
2055 return max_t(u32, max_guarantee / fw_max_bw_share, 1);
2058 static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider)
2060 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2061 struct mlx5_vport *evport;
2068 for (i = 0; i <= esw->total_vports; i++) {
2069 evport = &esw->vports[i];
2070 if (!evport->enabled)
2072 vport_min_rate = evport->info.min_rate;
2073 vport_max_rate = evport->info.max_rate;
2074 bw_share = MLX5_MIN_BW_SHARE;
2077 bw_share = MLX5_RATE_TO_BW_SHARE(vport_min_rate,
2081 if (bw_share == evport->qos.bw_share)
2084 err = esw_vport_qos_config(esw, i, vport_max_rate,
2087 evport->qos.bw_share = bw_share;
2095 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
2096 u32 max_rate, u32 min_rate)
2098 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2099 bool min_rate_supported = MLX5_CAP_QOS(esw->dev, esw_bw_share) &&
2100 fw_max_bw_share >= MLX5_MIN_BW_SHARE;
2101 bool max_rate_supported = MLX5_CAP_QOS(esw->dev, esw_rate_limit);
2102 struct mlx5_vport *evport;
2103 u32 previous_min_rate;
2107 if (!ESW_ALLOWED(esw))
2109 if (!LEGAL_VPORT(esw, vport))
2111 if ((min_rate && !min_rate_supported) || (max_rate && !max_rate_supported))
2114 mutex_lock(&esw->state_lock);
2115 evport = &esw->vports[vport];
2117 if (min_rate == evport->info.min_rate)
2120 previous_min_rate = evport->info.min_rate;
2121 evport->info.min_rate = min_rate;
2122 divider = calculate_vports_min_rate_divider(esw);
2123 err = normalize_vports_min_rate(esw, divider);
2125 evport->info.min_rate = previous_min_rate;
2130 if (max_rate == evport->info.max_rate)
2133 err = esw_vport_qos_config(esw, vport, max_rate, evport->qos.bw_share);
2135 evport->info.max_rate = max_rate;
2138 mutex_unlock(&esw->state_lock);
2142 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2144 struct ifla_vf_stats *vf_stats)
2146 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2147 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
2151 if (!ESW_ALLOWED(esw))
2153 if (!LEGAL_VPORT(esw, vport))
2156 out = kvzalloc(outlen, GFP_KERNEL);
2160 MLX5_SET(query_vport_counter_in, in, opcode,
2161 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2162 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2163 MLX5_SET(query_vport_counter_in, in, vport_number, vport);
2165 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2167 memset(out, 0, outlen);
2168 err = mlx5_cmd_exec(esw->dev, in, sizeof(in), out, outlen);
2172 #define MLX5_GET_CTR(p, x) \
2173 MLX5_GET64(query_vport_counter_out, p, x)
2175 memset(vf_stats, 0, sizeof(*vf_stats));
2176 vf_stats->rx_packets =
2177 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2178 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2179 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2181 vf_stats->rx_bytes =
2182 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2183 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2184 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2186 vf_stats->tx_packets =
2187 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2188 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2189 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2191 vf_stats->tx_bytes =
2192 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2193 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2194 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2196 vf_stats->multicast =
2197 MLX5_GET_CTR(out, received_eth_multicast.packets);
2199 vf_stats->broadcast =
2200 MLX5_GET_CTR(out, received_eth_broadcast.packets);