2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #ifndef __MLX5_CORE_H__
34 #define __MLX5_CORE_H__
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/sched.h>
39 #include <linux/if_link.h>
40 #include <linux/firmware.h>
42 #define DRIVER_NAME "mlx5_core"
43 #define DRIVER_VERSION "5.0-0"
45 #define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))
47 extern uint mlx5_core_debug_mask;
49 #define mlx5_core_dbg(__dev, format, ...) \
50 dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
51 __func__, __LINE__, current->pid, \
54 #define mlx5_core_dbg_mask(__dev, mask, format, ...) \
56 if ((mask) & mlx5_core_debug_mask) \
57 mlx5_core_dbg(__dev, format, ##__VA_ARGS__); \
60 #define mlx5_core_err(__dev, format, ...) \
61 dev_err(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
62 __func__, __LINE__, current->pid, \
65 #define mlx5_core_warn(__dev, format, ...) \
66 dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
67 __func__, __LINE__, current->pid, \
70 #define mlx5_core_info(__dev, format, ...) \
71 dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)
74 MLX5_CMD_DATA, /* print command payload only */
75 MLX5_CMD_TIME, /* print command execution time */
79 MLX5_DRIVER_STATUS_ABORTED = 0xfe,
80 MLX5_DRIVER_SYND = 0xbadd00de,
83 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
84 int mlx5_query_board_id(struct mlx5_core_dev *dev);
85 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
86 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
87 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
88 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
90 void mlx5_core_page_fault(struct mlx5_core_dev *dev,
91 struct mlx5_pagefault *pfault);
92 void mlx5_port_module_event(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe);
93 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
94 void mlx5_disable_device(struct mlx5_core_dev *dev);
95 void mlx5_recover_device(struct mlx5_core_dev *dev);
96 int mlx5_sriov_init(struct mlx5_core_dev *dev);
97 void mlx5_sriov_cleanup(struct mlx5_core_dev *dev);
98 int mlx5_sriov_attach(struct mlx5_core_dev *dev);
99 void mlx5_sriov_detach(struct mlx5_core_dev *dev);
100 int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
101 bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev);
102 int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
103 int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
104 int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
105 void *context, u32 *element_id);
106 int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
107 void *context, u32 element_id,
109 int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
111 int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
112 u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev);
113 u32 mlx5_get_msix_vec(struct mlx5_core_dev *dev, int vecidx);
114 struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
115 void mlx5_cq_tasklet_cb(unsigned long data);
117 int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,
118 u8 access_reg_group);
119 int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap, u8 feature_group,
120 u8 access_reg_group);
122 void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev);
123 void mlx5_lag_remove(struct mlx5_core_dev *dev);
125 void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
126 void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
127 void mlx5_attach_device(struct mlx5_core_dev *dev);
128 void mlx5_detach_device(struct mlx5_core_dev *dev);
129 bool mlx5_device_registered(struct mlx5_core_dev *dev);
130 int mlx5_register_device(struct mlx5_core_dev *dev);
131 void mlx5_unregister_device(struct mlx5_core_dev *dev);
132 void mlx5_add_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
133 void mlx5_remove_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
134 struct mlx5_core_dev *mlx5_get_next_phys_dev(struct mlx5_core_dev *dev);
135 void mlx5_dev_list_lock(void);
136 void mlx5_dev_list_unlock(void);
137 int mlx5_dev_list_trylock(void);
138 int mlx5_encap_alloc(struct mlx5_core_dev *dev,
143 void mlx5_encap_dealloc(struct mlx5_core_dev *dev, u32 encap_id);
145 int mlx5_modify_header_alloc(struct mlx5_core_dev *dev,
146 u8 namespace, u8 num_actions,
147 void *modify_actions, u32 *modify_header_id);
148 void mlx5_modify_header_dealloc(struct mlx5_core_dev *dev, u32 modify_header_id);
150 bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv);
152 int mlx5_query_mtpps(struct mlx5_core_dev *dev, u32 *mtpps, u32 mtpps_size);
153 int mlx5_set_mtpps(struct mlx5_core_dev *mdev, u32 *mtpps, u32 mtpps_size);
154 int mlx5_query_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 *arm, u8 *mode);
155 int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode);
157 int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw);
159 void mlx5e_init(void);
160 void mlx5e_cleanup(void);
162 static inline int mlx5_lag_is_lacp_owner(struct mlx5_core_dev *dev)
164 /* LACP owner conditions:
165 * 1) Function is physical.
166 * 2) LAG is supported by FW.
167 * 3) LAG is managed by driver (currently the only option).
169 return MLX5_CAP_GEN(dev, vport_group_manager) &&
170 (MLX5_CAP_GEN(dev, num_lag_ports) > 1) &&
171 MLX5_CAP_GEN(dev, lag_master);
174 int mlx5_lag_allow(struct mlx5_core_dev *dev);
175 int mlx5_lag_forbid(struct mlx5_core_dev *dev);
177 #endif /* __MLX5_CORE_H__ */