1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <asm/byteorder.h>
24 #include <net/devlink.h>
25 #include <trace/events/devlink.h>
34 #include "resources.h"
36 static LIST_HEAD(mlxsw_core_driver_list);
37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
39 static const char mlxsw_core_driver_name[] = "mlxsw_core";
41 static struct workqueue_struct *mlxsw_wq;
42 static struct workqueue_struct *mlxsw_owq;
44 struct mlxsw_core_port {
45 struct devlink_port devlink_port;
46 void *port_driver_priv;
50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
52 return mlxsw_core_port->port_driver_priv;
54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
58 return mlxsw_core_port->port_driver_priv != NULL;
62 struct mlxsw_driver *driver;
63 const struct mlxsw_bus *bus;
65 const struct mlxsw_bus_info *bus_info;
66 struct workqueue_struct *emad_wq;
67 struct list_head rx_listener_list;
68 struct list_head event_listener_list;
71 struct list_head trans_list;
72 spinlock_t trans_list_lock; /* protects trans_list writes */
76 u8 *mapping; /* lag_id+port_index to local_port mapping */
79 struct mlxsw_hwmon *hwmon;
80 struct mlxsw_thermal *thermal;
81 struct mlxsw_core_port *ports;
82 unsigned int max_ports;
84 bool fw_flash_in_progress;
85 unsigned long driver_priv[0];
86 /* driver_priv has to be always the last item */
89 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40
91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
93 /* Switch ports are numbered from 1 to queried value */
94 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
95 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
98 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
100 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
101 sizeof(struct mlxsw_core_port), GFP_KERNEL);
102 if (!mlxsw_core->ports)
108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
110 kfree(mlxsw_core->ports);
113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
115 return mlxsw_core->max_ports;
117 EXPORT_SYMBOL(mlxsw_core_max_ports);
119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
121 return mlxsw_core->driver_priv;
123 EXPORT_SYMBOL(mlxsw_core_driver_priv);
125 struct mlxsw_rx_listener_item {
126 struct list_head list;
127 struct mlxsw_rx_listener rxl;
131 struct mlxsw_event_listener_item {
132 struct list_head list;
133 struct mlxsw_event_listener el;
142 * Destination MAC in EMAD's Ethernet header.
143 * Must be set to 01:02:c9:00:00:01
145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
148 * Source MAC in EMAD's Ethernet header.
149 * Must be set to 00:02:c9:01:02:03
151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
153 /* emad_eth_hdr_ethertype
154 * Ethertype in EMAD's Ethernet header.
155 * Must be set to 0x8932
157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
159 /* emad_eth_hdr_mlx_proto
161 * Must be set to 0x0.
163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
166 * Mellanox protocol version.
167 * Must be set to 0x0.
169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
173 * Must be set to 0x1 (operation TLV).
175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
178 * Length of the operation TLV in u32.
179 * Must be set to 0x4.
181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
184 * Direct route bit. Setting to 1 indicates the EMAD is a direct route
185 * EMAD. DR TLV must follow.
187 * Note: Currently not supported and must not be set.
189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
191 /* emad_op_tlv_status
192 * Returned status in case of EMAD response. Must be set to 0 in case
195 * 0x1 - device is busy. Requester should retry
196 * 0x2 - Mellanox protocol version not supported
198 * 0x4 - register not supported
199 * 0x5 - operation class not supported
200 * 0x6 - EMAD method not supported
201 * 0x7 - bad parameter (e.g. port out of range)
202 * 0x8 - resource not available
203 * 0x9 - message receipt acknowledgment. Requester should retry
204 * 0x70 - internal error
206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
208 /* emad_op_tlv_register_id
209 * Register ID of register within register TLV.
211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
214 * Response bit. Setting to 1 indicates Response, otherwise request.
216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
218 /* emad_op_tlv_method
222 * 0x3 - send (currently not supported)
225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
228 * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
233 * EMAD transaction ID. Used for pairing request and response EMADs.
235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
239 * Must be set to 0x3 (register TLV).
241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
244 * Length of the operation TLV in u32.
246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
250 * Must be set to 0x0 (end TLV).
252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
255 * Length of the end TLV in u32.
258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
260 enum mlxsw_core_reg_access_type {
261 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
262 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
265 static inline const char *
266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
269 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
271 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
277 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
279 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
280 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
284 const struct mlxsw_reg_info *reg,
287 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
288 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
289 memcpy(reg_tlv + sizeof(u32), payload, reg->len);
292 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
293 const struct mlxsw_reg_info *reg,
294 enum mlxsw_core_reg_access_type type,
297 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
298 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
299 mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
300 mlxsw_emad_op_tlv_status_set(op_tlv, 0);
301 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
302 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
303 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
304 mlxsw_emad_op_tlv_method_set(op_tlv,
305 MLXSW_EMAD_OP_TLV_METHOD_QUERY);
307 mlxsw_emad_op_tlv_method_set(op_tlv,
308 MLXSW_EMAD_OP_TLV_METHOD_WRITE);
309 mlxsw_emad_op_tlv_class_set(op_tlv,
310 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
311 mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
316 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
318 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
319 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
320 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
321 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
322 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
324 skb_reset_mac_header(skb);
329 static void mlxsw_emad_construct(struct sk_buff *skb,
330 const struct mlxsw_reg_info *reg,
332 enum mlxsw_core_reg_access_type type,
337 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
338 mlxsw_emad_pack_end_tlv(buf);
340 buf = skb_push(skb, reg->len + sizeof(u32));
341 mlxsw_emad_pack_reg_tlv(buf, reg, payload);
343 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
344 mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
346 mlxsw_emad_construct_eth_hdr(skb);
349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
351 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
356 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
357 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
360 static char *mlxsw_emad_reg_payload(const char *op_tlv)
362 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
369 op_tlv = mlxsw_emad_op_tlv(skb);
370 return mlxsw_emad_op_tlv_tid_get(op_tlv);
373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
377 op_tlv = mlxsw_emad_op_tlv(skb);
378 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
381 static int mlxsw_emad_process_status(char *op_tlv,
382 enum mlxsw_emad_op_tlv_status *p_status)
384 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
387 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
389 case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
390 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
392 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
393 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
394 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
395 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
396 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
397 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
398 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
399 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
406 mlxsw_emad_process_status_skb(struct sk_buff *skb,
407 enum mlxsw_emad_op_tlv_status *p_status)
409 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
412 struct mlxsw_reg_trans {
413 struct list_head list;
414 struct list_head bulk_list;
415 struct mlxsw_core *core;
416 struct sk_buff *tx_skb;
417 struct mlxsw_tx_info tx_info;
418 struct delayed_work timeout_dw;
419 unsigned int retries;
421 struct completion completion;
423 mlxsw_reg_trans_cb_t *cb;
424 unsigned long cb_priv;
425 const struct mlxsw_reg_info *reg;
426 enum mlxsw_core_reg_access_type type;
428 enum mlxsw_emad_op_tlv_status emad_status;
432 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000
433 #define MLXSW_EMAD_TIMEOUT_MS 200
435 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
437 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
439 if (trans->core->fw_flash_in_progress)
440 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
442 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
445 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
446 struct mlxsw_reg_trans *trans)
451 skb = skb_copy(trans->tx_skb, GFP_KERNEL);
455 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
456 skb->data + mlxsw_core->driver->txhdr_len,
457 skb->len - mlxsw_core->driver->txhdr_len);
459 atomic_set(&trans->active, 1);
460 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
465 mlxsw_emad_trans_timeout_schedule(trans);
469 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
471 struct mlxsw_core *mlxsw_core = trans->core;
473 dev_kfree_skb(trans->tx_skb);
474 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
475 list_del_rcu(&trans->list);
476 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
478 complete(&trans->completion);
481 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
482 struct mlxsw_reg_trans *trans)
486 if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
488 err = mlxsw_emad_transmit(trans->core, trans);
494 mlxsw_emad_trans_finish(trans, err);
497 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
499 struct mlxsw_reg_trans *trans = container_of(work,
500 struct mlxsw_reg_trans,
503 if (!atomic_dec_and_test(&trans->active))
506 mlxsw_emad_transmit_retry(trans->core, trans);
509 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
510 struct mlxsw_reg_trans *trans,
515 if (!atomic_dec_and_test(&trans->active))
518 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
519 if (err == -EAGAIN) {
520 mlxsw_emad_transmit_retry(mlxsw_core, trans);
523 char *op_tlv = mlxsw_emad_op_tlv(skb);
526 trans->cb(mlxsw_core,
527 mlxsw_emad_reg_payload(op_tlv),
528 trans->reg->len, trans->cb_priv);
530 mlxsw_emad_trans_finish(trans, err);
534 /* called with rcu read lock held */
535 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
538 struct mlxsw_core *mlxsw_core = priv;
539 struct mlxsw_reg_trans *trans;
541 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
542 skb->data, skb->len);
544 if (!mlxsw_emad_is_resp(skb))
547 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
548 if (mlxsw_emad_get_tid(skb) == trans->tid) {
549 mlxsw_emad_process_response(mlxsw_core, trans, skb);
558 static const struct mlxsw_listener mlxsw_emad_rx_listener =
559 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
562 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
564 struct workqueue_struct *emad_wq;
568 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
571 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
574 mlxsw_core->emad_wq = emad_wq;
576 /* Set the upper 32 bits of the transaction ID field to a random
577 * number. This allows us to discard EMADs addressed to other
580 get_random_bytes(&tid, 4);
582 atomic64_set(&mlxsw_core->emad.tid, tid);
584 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
585 spin_lock_init(&mlxsw_core->emad.trans_list_lock);
587 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
592 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
594 goto err_emad_trap_set;
595 mlxsw_core->emad.use_emad = true;
600 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
602 destroy_workqueue(mlxsw_core->emad_wq);
606 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
609 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
612 mlxsw_core->emad.use_emad = false;
613 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
615 destroy_workqueue(mlxsw_core->emad_wq);
618 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
624 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
625 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
626 sizeof(u32) + mlxsw_core->driver->txhdr_len);
627 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
630 skb = netdev_alloc_skb(NULL, emad_len);
633 memset(skb->data, 0, emad_len);
634 skb_reserve(skb, emad_len);
639 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
640 const struct mlxsw_reg_info *reg,
642 enum mlxsw_core_reg_access_type type,
643 struct mlxsw_reg_trans *trans,
644 struct list_head *bulk_list,
645 mlxsw_reg_trans_cb_t *cb,
646 unsigned long cb_priv, u64 tid)
651 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
652 tid, reg->id, mlxsw_reg_id_str(reg->id),
653 mlxsw_core_reg_access_type_str(type));
655 skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
659 list_add_tail(&trans->bulk_list, bulk_list);
660 trans->core = mlxsw_core;
662 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
663 trans->tx_info.is_emad = true;
664 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
666 init_completion(&trans->completion);
668 trans->cb_priv = cb_priv;
672 mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
673 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
675 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
676 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
677 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
678 err = mlxsw_emad_transmit(mlxsw_core, trans);
684 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
685 list_del_rcu(&trans->list);
686 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
687 list_del(&trans->bulk_list);
688 dev_kfree_skb(trans->tx_skb);
696 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
698 spin_lock(&mlxsw_core_driver_list_lock);
699 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
700 spin_unlock(&mlxsw_core_driver_list_lock);
703 EXPORT_SYMBOL(mlxsw_core_driver_register);
705 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
707 spin_lock(&mlxsw_core_driver_list_lock);
708 list_del(&mlxsw_driver->list);
709 spin_unlock(&mlxsw_core_driver_list_lock);
711 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
713 static struct mlxsw_driver *__driver_find(const char *kind)
715 struct mlxsw_driver *mlxsw_driver;
717 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
718 if (strcmp(mlxsw_driver->kind, kind) == 0)
724 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
726 struct mlxsw_driver *mlxsw_driver;
728 spin_lock(&mlxsw_core_driver_list_lock);
729 mlxsw_driver = __driver_find(kind);
730 spin_unlock(&mlxsw_core_driver_list_lock);
734 static int mlxsw_devlink_port_split(struct devlink *devlink,
735 unsigned int port_index,
737 struct netlink_ext_ack *extack)
739 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
741 if (port_index >= mlxsw_core->max_ports) {
742 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
745 if (!mlxsw_core->driver->port_split)
747 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
751 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
752 unsigned int port_index,
753 struct netlink_ext_ack *extack)
755 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
757 if (port_index >= mlxsw_core->max_ports) {
758 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
761 if (!mlxsw_core->driver->port_unsplit)
763 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
768 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
769 unsigned int sb_index, u16 pool_index,
770 struct devlink_sb_pool_info *pool_info)
772 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
773 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
775 if (!mlxsw_driver->sb_pool_get)
777 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
778 pool_index, pool_info);
782 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
783 unsigned int sb_index, u16 pool_index, u32 size,
784 enum devlink_sb_threshold_type threshold_type,
785 struct netlink_ext_ack *extack)
787 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
788 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
790 if (!mlxsw_driver->sb_pool_set)
792 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
793 pool_index, size, threshold_type);
796 static void *__dl_port(struct devlink_port *devlink_port)
798 return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
801 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
802 enum devlink_port_type port_type)
804 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
805 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
806 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
808 if (!mlxsw_driver->port_type_set)
811 return mlxsw_driver->port_type_set(mlxsw_core,
812 mlxsw_core_port->local_port,
816 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
817 unsigned int sb_index, u16 pool_index,
820 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
821 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
822 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
824 if (!mlxsw_driver->sb_port_pool_get ||
825 !mlxsw_core_port_check(mlxsw_core_port))
827 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
828 pool_index, p_threshold);
831 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
832 unsigned int sb_index, u16 pool_index,
834 struct netlink_ext_ack *extack)
836 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
837 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
838 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
840 if (!mlxsw_driver->sb_port_pool_set ||
841 !mlxsw_core_port_check(mlxsw_core_port))
843 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
844 pool_index, threshold);
848 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
849 unsigned int sb_index, u16 tc_index,
850 enum devlink_sb_pool_type pool_type,
851 u16 *p_pool_index, u32 *p_threshold)
853 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
854 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
855 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
857 if (!mlxsw_driver->sb_tc_pool_bind_get ||
858 !mlxsw_core_port_check(mlxsw_core_port))
860 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
862 p_pool_index, p_threshold);
866 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
867 unsigned int sb_index, u16 tc_index,
868 enum devlink_sb_pool_type pool_type,
869 u16 pool_index, u32 threshold,
870 struct netlink_ext_ack *extack)
872 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
873 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
874 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
876 if (!mlxsw_driver->sb_tc_pool_bind_set ||
877 !mlxsw_core_port_check(mlxsw_core_port))
879 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
881 pool_index, threshold);
884 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
885 unsigned int sb_index)
887 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
888 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
890 if (!mlxsw_driver->sb_occ_snapshot)
892 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
895 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
896 unsigned int sb_index)
898 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
899 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
901 if (!mlxsw_driver->sb_occ_max_clear)
903 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
907 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
908 unsigned int sb_index, u16 pool_index,
909 u32 *p_cur, u32 *p_max)
911 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
912 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
913 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
915 if (!mlxsw_driver->sb_occ_port_pool_get ||
916 !mlxsw_core_port_check(mlxsw_core_port))
918 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
919 pool_index, p_cur, p_max);
923 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
924 unsigned int sb_index, u16 tc_index,
925 enum devlink_sb_pool_type pool_type,
926 u32 *p_cur, u32 *p_max)
928 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
929 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
930 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
932 if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
933 !mlxsw_core_port_check(mlxsw_core_port))
935 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
937 pool_type, p_cur, p_max);
941 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
942 struct netlink_ext_ack *extack)
944 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
945 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
946 u32 hw_rev, fw_major, fw_minor, fw_sub_minor;
947 char mgir_pl[MLXSW_REG_MGIR_LEN];
951 err = devlink_info_driver_name_put(req,
952 mlxsw_core->bus_info->device_kind);
956 mlxsw_reg_mgir_pack(mgir_pl);
957 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl);
960 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major,
961 &fw_minor, &fw_sub_minor);
963 sprintf(buf, "%X", hw_rev);
964 err = devlink_info_version_fixed_put(req, "hw.revision", buf);
968 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid);
972 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor);
973 err = devlink_info_version_running_put(req, "fw.version", buf);
980 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink,
981 struct netlink_ext_ack *extack)
983 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
986 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
989 mlxsw_core_bus_device_unregister(mlxsw_core, true);
990 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
992 mlxsw_core->bus_priv, true,
994 mlxsw_core->reload_fail = !!err;
999 static const struct devlink_ops mlxsw_devlink_ops = {
1000 .reload = mlxsw_devlink_core_bus_device_reload,
1001 .port_type_set = mlxsw_devlink_port_type_set,
1002 .port_split = mlxsw_devlink_port_split,
1003 .port_unsplit = mlxsw_devlink_port_unsplit,
1004 .sb_pool_get = mlxsw_devlink_sb_pool_get,
1005 .sb_pool_set = mlxsw_devlink_sb_pool_set,
1006 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get,
1007 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set,
1008 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get,
1009 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set,
1010 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot,
1011 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear,
1012 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get,
1013 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get,
1014 .info_get = mlxsw_devlink_info_get,
1018 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1019 const struct mlxsw_bus *mlxsw_bus,
1020 void *bus_priv, bool reload,
1021 struct devlink *devlink)
1023 const char *device_kind = mlxsw_bus_info->device_kind;
1024 struct mlxsw_core *mlxsw_core;
1025 struct mlxsw_driver *mlxsw_driver;
1026 struct mlxsw_res *res;
1030 mlxsw_driver = mlxsw_core_driver_get(device_kind);
1035 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1036 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1039 goto err_devlink_alloc;
1043 mlxsw_core = devlink_priv(devlink);
1044 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1045 INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1046 mlxsw_core->driver = mlxsw_driver;
1047 mlxsw_core->bus = mlxsw_bus;
1048 mlxsw_core->bus_priv = bus_priv;
1049 mlxsw_core->bus_info = mlxsw_bus_info;
1051 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1052 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1056 if (mlxsw_driver->resources_register && !reload) {
1057 err = mlxsw_driver->resources_register(mlxsw_core);
1059 goto err_register_resources;
1062 err = mlxsw_ports_init(mlxsw_core);
1064 goto err_ports_init;
1066 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1067 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1068 alloc_size = sizeof(u8) *
1069 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1070 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1071 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1072 if (!mlxsw_core->lag.mapping) {
1074 goto err_alloc_lag_mapping;
1078 err = mlxsw_emad_init(mlxsw_core);
1083 err = devlink_register(devlink, mlxsw_bus_info->dev);
1085 goto err_devlink_register;
1088 if (mlxsw_driver->params_register && !reload) {
1089 err = mlxsw_driver->params_register(mlxsw_core);
1091 goto err_register_params;
1094 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1096 goto err_hwmon_init;
1098 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1099 &mlxsw_core->thermal);
1101 goto err_thermal_init;
1103 if (mlxsw_driver->init) {
1104 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1106 goto err_driver_init;
1109 if (mlxsw_driver->params_register && !reload)
1110 devlink_params_publish(devlink);
1115 mlxsw_thermal_fini(mlxsw_core->thermal);
1117 mlxsw_hwmon_fini(mlxsw_core->hwmon);
1119 if (mlxsw_driver->params_unregister && !reload)
1120 mlxsw_driver->params_unregister(mlxsw_core);
1121 err_register_params:
1123 devlink_unregister(devlink);
1124 err_devlink_register:
1125 mlxsw_emad_fini(mlxsw_core);
1127 kfree(mlxsw_core->lag.mapping);
1128 err_alloc_lag_mapping:
1129 mlxsw_ports_fini(mlxsw_core);
1132 devlink_resources_unregister(devlink, NULL);
1133 err_register_resources:
1134 mlxsw_bus->fini(bus_priv);
1137 devlink_free(devlink);
1142 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1143 const struct mlxsw_bus *mlxsw_bus,
1144 void *bus_priv, bool reload,
1145 struct devlink *devlink)
1147 bool called_again = false;
1151 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
1152 bus_priv, reload, devlink);
1153 /* -EAGAIN is returned in case the FW was updated. FW needs
1154 * a reset, so lets try to call __mlxsw_core_bus_device_register()
1157 if (err == -EAGAIN && !called_again) {
1158 called_again = true;
1164 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1166 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
1169 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1171 if (mlxsw_core->reload_fail) {
1173 /* Only the parts that were not de-initialized in the
1174 * failed reload attempt need to be de-initialized.
1176 goto reload_fail_deinit;
1181 if (mlxsw_core->driver->params_unregister && !reload)
1182 devlink_params_unpublish(devlink);
1183 if (mlxsw_core->driver->fini)
1184 mlxsw_core->driver->fini(mlxsw_core);
1185 mlxsw_thermal_fini(mlxsw_core->thermal);
1186 mlxsw_hwmon_fini(mlxsw_core->hwmon);
1187 if (mlxsw_core->driver->params_unregister && !reload)
1188 mlxsw_core->driver->params_unregister(mlxsw_core);
1190 devlink_unregister(devlink);
1191 mlxsw_emad_fini(mlxsw_core);
1192 kfree(mlxsw_core->lag.mapping);
1193 mlxsw_ports_fini(mlxsw_core);
1195 devlink_resources_unregister(devlink, NULL);
1196 mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1201 if (mlxsw_core->driver->params_unregister)
1202 mlxsw_core->driver->params_unregister(mlxsw_core);
1203 devlink_unregister(devlink);
1204 devlink_resources_unregister(devlink, NULL);
1205 devlink_free(devlink);
1207 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1209 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1210 const struct mlxsw_tx_info *tx_info)
1212 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1215 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1217 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1218 const struct mlxsw_tx_info *tx_info)
1220 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1223 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1225 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1226 const struct mlxsw_rx_listener *rxl_b)
1228 return (rxl_a->func == rxl_b->func &&
1229 rxl_a->local_port == rxl_b->local_port &&
1230 rxl_a->trap_id == rxl_b->trap_id);
1233 static struct mlxsw_rx_listener_item *
1234 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1235 const struct mlxsw_rx_listener *rxl,
1238 struct mlxsw_rx_listener_item *rxl_item;
1240 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1241 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1242 rxl_item->priv == priv)
1248 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1249 const struct mlxsw_rx_listener *rxl,
1252 struct mlxsw_rx_listener_item *rxl_item;
1254 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1257 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1260 rxl_item->rxl = *rxl;
1261 rxl_item->priv = priv;
1263 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1266 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1268 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1269 const struct mlxsw_rx_listener *rxl,
1272 struct mlxsw_rx_listener_item *rxl_item;
1274 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1277 list_del_rcu(&rxl_item->list);
1281 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1283 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1286 struct mlxsw_event_listener_item *event_listener_item = priv;
1287 struct mlxsw_reg_info reg;
1289 char *op_tlv = mlxsw_emad_op_tlv(skb);
1290 char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1292 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1293 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1294 payload = mlxsw_emad_reg_payload(op_tlv);
1295 event_listener_item->el.func(®, payload, event_listener_item->priv);
1299 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1300 const struct mlxsw_event_listener *el_b)
1302 return (el_a->func == el_b->func &&
1303 el_a->trap_id == el_b->trap_id);
1306 static struct mlxsw_event_listener_item *
1307 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1308 const struct mlxsw_event_listener *el,
1311 struct mlxsw_event_listener_item *el_item;
1313 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1314 if (__is_event_listener_equal(&el_item->el, el) &&
1315 el_item->priv == priv)
1321 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1322 const struct mlxsw_event_listener *el,
1326 struct mlxsw_event_listener_item *el_item;
1327 const struct mlxsw_rx_listener rxl = {
1328 .func = mlxsw_core_event_listener_func,
1329 .local_port = MLXSW_PORT_DONT_CARE,
1330 .trap_id = el->trap_id,
1333 el_item = __find_event_listener_item(mlxsw_core, el, priv);
1336 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1340 el_item->priv = priv;
1342 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1344 goto err_rx_listener_register;
1346 /* No reason to save item if we did not manage to register an RX
1349 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1353 err_rx_listener_register:
1357 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1359 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1360 const struct mlxsw_event_listener *el,
1363 struct mlxsw_event_listener_item *el_item;
1364 const struct mlxsw_rx_listener rxl = {
1365 .func = mlxsw_core_event_listener_func,
1366 .local_port = MLXSW_PORT_DONT_CARE,
1367 .trap_id = el->trap_id,
1370 el_item = __find_event_listener_item(mlxsw_core, el, priv);
1373 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1374 list_del(&el_item->list);
1377 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1379 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
1380 const struct mlxsw_listener *listener,
1383 if (listener->is_event)
1384 return mlxsw_core_event_listener_register(mlxsw_core,
1385 &listener->u.event_listener,
1388 return mlxsw_core_rx_listener_register(mlxsw_core,
1389 &listener->u.rx_listener,
1393 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
1394 const struct mlxsw_listener *listener,
1397 if (listener->is_event)
1398 mlxsw_core_event_listener_unregister(mlxsw_core,
1399 &listener->u.event_listener,
1402 mlxsw_core_rx_listener_unregister(mlxsw_core,
1403 &listener->u.rx_listener,
1407 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
1408 const struct mlxsw_listener *listener, void *priv)
1410 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1413 err = mlxsw_core_listener_register(mlxsw_core, listener, priv);
1417 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,
1418 listener->trap_group, listener->is_ctrl);
1419 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1426 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1429 EXPORT_SYMBOL(mlxsw_core_trap_register);
1431 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
1432 const struct mlxsw_listener *listener,
1435 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1437 if (!listener->is_event) {
1438 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,
1439 listener->trap_id, listener->trap_group,
1441 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1444 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1446 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
1448 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1450 return atomic64_inc_return(&mlxsw_core->emad.tid);
1453 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1454 const struct mlxsw_reg_info *reg,
1456 enum mlxsw_core_reg_access_type type,
1457 struct list_head *bulk_list,
1458 mlxsw_reg_trans_cb_t *cb,
1459 unsigned long cb_priv)
1461 u64 tid = mlxsw_core_tid_get(mlxsw_core);
1462 struct mlxsw_reg_trans *trans;
1465 trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1469 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1470 bulk_list, cb, cb_priv, tid);
1478 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1479 const struct mlxsw_reg_info *reg, char *payload,
1480 struct list_head *bulk_list,
1481 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1483 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1484 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1485 bulk_list, cb, cb_priv);
1487 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1489 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1490 const struct mlxsw_reg_info *reg, char *payload,
1491 struct list_head *bulk_list,
1492 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1494 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1495 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1496 bulk_list, cb, cb_priv);
1498 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1500 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1502 struct mlxsw_core *mlxsw_core = trans->core;
1505 wait_for_completion(&trans->completion);
1506 cancel_delayed_work_sync(&trans->timeout_dw);
1510 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1511 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1513 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1514 trans->tid, trans->reg->id,
1515 mlxsw_reg_id_str(trans->reg->id),
1516 mlxsw_core_reg_access_type_str(trans->type),
1518 mlxsw_emad_op_tlv_status_str(trans->emad_status));
1519 trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
1521 mlxsw_emad_op_tlv_status_str(trans->emad_status));
1524 list_del(&trans->bulk_list);
1525 kfree_rcu(trans, rcu);
1529 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1531 struct mlxsw_reg_trans *trans;
1532 struct mlxsw_reg_trans *tmp;
1536 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1537 err = mlxsw_reg_trans_wait(trans);
1538 if (err && sum_err == 0)
1539 sum_err = err; /* first error to be returned */
1543 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1545 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1546 const struct mlxsw_reg_info *reg,
1548 enum mlxsw_core_reg_access_type type)
1550 enum mlxsw_emad_op_tlv_status status;
1553 char *in_mbox, *out_mbox, *tmp;
1555 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1556 reg->id, mlxsw_reg_id_str(reg->id),
1557 mlxsw_core_reg_access_type_str(type));
1559 in_mbox = mlxsw_cmd_mbox_alloc();
1563 out_mbox = mlxsw_cmd_mbox_alloc();
1569 mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1570 mlxsw_core_tid_get(mlxsw_core));
1571 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1572 mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1574 /* There is a special treatment needed for MRSR (reset) register.
1575 * The command interface will return error after the command
1576 * is executed, so tell the lower layer to expect it
1577 * and cope accordingly.
1579 reset_ok = reg->id == MLXSW_REG_MRSR_ID;
1583 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
1585 err = mlxsw_emad_process_status(out_mbox, &status);
1587 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1589 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1590 status, mlxsw_emad_op_tlv_status_str(status));
1595 memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1598 mlxsw_cmd_mbox_free(out_mbox);
1600 mlxsw_cmd_mbox_free(in_mbox);
1602 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1603 reg->id, mlxsw_reg_id_str(reg->id),
1604 mlxsw_core_reg_access_type_str(type));
1608 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1609 char *payload, size_t payload_len,
1610 unsigned long cb_priv)
1612 char *orig_payload = (char *) cb_priv;
1614 memcpy(orig_payload, payload, payload_len);
1617 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1618 const struct mlxsw_reg_info *reg,
1620 enum mlxsw_core_reg_access_type type)
1622 LIST_HEAD(bulk_list);
1625 /* During initialization EMAD interface is not available to us,
1626 * so we default to command interface. We switch to EMAD interface
1627 * after setting the appropriate traps.
1629 if (!mlxsw_core->emad.use_emad)
1630 return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1633 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1634 payload, type, &bulk_list,
1635 mlxsw_core_reg_access_cb,
1636 (unsigned long) payload);
1639 return mlxsw_reg_trans_bulk_wait(&bulk_list);
1642 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1643 const struct mlxsw_reg_info *reg, char *payload)
1645 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1646 MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1648 EXPORT_SYMBOL(mlxsw_reg_query);
1650 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1651 const struct mlxsw_reg_info *reg, char *payload)
1653 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1654 MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1656 EXPORT_SYMBOL(mlxsw_reg_write);
1658 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1659 struct mlxsw_rx_info *rx_info)
1661 struct mlxsw_rx_listener_item *rxl_item;
1662 const struct mlxsw_rx_listener *rxl;
1666 if (rx_info->is_lag) {
1667 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1668 __func__, rx_info->u.lag_id,
1670 /* Upper layer does not care if the skb came from LAG or not,
1671 * so just get the local_port for the lag port and push it up.
1673 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1675 rx_info->lag_port_index);
1677 local_port = rx_info->u.sys_port;
1680 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1681 __func__, local_port, rx_info->trap_id);
1683 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1684 (local_port >= mlxsw_core->max_ports))
1688 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1689 rxl = &rxl_item->rxl;
1690 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1691 rxl->local_port == local_port) &&
1692 rxl->trap_id == rx_info->trap_id) {
1701 rxl->func(skb, local_port, rxl_item->priv);
1707 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1709 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1710 u16 lag_id, u8 port_index)
1712 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
1716 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1717 u16 lag_id, u8 port_index, u8 local_port)
1719 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1720 lag_id, port_index);
1722 mlxsw_core->lag.mapping[index] = local_port;
1724 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1726 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1727 u16 lag_id, u8 port_index)
1729 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1730 lag_id, port_index);
1732 return mlxsw_core->lag.mapping[index];
1734 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1736 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1737 u16 lag_id, u8 local_port)
1741 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
1742 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1745 if (mlxsw_core->lag.mapping[index] == local_port)
1746 mlxsw_core->lag.mapping[index] = 0;
1749 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1751 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
1752 enum mlxsw_res_id res_id)
1754 return mlxsw_res_valid(&mlxsw_core->res, res_id);
1756 EXPORT_SYMBOL(mlxsw_core_res_valid);
1758 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
1759 enum mlxsw_res_id res_id)
1761 return mlxsw_res_get(&mlxsw_core->res, res_id);
1763 EXPORT_SYMBOL(mlxsw_core_res_get);
1765 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
1766 u32 port_number, bool split,
1767 u32 split_port_subnumber,
1768 const unsigned char *switch_id,
1769 unsigned char switch_id_len)
1771 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1772 struct mlxsw_core_port *mlxsw_core_port =
1773 &mlxsw_core->ports[local_port];
1774 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1777 mlxsw_core_port->local_port = local_port;
1778 devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL,
1779 port_number, split, split_port_subnumber,
1780 switch_id, switch_id_len);
1781 err = devlink_port_register(devlink, devlink_port, local_port);
1783 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1786 EXPORT_SYMBOL(mlxsw_core_port_init);
1788 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
1790 struct mlxsw_core_port *mlxsw_core_port =
1791 &mlxsw_core->ports[local_port];
1792 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1794 devlink_port_unregister(devlink_port);
1795 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1797 EXPORT_SYMBOL(mlxsw_core_port_fini);
1799 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1800 void *port_driver_priv, struct net_device *dev)
1802 struct mlxsw_core_port *mlxsw_core_port =
1803 &mlxsw_core->ports[local_port];
1804 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1806 mlxsw_core_port->port_driver_priv = port_driver_priv;
1807 devlink_port_type_eth_set(devlink_port, dev);
1809 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
1811 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1812 void *port_driver_priv)
1814 struct mlxsw_core_port *mlxsw_core_port =
1815 &mlxsw_core->ports[local_port];
1816 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1818 mlxsw_core_port->port_driver_priv = port_driver_priv;
1819 devlink_port_type_ib_set(devlink_port, NULL);
1821 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
1823 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
1824 void *port_driver_priv)
1826 struct mlxsw_core_port *mlxsw_core_port =
1827 &mlxsw_core->ports[local_port];
1828 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1830 mlxsw_core_port->port_driver_priv = port_driver_priv;
1831 devlink_port_type_clear(devlink_port);
1833 EXPORT_SYMBOL(mlxsw_core_port_clear);
1835 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
1838 struct mlxsw_core_port *mlxsw_core_port =
1839 &mlxsw_core->ports[local_port];
1840 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1842 return devlink_port->type;
1844 EXPORT_SYMBOL(mlxsw_core_port_type_get);
1847 struct devlink_port *
1848 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
1851 struct mlxsw_core_port *mlxsw_core_port =
1852 &mlxsw_core->ports[local_port];
1853 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1855 return devlink_port;
1857 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get);
1859 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1860 const char *buf, size_t size)
1862 __be32 *m = (__be32 *) buf;
1864 int count = size / sizeof(__be32);
1866 for (i = count - 1; i >= 0; i--)
1871 for (i = 0; i < count; i += 4)
1872 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1873 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1874 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1877 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1878 u32 in_mod, bool out_mbox_direct, bool reset_ok,
1879 char *in_mbox, size_t in_mbox_size,
1880 char *out_mbox, size_t out_mbox_size)
1885 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1886 if (!mlxsw_core->bus->cmd_exec)
1889 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1890 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1892 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1893 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1896 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1897 opcode_mod, in_mod, out_mbox_direct,
1898 in_mbox, in_mbox_size,
1899 out_mbox, out_mbox_size, &status);
1901 if (!err && out_mbox) {
1902 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1903 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1906 if (reset_ok && err == -EIO &&
1907 status == MLXSW_CMD_STATUS_RUNNING_RESET) {
1909 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1910 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1911 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1912 in_mod, status, mlxsw_cmd_status_str(status));
1913 } else if (err == -ETIMEDOUT) {
1914 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1915 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1921 EXPORT_SYMBOL(mlxsw_cmd_exec);
1923 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1925 return queue_delayed_work(mlxsw_wq, dwork, delay);
1927 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1929 bool mlxsw_core_schedule_work(struct work_struct *work)
1931 return queue_work(mlxsw_owq, work);
1933 EXPORT_SYMBOL(mlxsw_core_schedule_work);
1935 void mlxsw_core_flush_owq(void)
1937 flush_workqueue(mlxsw_owq);
1939 EXPORT_SYMBOL(mlxsw_core_flush_owq);
1941 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
1942 const struct mlxsw_config_profile *profile,
1943 u64 *p_single_size, u64 *p_double_size,
1946 struct mlxsw_driver *driver = mlxsw_core->driver;
1948 if (!driver->kvd_sizes_get)
1951 return driver->kvd_sizes_get(mlxsw_core, profile,
1952 p_single_size, p_double_size,
1955 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
1957 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core)
1959 mlxsw_core->fw_flash_in_progress = true;
1961 EXPORT_SYMBOL(mlxsw_core_fw_flash_start);
1963 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core)
1965 mlxsw_core->fw_flash_in_progress = false;
1967 EXPORT_SYMBOL(mlxsw_core_fw_flash_end);
1969 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
1970 struct mlxsw_res *res)
1980 mlxsw_cmd_mbox_zero(mbox);
1982 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
1984 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
1988 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
1989 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
1990 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
1992 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
1995 mlxsw_res_parse(res, id, data);
1999 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
2000 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
2004 EXPORT_SYMBOL(mlxsw_core_resources_query);
2006 static int __init mlxsw_core_module_init(void)
2010 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
2013 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
2014 mlxsw_core_driver_name);
2017 goto err_alloc_ordered_workqueue;
2021 err_alloc_ordered_workqueue:
2022 destroy_workqueue(mlxsw_wq);
2026 static void __exit mlxsw_core_module_exit(void)
2028 destroy_workqueue(mlxsw_owq);
2029 destroy_workqueue(mlxsw_wq);
2032 module_init(mlxsw_core_module_init);
2033 module_exit(mlxsw_core_module_exit);
2035 MODULE_LICENSE("Dual BSD/GPL");
2036 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
2037 MODULE_DESCRIPTION("Mellanox switch device core driver");