2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c
3 * Copyright (c) 2016 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2016 Ido Schimmel <idosch@mellanox.com>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the names of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
18 * Alternatively, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") version 2 as published by the Free
20 * Software Foundation.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
35 #include <linux/netdevice.h>
36 #include <linux/string.h>
37 #include <linux/bitops.h>
38 #include <net/dcbnl.h>
43 static u8 mlxsw_sp_dcbnl_getdcbx(struct net_device __always_unused *dev)
45 return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
48 static u8 mlxsw_sp_dcbnl_setdcbx(struct net_device __always_unused *dev,
51 return (mode != (DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE)) ? 1 : 0;
54 static int mlxsw_sp_dcbnl_ieee_getets(struct net_device *dev,
57 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
59 memcpy(ets, mlxsw_sp_port->dcb.ets, sizeof(*ets));
64 static int mlxsw_sp_port_ets_validate(struct mlxsw_sp_port *mlxsw_sp_port,
67 struct net_device *dev = mlxsw_sp_port->dev;
68 bool has_ets_tc = false;
71 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
72 switch (ets->tc_tsa[i]) {
73 case IEEE_8021QAZ_TSA_STRICT:
75 case IEEE_8021QAZ_TSA_ETS:
77 tx_bw_sum += ets->tc_tx_bw[i];
80 netdev_err(dev, "Only strict priority and ETS are supported\n");
84 if (ets->prio_tc[i] >= IEEE_8021QAZ_MAX_TCS) {
85 netdev_err(dev, "Invalid TC\n");
90 if (has_ets_tc && tx_bw_sum != 100) {
91 netdev_err(dev, "Total ETS bandwidth should equal 100\n");
98 static int mlxsw_sp_port_pg_prio_map(struct mlxsw_sp_port *mlxsw_sp_port,
101 char pptb_pl[MLXSW_REG_PPTB_LEN];
104 mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port);
105 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
106 mlxsw_reg_pptb_prio_to_buff_set(pptb_pl, i, prio_tc[i]);
107 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb),
111 static bool mlxsw_sp_ets_has_pg(u8 *prio_tc, u8 pg)
115 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
116 if (prio_tc[i] == pg)
121 static int mlxsw_sp_port_pg_destroy(struct mlxsw_sp_port *mlxsw_sp_port,
122 u8 *old_prio_tc, u8 *new_prio_tc)
124 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
125 char pbmc_pl[MLXSW_REG_PBMC_LEN];
128 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
129 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
133 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
134 u8 pg = old_prio_tc[i];
136 if (!mlxsw_sp_ets_has_pg(new_prio_tc, pg))
137 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg, 0);
140 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
143 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
144 struct ieee_ets *ets)
146 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
147 struct ieee_ets *my_ets = mlxsw_sp_port->dcb.ets;
148 struct net_device *dev = mlxsw_sp_port->dev;
151 /* Create the required PGs, but don't destroy existing ones, as
152 * traffic is still directed to them.
154 err = __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu,
155 ets->prio_tc, pause_en,
156 mlxsw_sp_port->dcb.pfc);
158 netdev_err(dev, "Failed to configure port's headroom\n");
162 err = mlxsw_sp_port_pg_prio_map(mlxsw_sp_port, ets->prio_tc);
164 netdev_err(dev, "Failed to set PG-priority mapping\n");
165 goto err_port_prio_pg_map;
168 err = mlxsw_sp_port_pg_destroy(mlxsw_sp_port, my_ets->prio_tc,
171 netdev_warn(dev, "Failed to remove ununsed PGs\n");
175 err_port_prio_pg_map:
176 mlxsw_sp_port_pg_destroy(mlxsw_sp_port, ets->prio_tc, my_ets->prio_tc);
180 static int __mlxsw_sp_dcbnl_ieee_setets(struct mlxsw_sp_port *mlxsw_sp_port,
181 struct ieee_ets *ets)
183 struct ieee_ets *my_ets = mlxsw_sp_port->dcb.ets;
184 struct net_device *dev = mlxsw_sp_port->dev;
187 /* Egress configuration. */
188 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
189 bool dwrr = ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS;
190 u8 weight = ets->tc_tx_bw[i];
192 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
193 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
196 netdev_err(dev, "Failed to link subgroup ETS element %d to group\n",
198 goto err_port_ets_set;
202 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
203 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i,
206 netdev_err(dev, "Failed to map prio %d to TC %d\n", i,
208 goto err_port_prio_tc_set;
212 /* Ingress configuration. */
213 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, ets);
215 goto err_port_headroom_set;
219 err_port_headroom_set:
220 i = IEEE_8021QAZ_MAX_TCS;
221 err_port_prio_tc_set:
222 for (i--; i >= 0; i--)
223 mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, my_ets->prio_tc[i]);
224 i = IEEE_8021QAZ_MAX_TCS;
226 for (i--; i >= 0; i--) {
227 bool dwrr = my_ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS;
228 u8 weight = my_ets->tc_tx_bw[i];
230 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
231 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
237 static int mlxsw_sp_dcbnl_ieee_setets(struct net_device *dev,
238 struct ieee_ets *ets)
240 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
243 err = mlxsw_sp_port_ets_validate(mlxsw_sp_port, ets);
247 err = __mlxsw_sp_dcbnl_ieee_setets(mlxsw_sp_port, ets);
251 memcpy(mlxsw_sp_port->dcb.ets, ets, sizeof(*ets));
256 static int mlxsw_sp_dcbnl_ieee_getmaxrate(struct net_device *dev,
257 struct ieee_maxrate *maxrate)
259 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
261 memcpy(maxrate, mlxsw_sp_port->dcb.maxrate, sizeof(*maxrate));
266 static int mlxsw_sp_dcbnl_ieee_setmaxrate(struct net_device *dev,
267 struct ieee_maxrate *maxrate)
269 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
270 struct ieee_maxrate *my_maxrate = mlxsw_sp_port->dcb.maxrate;
273 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
274 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
275 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
277 maxrate->tc_maxrate[i]);
279 netdev_err(dev, "Failed to set maxrate for TC %d\n", i);
280 goto err_port_ets_maxrate_set;
284 memcpy(mlxsw_sp_port->dcb.maxrate, maxrate, sizeof(*maxrate));
288 err_port_ets_maxrate_set:
289 for (i--; i >= 0; i--)
290 mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
291 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
292 i, 0, my_maxrate->tc_maxrate[i]);
296 static int mlxsw_sp_port_pfc_cnt_get(struct mlxsw_sp_port *mlxsw_sp_port,
299 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
300 struct ieee_pfc *my_pfc = mlxsw_sp_port->dcb.pfc;
301 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
304 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port,
305 MLXSW_REG_PPCNT_PRIO_CNT, prio);
306 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
310 my_pfc->requests[prio] = mlxsw_reg_ppcnt_tx_pause_get(ppcnt_pl);
311 my_pfc->indications[prio] = mlxsw_reg_ppcnt_rx_pause_get(ppcnt_pl);
316 static int mlxsw_sp_dcbnl_ieee_getpfc(struct net_device *dev,
317 struct ieee_pfc *pfc)
319 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
322 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
323 err = mlxsw_sp_port_pfc_cnt_get(mlxsw_sp_port, i);
325 netdev_err(dev, "Failed to get PFC count for priority %d\n",
331 memcpy(pfc, mlxsw_sp_port->dcb.pfc, sizeof(*pfc));
336 static int mlxsw_sp_port_pfc_set(struct mlxsw_sp_port *mlxsw_sp_port,
337 struct ieee_pfc *pfc)
339 char pfcc_pl[MLXSW_REG_PFCC_LEN];
341 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
342 mlxsw_reg_pfcc_prio_pack(pfcc_pl, pfc->pfc_en);
344 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
348 static int mlxsw_sp_dcbnl_ieee_setpfc(struct net_device *dev,
349 struct ieee_pfc *pfc)
351 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
354 if (mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause) {
355 netdev_err(dev, "PAUSE frames already enabled on port\n");
359 err = __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu,
360 mlxsw_sp_port->dcb.ets->prio_tc,
363 netdev_err(dev, "Failed to configure port's headroom for PFC\n");
367 err = mlxsw_sp_port_pfc_set(mlxsw_sp_port, pfc);
369 netdev_err(dev, "Failed to configure PFC\n");
370 goto err_port_pfc_set;
373 memcpy(mlxsw_sp_port->dcb.pfc, pfc, sizeof(*pfc));
378 __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu,
379 mlxsw_sp_port->dcb.ets->prio_tc, false,
380 mlxsw_sp_port->dcb.pfc);
384 static const struct dcbnl_rtnl_ops mlxsw_sp_dcbnl_ops = {
385 .ieee_getets = mlxsw_sp_dcbnl_ieee_getets,
386 .ieee_setets = mlxsw_sp_dcbnl_ieee_setets,
387 .ieee_getmaxrate = mlxsw_sp_dcbnl_ieee_getmaxrate,
388 .ieee_setmaxrate = mlxsw_sp_dcbnl_ieee_setmaxrate,
389 .ieee_getpfc = mlxsw_sp_dcbnl_ieee_getpfc,
390 .ieee_setpfc = mlxsw_sp_dcbnl_ieee_setpfc,
392 .getdcbx = mlxsw_sp_dcbnl_getdcbx,
393 .setdcbx = mlxsw_sp_dcbnl_setdcbx,
396 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
398 mlxsw_sp_port->dcb.ets = kzalloc(sizeof(*mlxsw_sp_port->dcb.ets),
400 if (!mlxsw_sp_port->dcb.ets)
403 mlxsw_sp_port->dcb.ets->ets_cap = IEEE_8021QAZ_MAX_TCS;
408 static void mlxsw_sp_port_ets_fini(struct mlxsw_sp_port *mlxsw_sp_port)
410 kfree(mlxsw_sp_port->dcb.ets);
413 static int mlxsw_sp_port_maxrate_init(struct mlxsw_sp_port *mlxsw_sp_port)
417 mlxsw_sp_port->dcb.maxrate = kmalloc(sizeof(*mlxsw_sp_port->dcb.maxrate),
419 if (!mlxsw_sp_port->dcb.maxrate)
422 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
423 mlxsw_sp_port->dcb.maxrate->tc_maxrate[i] = MLXSW_REG_QEEC_MAS_DIS;
428 static void mlxsw_sp_port_maxrate_fini(struct mlxsw_sp_port *mlxsw_sp_port)
430 kfree(mlxsw_sp_port->dcb.maxrate);
433 static int mlxsw_sp_port_pfc_init(struct mlxsw_sp_port *mlxsw_sp_port)
435 mlxsw_sp_port->dcb.pfc = kzalloc(sizeof(*mlxsw_sp_port->dcb.pfc),
437 if (!mlxsw_sp_port->dcb.pfc)
440 mlxsw_sp_port->dcb.pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS;
445 static void mlxsw_sp_port_pfc_fini(struct mlxsw_sp_port *mlxsw_sp_port)
447 kfree(mlxsw_sp_port->dcb.pfc);
450 int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
454 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
457 err = mlxsw_sp_port_maxrate_init(mlxsw_sp_port);
459 goto err_port_maxrate_init;
460 err = mlxsw_sp_port_pfc_init(mlxsw_sp_port);
462 goto err_port_pfc_init;
464 mlxsw_sp_port->dev->dcbnl_ops = &mlxsw_sp_dcbnl_ops;
469 mlxsw_sp_port_maxrate_fini(mlxsw_sp_port);
470 err_port_maxrate_init:
471 mlxsw_sp_port_ets_fini(mlxsw_sp_port);
475 void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
477 mlxsw_sp_port_pfc_fini(mlxsw_sp_port);
478 mlxsw_sp_port_maxrate_fini(mlxsw_sp_port);
479 mlxsw_sp_port_ets_fini(mlxsw_sp_port);