1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/net/ethernet/micrel/ks8851_mll.c
4 * Copyright (c) 2009 Micrel Inc.
8 * KS8851 16bit MLL chip from Micrel Inc.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/cache.h>
20 #include <linux/crc32.h>
21 #include <linux/crc32poly.h>
22 #include <linux/mii.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/slab.h>
26 #include <linux/ks8851_mll.h>
28 #include <linux/of_device.h>
29 #include <linux/of_net.h>
33 #define DRV_NAME "ks8851_mll"
35 static u8 KS_DEFAULT_MAC_ADDRESS[] = { 0x00, 0x10, 0xA1, 0x86, 0x95, 0x11 };
36 #define MAX_RECV_FRAMES 255
37 #define MAX_BUF_SIZE 2048
38 #define TX_BUF_SIZE 2000
39 #define RX_BUF_SIZE 2000
41 #define RXCR1_FILTER_MASK (RXCR1_RXINVF | RXCR1_RXAE | \
42 RXCR1_RXMAFMA | RXCR1_RXPAFMA)
43 #define RXQCR_CMD_CNTL (RXQCR_RXFCTE|RXQCR_ADRFE)
45 #define ENUM_BUS_NONE 0
46 #define ENUM_BUS_8BIT 1
47 #define ENUM_BUS_16BIT 2
48 #define ENUM_BUS_32BIT 3
50 #define MAX_MCAST_LST 32
51 #define HW_MCAST_SIZE 8
54 * union ks_tx_hdr - tx header data
55 * @txb: The header as bytes
56 * @txw: The header as 16bit, little-endian words
58 * A dual representation of the tx header data to allow
59 * access to individual bytes, and to allow 16bit accesses
60 * with 16bit alignment.
68 * struct ks_net - KS8851 driver private data
69 * @net_device : The network device we're bound to
70 * @hw_addr : start address of data register.
71 * @hw_addr_cmd : start address of command register.
72 * @txh : temporaly buffer to save status/length.
73 * @lock : Lock to ensure that the device is not accessed when busy.
74 * @pdev : Pointer to platform device.
75 * @mii : The MII state information for the mii calls.
76 * @frame_head_info : frame header information for multi-pkt rx.
77 * @statelock : Lock on this structure for tx list.
78 * @msg_enable : The message flags controlling driver output (see ethtool).
79 * @frame_cnt : number of frames received.
80 * @bus_width : i/o bus width.
81 * @rc_rxqcr : Cached copy of KS_RXQCR.
82 * @rc_txcr : Cached copy of KS_TXCR.
83 * @rc_ier : Cached copy of KS_IER.
84 * @sharedbus : Multipex(addr and data bus) mode indicator.
85 * @cmd_reg_cache : command register cached.
86 * @cmd_reg_cache_int : command register cached. Used in the irq handler.
87 * @promiscuous : promiscuous mode indicator.
88 * @all_mcast : mutlicast indicator.
89 * @mcast_lst_size : size of multicast list.
90 * @mcast_lst : multicast list.
91 * @mcast_bits : multicast enabed.
92 * @mac_addr : MAC address assigned to this device.
94 * @extra_byte : number of extra byte prepended rx pkt.
95 * @enabled : indicator this device works.
97 * The @lock ensures that the chip is protected when certain operations are
98 * in progress. When the read or write packet transfer is in progress, most
99 * of the chip registers are not accessible until the transfer is finished and
100 * the DMA has been de-asserted.
102 * The @statelock is used to protect information in the structure which may
103 * need to be accessed via several sources, such as the network driver layer
104 * or one of the work queues.
108 /* Receive multiplex framer header info */
109 struct type_frame_head {
110 u16 sts; /* Frame status */
111 u16 len; /* Byte count */
115 struct net_device *netdev;
116 void __iomem *hw_addr;
117 void __iomem *hw_addr_cmd;
118 union ks_tx_hdr txh ____cacheline_aligned;
119 struct mutex lock; /* spinlock to be interrupt safe */
120 struct platform_device *pdev;
121 struct mii_if_info mii;
122 struct type_frame_head *frame_head_info;
123 spinlock_t statelock;
133 u16 cmd_reg_cache_int;
137 u8 mcast_lst[MAX_MCAST_LST][ETH_ALEN];
138 u8 mcast_bits[HW_MCAST_SIZE];
145 static int msg_enable;
147 #define BE3 0x8000 /* Byte Enable 3 */
148 #define BE2 0x4000 /* Byte Enable 2 */
149 #define BE1 0x2000 /* Byte Enable 1 */
150 #define BE0 0x1000 /* Byte Enable 0 */
152 /* register read/write calls.
154 * All these calls issue transactions to access the chip's registers. They
155 * all require that the necessary lock is held to prevent accesses when the
156 * chip is busy transferring packet data (RX/TX FIFO accesses).
160 * ks_rdreg16 - read 16 bit register from device
161 * @ks : The chip information
162 * @offset: The register address
164 * Read a 16bit register from the chip, returning the result
167 static u16 ks_rdreg16(struct ks_net *ks, int offset)
169 ks->cmd_reg_cache = (u16)offset | ((BE3 | BE2) >> (offset & 0x02));
170 iowrite16(ks->cmd_reg_cache, ks->hw_addr_cmd);
171 return ioread16(ks->hw_addr);
175 * ks_wrreg16 - write 16bit register value to chip
176 * @ks: The chip information
177 * @offset: The register address
178 * @value: The value to write
182 static void ks_wrreg16(struct ks_net *ks, int offset, u16 value)
184 ks->cmd_reg_cache = (u16)offset | ((BE3 | BE2) >> (offset & 0x02));
185 iowrite16(ks->cmd_reg_cache, ks->hw_addr_cmd);
186 iowrite16(value, ks->hw_addr);
190 * ks_inblk - read a block of data from QMU. This is called after sudo DMA mode enabled.
191 * @ks: The chip state
192 * @wptr: buffer address to save data
193 * @len: length in byte to read
196 static inline void ks_inblk(struct ks_net *ks, u16 *wptr, u32 len)
200 *wptr++ = be16_to_cpu(ioread16(ks->hw_addr));
204 * ks_outblk - write data to QMU. This is called after sudo DMA mode enabled.
205 * @ks: The chip information
206 * @wptr: buffer address
207 * @len: length in byte to write
210 static inline void ks_outblk(struct ks_net *ks, u16 *wptr, u32 len)
214 iowrite16(cpu_to_be16(*wptr++), ks->hw_addr);
217 static void ks_disable_int(struct ks_net *ks)
219 ks_wrreg16(ks, KS_IER, 0x0000);
220 } /* ks_disable_int */
222 static void ks_enable_int(struct ks_net *ks)
224 ks_wrreg16(ks, KS_IER, ks->rc_ier);
225 } /* ks_enable_int */
228 * ks_tx_fifo_space - return the available hardware buffer size.
229 * @ks: The chip information
232 static inline u16 ks_tx_fifo_space(struct ks_net *ks)
234 return ks_rdreg16(ks, KS_TXMIR) & 0x1fff;
238 * ks_save_cmd_reg - save the command register from the cache.
239 * @ks: The chip information
242 static inline void ks_save_cmd_reg(struct ks_net *ks)
244 /*ks8851 MLL has a bug to read back the command register.
245 * So rely on software to save the content of command register.
247 ks->cmd_reg_cache_int = ks->cmd_reg_cache;
251 * ks_restore_cmd_reg - restore the command register from the cache and
252 * write to hardware register.
253 * @ks: The chip information
256 static inline void ks_restore_cmd_reg(struct ks_net *ks)
258 ks->cmd_reg_cache = ks->cmd_reg_cache_int;
259 iowrite16(ks->cmd_reg_cache, ks->hw_addr_cmd);
263 * ks_set_powermode - set power mode of the device
264 * @ks: The chip information
265 * @pwrmode: The power mode value to write to KS_PMECR.
267 * Change the power mode of the chip.
269 static void ks_set_powermode(struct ks_net *ks, unsigned pwrmode)
273 netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
275 ks_rdreg16(ks, KS_GRR);
276 pmecr = ks_rdreg16(ks, KS_PMECR);
277 pmecr &= ~PMECR_PM_MASK;
280 ks_wrreg16(ks, KS_PMECR, pmecr);
284 * ks_read_config - read chip configuration of bus width.
285 * @ks: The chip information
288 static void ks_read_config(struct ks_net *ks)
292 /* Regardless of bus width, 8 bit read should always work.*/
293 reg_data = ks_rdreg16(ks, KS_CCR);
295 /* addr/data bus are multiplexed */
296 ks->sharedbus = (reg_data & CCR_SHARED) == CCR_SHARED;
298 /* There are garbage data when reading data from QMU,
299 depending on bus-width.
302 if (reg_data & CCR_8BIT) {
303 ks->bus_width = ENUM_BUS_8BIT;
305 } else if (reg_data & CCR_16BIT) {
306 ks->bus_width = ENUM_BUS_16BIT;
309 ks->bus_width = ENUM_BUS_32BIT;
315 * ks_soft_reset - issue one of the soft reset to the device
316 * @ks: The device state.
317 * @op: The bit(s) to set in the GRR
319 * Issue the relevant soft-reset command to the device's GRR register
322 * Note, the delays are in there as a caution to ensure that the reset
323 * has time to take effect and then complete. Since the datasheet does
324 * not currently specify the exact sequence, we have chosen something
325 * that seems to work with our device.
327 static void ks_soft_reset(struct ks_net *ks, unsigned op)
329 /* Disable interrupt first */
330 ks_wrreg16(ks, KS_IER, 0x0000);
331 ks_wrreg16(ks, KS_GRR, op);
332 mdelay(10); /* wait a short time to effect reset */
333 ks_wrreg16(ks, KS_GRR, 0);
334 mdelay(1); /* wait for condition to clear */
338 static void ks_enable_qmu(struct ks_net *ks)
342 w = ks_rdreg16(ks, KS_TXCR);
343 /* Enables QMU Transmit (TXCR). */
344 ks_wrreg16(ks, KS_TXCR, w | TXCR_TXE);
347 * RX Frame Count Threshold Enable and Auto-Dequeue RXQ Frame
351 w = ks_rdreg16(ks, KS_RXQCR);
352 ks_wrreg16(ks, KS_RXQCR, w | RXQCR_RXFCTE);
354 /* Enables QMU Receive (RXCR1). */
355 w = ks_rdreg16(ks, KS_RXCR1);
356 ks_wrreg16(ks, KS_RXCR1, w | RXCR1_RXE);
358 } /* ks_enable_qmu */
360 static void ks_disable_qmu(struct ks_net *ks)
364 w = ks_rdreg16(ks, KS_TXCR);
366 /* Disables QMU Transmit (TXCR). */
368 ks_wrreg16(ks, KS_TXCR, w);
370 /* Disables QMU Receive (RXCR1). */
371 w = ks_rdreg16(ks, KS_RXCR1);
373 ks_wrreg16(ks, KS_RXCR1, w);
377 } /* ks_disable_qmu */
380 * ks_read_qmu - read 1 pkt data from the QMU.
381 * @ks: The chip information
382 * @buf: buffer address to save 1 pkt
384 * Here is the sequence to read 1 pkt:
385 * 1. set sudo DMA mode
386 * 2. read prepend data
388 * 4. reset sudo DMA Mode
390 static inline void ks_read_qmu(struct ks_net *ks, u16 *buf, u32 len)
392 u32 r = ks->extra_byte & 0x1 ;
393 u32 w = ks->extra_byte - r;
395 /* 1. set sudo DMA mode */
396 ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI);
397 ks_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
399 /* 2. read prepend data */
401 * read 4 + extra bytes and discard them.
402 * extra bytes for dummy, 2 for status, 2 for len
405 /* use likely(r) for 8 bit access for performance */
407 ioread8(ks->hw_addr);
408 ks_inblk(ks, buf, w + 2 + 2);
410 /* 3. read pkt data */
411 ks_inblk(ks, buf, ALIGN(len, 4));
413 /* 4. reset sudo DMA Mode */
414 ks_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
418 * ks_rcv - read multiple pkts data from the QMU.
419 * @ks: The chip information
420 * @netdev: The network device being opened.
422 * Read all of header information before reading pkt content.
423 * It is not allowed only port of pkts in QMU after issuing
426 static void ks_rcv(struct ks_net *ks, struct net_device *netdev)
429 struct type_frame_head *frame_hdr = ks->frame_head_info;
432 ks->frame_cnt = ks_rdreg16(ks, KS_RXFCTR) >> 8;
434 /* read all header information */
435 for (i = 0; i < ks->frame_cnt; i++) {
436 /* Checking Received packet status */
437 frame_hdr->sts = ks_rdreg16(ks, KS_RXFHSR);
438 /* Get packet len from hardware */
439 frame_hdr->len = ks_rdreg16(ks, KS_RXFHBCR);
443 frame_hdr = ks->frame_head_info;
444 while (ks->frame_cnt--) {
445 if (unlikely(!(frame_hdr->sts & RXFSHR_RXFV) ||
446 frame_hdr->len >= RX_BUF_SIZE ||
447 frame_hdr->len <= 0)) {
449 /* discard an invalid packet */
450 ks_wrreg16(ks, KS_RXQCR, (ks->rc_rxqcr | RXQCR_RRXEF));
451 netdev->stats.rx_dropped++;
452 if (!(frame_hdr->sts & RXFSHR_RXFV))
453 netdev->stats.rx_frame_errors++;
455 netdev->stats.rx_length_errors++;
460 skb = netdev_alloc_skb(netdev, frame_hdr->len + 16);
463 /* read data block including CRC 4 bytes */
464 ks_read_qmu(ks, (u16 *)skb->data, frame_hdr->len);
465 skb_put(skb, frame_hdr->len - 4);
466 skb->protocol = eth_type_trans(skb, netdev);
468 /* exclude CRC size */
469 netdev->stats.rx_bytes += frame_hdr->len - 4;
470 netdev->stats.rx_packets++;
472 ks_wrreg16(ks, KS_RXQCR, (ks->rc_rxqcr | RXQCR_RRXEF));
473 netdev->stats.rx_dropped++;
480 * ks_update_link_status - link status update.
481 * @netdev: The network device being opened.
482 * @ks: The chip information
486 static void ks_update_link_status(struct net_device *netdev, struct ks_net *ks)
488 /* check the status of the link */
490 if (ks_rdreg16(ks, KS_P1SR) & P1SR_LINK_GOOD) {
491 netif_carrier_on(netdev);
492 link_up_status = true;
494 netif_carrier_off(netdev);
495 link_up_status = false;
497 netif_dbg(ks, link, ks->netdev,
498 "%s: %s\n", __func__, link_up_status ? "UP" : "DOWN");
502 * ks_irq - device interrupt handler
503 * @irq: Interrupt number passed from the IRQ handler.
504 * @pw: The private word passed to register_irq(), our struct ks_net.
506 * This is the handler invoked to find out what happened
508 * Read the interrupt status, work out what needs to be done and then clear
509 * any of the interrupts that are not needed.
512 static irqreturn_t ks_irq(int irq, void *pw)
514 struct net_device *netdev = pw;
515 struct ks_net *ks = netdev_priv(netdev);
519 spin_lock_irqsave(&ks->statelock, flags);
520 /*this should be the first in IRQ handler */
523 status = ks_rdreg16(ks, KS_ISR);
524 if (unlikely(!status)) {
525 ks_restore_cmd_reg(ks);
526 spin_unlock_irqrestore(&ks->statelock, flags);
530 ks_wrreg16(ks, KS_ISR, status);
532 if (likely(status & IRQ_RXI))
535 if (unlikely(status & IRQ_LCI))
536 ks_update_link_status(netdev, ks);
538 if (unlikely(status & IRQ_TXI))
539 netif_wake_queue(netdev);
541 if (unlikely(status & IRQ_LDI)) {
543 u16 pmecr = ks_rdreg16(ks, KS_PMECR);
544 pmecr &= ~PMECR_WKEVT_MASK;
545 ks_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
548 if (unlikely(status & IRQ_RXOI))
549 ks->netdev->stats.rx_over_errors++;
550 /* this should be the last in IRQ handler*/
551 ks_restore_cmd_reg(ks);
552 spin_unlock_irqrestore(&ks->statelock, flags);
558 * ks_net_open - open network device
559 * @netdev: The network device being opened.
561 * Called when the network device is marked active, such as a user executing
562 * 'ifconfig up' on the device.
564 static int ks_net_open(struct net_device *netdev)
566 struct ks_net *ks = netdev_priv(netdev);
569 #define KS_INT_FLAGS IRQF_TRIGGER_LOW
570 /* lock the card, even if we may not actually do anything
571 * else at the moment.
574 netif_dbg(ks, ifup, ks->netdev, "%s - entry\n", __func__);
577 err = request_irq(netdev->irq, ks_irq, KS_INT_FLAGS, DRV_NAME, netdev);
580 pr_err("Failed to request IRQ: %d: %d\n", netdev->irq, err);
584 /* wake up powermode to normal mode */
585 ks_set_powermode(ks, PMECR_PM_NORMAL);
586 mdelay(1); /* wait for normal mode to take effect */
588 ks_wrreg16(ks, KS_ISR, 0xffff);
591 netif_start_queue(ks->netdev);
593 netif_dbg(ks, ifup, ks->netdev, "network device up\n");
599 * ks_net_stop - close network device
600 * @netdev: The device being closed.
602 * Called to close down a network device which has been active. Cancell any
603 * work, shutdown the RX and TX process and then place the chip into a low
604 * power state whilst it is not being used.
606 static int ks_net_stop(struct net_device *netdev)
608 struct ks_net *ks = netdev_priv(netdev);
610 netif_info(ks, ifdown, netdev, "shutting down\n");
612 netif_stop_queue(netdev);
614 mutex_lock(&ks->lock);
616 /* turn off the IRQs and ack any outstanding */
617 ks_wrreg16(ks, KS_IER, 0x0000);
618 ks_wrreg16(ks, KS_ISR, 0xffff);
620 /* shutdown RX/TX QMU */
624 /* set powermode to soft power down to save power */
625 ks_set_powermode(ks, PMECR_PM_SOFTDOWN);
626 free_irq(netdev->irq, netdev);
627 mutex_unlock(&ks->lock);
633 * ks_write_qmu - write 1 pkt data to the QMU.
634 * @ks: The chip information
635 * @pdata: buffer address to save 1 pkt
636 * @len: Pkt length in byte
637 * Here is the sequence to write 1 pkt:
638 * 1. set sudo DMA mode
639 * 2. write status/length
641 * 4. reset sudo DMA Mode
642 * 5. reset sudo DMA mode
643 * 6. Wait until pkt is out
645 static void ks_write_qmu(struct ks_net *ks, u8 *pdata, u16 len)
647 /* start header at txb[0] to align txw entries */
649 ks->txh.txw[1] = cpu_to_le16(len);
651 /* 1. set sudo-DMA mode */
652 ks_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
653 /* 2. write status/lenth info */
654 ks_outblk(ks, ks->txh.txw, 4);
655 /* 3. write pkt data */
656 ks_outblk(ks, (u16 *)pdata, ALIGN(len, 4));
657 /* 4. reset sudo-DMA mode */
658 ks_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
659 /* 5. Enqueue Tx(move the pkt from TX buffer into TXQ) */
660 ks_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
661 /* 6. wait until TXQCR_METFE is auto-cleared */
662 while (ks_rdreg16(ks, KS_TXQCR) & TXQCR_METFE)
667 * ks_start_xmit - transmit packet
668 * @skb : The buffer to transmit
669 * @netdev : The device used to transmit the packet.
671 * Called by the network layer to transmit the @skb.
672 * spin_lock_irqsave is required because tx and rx should be mutual exclusive.
673 * So while tx is in-progress, prevent IRQ interrupt from happenning.
675 static netdev_tx_t ks_start_xmit(struct sk_buff *skb, struct net_device *netdev)
677 netdev_tx_t retv = NETDEV_TX_OK;
678 struct ks_net *ks = netdev_priv(netdev);
681 spin_lock_irqsave(&ks->statelock, flags);
683 /* Extra space are required:
684 * 4 byte for alignment, 4 for status/length, 4 for CRC
687 if (likely(ks_tx_fifo_space(ks) >= skb->len + 12)) {
688 ks_write_qmu(ks, skb->data, skb->len);
689 /* add tx statistics */
690 netdev->stats.tx_bytes += skb->len;
691 netdev->stats.tx_packets++;
694 retv = NETDEV_TX_BUSY;
695 spin_unlock_irqrestore(&ks->statelock, flags);
700 * ks_start_rx - ready to serve pkts
701 * @ks : The chip information
704 static void ks_start_rx(struct ks_net *ks)
708 /* Enables QMU Receive (RXCR1). */
709 cntl = ks_rdreg16(ks, KS_RXCR1);
711 ks_wrreg16(ks, KS_RXCR1, cntl);
715 * ks_stop_rx - stop to serve pkts
716 * @ks : The chip information
719 static void ks_stop_rx(struct ks_net *ks)
723 /* Disables QMU Receive (RXCR1). */
724 cntl = ks_rdreg16(ks, KS_RXCR1);
726 ks_wrreg16(ks, KS_RXCR1, cntl);
730 static unsigned long const ethernet_polynomial = CRC32_POLY_BE;
732 static unsigned long ether_gen_crc(int length, u8 *data)
735 while (--length >= 0) {
736 u8 current_octet = *data++;
739 for (bit = 0; bit < 8; bit++, current_octet >>= 1) {
741 ((crc < 0) ^ (current_octet & 1) ?
742 ethernet_polynomial : 0);
745 return (unsigned long)crc;
746 } /* ether_gen_crc */
749 * ks_set_grpaddr - set multicast information
750 * @ks : The chip information
753 static void ks_set_grpaddr(struct ks_net *ks)
756 u32 index, position, value;
758 memset(ks->mcast_bits, 0, sizeof(u8) * HW_MCAST_SIZE);
760 for (i = 0; i < ks->mcast_lst_size; i++) {
761 position = (ether_gen_crc(6, ks->mcast_lst[i]) >> 26) & 0x3f;
762 index = position >> 3;
763 value = 1 << (position & 7);
764 ks->mcast_bits[index] |= (u8)value;
767 for (i = 0; i < HW_MCAST_SIZE; i++) {
769 ks_wrreg16(ks, (u16)((KS_MAHTR0 + i) & ~1),
770 (ks->mcast_bits[i] << 8) |
771 ks->mcast_bits[i - 1]);
774 } /* ks_set_grpaddr */
777 * ks_clear_mcast - clear multicast information
779 * @ks : The chip information
780 * This routine removes all mcast addresses set in the hardware.
783 static void ks_clear_mcast(struct ks_net *ks)
786 for (i = 0; i < HW_MCAST_SIZE; i++)
787 ks->mcast_bits[i] = 0;
789 mcast_size = HW_MCAST_SIZE >> 2;
790 for (i = 0; i < mcast_size; i++)
791 ks_wrreg16(ks, KS_MAHTR0 + (2*i), 0);
794 static void ks_set_promis(struct ks_net *ks, u16 promiscuous_mode)
797 ks->promiscuous = promiscuous_mode;
798 ks_stop_rx(ks); /* Stop receiving for reconfiguration */
799 cntl = ks_rdreg16(ks, KS_RXCR1);
801 cntl &= ~RXCR1_FILTER_MASK;
802 if (promiscuous_mode)
803 /* Enable Promiscuous mode */
804 cntl |= RXCR1_RXAE | RXCR1_RXINVF;
806 /* Disable Promiscuous mode (default normal mode) */
807 cntl |= RXCR1_RXPAFMA;
809 ks_wrreg16(ks, KS_RXCR1, cntl);
814 } /* ks_set_promis */
816 static void ks_set_mcast(struct ks_net *ks, u16 mcast)
820 ks->all_mcast = mcast;
821 ks_stop_rx(ks); /* Stop receiving for reconfiguration */
822 cntl = ks_rdreg16(ks, KS_RXCR1);
823 cntl &= ~RXCR1_FILTER_MASK;
825 /* Enable "Perfect with Multicast address passed mode" */
826 cntl |= (RXCR1_RXAE | RXCR1_RXMAFMA | RXCR1_RXPAFMA);
829 * Disable "Perfect with Multicast address passed
830 * mode" (normal mode).
832 cntl |= RXCR1_RXPAFMA;
834 ks_wrreg16(ks, KS_RXCR1, cntl);
840 static void ks_set_rx_mode(struct net_device *netdev)
842 struct ks_net *ks = netdev_priv(netdev);
843 struct netdev_hw_addr *ha;
845 /* Turn on/off promiscuous mode. */
846 if ((netdev->flags & IFF_PROMISC) == IFF_PROMISC)
848 (u16)((netdev->flags & IFF_PROMISC) == IFF_PROMISC));
849 /* Turn on/off all mcast mode. */
850 else if ((netdev->flags & IFF_ALLMULTI) == IFF_ALLMULTI)
852 (u16)((netdev->flags & IFF_ALLMULTI) == IFF_ALLMULTI));
854 ks_set_promis(ks, false);
856 if ((netdev->flags & IFF_MULTICAST) && netdev_mc_count(netdev)) {
857 if (netdev_mc_count(netdev) <= MAX_MCAST_LST) {
860 netdev_for_each_mc_addr(ha, netdev) {
861 if (i >= MAX_MCAST_LST)
863 memcpy(ks->mcast_lst[i++], ha->addr, ETH_ALEN);
865 ks->mcast_lst_size = (u8)i;
869 * List too big to support so
870 * turn on all mcast mode.
872 ks->mcast_lst_size = MAX_MCAST_LST;
873 ks_set_mcast(ks, true);
876 ks->mcast_lst_size = 0;
879 } /* ks_set_rx_mode */
881 static void ks_set_mac(struct ks_net *ks, u8 *data)
883 u16 *pw = (u16 *)data;
886 ks_stop_rx(ks); /* Stop receiving for reconfiguration */
889 w = ((u & 0xFF) << 8) | ((u >> 8) & 0xFF);
890 ks_wrreg16(ks, KS_MARH, w);
893 w = ((u & 0xFF) << 8) | ((u >> 8) & 0xFF);
894 ks_wrreg16(ks, KS_MARM, w);
897 w = ((u & 0xFF) << 8) | ((u >> 8) & 0xFF);
898 ks_wrreg16(ks, KS_MARL, w);
900 memcpy(ks->mac_addr, data, ETH_ALEN);
906 static int ks_set_mac_address(struct net_device *netdev, void *paddr)
908 struct ks_net *ks = netdev_priv(netdev);
909 struct sockaddr *addr = paddr;
912 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
914 da = (u8 *)netdev->dev_addr;
920 static int ks_net_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
922 struct ks_net *ks = netdev_priv(netdev);
924 if (!netif_running(netdev))
927 return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL);
930 static const struct net_device_ops ks_netdev_ops = {
931 .ndo_open = ks_net_open,
932 .ndo_stop = ks_net_stop,
933 .ndo_do_ioctl = ks_net_ioctl,
934 .ndo_start_xmit = ks_start_xmit,
935 .ndo_set_mac_address = ks_set_mac_address,
936 .ndo_set_rx_mode = ks_set_rx_mode,
937 .ndo_validate_addr = eth_validate_addr,
940 /* ethtool support */
942 static void ks_get_drvinfo(struct net_device *netdev,
943 struct ethtool_drvinfo *di)
945 strlcpy(di->driver, DRV_NAME, sizeof(di->driver));
946 strlcpy(di->version, "1.00", sizeof(di->version));
947 strlcpy(di->bus_info, dev_name(netdev->dev.parent),
948 sizeof(di->bus_info));
951 static u32 ks_get_msglevel(struct net_device *netdev)
953 struct ks_net *ks = netdev_priv(netdev);
954 return ks->msg_enable;
957 static void ks_set_msglevel(struct net_device *netdev, u32 to)
959 struct ks_net *ks = netdev_priv(netdev);
963 static int ks_get_link_ksettings(struct net_device *netdev,
964 struct ethtool_link_ksettings *cmd)
966 struct ks_net *ks = netdev_priv(netdev);
968 mii_ethtool_get_link_ksettings(&ks->mii, cmd);
973 static int ks_set_link_ksettings(struct net_device *netdev,
974 const struct ethtool_link_ksettings *cmd)
976 struct ks_net *ks = netdev_priv(netdev);
977 return mii_ethtool_set_link_ksettings(&ks->mii, cmd);
980 static u32 ks_get_link(struct net_device *netdev)
982 struct ks_net *ks = netdev_priv(netdev);
983 return mii_link_ok(&ks->mii);
986 static int ks_nway_reset(struct net_device *netdev)
988 struct ks_net *ks = netdev_priv(netdev);
989 return mii_nway_restart(&ks->mii);
992 static const struct ethtool_ops ks_ethtool_ops = {
993 .get_drvinfo = ks_get_drvinfo,
994 .get_msglevel = ks_get_msglevel,
995 .set_msglevel = ks_set_msglevel,
996 .get_link = ks_get_link,
997 .nway_reset = ks_nway_reset,
998 .get_link_ksettings = ks_get_link_ksettings,
999 .set_link_ksettings = ks_set_link_ksettings,
1002 /* MII interface controls */
1005 * ks_phy_reg - convert MII register into a KS8851 register
1006 * @reg: MII register number.
1008 * Return the KS8851 register number for the corresponding MII PHY register
1009 * if possible. Return zero if the MII register has no direct mapping to the
1010 * KS8851 register set.
1012 static int ks_phy_reg(int reg)
1033 * ks_phy_read - MII interface PHY register read.
1034 * @netdev: The network device the PHY is on.
1035 * @phy_addr: Address of PHY (ignored as we only have one)
1036 * @reg: The register to read.
1038 * This call reads data from the PHY register specified in @reg. Since the
1039 * device does not support all the MII registers, the non-existent values
1040 * are always returned as zero.
1042 * We return zero for unsupported registers as the MII code does not check
1043 * the value returned for any error status, and simply returns it to the
1044 * caller. The mii-tool that the driver was tested with takes any -ve error
1045 * as real PHY capabilities, thus displaying incorrect data to the user.
1047 static int ks_phy_read(struct net_device *netdev, int phy_addr, int reg)
1049 struct ks_net *ks = netdev_priv(netdev);
1053 ksreg = ks_phy_reg(reg);
1055 return 0x0; /* no error return allowed, so use zero */
1057 mutex_lock(&ks->lock);
1058 result = ks_rdreg16(ks, ksreg);
1059 mutex_unlock(&ks->lock);
1064 static void ks_phy_write(struct net_device *netdev,
1065 int phy, int reg, int value)
1067 struct ks_net *ks = netdev_priv(netdev);
1070 ksreg = ks_phy_reg(reg);
1072 mutex_lock(&ks->lock);
1073 ks_wrreg16(ks, ksreg, value);
1074 mutex_unlock(&ks->lock);
1079 * ks_read_selftest - read the selftest memory info.
1080 * @ks: The device state
1082 * Read and check the TX/RX memory selftest information.
1084 static int ks_read_selftest(struct ks_net *ks)
1086 unsigned both_done = MBIR_TXMBF | MBIR_RXMBF;
1090 rd = ks_rdreg16(ks, KS_MBIR);
1092 if ((rd & both_done) != both_done) {
1093 netdev_warn(ks->netdev, "Memory selftest not finished\n");
1097 if (rd & MBIR_TXMBFA) {
1098 netdev_err(ks->netdev, "TX memory selftest fails\n");
1102 if (rd & MBIR_RXMBFA) {
1103 netdev_err(ks->netdev, "RX memory selftest fails\n");
1107 netdev_info(ks->netdev, "the selftest passes\n");
1111 static void ks_setup(struct ks_net *ks)
1116 * Configure QMU Transmit
1119 /* Setup Transmit Frame Data Pointer Auto-Increment (TXFDPR) */
1120 ks_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
1122 /* Setup Receive Frame Data Pointer Auto-Increment */
1123 ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI);
1125 /* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */
1126 ks_wrreg16(ks, KS_RXFCTR, 1 & RXFCTR_RXFCT_MASK);
1128 /* Setup RxQ Command Control (RXQCR) */
1129 ks->rc_rxqcr = RXQCR_CMD_CNTL;
1130 ks_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
1133 * set the force mode to half duplex, default is full duplex
1134 * because if the auto-negotiation fails, most switch uses
1138 w = ks_rdreg16(ks, KS_P1MBCR);
1139 w &= ~BMCR_FULLDPLX;
1140 ks_wrreg16(ks, KS_P1MBCR, w);
1142 w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP;
1143 ks_wrreg16(ks, KS_TXCR, w);
1145 w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXIPFCC;
1147 if (ks->promiscuous) /* bPromiscuous */
1148 w |= (RXCR1_RXAE | RXCR1_RXINVF);
1149 else if (ks->all_mcast) /* Multicast address passed mode */
1150 w |= (RXCR1_RXAE | RXCR1_RXMAFMA | RXCR1_RXPAFMA);
1151 else /* Normal mode */
1154 ks_wrreg16(ks, KS_RXCR1, w);
1158 static void ks_setup_int(struct ks_net *ks)
1161 /* Clear the interrupts status of the hardware. */
1162 ks_wrreg16(ks, KS_ISR, 0xffff);
1164 /* Enables the interrupts of the hardware. */
1165 ks->rc_ier = (IRQ_LCI | IRQ_TXI | IRQ_RXI);
1166 } /* ks_setup_int */
1168 static int ks_hw_init(struct ks_net *ks)
1170 #define MHEADER_SIZE (sizeof(struct type_frame_head) * MAX_RECV_FRAMES)
1171 ks->promiscuous = 0;
1173 ks->mcast_lst_size = 0;
1175 ks->frame_head_info = devm_kmalloc(&ks->pdev->dev, MHEADER_SIZE,
1177 if (!ks->frame_head_info)
1180 ks_set_mac(ks, KS_DEFAULT_MAC_ADDRESS);
1184 #if defined(CONFIG_OF)
1185 static const struct of_device_id ks8851_ml_dt_ids[] = {
1186 { .compatible = "micrel,ks8851-mll" },
1189 MODULE_DEVICE_TABLE(of, ks8851_ml_dt_ids);
1192 static int ks8851_probe(struct platform_device *pdev)
1195 struct net_device *netdev;
1200 netdev = alloc_etherdev(sizeof(struct ks_net));
1204 SET_NETDEV_DEV(netdev, &pdev->dev);
1206 ks = netdev_priv(netdev);
1207 ks->netdev = netdev;
1209 ks->hw_addr = devm_platform_ioremap_resource(pdev, 0);
1210 if (IS_ERR(ks->hw_addr)) {
1211 err = PTR_ERR(ks->hw_addr);
1215 ks->hw_addr_cmd = devm_platform_ioremap_resource(pdev, 1);
1216 if (IS_ERR(ks->hw_addr_cmd)) {
1217 err = PTR_ERR(ks->hw_addr_cmd);
1221 netdev->irq = platform_get_irq(pdev, 0);
1223 if ((int)netdev->irq < 0) {
1230 mutex_init(&ks->lock);
1231 spin_lock_init(&ks->statelock);
1233 netdev->netdev_ops = &ks_netdev_ops;
1234 netdev->ethtool_ops = &ks_ethtool_ops;
1236 /* setup mii state */
1237 ks->mii.dev = netdev;
1239 ks->mii.phy_id_mask = 1;
1240 ks->mii.reg_num_mask = 0xf;
1241 ks->mii.mdio_read = ks_phy_read;
1242 ks->mii.mdio_write = ks_phy_write;
1244 netdev_info(netdev, "message enable is %d\n", msg_enable);
1245 /* set the default message enable */
1246 ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV |
1251 /* simple check for a valid chip being connected to the bus */
1252 if ((ks_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
1253 netdev_err(netdev, "failed to read device ID\n");
1258 if (ks_read_selftest(ks)) {
1259 netdev_err(netdev, "failed to read device ID\n");
1264 err = register_netdev(netdev);
1268 platform_set_drvdata(pdev, netdev);
1270 ks_soft_reset(ks, GRR_GSR);
1276 data = ks_rdreg16(ks, KS_OBCR);
1277 ks_wrreg16(ks, KS_OBCR, data | OBCR_ODS_16mA);
1279 /* overwriting the default MAC address */
1280 if (pdev->dev.of_node) {
1281 mac = of_get_mac_address(pdev->dev.of_node);
1283 ether_addr_copy(ks->mac_addr, mac);
1285 struct ks8851_mll_platform_data *pdata;
1287 pdata = dev_get_platdata(&pdev->dev);
1289 netdev_err(netdev, "No platform data\n");
1293 memcpy(ks->mac_addr, pdata->mac_addr, ETH_ALEN);
1295 if (!is_valid_ether_addr(ks->mac_addr)) {
1296 /* Use random MAC address if none passed */
1297 eth_random_addr(ks->mac_addr);
1298 netdev_info(netdev, "Using random mac address\n");
1300 netdev_info(netdev, "Mac address is: %pM\n", ks->mac_addr);
1302 memcpy(netdev->dev_addr, ks->mac_addr, ETH_ALEN);
1304 ks_set_mac(ks, netdev->dev_addr);
1306 id = ks_rdreg16(ks, KS_CIDER);
1308 netdev_info(netdev, "Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n",
1309 (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7);
1313 unregister_netdev(netdev);
1315 free_netdev(netdev);
1319 static int ks8851_remove(struct platform_device *pdev)
1321 struct net_device *netdev = platform_get_drvdata(pdev);
1323 unregister_netdev(netdev);
1324 free_netdev(netdev);
1329 static struct platform_driver ks8851_platform_driver = {
1332 .of_match_table = of_match_ptr(ks8851_ml_dt_ids),
1334 .probe = ks8851_probe,
1335 .remove = ks8851_remove,
1338 module_platform_driver(ks8851_platform_driver);
1340 MODULE_DESCRIPTION("KS8851 MLL Network driver");
1341 MODULE_AUTHOR("David Choi <david.choi@micrel.com>");
1342 MODULE_LICENSE("GPL");
1343 module_param_named(message, msg_enable, int, 0);
1344 MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");