1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi Ocelot Switch driver
5 * Copyright (c) 2017 Microsemi Corporation
7 #include <linux/interrupt.h>
8 #include <linux/module.h>
9 #include <linux/of_net.h>
10 #include <linux/netdevice.h>
11 #include <linux/of_mdio.h>
12 #include <linux/of_platform.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/skbuff.h>
15 #include <net/switchdev.h>
19 #define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0))
21 static int ocelot_parse_ifh(u32 *_ifh, struct frame_info *info)
26 ifh[0] = be64_to_cpu(((__force __be64 *)_ifh)[0]);
27 ifh[1] = be64_to_cpu(((__force __be64 *)_ifh)[1]);
29 wlen = IFH_EXTRACT_BITFIELD64(ifh[0], 7, 8);
30 llen = IFH_EXTRACT_BITFIELD64(ifh[0], 15, 6);
32 info->len = OCELOT_BUFFER_CELL_SZ * wlen + llen - 80;
34 info->timestamp = IFH_EXTRACT_BITFIELD64(ifh[0], 21, 32);
36 info->port = IFH_EXTRACT_BITFIELD64(ifh[1], 43, 4);
38 info->tag_type = IFH_EXTRACT_BITFIELD64(ifh[1], 16, 1);
39 info->vid = IFH_EXTRACT_BITFIELD64(ifh[1], 0, 12);
44 static int ocelot_rx_frame_word(struct ocelot *ocelot, u8 grp, bool ifh,
50 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
51 if (val == XTR_NOT_READY) {
56 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
57 } while (val == XTR_NOT_READY);
68 bytes_valid = XTR_VALID_BYTES(val);
69 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
70 if (val == XTR_ESCAPE)
71 *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
77 *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
87 static irqreturn_t ocelot_xtr_irq_handler(int irq, void *arg)
89 struct ocelot *ocelot = arg;
93 if (!(ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)))
97 struct skb_shared_hwtstamps *shhwtstamps;
98 u64 tod_in_ns, full_ts_in_ns;
99 struct frame_info info = {};
100 struct net_device *dev;
101 u32 ifh[4], val, *buf;
102 struct timespec64 ts;
103 int sz, len, buf_len;
106 for (i = 0; i < IFH_LEN; i++) {
107 err = ocelot_rx_frame_word(ocelot, grp, true, &ifh[i]);
115 ocelot_parse_ifh(ifh, &info);
117 dev = ocelot->ports[info.port]->dev;
119 skb = netdev_alloc_skb(dev, info.len);
121 if (unlikely(!skb)) {
122 netdev_err(dev, "Unable to allocate sk_buff\n");
126 buf_len = info.len - ETH_FCS_LEN;
127 buf = (u32 *)skb_put(skb, buf_len);
131 sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
134 } while (len < buf_len);
137 sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
138 /* Update the statistics if part of the FCS was read before */
139 len -= ETH_FCS_LEN - sz;
141 if (unlikely(dev->features & NETIF_F_RXFCS)) {
142 buf = (u32 *)skb_put(skb, ETH_FCS_LEN);
152 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
154 tod_in_ns = ktime_set(ts.tv_sec, ts.tv_nsec);
155 if ((tod_in_ns & 0xffffffff) < info.timestamp)
156 full_ts_in_ns = (((tod_in_ns >> 32) - 1) << 32) |
159 full_ts_in_ns = (tod_in_ns & GENMASK_ULL(63, 32)) |
162 shhwtstamps = skb_hwtstamps(skb);
163 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
164 shhwtstamps->hwtstamp = full_ts_in_ns;
167 /* Everything we see on an interface that is in the HW bridge
168 * has already been forwarded.
170 if (ocelot->bridge_mask & BIT(info.port))
171 skb->offload_fwd_mark = 1;
173 skb->protocol = eth_type_trans(skb, dev);
175 dev->stats.rx_bytes += len;
176 dev->stats.rx_packets++;
177 } while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp));
180 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp))
181 ocelot_read_rix(ocelot, QS_XTR_RD, grp);
186 static irqreturn_t ocelot_ptp_rdy_irq_handler(int irq, void *arg)
188 int budget = OCELOT_PTP_QUEUE_SZ;
189 struct ocelot *ocelot = arg;
192 struct skb_shared_hwtstamps shhwtstamps;
193 struct list_head *pos, *tmp;
194 struct sk_buff *skb = NULL;
195 struct ocelot_skb *entry;
196 struct ocelot_port *port;
197 struct timespec64 ts;
200 val = ocelot_read(ocelot, SYS_PTP_STATUS);
202 /* Check if a timestamp can be retrieved */
203 if (!(val & SYS_PTP_STATUS_PTP_MESS_VLD))
206 WARN_ON(val & SYS_PTP_STATUS_PTP_OVFL);
208 /* Retrieve the ts ID and Tx port */
209 id = SYS_PTP_STATUS_PTP_MESS_ID_X(val);
210 txport = SYS_PTP_STATUS_PTP_MESS_TXPORT_X(val);
212 /* Retrieve its associated skb */
213 port = ocelot->ports[txport];
215 list_for_each_safe(pos, tmp, &port->skbs) {
216 entry = list_entry(pos, struct ocelot_skb, head);
227 ocelot_write(ocelot, SYS_PTP_NXT_PTP_NXT, SYS_PTP_NXT);
232 /* Get the h/w timestamp */
233 ocelot_get_hwtimestamp(ocelot, &ts);
235 /* Set the timestamp into the skb */
236 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
237 shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
238 skb_tstamp_tx(skb, &shhwtstamps);
240 dev_kfree_skb_any(skb);
246 static const struct of_device_id mscc_ocelot_match[] = {
247 { .compatible = "mscc,vsc7514-switch" },
250 MODULE_DEVICE_TABLE(of, mscc_ocelot_match);
252 static int mscc_ocelot_probe(struct platform_device *pdev)
254 struct device_node *np = pdev->dev.of_node;
255 struct device_node *ports, *portnp;
256 int err, irq_xtr, irq_ptp_rdy;
257 struct ocelot *ocelot;
263 enum ocelot_target id;
276 if (!np && !pdev->dev.platform_data)
279 ocelot = devm_kzalloc(&pdev->dev, sizeof(*ocelot), GFP_KERNEL);
283 platform_set_drvdata(pdev, ocelot);
284 ocelot->dev = &pdev->dev;
286 for (i = 0; i < ARRAY_SIZE(res); i++) {
287 struct regmap *target;
289 target = ocelot_io_platform_init(ocelot, pdev, res[i].name);
290 if (IS_ERR(target)) {
291 if (res[i].optional) {
292 ocelot->targets[res[i].id] = NULL;
296 return PTR_ERR(target);
299 ocelot->targets[res[i].id] = target;
302 hsio = syscon_regmap_lookup_by_compatible("mscc,ocelot-hsio");
304 dev_err(&pdev->dev, "missing hsio syscon\n");
305 return PTR_ERR(hsio);
308 ocelot->targets[HSIO] = hsio;
310 err = ocelot_chip_init(ocelot);
314 irq_xtr = platform_get_irq_byname(pdev, "xtr");
318 err = devm_request_threaded_irq(&pdev->dev, irq_xtr, NULL,
319 ocelot_xtr_irq_handler, IRQF_ONESHOT,
320 "frame extraction", ocelot);
324 irq_ptp_rdy = platform_get_irq_byname(pdev, "ptp_rdy");
325 if (irq_ptp_rdy > 0 && ocelot->targets[PTP]) {
326 err = devm_request_threaded_irq(&pdev->dev, irq_ptp_rdy, NULL,
327 ocelot_ptp_rdy_irq_handler,
328 IRQF_ONESHOT, "ptp ready",
333 /* Both the PTP interrupt and the PTP bank are available */
337 regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1);
338 regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
342 regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
346 regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
347 regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);
349 ocelot->num_cpu_ports = 1; /* 1 port on the switch, two groups */
351 ports = of_get_child_by_name(np, "ethernet-ports");
353 dev_err(&pdev->dev, "no ethernet-ports child node found\n");
357 ocelot->num_phys_ports = of_get_child_count(ports);
359 ocelot->ports = devm_kcalloc(&pdev->dev, ocelot->num_phys_ports,
360 sizeof(struct ocelot_port *), GFP_KERNEL);
362 INIT_LIST_HEAD(&ocelot->multicast);
365 for_each_available_child_of_node(ports, portnp) {
366 struct device_node *phy_node;
367 struct phy_device *phy;
368 struct resource *res;
375 if (of_property_read_u32(portnp, "reg", &port))
378 snprintf(res_name, sizeof(res_name), "port%d", port);
380 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
382 regs = devm_ioremap_resource(&pdev->dev, res);
386 phy_node = of_parse_phandle(portnp, "phy-handle", 0);
390 phy = of_phy_find_device(phy_node);
391 of_node_put(phy_node);
395 err = ocelot_probe_port(ocelot, port, regs, phy);
401 phy_mode = of_get_phy_mode(portnp);
403 ocelot->ports[port]->phy_mode = PHY_INTERFACE_MODE_NA;
405 ocelot->ports[port]->phy_mode = phy_mode;
407 switch (ocelot->ports[port]->phy_mode) {
408 case PHY_INTERFACE_MODE_NA:
410 case PHY_INTERFACE_MODE_SGMII:
412 case PHY_INTERFACE_MODE_QSGMII:
413 /* Ensure clock signals and speed is set on all
416 ocelot_port_writel(ocelot->ports[port],
417 DEV_CLOCK_CFG_LINK_SPEED
423 "invalid phy mode for port%d, (Q)SGMII only\n",
430 serdes = devm_of_phy_get(ocelot->dev, portnp, NULL);
431 if (IS_ERR(serdes)) {
432 err = PTR_ERR(serdes);
433 if (err == -EPROBE_DEFER)
434 dev_dbg(ocelot->dev, "deferring probe\n");
437 "missing SerDes phys for port%d\n",
444 ocelot->ports[port]->serdes = serdes;
447 register_netdevice_notifier(&ocelot_netdevice_nb);
448 register_switchdev_notifier(&ocelot_switchdev_nb);
449 register_switchdev_blocking_notifier(&ocelot_switchdev_blocking_nb);
451 dev_info(&pdev->dev, "Ocelot switch probed\n");
458 static int mscc_ocelot_remove(struct platform_device *pdev)
460 struct ocelot *ocelot = platform_get_drvdata(pdev);
462 ocelot_deinit(ocelot);
463 unregister_switchdev_blocking_notifier(&ocelot_switchdev_blocking_nb);
464 unregister_switchdev_notifier(&ocelot_switchdev_nb);
465 unregister_netdevice_notifier(&ocelot_netdevice_nb);
470 static struct platform_driver mscc_ocelot_driver = {
471 .probe = mscc_ocelot_probe,
472 .remove = mscc_ocelot_remove,
474 .name = "ocelot-switch",
475 .of_match_table = mscc_ocelot_match,
479 module_platform_driver(mscc_ocelot_driver);
481 MODULE_DESCRIPTION("Microsemi Ocelot switch driver");
482 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
483 MODULE_LICENSE("Dual MIT/GPL");