drivers/net/ethernet/qlogic/qede/qede_ptp.c

   1 /* QLogic qede NIC Driver
   2  * Copyright (c) 2015-2017  QLogic Corporation
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and /or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include "qede_ptp.h"
  33
  34 struct qede_ptp {
  35         const struct qed_eth_ptp_ops    *ops;
  36         struct ptp_clock_info           clock_info;
  37         struct cyclecounter             cc;
  38         struct timecounter              tc;
  39         struct ptp_clock                *clock;
  40         struct work_struct              work;
  41         struct qede_dev                 *edev;
  42         struct sk_buff                  *tx_skb;
  43
  44         /* ptp spinlock is used for protecting the cycle/time counter fields
  45          * and, also for serializing the qed PTP API invocations.
  46          */
  47         spinlock_t                      lock;
  48         bool                            hw_ts_ioctl_called;
  49         u16                             tx_type;
  50         u16                             rx_filter;
  51 };
  52
  53 /**
  54  * qede_ptp_adjfreq
  55  * @ptp: the ptp clock structure
  56  * @ppb: parts per billion adjustment from base
  57  *
  58  * Adjust the frequency of the ptp cycle counter by the
  59  * indicated ppb from the base frequency.
  60  */
  61 static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb)
  62 {
  63         struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info);
  64         struct qede_dev *edev = ptp->edev;
  65         int rc;
  66
  67         __qede_lock(edev);
  68         if (edev->state == QEDE_STATE_OPEN) {
  69                 spin_lock_bh(&ptp->lock);
  70                 rc = ptp->ops->adjfreq(edev->cdev, ppb);
  71                 spin_unlock_bh(&ptp->lock);
  72         } else {
  73                 DP_ERR(edev, "PTP adjfreq called while interface is down\n");
  74                 rc = -EFAULT;
  75         }
  76         __qede_unlock(edev);
  77
  78         return rc;
  79 }
  80
  81 static int qede_ptp_adjtime(struct ptp_clock_info *info, s64 delta)
  82 {
  83         struct qede_dev *edev;
  84         struct qede_ptp *ptp;
  85
  86         ptp = container_of(info, struct qede_ptp, clock_info);
  87         edev = ptp->edev;
  88
  89         DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP adjtime called, delta = %llx\n",
  90                    delta);
  91
  92         spin_lock_bh(&ptp->lock);
  93         timecounter_adjtime(&ptp->tc, delta);
  94         spin_unlock_bh(&ptp->lock);
  95
  96         return 0;
  97 }
  98
  99 static int qede_ptp_gettime(struct ptp_clock_info *info, struct timespec64 *ts)
 100 {
 101         struct qede_dev *edev;
 102         struct qede_ptp *ptp;
 103         u64 ns;
 104
 105         ptp = container_of(info, struct qede_ptp, clock_info);
 106         edev = ptp->edev;
 107
 108         spin_lock_bh(&ptp->lock);
 109         ns = timecounter_read(&ptp->tc);
 110         spin_unlock_bh(&ptp->lock);
 111
 112         DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP gettime called, ns = %llu\n", ns);
 113
 114         *ts = ns_to_timespec64(ns);
 115
 116         return 0;
 117 }
 118
 119 static int qede_ptp_settime(struct ptp_clock_info *info,
 120                             const struct timespec64 *ts)
 121 {
 122         struct qede_dev *edev;
 123         struct qede_ptp *ptp;
 124         u64 ns;
 125
 126         ptp = container_of(info, struct qede_ptp, clock_info);
 127         edev = ptp->edev;
 128
 129         ns = timespec64_to_ns(ts);
 130
 131         DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP settime called, ns = %llu\n", ns);
 132
 133         /* Re-init the timecounter */
 134         spin_lock_bh(&ptp->lock);
 135         timecounter_init(&ptp->tc, &ptp->cc, ns);
 136         spin_unlock_bh(&ptp->lock);
 137
 138         return 0;
 139 }
 140
 141 /* Enable (or disable) ancillary features of the phc subsystem */
 142 static int qede_ptp_ancillary_feature_enable(struct ptp_clock_info *info,
 143                                              struct ptp_clock_request *rq,
 144                                              int on)
 145 {
 146         struct qede_dev *edev;
 147         struct qede_ptp *ptp;
 148
 149         ptp = container_of(info, struct qede_ptp, clock_info);
 150         edev = ptp->edev;
 151
 152         DP_ERR(edev, "PHC ancillary features are not supported\n");
 153
 154         return -ENOTSUPP;
 155 }
 156
 157 static void qede_ptp_task(struct work_struct *work)
 158 {
 159         struct skb_shared_hwtstamps shhwtstamps;
 160         struct qede_dev *edev;
 161         struct qede_ptp *ptp;
 162         u64 timestamp, ns;
 163         int rc;
 164
 165         ptp = container_of(work, struct qede_ptp, work);
 166         edev = ptp->edev;
 167
 168         /* Read Tx timestamp registers */
 169         spin_lock_bh(&ptp->lock);
 170         rc = ptp->ops->read_tx_ts(edev->cdev, &timestamp);
 171         spin_unlock_bh(&ptp->lock);
 172         if (rc) {
 173                 /* Reschedule to keep checking for a valid timestamp value */
 174                 schedule_work(&ptp->work);
 175                 return;
 176         }
 177
 178         ns = timecounter_cyc2time(&ptp->tc, timestamp);
 179         memset(&shhwtstamps, 0, sizeof(shhwtstamps));
 180         shhwtstamps.hwtstamp = ns_to_ktime(ns);
 181         skb_tstamp_tx(ptp->tx_skb, &shhwtstamps);
 182         dev_kfree_skb_any(ptp->tx_skb);
 183         ptp->tx_skb = NULL;
 184
 185         DP_VERBOSE(edev, QED_MSG_DEBUG,
 186                    "Tx timestamp, timestamp cycles = %llu, ns = %llu\n",
 187                    timestamp, ns);
 188 }
 189
 190 /* Read the PHC. This API is invoked with ptp_lock held. */
 191 static u64 qede_ptp_read_cc(const struct cyclecounter *cc)
 192 {
 193         struct qede_dev *edev;
 194         struct qede_ptp *ptp;
 195         u64 phc_cycles;
 196         int rc;
 197
 198         ptp = container_of(cc, struct qede_ptp, cc);
 199         edev = ptp->edev;
 200         rc = ptp->ops->read_cc(edev->cdev, &phc_cycles);
 201         if (rc)
 202                 WARN_ONCE(1, "PHC read err %d\n", rc);
 203
 204         DP_VERBOSE(edev, QED_MSG_DEBUG, "PHC read cycles = %llu\n", phc_cycles);
 205
 206         return phc_cycles;
 207 }
 208
 209 static int qede_ptp_cfg_filters(struct qede_dev *edev)
 210 {
 211         struct qede_ptp *ptp = edev->ptp;
 212
 213         if (!ptp)
 214                 return -EIO;
 215
 216         if (!ptp->hw_ts_ioctl_called) {
 217                 DP_INFO(edev, "TS IOCTL not called\n");
 218                 return 0;
 219         }
 220
 221         switch (ptp->tx_type) {
 222         case HWTSTAMP_TX_ON:
 223                 edev->flags |= QEDE_TX_TIMESTAMPING_EN;
 224                 ptp->ops->hwtstamp_tx_on(edev->cdev);
 225                 break;
 226
 227         case HWTSTAMP_TX_ONESTEP_SYNC:
 228                 DP_ERR(edev, "One-step timestamping is not supported\n");
 229                 return -ERANGE;
 230         }
 231
 232         spin_lock_bh(&ptp->lock);
 233         switch (ptp->rx_filter) {
 234         case HWTSTAMP_FILTER_NONE:
 235                 break;
 236         case HWTSTAMP_FILTER_ALL:
 237         case HWTSTAMP_FILTER_SOME:
 238                 ptp->rx_filter = HWTSTAMP_FILTER_NONE;
 239                 break;
 240         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 241         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 242         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 243                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
 244                 /* Initialize PTP detection for UDP/IPv4 events */
 245                 ptp->ops->cfg_rx_filters(edev->cdev, QED_PTP_FILTER_IPV4);
 246                 break;
 247         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 248         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 249         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 250                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
 251                 /* Initialize PTP detection for UDP/IPv4 or UDP/IPv6 events */
 252                 ptp->ops->cfg_rx_filters(edev->cdev, QED_PTP_FILTER_IPV4_IPV6);
 253                 break;
 254         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 255         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 256         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 257                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
 258                 /* Initialize PTP detection L2 events */
 259                 ptp->ops->cfg_rx_filters(edev->cdev, QED_PTP_FILTER_L2);
 260                 break;
 261         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 262         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 263         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 264                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 265                 /* Initialize PTP detection L2, UDP/IPv4 or UDP/IPv6 events */
 266                 ptp->ops->cfg_rx_filters(edev->cdev,
 267                                          QED_PTP_FILTER_L2_IPV4_IPV6);
 268                 break;
 269         }
 270
 271         spin_unlock_bh(&ptp->lock);
 272
 273         return 0;
 274 }
 275
 276 int qede_ptp_hw_ts(struct qede_dev *edev, struct ifreq *ifr)
 277 {
 278         struct hwtstamp_config config;
 279         struct qede_ptp *ptp;
 280         int rc;
 281
 282         ptp = edev->ptp;
 283         if (!ptp)
 284                 return -EIO;
 285
 286         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 287                 return -EFAULT;
 288
 289         DP_VERBOSE(edev, QED_MSG_DEBUG,
 290                    "HWTSTAMP IOCTL: Requested tx_type = %d, requested rx_filters = %d\n",
 291                    config.tx_type, config.rx_filter);
 292
 293         if (config.flags) {
 294                 DP_ERR(edev, "config.flags is reserved for future use\n");
 295                 return -EINVAL;
 296         }
 297
 298         ptp->hw_ts_ioctl_called = 1;
 299         ptp->tx_type = config.tx_type;
 300         ptp->rx_filter = config.rx_filter;
 301
 302         rc = qede_ptp_cfg_filters(edev);
 303         if (rc)
 304                 return rc;
 305
 306         config.rx_filter = ptp->rx_filter;
 307
 308         return copy_to_user(ifr->ifr_data, &config,
 309                             sizeof(config)) ? -EFAULT : 0;
 310 }
 311
 312 int qede_ptp_get_ts_info(struct qede_dev *edev, struct ethtool_ts_info *info)
 313 {
 314         struct qede_ptp *ptp = edev->ptp;
 315
 316         if (!ptp)
 317                 return -EIO;
 318
 319         info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
 320                                 SOF_TIMESTAMPING_RX_SOFTWARE |
 321                                 SOF_TIMESTAMPING_SOFTWARE |
 322                                 SOF_TIMESTAMPING_TX_HARDWARE |
 323                                 SOF_TIMESTAMPING_RX_HARDWARE |
 324                                 SOF_TIMESTAMPING_RAW_HARDWARE;
 325
 326         if (ptp->clock)
 327                 info->phc_index = ptp_clock_index(ptp->clock);
 328         else
 329                 info->phc_index = -1;
 330
 331         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
 332                            BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
 333                            BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
 334                            BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
 335                            BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
 336                            BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
 337                            BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
 338                            BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
 339                            BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
 340                            BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
 341                            BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
 342                            BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
 343                            BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
 344
 345         info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
 346
 347         return 0;
 348 }
 349
 350 void qede_ptp_disable(struct qede_dev *edev)
 351 {
 352         struct qede_ptp *ptp;
 353
 354         ptp = edev->ptp;
 355         if (!ptp)
 356                 return;
 357
 358         if (ptp->clock) {
 359                 ptp_clock_unregister(ptp->clock);
 360                 ptp->clock = NULL;
 361         }
 362
 363         /* Cancel PTP work queue. Should be done after the Tx queues are
 364          * drained to prevent additional scheduling.
 365          */
 366         cancel_work_sync(&ptp->work);
 367         if (ptp->tx_skb) {
 368                 dev_kfree_skb_any(ptp->tx_skb);
 369                 ptp->tx_skb = NULL;
 370         }
 371
 372         /* Disable PTP in HW */
 373         spin_lock_bh(&ptp->lock);
 374         ptp->ops->disable(edev->cdev);
 375         spin_unlock_bh(&ptp->lock);
 376
 377         kfree(ptp);
 378         edev->ptp = NULL;
 379 }
 380
 381 static int qede_ptp_init(struct qede_dev *edev, bool init_tc)
 382 {
 383         struct qede_ptp *ptp;
 384         int rc;
 385
 386         ptp = edev->ptp;
 387         if (!ptp)
 388                 return -EINVAL;
 389
 390         spin_lock_init(&ptp->lock);
 391
 392         /* Configure PTP in HW */
 393         rc = ptp->ops->enable(edev->cdev);
 394         if (rc) {
 395                 DP_INFO(edev, "PTP HW enable failed\n");
 396                 return rc;
 397         }
 398
 399         /* Init work queue for Tx timestamping */
 400         INIT_WORK(&ptp->work, qede_ptp_task);
 401
 402         /* Init cyclecounter and timecounter. This is done only in the first
 403          * load. If done in every load, PTP application will fail when doing
 404          * unload / load (e.g. MTU change) while it is running.
 405          */
 406         if (init_tc) {
 407                 memset(&ptp->cc, 0, sizeof(ptp->cc));
 408                 ptp->cc.read = qede_ptp_read_cc;
 409                 ptp->cc.mask = CYCLECOUNTER_MASK(64);
 410                 ptp->cc.shift = 0;
 411                 ptp->cc.mult = 1;
 412
 413                 timecounter_init(&ptp->tc, &ptp->cc,
 414                                  ktime_to_ns(ktime_get_real()));
 415         }
 416
 417         return rc;
 418 }
 419
 420 int qede_ptp_enable(struct qede_dev *edev, bool init_tc)
 421 {
 422         struct qede_ptp *ptp;
 423         int rc;
 424
 425         ptp = kzalloc(sizeof(*ptp), GFP_KERNEL);
 426         if (!ptp) {
 427                 DP_INFO(edev, "Failed to allocate struct for PTP\n");
 428                 return -ENOMEM;
 429         }
 430
 431         ptp->edev = edev;
 432         ptp->ops = edev->ops->ptp;
 433         if (!ptp->ops) {
 434                 DP_INFO(edev, "PTP enable failed\n");
 435                 rc = -EIO;
 436                 goto err1;
 437         }
 438
 439         edev->ptp = ptp;
 440
 441         rc = qede_ptp_init(edev, init_tc);
 442         if (rc)
 443                 goto err1;
 444
 445         qede_ptp_cfg_filters(edev);
 446
 447         /* Fill the ptp_clock_info struct and register PTP clock */
 448         ptp->clock_info.owner = THIS_MODULE;
 449         snprintf(ptp->clock_info.name, 16, "%s", edev->ndev->name);
 450         ptp->clock_info.max_adj = QED_MAX_PHC_DRIFT_PPB;
 451         ptp->clock_info.n_alarm = 0;
 452         ptp->clock_info.n_ext_ts = 0;
 453         ptp->clock_info.n_per_out = 0;
 454         ptp->clock_info.pps = 0;
 455         ptp->clock_info.adjfreq = qede_ptp_adjfreq;
 456         ptp->clock_info.adjtime = qede_ptp_adjtime;
 457         ptp->clock_info.gettime64 = qede_ptp_gettime;
 458         ptp->clock_info.settime64 = qede_ptp_settime;
 459         ptp->clock_info.enable = qede_ptp_ancillary_feature_enable;
 460
 461         ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev);
 462         if (IS_ERR(ptp->clock)) {
 463                 rc = -EINVAL;
 464                 DP_ERR(edev, "PTP clock registeration failed\n");
 465                 goto err2;
 466         }
 467
 468         return 0;
 469
 470 err2:
 471         qede_ptp_disable(edev);
 472         ptp->clock = NULL;
 473 err1:
 474         kfree(ptp);
 475         edev->ptp = NULL;
 476
 477         return rc;
 478 }
 479
 480 void qede_ptp_tx_ts(struct qede_dev *edev, struct sk_buff *skb)
 481 {
 482         struct qede_ptp *ptp;
 483
 484         ptp = edev->ptp;
 485         if (!ptp)
 486                 return;
 487
 488         if (unlikely(!(edev->flags & QEDE_TX_TIMESTAMPING_EN))) {
 489                 DP_NOTICE(edev,
 490                           "Tx timestamping was not enabled, this packet will not be timestamped\n");
 491         } else if (unlikely(ptp->tx_skb)) {
 492                 DP_NOTICE(edev,
 493                           "The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n");
 494         } else {
 495                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 496                 /* schedule check for Tx timestamp */
 497                 ptp->tx_skb = skb_get(skb);
 498                 schedule_work(&ptp->work);
 499         }
 500 }
 501
 502 void qede_ptp_rx_ts(struct qede_dev *edev, struct sk_buff *skb)
 503 {
 504         struct qede_ptp *ptp;
 505         u64 timestamp, ns;
 506         int rc;
 507
 508         ptp = edev->ptp;
 509         if (!ptp)
 510                 return;
 511
 512         spin_lock_bh(&ptp->lock);
 513         rc = ptp->ops->read_rx_ts(edev->cdev, &timestamp);
 514         if (rc) {
 515                 spin_unlock_bh(&ptp->lock);
 516                 DP_INFO(edev, "Invalid Rx timestamp\n");
 517                 return;
 518         }
 519
 520         ns = timecounter_cyc2time(&ptp->tc, timestamp);
 521         spin_unlock_bh(&ptp->lock);
 522         skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);
 523         DP_VERBOSE(edev, QED_MSG_DEBUG,
 524                    "Rx timestamp, timestamp cycles = %llu, ns = %llu\n",
 525                    timestamp, ns);
 526 }