drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  39
  40 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  41         .read_crb                       = qlcnic_83xx_read_crb,
  42         .write_crb                      = qlcnic_83xx_write_crb,
  43         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  44         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  45         .get_mac_address                = qlcnic_83xx_get_mac_address,
  46         .setup_intr                     = qlcnic_83xx_setup_intr,
  47         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  48         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  49         .get_func_no                    = qlcnic_83xx_get_func_no,
  50         .api_lock                       = qlcnic_83xx_cam_lock,
  51         .api_unlock                     = qlcnic_83xx_cam_unlock,
  52         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  53         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  54         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  55         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  56         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  57         .setup_link_event               = qlcnic_83xx_setup_link_event,
  58         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  59         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  60         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  61         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  62         .napi_enable                    = qlcnic_83xx_napi_enable,
  63         .napi_disable                   = qlcnic_83xx_napi_disable,
  64         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  65         .config_rss                     = qlcnic_83xx_config_rss,
  66         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  67         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  68         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  69         .get_board_info                 = qlcnic_83xx_get_port_info,
  70         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  71 };
  72
  73 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  74         .config_bridged_mode    = qlcnic_config_bridged_mode,
  75         .config_led             = qlcnic_config_led,
  76         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  77         .napi_add               = qlcnic_83xx_napi_add,
  78         .napi_del               = qlcnic_83xx_napi_del,
  79         .shutdown               = qlcnic_sriov_vf_shutdown,
  80         .resume                 = qlcnic_sriov_vf_resume,
  81         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  82         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  83 };
  84
  85 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  86         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  87         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  88         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  89         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  90 };
  91
  92 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  93 {
  94         return (val & (1 << QLC_BC_MSG)) ? true : false;
  95 }
  96
  97 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  98 {
  99         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 100 }
 101
 102 static inline bool qlcnic_sriov_flr_check(u32 val)
 103 {
 104         return (val & (1 << QLC_BC_FLR)) ? true : false;
 105 }
 106
 107 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 108 {
 109         return (val >> 4) & 0xff;
 110 }
 111
 112 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 113 {
 114         struct pci_dev *dev = adapter->pdev;
 115         int pos;
 116         u16 stride, offset;
 117
 118         if (qlcnic_sriov_vf_check(adapter))
 119                 return 0;
 120
 121         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 122         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 123         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 124
 125         return (dev->devfn + offset + stride * vf_id) & 0xff;
 126 }
 127
 128 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 129 {
 130         struct qlcnic_sriov *sriov;
 131         struct qlcnic_back_channel *bc;
 132         struct workqueue_struct *wq;
 133         struct qlcnic_vport *vp;
 134         struct qlcnic_vf_info *vf;
 135         int err, i;
 136
 137         if (!qlcnic_sriov_enable_check(adapter))
 138                 return -EIO;
 139
 140         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 141         if (!sriov)
 142                 return -ENOMEM;
 143
 144         adapter->ahw->sriov = sriov;
 145         sriov->num_vfs = num_vfs;
 146         bc = &sriov->bc;
 147         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 148                                  num_vfs, GFP_KERNEL);
 149         if (!sriov->vf_info) {
 150                 err = -ENOMEM;
 151                 goto qlcnic_free_sriov;
 152         }
 153
 154         wq = create_singlethread_workqueue("bc-trans");
 155         if (wq == NULL) {
 156                 err = -ENOMEM;
 157                 dev_err(&adapter->pdev->dev,
 158                         "Cannot create bc-trans workqueue\n");
 159                 goto qlcnic_free_vf_info;
 160         }
 161
 162         bc->bc_trans_wq = wq;
 163
 164         wq = create_singlethread_workqueue("async");
 165         if (wq == NULL) {
 166                 err = -ENOMEM;
 167                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 168                 goto qlcnic_destroy_trans_wq;
 169         }
 170
 171         bc->bc_async_wq =  wq;
 172         INIT_LIST_HEAD(&bc->async_list);
 173
 174         for (i = 0; i < num_vfs; i++) {
 175                 vf = &sriov->vf_info[i];
 176                 vf->adapter = adapter;
 177                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 178                 mutex_init(&vf->send_cmd_lock);
 179                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 180                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 181                 spin_lock_init(&vf->rcv_act.lock);
 182                 spin_lock_init(&vf->rcv_pend.lock);
 183                 init_completion(&vf->ch_free_cmpl);
 184
 185                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 186
 187                 if (qlcnic_sriov_pf_check(adapter)) {
 188                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 189                         if (!vp) {
 190                                 err = -ENOMEM;
 191                                 goto qlcnic_destroy_async_wq;
 192                         }
 193                         sriov->vf_info[i].vp = vp;
 194                         vp->max_tx_bw = MAX_BW;
 195                         vp->spoofchk = true;
 196                         random_ether_addr(vp->mac);
 197                         dev_info(&adapter->pdev->dev,
 198                                  "MAC Address %pM is configured for VF %d\n",
 199                                  vp->mac, i);
 200                 }
 201         }
 202
 203         return 0;
 204
 205 qlcnic_destroy_async_wq:
 206         destroy_workqueue(bc->bc_async_wq);
 207
 208 qlcnic_destroy_trans_wq:
 209         destroy_workqueue(bc->bc_trans_wq);
 210
 211 qlcnic_free_vf_info:
 212         kfree(sriov->vf_info);
 213
 214 qlcnic_free_sriov:
 215         kfree(adapter->ahw->sriov);
 216         return err;
 217 }
 218
 219 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 220 {
 221         struct qlcnic_bc_trans *trans;
 222         struct qlcnic_cmd_args cmd;
 223         unsigned long flags;
 224
 225         spin_lock_irqsave(&t_list->lock, flags);
 226
 227         while (!list_empty(&t_list->wait_list)) {
 228                 trans = list_first_entry(&t_list->wait_list,
 229                                          struct qlcnic_bc_trans, list);
 230                 list_del(&trans->list);
 231                 t_list->count--;
 232                 cmd.req.arg = (u32 *)trans->req_pay;
 233                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 234                 qlcnic_free_mbx_args(&cmd);
 235                 qlcnic_sriov_cleanup_transaction(trans);
 236         }
 237
 238         spin_unlock_irqrestore(&t_list->lock, flags);
 239 }
 240
 241 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 242 {
 243         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 244         struct qlcnic_back_channel *bc = &sriov->bc;
 245         struct qlcnic_vf_info *vf;
 246         int i;
 247
 248         if (!qlcnic_sriov_enable_check(adapter))
 249                 return;
 250
 251         qlcnic_sriov_cleanup_async_list(bc);
 252         destroy_workqueue(bc->bc_async_wq);
 253
 254         for (i = 0; i < sriov->num_vfs; i++) {
 255                 vf = &sriov->vf_info[i];
 256                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 257                 cancel_work_sync(&vf->trans_work);
 258                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 259         }
 260
 261         destroy_workqueue(bc->bc_trans_wq);
 262
 263         for (i = 0; i < sriov->num_vfs; i++)
 264                 kfree(sriov->vf_info[i].vp);
 265
 266         kfree(sriov->vf_info);
 267         kfree(adapter->ahw->sriov);
 268 }
 269
 270 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 271 {
 272         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 273         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 274         __qlcnic_sriov_cleanup(adapter);
 275 }
 276
 277 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 278 {
 279         if (qlcnic_sriov_pf_check(adapter))
 280                 qlcnic_sriov_pf_cleanup(adapter);
 281
 282         if (qlcnic_sriov_vf_check(adapter))
 283                 qlcnic_sriov_vf_cleanup(adapter);
 284 }
 285
 286 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 287                                     u32 *pay, u8 pci_func, u8 size)
 288 {
 289         struct qlcnic_hardware_context *ahw = adapter->ahw;
 290         struct qlcnic_mailbox *mbx = ahw->mailbox;
 291         struct qlcnic_cmd_args cmd;
 292         unsigned long timeout;
 293         int err;
 294
 295         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 296         cmd.hdr = hdr;
 297         cmd.pay = pay;
 298         cmd.pay_size = size;
 299         cmd.func_num = pci_func;
 300         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 301         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 302
 303         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 304         if (err) {
 305                 dev_err(&adapter->pdev->dev,
 306                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 307                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 308                         ahw->op_mode);
 309                 return err;
 310         }
 311
 312         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 313                 dev_err(&adapter->pdev->dev,
 314                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 315                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 316                         ahw->op_mode);
 317                 flush_workqueue(mbx->work_q);
 318         }
 319
 320         return cmd.rsp_opcode;
 321 }
 322
 323 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 324 {
 325         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 326         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 327         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 328         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 329         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 330         adapter->max_rds_rings = MAX_RDS_RINGS;
 331 }
 332
 333 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 334                                    struct qlcnic_info *npar_info, u16 vport_id)
 335 {
 336         struct device *dev = &adapter->pdev->dev;
 337         struct qlcnic_cmd_args cmd;
 338         int err;
 339         u32 status;
 340
 341         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 342         if (err)
 343                 return err;
 344
 345         cmd.req.arg[1] = vport_id << 16 | 0x1;
 346         err = qlcnic_issue_cmd(adapter, &cmd);
 347         if (err) {
 348                 dev_err(&adapter->pdev->dev,
 349                         "Failed to get vport info, err=%d\n", err);
 350                 qlcnic_free_mbx_args(&cmd);
 351                 return err;
 352         }
 353
 354         status = cmd.rsp.arg[2] & 0xffff;
 355         if (status & BIT_0)
 356                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 357         if (status & BIT_1)
 358                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 359         if (status & BIT_2)
 360                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 361         if (status & BIT_3)
 362                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 363         if (status & BIT_4)
 364                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 365         if (status & BIT_5)
 366                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 367         if (status & BIT_6)
 368                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 369         if (status & BIT_7)
 370                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 371         if (status & BIT_8)
 372                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 373         if (status & BIT_9)
 374                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 375
 376         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 377         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 378         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 379         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 380
 381         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 382                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 383                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 384                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 385                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 386                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 387                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 388                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 389                  npar_info->max_rx_mcast_mac_filters,
 390                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 391                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 392                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 393                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 394                  npar_info->max_remote_ipv6_addrs);
 395
 396         qlcnic_free_mbx_args(&cmd);
 397         return err;
 398 }
 399
 400 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 401                                       struct qlcnic_cmd_args *cmd)
 402 {
 403         adapter->rx_pvid = (cmd->rsp.arg[1] >> 16) & 0xffff;
 404         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 405         return 0;
 406 }
 407
 408 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 409                                             struct qlcnic_cmd_args *cmd)
 410 {
 411         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 412         int i, num_vlans;
 413         u16 *vlans;
 414
 415         if (sriov->allowed_vlans)
 416                 return 0;
 417
 418         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 419         if (!sriov->any_vlan)
 420                 return 0;
 421
 422         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 423         num_vlans = sriov->num_allowed_vlans;
 424         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 425         if (!sriov->allowed_vlans)
 426                 return -ENOMEM;
 427
 428         vlans = (u16 *)&cmd->rsp.arg[3];
 429         for (i = 0; i < num_vlans; i++)
 430                 sriov->allowed_vlans[i] = vlans[i];
 431
 432         return 0;
 433 }
 434
 435 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 436 {
 437         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 438         struct qlcnic_cmd_args cmd;
 439         int ret;
 440
 441         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 442         if (ret)
 443                 return ret;
 444
 445         ret = qlcnic_issue_cmd(adapter, &cmd);
 446         if (ret) {
 447                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 448                         ret);
 449         } else {
 450                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 451                 switch (sriov->vlan_mode) {
 452                 case QLC_GUEST_VLAN_MODE:
 453                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 454                         break;
 455                 case QLC_PVID_MODE:
 456                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 457                         break;
 458                 }
 459         }
 460
 461         qlcnic_free_mbx_args(&cmd);
 462         return ret;
 463 }
 464
 465 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 466 {
 467         struct qlcnic_hardware_context *ahw = adapter->ahw;
 468         struct qlcnic_info nic_info;
 469         int err;
 470
 471         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 472         if (err)
 473                 return err;
 474
 475         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 476         if (err)
 477                 return -EIO;
 478
 479         err = qlcnic_sriov_get_vf_acl(adapter);
 480         if (err)
 481                 return err;
 482
 483         if (qlcnic_83xx_get_port_info(adapter))
 484                 return -EIO;
 485
 486         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 487         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 488         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 489                  adapter->ahw->fw_hal_version);
 490
 491         ahw->physical_port = (u8) nic_info.phys_port;
 492         ahw->switch_mode = nic_info.switch_mode;
 493         ahw->max_mtu = nic_info.max_mtu;
 494         ahw->op_mode = nic_info.op_mode;
 495         ahw->capabilities = nic_info.capabilities;
 496         return 0;
 497 }
 498
 499 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 500                                  int pci_using_dac)
 501 {
 502         int err;
 503
 504         INIT_LIST_HEAD(&adapter->vf_mc_list);
 505         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 506                 dev_warn(&adapter->pdev->dev,
 507                          "Device does not support MSI interrupts\n");
 508
 509         err = qlcnic_setup_intr(adapter, 1);
 510         if (err) {
 511                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 512                 goto err_out_disable_msi;
 513         }
 514
 515         err = qlcnic_83xx_setup_mbx_intr(adapter);
 516         if (err)
 517                 goto err_out_disable_msi;
 518
 519         err = qlcnic_sriov_init(adapter, 1);
 520         if (err)
 521                 goto err_out_disable_mbx_intr;
 522
 523         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 524         if (err)
 525                 goto err_out_cleanup_sriov;
 526
 527         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 528         if (err)
 529                 goto err_out_disable_bc_intr;
 530
 531         err = qlcnic_sriov_vf_init_driver(adapter);
 532         if (err)
 533                 goto err_out_send_channel_term;
 534
 535         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 536         if (err)
 537                 goto err_out_send_channel_term;
 538
 539         pci_set_drvdata(adapter->pdev, adapter);
 540         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 541                  adapter->netdev->name);
 542         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 543                              adapter->ahw->idc.delay);
 544         return 0;
 545
 546 err_out_send_channel_term:
 547         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 548
 549 err_out_disable_bc_intr:
 550         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 551
 552 err_out_cleanup_sriov:
 553         __qlcnic_sriov_cleanup(adapter);
 554
 555 err_out_disable_mbx_intr:
 556         qlcnic_83xx_free_mbx_intr(adapter);
 557
 558 err_out_disable_msi:
 559         qlcnic_teardown_intr(adapter);
 560         return err;
 561 }
 562
 563 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 564 {
 565         u32 state;
 566
 567         do {
 568                 msleep(20);
 569                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 570                         return -EIO;
 571                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 572         } while (state != QLC_83XX_IDC_DEV_READY);
 573
 574         return 0;
 575 }
 576
 577 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 578 {
 579         struct qlcnic_hardware_context *ahw = adapter->ahw;
 580         int err;
 581
 582         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 583         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 584         ahw->reset_context = 0;
 585         adapter->fw_fail_cnt = 0;
 586         ahw->msix_supported = 1;
 587         adapter->need_fw_reset = 0;
 588         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 589
 590         err = qlcnic_sriov_check_dev_ready(adapter);
 591         if (err)
 592                 return err;
 593
 594         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 595         if (err)
 596                 return err;
 597
 598         if (qlcnic_read_mac_addr(adapter))
 599                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 600
 601         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 602
 603         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 604         return 0;
 605 }
 606
 607 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 608 {
 609         struct qlcnic_hardware_context *ahw = adapter->ahw;
 610
 611         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 612         dev_info(&adapter->pdev->dev,
 613                  "HAL Version: %d Non Privileged SRIOV function\n",
 614                  ahw->fw_hal_version);
 615         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 616         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 617         return;
 618 }
 619
 620 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 621 {
 622         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 623         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 624         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 625 }
 626
 627 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 628 {
 629         u32 pay_size;
 630
 631         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 632
 633         if (pay_size)
 634                 pay_size = QLC_BC_PAYLOAD_SZ;
 635         else
 636                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 637
 638         return pay_size;
 639 }
 640
 641 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 642 {
 643         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 644         u8 i;
 645
 646         if (qlcnic_sriov_vf_check(adapter))
 647                 return 0;
 648
 649         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 650                 if (vf_info[i].pci_func == pci_func)
 651                         return i;
 652         }
 653
 654         return -EINVAL;
 655 }
 656
 657 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 658 {
 659         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 660         if (!*trans)
 661                 return -ENOMEM;
 662
 663         init_completion(&(*trans)->resp_cmpl);
 664         return 0;
 665 }
 666
 667 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 668                                             u32 size)
 669 {
 670         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 671         if (!*hdr)
 672                 return -ENOMEM;
 673
 674         return 0;
 675 }
 676
 677 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 678 {
 679         const struct qlcnic_mailbox_metadata *mbx_tbl;
 680         int i, size;
 681
 682         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 683         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 684
 685         for (i = 0; i < size; i++) {
 686                 if (type == mbx_tbl[i].cmd) {
 687                         mbx->op_type = QLC_BC_CMD;
 688                         mbx->req.num = mbx_tbl[i].in_args;
 689                         mbx->rsp.num = mbx_tbl[i].out_args;
 690                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 691                                                GFP_ATOMIC);
 692                         if (!mbx->req.arg)
 693                                 return -ENOMEM;
 694                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 695                                                GFP_ATOMIC);
 696                         if (!mbx->rsp.arg) {
 697                                 kfree(mbx->req.arg);
 698                                 mbx->req.arg = NULL;
 699                                 return -ENOMEM;
 700                         }
 701                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 702                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 703                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 704                                            (3 << 29));
 705                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 706                         return 0;
 707                 }
 708         }
 709         return -EINVAL;
 710 }
 711
 712 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 713                                        struct qlcnic_cmd_args *cmd,
 714                                        u16 seq, u8 msg_type)
 715 {
 716         struct qlcnic_bc_hdr *hdr;
 717         int i;
 718         u32 num_regs, bc_pay_sz;
 719         u16 remainder;
 720         u8 cmd_op, num_frags, t_num_frags;
 721
 722         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 723         if (msg_type == QLC_BC_COMMAND) {
 724                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 725                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 726                 num_regs = cmd->req.num;
 727                 trans->req_pay_size = (num_regs * 4);
 728                 num_regs = cmd->rsp.num;
 729                 trans->rsp_pay_size = (num_regs * 4);
 730                 cmd_op = cmd->req.arg[0] & 0xff;
 731                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 732                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 733                 if (remainder)
 734                         num_frags++;
 735                 t_num_frags = num_frags;
 736                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 737                         return -ENOMEM;
 738                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 739                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 740                 if (remainder)
 741                         num_frags++;
 742                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 743                         return -ENOMEM;
 744                 num_frags  = t_num_frags;
 745                 hdr = trans->req_hdr;
 746         }  else {
 747                 cmd->req.arg = (u32 *)trans->req_pay;
 748                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 749                 cmd_op = cmd->req.arg[0] & 0xff;
 750                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 751                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 752                 if (remainder)
 753                         num_frags++;
 754                 cmd->req.num = trans->req_pay_size / 4;
 755                 cmd->rsp.num = trans->rsp_pay_size / 4;
 756                 hdr = trans->rsp_hdr;
 757                 cmd->op_type = trans->req_hdr->op_type;
 758         }
 759
 760         trans->trans_id = seq;
 761         trans->cmd_id = cmd_op;
 762         for (i = 0; i < num_frags; i++) {
 763                 hdr[i].version = 2;
 764                 hdr[i].msg_type = msg_type;
 765                 hdr[i].op_type = cmd->op_type;
 766                 hdr[i].num_cmds = 1;
 767                 hdr[i].num_frags = num_frags;
 768                 hdr[i].frag_num = i + 1;
 769                 hdr[i].cmd_op = cmd_op;
 770                 hdr[i].seq_id = seq;
 771         }
 772         return 0;
 773 }
 774
 775 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 776 {
 777         if (!trans)
 778                 return;
 779         kfree(trans->req_hdr);
 780         kfree(trans->rsp_hdr);
 781         kfree(trans);
 782 }
 783
 784 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 785                                     struct qlcnic_bc_trans *trans, u8 type)
 786 {
 787         struct qlcnic_trans_list *t_list;
 788         unsigned long flags;
 789         int ret = 0;
 790
 791         if (type == QLC_BC_RESPONSE) {
 792                 t_list = &vf->rcv_act;
 793                 spin_lock_irqsave(&t_list->lock, flags);
 794                 t_list->count--;
 795                 list_del(&trans->list);
 796                 if (t_list->count > 0)
 797                         ret = 1;
 798                 spin_unlock_irqrestore(&t_list->lock, flags);
 799         }
 800         if (type == QLC_BC_COMMAND) {
 801                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 802                         msleep(100);
 803                 vf->send_cmd = NULL;
 804                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 805         }
 806         return ret;
 807 }
 808
 809 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 810                                          struct qlcnic_vf_info *vf,
 811                                          work_func_t func)
 812 {
 813         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 814             vf->adapter->need_fw_reset)
 815                 return;
 816
 817         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 818 }
 819
 820 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 821 {
 822         struct completion *cmpl = &trans->resp_cmpl;
 823
 824         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 825                 trans->trans_state = QLC_END;
 826         else
 827                 trans->trans_state = QLC_ABORT;
 828
 829         return;
 830 }
 831
 832 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 833                                             u8 type)
 834 {
 835         if (type == QLC_BC_RESPONSE) {
 836                 trans->curr_rsp_frag++;
 837                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 838                         trans->trans_state = QLC_INIT;
 839                 else
 840                         trans->trans_state = QLC_END;
 841         } else {
 842                 trans->curr_req_frag++;
 843                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 844                         trans->trans_state = QLC_INIT;
 845                 else
 846                         trans->trans_state = QLC_WAIT_FOR_RESP;
 847         }
 848 }
 849
 850 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 851                                                u8 type)
 852 {
 853         struct qlcnic_vf_info *vf = trans->vf;
 854         struct completion *cmpl = &vf->ch_free_cmpl;
 855
 856         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 857                 trans->trans_state = QLC_ABORT;
 858                 return;
 859         }
 860
 861         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 862         qlcnic_sriov_handle_multi_frags(trans, type);
 863 }
 864
 865 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 866                                      u32 *hdr, u32 *pay, u32 size)
 867 {
 868         struct qlcnic_hardware_context *ahw = adapter->ahw;
 869         u32 fw_mbx;
 870         u8 i, max = 2, hdr_size, j;
 871
 872         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 873         max = (size / sizeof(u32)) + hdr_size;
 874
 875         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 876         for (i = 2, j = 0; j < hdr_size; i++, j++)
 877                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 878         for (; j < max; i++, j++)
 879                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 880 }
 881
 882 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 883 {
 884         int ret = -EBUSY;
 885         u32 timeout = 10000;
 886
 887         do {
 888                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 889                         ret = 0;
 890                         break;
 891                 }
 892                 mdelay(1);
 893         } while (--timeout);
 894
 895         return ret;
 896 }
 897
 898 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 899 {
 900         struct qlcnic_vf_info *vf = trans->vf;
 901         u32 pay_size, hdr_size;
 902         u32 *hdr, *pay;
 903         int ret;
 904         u8 pci_func = trans->func_id;
 905
 906         if (__qlcnic_sriov_issue_bc_post(vf))
 907                 return -EBUSY;
 908
 909         if (type == QLC_BC_COMMAND) {
 910                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 911                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 912                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 913                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 914                                                        trans->curr_req_frag);
 915                 pay_size = (pay_size / sizeof(u32));
 916         } else {
 917                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 918                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 919                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 920                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 921                                                        trans->curr_rsp_frag);
 922                 pay_size = (pay_size / sizeof(u32));
 923         }
 924
 925         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 926                                        pci_func, pay_size);
 927         return ret;
 928 }
 929
 930 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 931                                       struct qlcnic_vf_info *vf, u8 type)
 932 {
 933         bool flag = true;
 934         int err = -EIO;
 935
 936         while (flag) {
 937                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 938                     vf->adapter->need_fw_reset)
 939                         trans->trans_state = QLC_ABORT;
 940
 941                 switch (trans->trans_state) {
 942                 case QLC_INIT:
 943                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 944                         if (qlcnic_sriov_issue_bc_post(trans, type))
 945                                 trans->trans_state = QLC_ABORT;
 946                         break;
 947                 case QLC_WAIT_FOR_CHANNEL_FREE:
 948                         qlcnic_sriov_wait_for_channel_free(trans, type);
 949                         break;
 950                 case QLC_WAIT_FOR_RESP:
 951                         qlcnic_sriov_wait_for_resp(trans);
 952                         break;
 953                 case QLC_END:
 954                         err = 0;
 955                         flag = false;
 956                         break;
 957                 case QLC_ABORT:
 958                         err = -EIO;
 959                         flag = false;
 960                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 961                         break;
 962                 default:
 963                         err = -EIO;
 964                         flag = false;
 965                 }
 966         }
 967         return err;
 968 }
 969
 970 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
 971                                     struct qlcnic_bc_trans *trans, int pci_func)
 972 {
 973         struct qlcnic_vf_info *vf;
 974         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
 975
 976         if (index < 0)
 977                 return -EIO;
 978
 979         vf = &adapter->ahw->sriov->vf_info[index];
 980         trans->vf = vf;
 981         trans->func_id = pci_func;
 982
 983         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
 984                 if (qlcnic_sriov_pf_check(adapter))
 985                         return -EIO;
 986                 if (qlcnic_sriov_vf_check(adapter) &&
 987                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
 988                         return -EIO;
 989         }
 990
 991         mutex_lock(&vf->send_cmd_lock);
 992         vf->send_cmd = trans;
 993         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
 994         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
 995         mutex_unlock(&vf->send_cmd_lock);
 996         return err;
 997 }
 998
 999 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1000                                           struct qlcnic_bc_trans *trans,
1001                                           struct qlcnic_cmd_args *cmd)
1002 {
1003 #ifdef CONFIG_QLCNIC_SRIOV
1004         if (qlcnic_sriov_pf_check(adapter)) {
1005                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1006                 return;
1007         }
1008 #endif
1009         cmd->rsp.arg[0] |= (0x9 << 25);
1010         return;
1011 }
1012
1013 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1014 {
1015         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1016                                                  trans_work);
1017         struct qlcnic_bc_trans *trans = NULL;
1018         struct qlcnic_adapter *adapter  = vf->adapter;
1019         struct qlcnic_cmd_args cmd;
1020         u8 req;
1021
1022         if (adapter->need_fw_reset)
1023                 return;
1024
1025         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1026                 return;
1027
1028         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1029         trans = list_first_entry(&vf->rcv_act.wait_list,
1030                                  struct qlcnic_bc_trans, list);
1031         adapter = vf->adapter;
1032
1033         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1034                                         QLC_BC_RESPONSE))
1035                 goto cleanup_trans;
1036
1037         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1038         trans->trans_state = QLC_INIT;
1039         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1040
1041 cleanup_trans:
1042         qlcnic_free_mbx_args(&cmd);
1043         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1044         qlcnic_sriov_cleanup_transaction(trans);
1045         if (req)
1046                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1047                                              qlcnic_sriov_process_bc_cmd);
1048 }
1049
1050 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1051                                         struct qlcnic_vf_info *vf)
1052 {
1053         struct qlcnic_bc_trans *trans;
1054         u32 pay_size;
1055
1056         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1057                 return;
1058
1059         trans = vf->send_cmd;
1060
1061         if (trans == NULL)
1062                 goto clear_send;
1063
1064         if (trans->trans_id != hdr->seq_id)
1065                 goto clear_send;
1066
1067         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1068                                                trans->curr_rsp_frag);
1069         qlcnic_sriov_pull_bc_msg(vf->adapter,
1070                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1071                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1072                                  pay_size);
1073         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1074                 goto clear_send;
1075
1076         complete(&trans->resp_cmpl);
1077
1078 clear_send:
1079         clear_bit(QLC_BC_VF_SEND, &vf->state);
1080 }
1081
1082 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1083                                 struct qlcnic_vf_info *vf,
1084                                 struct qlcnic_bc_trans *trans)
1085 {
1086         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1087
1088         t_list->count++;
1089         list_add_tail(&trans->list, &t_list->wait_list);
1090         if (t_list->count == 1)
1091                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1092                                              qlcnic_sriov_process_bc_cmd);
1093         return 0;
1094 }
1095
1096 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1097                                      struct qlcnic_vf_info *vf,
1098                                      struct qlcnic_bc_trans *trans)
1099 {
1100         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1101
1102         spin_lock(&t_list->lock);
1103
1104         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1105
1106         spin_unlock(&t_list->lock);
1107         return 0;
1108 }
1109
1110 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1111                                               struct qlcnic_vf_info *vf,
1112                                               struct qlcnic_bc_hdr *hdr)
1113 {
1114         struct qlcnic_bc_trans *trans = NULL;
1115         struct list_head *node;
1116         u32 pay_size, curr_frag;
1117         u8 found = 0, active = 0;
1118
1119         spin_lock(&vf->rcv_pend.lock);
1120         if (vf->rcv_pend.count > 0) {
1121                 list_for_each(node, &vf->rcv_pend.wait_list) {
1122                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1123                         if (trans->trans_id == hdr->seq_id) {
1124                                 found = 1;
1125                                 break;
1126                         }
1127                 }
1128         }
1129
1130         if (found) {
1131                 curr_frag = trans->curr_req_frag;
1132                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1133                                                        curr_frag);
1134                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1135                                          (u32 *)(trans->req_hdr + curr_frag),
1136                                          (u32 *)(trans->req_pay + curr_frag),
1137                                          pay_size);
1138                 trans->curr_req_frag++;
1139                 if (trans->curr_req_frag >= hdr->num_frags) {
1140                         vf->rcv_pend.count--;
1141                         list_del(&trans->list);
1142                         active = 1;
1143                 }
1144         }
1145         spin_unlock(&vf->rcv_pend.lock);
1146
1147         if (active)
1148                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1149                         qlcnic_sriov_cleanup_transaction(trans);
1150
1151         return;
1152 }
1153
1154 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1155                                        struct qlcnic_bc_hdr *hdr,
1156                                        struct qlcnic_vf_info *vf)
1157 {
1158         struct qlcnic_bc_trans *trans;
1159         struct qlcnic_adapter *adapter = vf->adapter;
1160         struct qlcnic_cmd_args cmd;
1161         u32 pay_size;
1162         int err;
1163         u8 cmd_op;
1164
1165         if (adapter->need_fw_reset)
1166                 return;
1167
1168         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1169             hdr->op_type != QLC_BC_CMD &&
1170             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1171                 return;
1172
1173         if (hdr->frag_num > 1) {
1174                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1175                 return;
1176         }
1177
1178         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1179         cmd_op = hdr->cmd_op;
1180         if (qlcnic_sriov_alloc_bc_trans(&trans))
1181                 return;
1182
1183         if (hdr->op_type == QLC_BC_CMD)
1184                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1185         else
1186                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1187
1188         if (err) {
1189                 qlcnic_sriov_cleanup_transaction(trans);
1190                 return;
1191         }
1192
1193         cmd.op_type = hdr->op_type;
1194         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1195                                         QLC_BC_COMMAND)) {
1196                 qlcnic_free_mbx_args(&cmd);
1197                 qlcnic_sriov_cleanup_transaction(trans);
1198                 return;
1199         }
1200
1201         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1202                                          trans->curr_req_frag);
1203         qlcnic_sriov_pull_bc_msg(vf->adapter,
1204                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1205                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1206                                  pay_size);
1207         trans->func_id = vf->pci_func;
1208         trans->vf = vf;
1209         trans->trans_id = hdr->seq_id;
1210         trans->curr_req_frag++;
1211
1212         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1213                 return;
1214
1215         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1216                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1217                         qlcnic_free_mbx_args(&cmd);
1218                         qlcnic_sriov_cleanup_transaction(trans);
1219                 }
1220         } else {
1221                 spin_lock(&vf->rcv_pend.lock);
1222                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1223                 vf->rcv_pend.count++;
1224                 spin_unlock(&vf->rcv_pend.lock);
1225         }
1226 }
1227
1228 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1229                                           struct qlcnic_vf_info *vf)
1230 {
1231         struct qlcnic_bc_hdr hdr;
1232         u32 *ptr = (u32 *)&hdr;
1233         u8 msg_type, i;
1234
1235         for (i = 2; i < 6; i++)
1236                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1237         msg_type = hdr.msg_type;
1238
1239         switch (msg_type) {
1240         case QLC_BC_COMMAND:
1241                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1242                 break;
1243         case QLC_BC_RESPONSE:
1244                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1245                 break;
1246         }
1247 }
1248
1249 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1250                                           struct qlcnic_vf_info *vf)
1251 {
1252         struct qlcnic_adapter *adapter = vf->adapter;
1253
1254         if (qlcnic_sriov_pf_check(adapter))
1255                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1256         else
1257                 dev_err(&adapter->pdev->dev,
1258                         "Invalid event to VF. VF should not get FLR event\n");
1259 }
1260
1261 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1262 {
1263         struct qlcnic_vf_info *vf;
1264         struct qlcnic_sriov *sriov;
1265         int index;
1266         u8 pci_func;
1267
1268         sriov = adapter->ahw->sriov;
1269         pci_func = qlcnic_sriov_target_func_id(event);
1270         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1271
1272         if (index < 0)
1273                 return;
1274
1275         vf = &sriov->vf_info[index];
1276         vf->pci_func = pci_func;
1277
1278         if (qlcnic_sriov_channel_free_check(event))
1279                 complete(&vf->ch_free_cmpl);
1280
1281         if (qlcnic_sriov_flr_check(event)) {
1282                 qlcnic_sriov_handle_flr_event(sriov, vf);
1283                 return;
1284         }
1285
1286         if (qlcnic_sriov_bc_msg_check(event))
1287                 qlcnic_sriov_handle_msg_event(sriov, vf);
1288 }
1289
1290 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1291 {
1292         struct qlcnic_cmd_args cmd;
1293         int err;
1294
1295         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1296                 return 0;
1297
1298         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1299                 return -ENOMEM;
1300
1301         if (enable)
1302                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1303
1304         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1305
1306         if (err != QLCNIC_RCODE_SUCCESS) {
1307                 dev_err(&adapter->pdev->dev,
1308                         "Failed to %s bc events, err=%d\n",
1309                         (enable ? "enable" : "disable"), err);
1310         }
1311
1312         qlcnic_free_mbx_args(&cmd);
1313         return err;
1314 }
1315
1316 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1317                                      struct qlcnic_bc_trans *trans)
1318 {
1319         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1320         u32 state;
1321
1322         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1323         if (state == QLC_83XX_IDC_DEV_READY) {
1324                 msleep(20);
1325                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1326                 trans->trans_state = QLC_INIT;
1327                 if (++adapter->fw_fail_cnt > max)
1328                         return -EIO;
1329                 else
1330                         return 0;
1331         }
1332
1333         return -EIO;
1334 }
1335
1336 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1337                                   struct qlcnic_cmd_args *cmd)
1338 {
1339         struct qlcnic_hardware_context *ahw = adapter->ahw;
1340         struct qlcnic_mailbox *mbx = ahw->mailbox;
1341         struct device *dev = &adapter->pdev->dev;
1342         struct qlcnic_bc_trans *trans;
1343         int err;
1344         u32 rsp_data, opcode, mbx_err_code, rsp;
1345         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1346         u8 func = ahw->pci_func;
1347
1348         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1349         if (rsp)
1350                 return rsp;
1351
1352         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1353         if (rsp)
1354                 goto cleanup_transaction;
1355
1356 retry:
1357         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1358                 rsp = -EIO;
1359                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1360                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1361                 goto err_out;
1362         }
1363
1364         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1365         if (err) {
1366                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1367                         (cmd->req.arg[0] & 0xffff), func);
1368                 rsp = QLCNIC_RCODE_TIMEOUT;
1369
1370                 /* After adapter reset PF driver may take some time to
1371                  * respond to VF's request. Retry request till maximum retries.
1372                  */
1373                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1374                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1375                         goto retry;
1376
1377                 goto err_out;
1378         }
1379
1380         rsp_data = cmd->rsp.arg[0];
1381         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1382         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1383
1384         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1385             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1386                 rsp = QLCNIC_RCODE_SUCCESS;
1387         } else {
1388                 rsp = mbx_err_code;
1389                 if (!rsp)
1390                         rsp = 1;
1391                 dev_err(dev,
1392                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1393                         opcode, mbx_err_code, func);
1394         }
1395
1396 err_out:
1397         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1398                 ahw->reset_context = 1;
1399                 adapter->need_fw_reset = 1;
1400                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1401         }
1402
1403 cleanup_transaction:
1404         qlcnic_sriov_cleanup_transaction(trans);
1405         return rsp;
1406 }
1407
1408 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1409 {
1410         struct qlcnic_cmd_args cmd;
1411         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1412         int ret;
1413
1414         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1415                 return -ENOMEM;
1416
1417         ret = qlcnic_issue_cmd(adapter, &cmd);
1418         if (ret) {
1419                 dev_err(&adapter->pdev->dev,
1420                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1421                         ret);
1422                 goto out;
1423         }
1424
1425         cmd_op = (cmd.rsp.arg[0] & 0xff);
1426         if (cmd.rsp.arg[0] >> 25 == 2)
1427                 return 2;
1428         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1429                 set_bit(QLC_BC_VF_STATE, &vf->state);
1430         else
1431                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1432
1433 out:
1434         qlcnic_free_mbx_args(&cmd);
1435         return ret;
1436 }
1437
1438 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1439 {
1440         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1441         struct qlcnic_mac_list_s *cur;
1442         struct list_head *head, tmp_list;
1443
1444         INIT_LIST_HEAD(&tmp_list);
1445         head = &adapter->vf_mc_list;
1446         netif_addr_lock_bh(netdev);
1447
1448         while (!list_empty(head)) {
1449                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1450                 list_move(&cur->list, &tmp_list);
1451         }
1452
1453         netif_addr_unlock_bh(netdev);
1454
1455         while (!list_empty(&tmp_list)) {
1456                 cur = list_entry((&tmp_list)->next,
1457                                  struct qlcnic_mac_list_s, list);
1458                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1459                 list_del(&cur->list);
1460                 kfree(cur);
1461         }
1462 }
1463
1464 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1465 {
1466         struct list_head *head = &bc->async_list;
1467         struct qlcnic_async_work_list *entry;
1468
1469         while (!list_empty(head)) {
1470                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1471                                    list);
1472                 cancel_work_sync(&entry->work);
1473                 list_del(&entry->list);
1474                 kfree(entry);
1475         }
1476 }
1477
1478 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1479 {
1480         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1481         u16 vlan;
1482
1483         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1484                 return;
1485
1486         vlan = adapter->ahw->sriov->vlan;
1487         __qlcnic_set_multi(netdev, vlan);
1488 }
1489
1490 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1491 {
1492         struct qlcnic_async_work_list *entry;
1493         struct net_device *netdev;
1494
1495         entry = container_of(work, struct qlcnic_async_work_list, work);
1496         netdev = (struct net_device *)entry->ptr;
1497
1498         qlcnic_sriov_vf_set_multi(netdev);
1499         return;
1500 }
1501
1502 static struct qlcnic_async_work_list *
1503 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1504 {
1505         struct list_head *node;
1506         struct qlcnic_async_work_list *entry = NULL;
1507         u8 empty = 0;
1508
1509         list_for_each(node, &bc->async_list) {
1510                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1511                 if (!work_pending(&entry->work)) {
1512                         empty = 1;
1513                         break;
1514                 }
1515         }
1516
1517         if (!empty) {
1518                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1519                                 GFP_ATOMIC);
1520                 if (entry == NULL)
1521                         return NULL;
1522                 list_add_tail(&entry->list, &bc->async_list);
1523         }
1524
1525         return entry;
1526 }
1527
1528 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1529                                                 work_func_t func, void *data)
1530 {
1531         struct qlcnic_async_work_list *entry = NULL;
1532
1533         entry = qlcnic_sriov_get_free_node_async_work(bc);
1534         if (!entry)
1535                 return;
1536
1537         entry->ptr = data;
1538         INIT_WORK(&entry->work, func);
1539         queue_work(bc->bc_async_wq, &entry->work);
1540 }
1541
1542 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1543 {
1544
1545         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1546         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1547
1548         if (adapter->need_fw_reset)
1549                 return;
1550
1551         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1552                                             netdev);
1553 }
1554
1555 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1556 {
1557         int err;
1558
1559         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1560         qlcnic_83xx_enable_mbx_interrupt(adapter);
1561
1562         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1563         if (err)
1564                 return err;
1565
1566         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1567         if (err)
1568                 goto err_out_cleanup_bc_intr;
1569
1570         err = qlcnic_sriov_vf_init_driver(adapter);
1571         if (err)
1572                 goto err_out_term_channel;
1573
1574         return 0;
1575
1576 err_out_term_channel:
1577         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1578
1579 err_out_cleanup_bc_intr:
1580         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1581         return err;
1582 }
1583
1584 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1585 {
1586         struct net_device *netdev = adapter->netdev;
1587
1588         if (netif_running(netdev)) {
1589                 if (!qlcnic_up(adapter, netdev))
1590                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1591         }
1592
1593         netif_device_attach(netdev);
1594 }
1595
1596 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1597 {
1598         struct qlcnic_hardware_context *ahw = adapter->ahw;
1599         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1600         struct net_device *netdev = adapter->netdev;
1601         u8 i, max_ints = ahw->num_msix - 1;
1602
1603         netif_device_detach(netdev);
1604         qlcnic_83xx_detach_mailbox_work(adapter);
1605         qlcnic_83xx_disable_mbx_intr(adapter);
1606
1607         if (netif_running(netdev))
1608                 qlcnic_down(adapter, netdev);
1609
1610         for (i = 0; i < max_ints; i++) {
1611                 intr_tbl[i].id = i;
1612                 intr_tbl[i].enabled = 0;
1613                 intr_tbl[i].src = 0;
1614         }
1615         ahw->reset_context = 0;
1616 }
1617
1618 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1619 {
1620         struct qlcnic_hardware_context *ahw = adapter->ahw;
1621         struct device *dev = &adapter->pdev->dev;
1622         struct qlc_83xx_idc *idc = &ahw->idc;
1623         u8 func = ahw->pci_func;
1624         u32 state;
1625
1626         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1627             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1628                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1629                         qlcnic_sriov_vf_attach(adapter);
1630                         adapter->fw_fail_cnt = 0;
1631                         dev_info(dev,
1632                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1633                                  __func__, func);
1634                 } else {
1635                         dev_err(dev,
1636                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1637                                 __func__, func);
1638                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1639                         dev_info(dev, "Current state 0x%x after FW reset\n",
1640                                  state);
1641                 }
1642         }
1643
1644         return 0;
1645 }
1646
1647 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1648 {
1649         struct qlcnic_hardware_context *ahw = adapter->ahw;
1650         struct qlcnic_mailbox *mbx = ahw->mailbox;
1651         struct device *dev = &adapter->pdev->dev;
1652         struct qlc_83xx_idc *idc = &ahw->idc;
1653         u8 func = ahw->pci_func;
1654         u32 state;
1655
1656         adapter->reset_ctx_cnt++;
1657
1658         /* Skip the context reset and check if FW is hung */
1659         if (adapter->reset_ctx_cnt < 3) {
1660                 adapter->need_fw_reset = 1;
1661                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1662                 dev_info(dev,
1663                          "Resetting context, wait here to check if FW is in failed state\n");
1664                 return 0;
1665         }
1666
1667         /* Check if number of resets exceed the threshold.
1668          * If it exceeds the threshold just fail the VF.
1669          */
1670         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1671                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1672                 adapter->tx_timeo_cnt = 0;
1673                 adapter->fw_fail_cnt = 0;
1674                 adapter->reset_ctx_cnt = 0;
1675                 qlcnic_sriov_vf_detach(adapter);
1676                 dev_err(dev,
1677                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1678                 return -EIO;
1679         }
1680
1681         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1682         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1683                  __func__, adapter->reset_ctx_cnt, func);
1684         set_bit(__QLCNIC_RESETTING, &adapter->state);
1685         adapter->need_fw_reset = 1;
1686         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1687         qlcnic_sriov_vf_detach(adapter);
1688         adapter->need_fw_reset = 0;
1689
1690         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1691                 qlcnic_sriov_vf_attach(adapter);
1692                 adapter->tx_timeo_cnt = 0;
1693                 adapter->reset_ctx_cnt = 0;
1694                 adapter->fw_fail_cnt = 0;
1695                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1696         } else {
1697                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1698                         __func__, func);
1699                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1700                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1701         }
1702
1703         return 0;
1704 }
1705
1706 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1707 {
1708         struct qlcnic_hardware_context *ahw = adapter->ahw;
1709         int ret = 0;
1710
1711         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1712                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1713         else if (ahw->reset_context)
1714                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1715
1716         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1717         return ret;
1718 }
1719
1720 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1721 {
1722         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1723
1724         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1725         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1726                 qlcnic_sriov_vf_detach(adapter);
1727
1728         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1729         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1730         return -EIO;
1731 }
1732
1733 static int
1734 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1735 {
1736         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1737         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1738
1739         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1740         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1741                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1742                 adapter->tx_timeo_cnt = 0;
1743                 adapter->reset_ctx_cnt = 0;
1744                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1745                 qlcnic_sriov_vf_detach(adapter);
1746         }
1747
1748         return 0;
1749 }
1750
1751 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1752 {
1753         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1754         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1755         u8 func = adapter->ahw->pci_func;
1756
1757         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1758                 dev_err(&adapter->pdev->dev,
1759                         "Firmware hang detected by VF 0x%x\n", func);
1760                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1761                 adapter->tx_timeo_cnt = 0;
1762                 adapter->reset_ctx_cnt = 0;
1763                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1764                 qlcnic_sriov_vf_detach(adapter);
1765         }
1766         return 0;
1767 }
1768
1769 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1770 {
1771         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1772         return 0;
1773 }
1774
1775 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1776 {
1777         struct qlcnic_adapter *adapter;
1778         struct qlc_83xx_idc *idc;
1779         int ret = 0;
1780
1781         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1782         idc = &adapter->ahw->idc;
1783         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1784
1785         switch (idc->curr_state) {
1786         case QLC_83XX_IDC_DEV_READY:
1787                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1788                 break;
1789         case QLC_83XX_IDC_DEV_NEED_RESET:
1790         case QLC_83XX_IDC_DEV_INIT:
1791                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1792                 break;
1793         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1794                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1795                 break;
1796         case QLC_83XX_IDC_DEV_FAILED:
1797                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1798                 break;
1799         case QLC_83XX_IDC_DEV_QUISCENT:
1800                 break;
1801         default:
1802                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1803         }
1804
1805         idc->prev_state = idc->curr_state;
1806         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1807                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1808                                      idc->delay);
1809 }
1810
1811 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1812 {
1813         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1814                 msleep(20);
1815
1816         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1817         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1818         cancel_delayed_work_sync(&adapter->fw_work);
1819 }
1820
1821 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1822                                           u16 vid, u8 enable)
1823 {
1824         u16 vlan = sriov->vlan;
1825         u8 allowed = 0;
1826         int i;
1827
1828         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1829                 return -EINVAL;
1830
1831         if (enable) {
1832                 if (vlan)
1833                         return -EINVAL;
1834
1835                 if (sriov->any_vlan) {
1836                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1837                                 if (sriov->allowed_vlans[i] == vid)
1838                                         allowed = 1;
1839                         }
1840
1841                         if (!allowed)
1842                                 return -EINVAL;
1843                 }
1844         } else {
1845                 if (!vlan || vlan != vid)
1846                         return -EINVAL;
1847         }
1848
1849         return 0;
1850 }
1851
1852 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1853                                    u16 vid, u8 enable)
1854 {
1855         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1856         struct qlcnic_cmd_args cmd;
1857         int ret;
1858
1859         if (vid == 0)
1860                 return 0;
1861
1862         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1863         if (ret)
1864                 return ret;
1865
1866         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1867                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1868         if (ret)
1869                 return ret;
1870
1871         cmd.req.arg[1] = (enable & 1) | vid << 16;
1872
1873         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1874         ret = qlcnic_issue_cmd(adapter, &cmd);
1875         if (ret) {
1876                 dev_err(&adapter->pdev->dev,
1877                         "Failed to configure guest VLAN, err=%d\n", ret);
1878         } else {
1879                 qlcnic_free_mac_list(adapter);
1880
1881                 if (enable)
1882                         sriov->vlan = vid;
1883                 else
1884                         sriov->vlan = 0;
1885
1886                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1887         }
1888
1889         qlcnic_free_mbx_args(&cmd);
1890         return ret;
1891 }
1892
1893 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1894 {
1895         struct list_head *head = &adapter->mac_list;
1896         struct qlcnic_mac_list_s *cur;
1897         u16 vlan;
1898
1899         vlan = adapter->ahw->sriov->vlan;
1900
1901         while (!list_empty(head)) {
1902                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1903                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1904                                           vlan, QLCNIC_MAC_DEL);
1905                 list_del(&cur->list);
1906                 kfree(cur);
1907         }
1908 }
1909
1910 int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
1911 {
1912         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1913         struct net_device *netdev = adapter->netdev;
1914         int retval;
1915
1916         netif_device_detach(netdev);
1917         qlcnic_cancel_idc_work(adapter);
1918
1919         if (netif_running(netdev))
1920                 qlcnic_down(adapter, netdev);
1921
1922         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1923         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1924         qlcnic_83xx_disable_mbx_intr(adapter);
1925         cancel_delayed_work_sync(&adapter->idc_aen_work);
1926
1927         retval = pci_save_state(pdev);
1928         if (retval)
1929                 return retval;
1930
1931         return 0;
1932 }
1933
1934 int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
1935 {
1936         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1937         struct net_device *netdev = adapter->netdev;
1938         int err;
1939
1940         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1941         qlcnic_83xx_enable_mbx_interrupt(adapter);
1942         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1943         if (err)
1944                 return err;
1945
1946         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1947         if (!err) {
1948                 if (netif_running(netdev)) {
1949                         err = qlcnic_up(adapter, netdev);
1950                         if (!err)
1951                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1952                 }
1953         }
1954
1955         netif_device_attach(netdev);
1956         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1957                              idc->delay);
1958         return err;
1959 }