1 /* Renesas Ethernet AVB device driver
3 * Copyright (C) 2014-2015 Renesas Electronics Corporation
4 * Copyright (C) 2015 Renesas Solutions Corp.
5 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
7 * Based on the SuperH Ethernet driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License version 2,
11 * as published by the Free Software Foundation.
14 #include <linux/cache.h>
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/err.h>
19 #include <linux/etherdevice.h>
20 #include <linux/ethtool.h>
21 #include <linux/if_vlan.h>
22 #include <linux/kernel.h>
23 #include <linux/list.h>
24 #include <linux/module.h>
25 #include <linux/net_tstamp.h>
27 #include <linux/of_device.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_mdio.h>
30 #include <linux/of_net.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/slab.h>
33 #include <linux/spinlock.h>
35 #include <asm/div64.h>
39 #define RAVB_DEF_MSG_ENABLE \
45 static const char *ravb_rx_irqs[NUM_RX_QUEUE] = {
50 static const char *ravb_tx_irqs[NUM_TX_QUEUE] = {
55 void ravb_modify(struct net_device *ndev, enum ravb_reg reg, u32 clear,
58 ravb_write(ndev, (ravb_read(ndev, reg) & ~clear) | set, reg);
61 int ravb_wait(struct net_device *ndev, enum ravb_reg reg, u32 mask, u32 value)
65 for (i = 0; i < 10000; i++) {
66 if ((ravb_read(ndev, reg) & mask) == value)
73 static int ravb_config(struct net_device *ndev)
78 ravb_modify(ndev, CCC, CCC_OPC, CCC_OPC_CONFIG);
79 /* Check if the operating mode is changed to the config mode */
80 error = ravb_wait(ndev, CSR, CSR_OPS, CSR_OPS_CONFIG);
82 netdev_err(ndev, "failed to switch device to config mode\n");
87 static void ravb_set_duplex(struct net_device *ndev)
89 struct ravb_private *priv = netdev_priv(ndev);
91 ravb_modify(ndev, ECMR, ECMR_DM, priv->duplex ? ECMR_DM : 0);
94 static void ravb_set_rate(struct net_device *ndev)
96 struct ravb_private *priv = netdev_priv(ndev);
98 switch (priv->speed) {
99 case 100: /* 100BASE */
100 ravb_write(ndev, GECMR_SPEED_100, GECMR);
102 case 1000: /* 1000BASE */
103 ravb_write(ndev, GECMR_SPEED_1000, GECMR);
108 static void ravb_set_buffer_align(struct sk_buff *skb)
110 u32 reserve = (unsigned long)skb->data & (RAVB_ALIGN - 1);
113 skb_reserve(skb, RAVB_ALIGN - reserve);
116 /* Get MAC address from the MAC address registers
118 * Ethernet AVB device doesn't have ROM for MAC address.
119 * This function gets the MAC address that was used by a bootloader.
121 static void ravb_read_mac_address(struct net_device *ndev, const u8 *mac)
124 ether_addr_copy(ndev->dev_addr, mac);
126 u32 mahr = ravb_read(ndev, MAHR);
127 u32 malr = ravb_read(ndev, MALR);
129 ndev->dev_addr[0] = (mahr >> 24) & 0xFF;
130 ndev->dev_addr[1] = (mahr >> 16) & 0xFF;
131 ndev->dev_addr[2] = (mahr >> 8) & 0xFF;
132 ndev->dev_addr[3] = (mahr >> 0) & 0xFF;
133 ndev->dev_addr[4] = (malr >> 8) & 0xFF;
134 ndev->dev_addr[5] = (malr >> 0) & 0xFF;
138 static void ravb_mdio_ctrl(struct mdiobb_ctrl *ctrl, u32 mask, int set)
140 struct ravb_private *priv = container_of(ctrl, struct ravb_private,
143 ravb_modify(priv->ndev, PIR, mask, set ? mask : 0);
146 /* MDC pin control */
147 static void ravb_set_mdc(struct mdiobb_ctrl *ctrl, int level)
149 ravb_mdio_ctrl(ctrl, PIR_MDC, level);
152 /* Data I/O pin control */
153 static void ravb_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
155 ravb_mdio_ctrl(ctrl, PIR_MMD, output);
159 static void ravb_set_mdio_data(struct mdiobb_ctrl *ctrl, int value)
161 ravb_mdio_ctrl(ctrl, PIR_MDO, value);
165 static int ravb_get_mdio_data(struct mdiobb_ctrl *ctrl)
167 struct ravb_private *priv = container_of(ctrl, struct ravb_private,
170 return (ravb_read(priv->ndev, PIR) & PIR_MDI) != 0;
173 /* MDIO bus control struct */
174 static struct mdiobb_ops bb_ops = {
175 .owner = THIS_MODULE,
176 .set_mdc = ravb_set_mdc,
177 .set_mdio_dir = ravb_set_mdio_dir,
178 .set_mdio_data = ravb_set_mdio_data,
179 .get_mdio_data = ravb_get_mdio_data,
182 /* Free skb's and DMA buffers for Ethernet AVB */
183 static void ravb_ring_free(struct net_device *ndev, int q)
185 struct ravb_private *priv = netdev_priv(ndev);
189 /* Free RX skb ringbuffer */
190 if (priv->rx_skb[q]) {
191 for (i = 0; i < priv->num_rx_ring[q]; i++)
192 dev_kfree_skb(priv->rx_skb[q][i]);
194 kfree(priv->rx_skb[q]);
195 priv->rx_skb[q] = NULL;
197 /* Free TX skb ringbuffer */
198 if (priv->tx_skb[q]) {
199 for (i = 0; i < priv->num_tx_ring[q]; i++)
200 dev_kfree_skb(priv->tx_skb[q][i]);
202 kfree(priv->tx_skb[q]);
203 priv->tx_skb[q] = NULL;
205 /* Free aligned TX buffers */
206 kfree(priv->tx_align[q]);
207 priv->tx_align[q] = NULL;
209 if (priv->rx_ring[q]) {
210 ring_size = sizeof(struct ravb_ex_rx_desc) *
211 (priv->num_rx_ring[q] + 1);
212 dma_free_coherent(ndev->dev.parent, ring_size, priv->rx_ring[q],
213 priv->rx_desc_dma[q]);
214 priv->rx_ring[q] = NULL;
217 if (priv->tx_ring[q]) {
218 ring_size = sizeof(struct ravb_tx_desc) *
219 (priv->num_tx_ring[q] * NUM_TX_DESC + 1);
220 dma_free_coherent(ndev->dev.parent, ring_size, priv->tx_ring[q],
221 priv->tx_desc_dma[q]);
222 priv->tx_ring[q] = NULL;
226 /* Format skb and descriptor buffer for Ethernet AVB */
227 static void ravb_ring_format(struct net_device *ndev, int q)
229 struct ravb_private *priv = netdev_priv(ndev);
230 struct ravb_ex_rx_desc *rx_desc;
231 struct ravb_tx_desc *tx_desc;
232 struct ravb_desc *desc;
233 int rx_ring_size = sizeof(*rx_desc) * priv->num_rx_ring[q];
234 int tx_ring_size = sizeof(*tx_desc) * priv->num_tx_ring[q] *
241 priv->dirty_rx[q] = 0;
242 priv->dirty_tx[q] = 0;
244 memset(priv->rx_ring[q], 0, rx_ring_size);
245 /* Build RX ring buffer */
246 for (i = 0; i < priv->num_rx_ring[q]; i++) {
248 rx_desc = &priv->rx_ring[q][i];
249 rx_desc->ds_cc = cpu_to_le16(PKT_BUF_SZ);
250 dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data,
253 /* We just set the data size to 0 for a failed mapping which
254 * should prevent DMA from happening...
256 if (dma_mapping_error(ndev->dev.parent, dma_addr))
257 rx_desc->ds_cc = cpu_to_le16(0);
258 rx_desc->dptr = cpu_to_le32(dma_addr);
259 rx_desc->die_dt = DT_FEMPTY;
261 rx_desc = &priv->rx_ring[q][i];
262 rx_desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]);
263 rx_desc->die_dt = DT_LINKFIX; /* type */
265 memset(priv->tx_ring[q], 0, tx_ring_size);
266 /* Build TX ring buffer */
267 for (i = 0, tx_desc = priv->tx_ring[q]; i < priv->num_tx_ring[q];
269 tx_desc->die_dt = DT_EEMPTY;
271 tx_desc->die_dt = DT_EEMPTY;
273 tx_desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]);
274 tx_desc->die_dt = DT_LINKFIX; /* type */
276 /* RX descriptor base address for best effort */
277 desc = &priv->desc_bat[RX_QUEUE_OFFSET + q];
278 desc->die_dt = DT_LINKFIX; /* type */
279 desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]);
281 /* TX descriptor base address for best effort */
282 desc = &priv->desc_bat[q];
283 desc->die_dt = DT_LINKFIX; /* type */
284 desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]);
287 /* Init skb and descriptor buffer for Ethernet AVB */
288 static int ravb_ring_init(struct net_device *ndev, int q)
290 struct ravb_private *priv = netdev_priv(ndev);
295 /* Allocate RX and TX skb rings */
296 priv->rx_skb[q] = kcalloc(priv->num_rx_ring[q],
297 sizeof(*priv->rx_skb[q]), GFP_KERNEL);
298 priv->tx_skb[q] = kcalloc(priv->num_tx_ring[q],
299 sizeof(*priv->tx_skb[q]), GFP_KERNEL);
300 if (!priv->rx_skb[q] || !priv->tx_skb[q])
303 for (i = 0; i < priv->num_rx_ring[q]; i++) {
304 skb = netdev_alloc_skb(ndev, PKT_BUF_SZ + RAVB_ALIGN - 1);
307 ravb_set_buffer_align(skb);
308 priv->rx_skb[q][i] = skb;
311 /* Allocate rings for the aligned buffers */
312 priv->tx_align[q] = kmalloc(DPTR_ALIGN * priv->num_tx_ring[q] +
313 DPTR_ALIGN - 1, GFP_KERNEL);
314 if (!priv->tx_align[q])
317 /* Allocate all RX descriptors. */
318 ring_size = sizeof(struct ravb_ex_rx_desc) * (priv->num_rx_ring[q] + 1);
319 priv->rx_ring[q] = dma_alloc_coherent(ndev->dev.parent, ring_size,
320 &priv->rx_desc_dma[q],
322 if (!priv->rx_ring[q])
325 priv->dirty_rx[q] = 0;
327 /* Allocate all TX descriptors. */
328 ring_size = sizeof(struct ravb_tx_desc) *
329 (priv->num_tx_ring[q] * NUM_TX_DESC + 1);
330 priv->tx_ring[q] = dma_alloc_coherent(ndev->dev.parent, ring_size,
331 &priv->tx_desc_dma[q],
333 if (!priv->tx_ring[q])
339 ravb_ring_free(ndev, q);
344 /* E-MAC init function */
345 static void ravb_emac_init(struct net_device *ndev)
347 struct ravb_private *priv = netdev_priv(ndev);
349 /* Receive frame limit set register */
350 ravb_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, RFLR);
352 /* PAUSE prohibition */
353 ravb_write(ndev, ECMR_ZPF | (priv->duplex ? ECMR_DM : 0) |
354 ECMR_TE | ECMR_RE, ECMR);
358 /* Set MAC address */
360 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) |
361 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR);
363 (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR);
365 /* E-MAC status register clear */
366 ravb_write(ndev, ECSR_ICD | ECSR_MPD, ECSR);
368 /* E-MAC interrupt enable register */
369 ravb_write(ndev, ECSIPR_ICDIP | ECSIPR_MPDIP | ECSIPR_LCHNGIP, ECSIPR);
372 /* Device init function for Ethernet AVB */
373 static int ravb_dmac_init(struct net_device *ndev)
375 struct ravb_private *priv = netdev_priv(ndev);
378 /* Set CONFIG mode */
379 error = ravb_config(ndev);
383 error = ravb_ring_init(ndev, RAVB_BE);
386 error = ravb_ring_init(ndev, RAVB_NC);
388 ravb_ring_free(ndev, RAVB_BE);
392 /* Descriptor format */
393 ravb_ring_format(ndev, RAVB_BE);
394 ravb_ring_format(ndev, RAVB_NC);
396 #if defined(__LITTLE_ENDIAN)
397 ravb_modify(ndev, CCC, CCC_BOC, 0);
399 ravb_modify(ndev, CCC, CCC_BOC, CCC_BOC);
404 RCR_EFFS | RCR_ENCF | RCR_ETS0 | RCR_ESF | 0x18000000, RCR);
407 ravb_write(ndev, TGC_TQP_AVBMODE1 | 0x00222200, TGC);
409 /* Timestamp enable */
410 ravb_write(ndev, TCCR_TFEN, TCCR);
412 /* Interrupt init: */
413 if (priv->chip_id == RCAR_GEN3) {
415 ravb_write(ndev, 0, DIL);
416 /* Set queue specific interrupt */
417 ravb_write(ndev, CIE_CRIE | CIE_CTIE | CIE_CL0M, CIE);
420 ravb_write(ndev, RIC0_FRE0 | RIC0_FRE1, RIC0);
421 /* Disable FIFO full warning */
422 ravb_write(ndev, 0, RIC1);
423 /* Receive FIFO full error, descriptor empty */
424 ravb_write(ndev, RIC2_QFE0 | RIC2_QFE1 | RIC2_RFFE, RIC2);
425 /* Frame transmitted, timestamp FIFO updated */
426 ravb_write(ndev, TIC_FTE0 | TIC_FTE1 | TIC_TFUE, TIC);
428 /* Setting the control will start the AVB-DMAC process. */
429 ravb_modify(ndev, CCC, CCC_OPC, CCC_OPC_OPERATION);
434 /* Free TX skb function for AVB-IP */
435 static int ravb_tx_free(struct net_device *ndev, int q)
437 struct ravb_private *priv = netdev_priv(ndev);
438 struct net_device_stats *stats = &priv->stats[q];
439 struct ravb_tx_desc *desc;
444 for (; priv->cur_tx[q] - priv->dirty_tx[q] > 0; priv->dirty_tx[q]++) {
445 entry = priv->dirty_tx[q] % (priv->num_tx_ring[q] *
447 desc = &priv->tx_ring[q][entry];
448 if (desc->die_dt != DT_FEMPTY)
450 /* Descriptor type must be checked before all other reads */
452 size = le16_to_cpu(desc->ds_tagl) & TX_DS;
453 /* Free the original skb. */
454 if (priv->tx_skb[q][entry / NUM_TX_DESC]) {
455 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr),
456 size, DMA_TO_DEVICE);
457 /* Last packet descriptor? */
458 if (entry % NUM_TX_DESC == NUM_TX_DESC - 1) {
459 entry /= NUM_TX_DESC;
460 dev_kfree_skb_any(priv->tx_skb[q][entry]);
461 priv->tx_skb[q][entry] = NULL;
466 stats->tx_bytes += size;
467 desc->die_dt = DT_EEMPTY;
472 static void ravb_get_tx_tstamp(struct net_device *ndev)
474 struct ravb_private *priv = netdev_priv(ndev);
475 struct ravb_tstamp_skb *ts_skb, *ts_skb2;
476 struct skb_shared_hwtstamps shhwtstamps;
478 struct timespec64 ts;
483 count = (ravb_read(ndev, TSR) & TSR_TFFL) >> 8;
485 tfa2 = ravb_read(ndev, TFA2);
486 tfa_tag = (tfa2 & TFA2_TST) >> 16;
487 ts.tv_nsec = (u64)ravb_read(ndev, TFA0);
488 ts.tv_sec = ((u64)(tfa2 & TFA2_TSV) << 32) |
489 ravb_read(ndev, TFA1);
490 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
491 shhwtstamps.hwtstamp = timespec64_to_ktime(ts);
492 list_for_each_entry_safe(ts_skb, ts_skb2, &priv->ts_skb_list,
496 list_del(&ts_skb->list);
498 if (tag == tfa_tag) {
499 skb_tstamp_tx(skb, &shhwtstamps);
503 ravb_modify(ndev, TCCR, TCCR_TFR, TCCR_TFR);
507 /* Packet receive function for Ethernet AVB */
508 static bool ravb_rx(struct net_device *ndev, int *quota, int q)
510 struct ravb_private *priv = netdev_priv(ndev);
511 int entry = priv->cur_rx[q] % priv->num_rx_ring[q];
512 int boguscnt = (priv->dirty_rx[q] + priv->num_rx_ring[q]) -
514 struct net_device_stats *stats = &priv->stats[q];
515 struct ravb_ex_rx_desc *desc;
518 struct timespec64 ts;
523 boguscnt = min(boguscnt, *quota);
525 desc = &priv->rx_ring[q][entry];
526 while (desc->die_dt != DT_FEMPTY) {
527 /* Descriptor type must be checked before all other reads */
529 desc_status = desc->msc;
530 pkt_len = le16_to_cpu(desc->ds_cc) & RX_DS;
535 /* We use 0-byte descriptors to mark the DMA mapping errors */
539 if (desc_status & MSC_MC)
542 if (desc_status & (MSC_CRC | MSC_RFE | MSC_RTSF | MSC_RTLF |
545 if (desc_status & MSC_CRC)
546 stats->rx_crc_errors++;
547 if (desc_status & MSC_RFE)
548 stats->rx_frame_errors++;
549 if (desc_status & (MSC_RTLF | MSC_RTSF))
550 stats->rx_length_errors++;
551 if (desc_status & MSC_CEEF)
552 stats->rx_missed_errors++;
554 u32 get_ts = priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE;
556 skb = priv->rx_skb[q][entry];
557 priv->rx_skb[q][entry] = NULL;
558 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr),
561 get_ts &= (q == RAVB_NC) ?
562 RAVB_RXTSTAMP_TYPE_V2_L2_EVENT :
563 ~RAVB_RXTSTAMP_TYPE_V2_L2_EVENT;
565 struct skb_shared_hwtstamps *shhwtstamps;
567 shhwtstamps = skb_hwtstamps(skb);
568 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
569 ts.tv_sec = ((u64) le16_to_cpu(desc->ts_sh) <<
570 32) | le32_to_cpu(desc->ts_sl);
571 ts.tv_nsec = le32_to_cpu(desc->ts_n);
572 shhwtstamps->hwtstamp = timespec64_to_ktime(ts);
574 skb_put(skb, pkt_len);
575 skb->protocol = eth_type_trans(skb, ndev);
576 napi_gro_receive(&priv->napi[q], skb);
578 stats->rx_bytes += pkt_len;
581 entry = (++priv->cur_rx[q]) % priv->num_rx_ring[q];
582 desc = &priv->rx_ring[q][entry];
585 /* Refill the RX ring buffers. */
586 for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) {
587 entry = priv->dirty_rx[q] % priv->num_rx_ring[q];
588 desc = &priv->rx_ring[q][entry];
589 desc->ds_cc = cpu_to_le16(PKT_BUF_SZ);
591 if (!priv->rx_skb[q][entry]) {
592 skb = netdev_alloc_skb(ndev,
593 PKT_BUF_SZ + RAVB_ALIGN - 1);
595 break; /* Better luck next round. */
596 ravb_set_buffer_align(skb);
597 dma_addr = dma_map_single(ndev->dev.parent, skb->data,
598 le16_to_cpu(desc->ds_cc),
600 skb_checksum_none_assert(skb);
601 /* We just set the data size to 0 for a failed mapping
602 * which should prevent DMA from happening...
604 if (dma_mapping_error(ndev->dev.parent, dma_addr))
605 desc->ds_cc = cpu_to_le16(0);
606 desc->dptr = cpu_to_le32(dma_addr);
607 priv->rx_skb[q][entry] = skb;
609 /* Descriptor type must be set after all the above writes */
611 desc->die_dt = DT_FEMPTY;
614 *quota -= limit - (++boguscnt);
616 return boguscnt <= 0;
619 static void ravb_rcv_snd_disable(struct net_device *ndev)
621 /* Disable TX and RX */
622 ravb_modify(ndev, ECMR, ECMR_RE | ECMR_TE, 0);
625 static void ravb_rcv_snd_enable(struct net_device *ndev)
627 /* Enable TX and RX */
628 ravb_modify(ndev, ECMR, ECMR_RE | ECMR_TE, ECMR_RE | ECMR_TE);
631 /* function for waiting dma process finished */
632 static int ravb_stop_dma(struct net_device *ndev)
636 /* Wait for stopping the hardware TX process */
637 error = ravb_wait(ndev, TCCR,
638 TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, 0);
642 error = ravb_wait(ndev, CSR, CSR_TPO0 | CSR_TPO1 | CSR_TPO2 | CSR_TPO3,
647 /* Stop the E-MAC's RX/TX processes. */
648 ravb_rcv_snd_disable(ndev);
650 /* Wait for stopping the RX DMA process */
651 error = ravb_wait(ndev, CSR, CSR_RPO, 0);
655 /* Stop AVB-DMAC process */
656 return ravb_config(ndev);
659 /* E-MAC interrupt handler */
660 static void ravb_emac_interrupt_unlocked(struct net_device *ndev)
662 struct ravb_private *priv = netdev_priv(ndev);
665 ecsr = ravb_read(ndev, ECSR);
666 ravb_write(ndev, ecsr, ECSR); /* clear interrupt */
668 ndev->stats.tx_carrier_errors++;
669 if (ecsr & ECSR_LCHNG) {
671 if (priv->no_avb_link)
673 psr = ravb_read(ndev, PSR);
674 if (priv->avb_link_active_low)
676 if (!(psr & PSR_LMON)) {
677 /* DIsable RX and TX */
678 ravb_rcv_snd_disable(ndev);
680 /* Enable RX and TX */
681 ravb_rcv_snd_enable(ndev);
686 static irqreturn_t ravb_emac_interrupt(int irq, void *dev_id)
688 struct net_device *ndev = dev_id;
689 struct ravb_private *priv = netdev_priv(ndev);
691 spin_lock(&priv->lock);
692 ravb_emac_interrupt_unlocked(ndev);
694 spin_unlock(&priv->lock);
698 /* Error interrupt handler */
699 static void ravb_error_interrupt(struct net_device *ndev)
701 struct ravb_private *priv = netdev_priv(ndev);
704 eis = ravb_read(ndev, EIS);
705 ravb_write(ndev, ~EIS_QFS, EIS);
707 ris2 = ravb_read(ndev, RIS2);
708 ravb_write(ndev, ~(RIS2_QFF0 | RIS2_RFFF), RIS2);
710 /* Receive Descriptor Empty int */
711 if (ris2 & RIS2_QFF0)
712 priv->stats[RAVB_BE].rx_over_errors++;
714 /* Receive Descriptor Empty int */
715 if (ris2 & RIS2_QFF1)
716 priv->stats[RAVB_NC].rx_over_errors++;
718 /* Receive FIFO Overflow int */
719 if (ris2 & RIS2_RFFF)
720 priv->rx_fifo_errors++;
724 static bool ravb_queue_interrupt(struct net_device *ndev, int q)
726 struct ravb_private *priv = netdev_priv(ndev);
727 u32 ris0 = ravb_read(ndev, RIS0);
728 u32 ric0 = ravb_read(ndev, RIC0);
729 u32 tis = ravb_read(ndev, TIS);
730 u32 tic = ravb_read(ndev, TIC);
732 if (((ris0 & ric0) & BIT(q)) || ((tis & tic) & BIT(q))) {
733 if (napi_schedule_prep(&priv->napi[q])) {
734 /* Mask RX and TX interrupts */
735 if (priv->chip_id == RCAR_GEN2) {
736 ravb_write(ndev, ric0 & ~BIT(q), RIC0);
737 ravb_write(ndev, tic & ~BIT(q), TIC);
739 ravb_write(ndev, BIT(q), RID0);
740 ravb_write(ndev, BIT(q), TID);
742 __napi_schedule(&priv->napi[q]);
745 "ignoring interrupt, rx status 0x%08x, rx mask 0x%08x,\n",
748 " tx status 0x%08x, tx mask 0x%08x.\n",
756 static bool ravb_timestamp_interrupt(struct net_device *ndev)
758 u32 tis = ravb_read(ndev, TIS);
760 if (tis & TIS_TFUF) {
761 ravb_write(ndev, ~TIS_TFUF, TIS);
762 ravb_get_tx_tstamp(ndev);
768 static irqreturn_t ravb_interrupt(int irq, void *dev_id)
770 struct net_device *ndev = dev_id;
771 struct ravb_private *priv = netdev_priv(ndev);
772 irqreturn_t result = IRQ_NONE;
775 spin_lock(&priv->lock);
776 /* Get interrupt status */
777 iss = ravb_read(ndev, ISS);
779 /* Received and transmitted interrupts */
780 if (iss & (ISS_FRS | ISS_FTS | ISS_TFUS)) {
783 /* Timestamp updated */
784 if (ravb_timestamp_interrupt(ndev))
785 result = IRQ_HANDLED;
787 /* Network control and best effort queue RX/TX */
788 for (q = RAVB_NC; q >= RAVB_BE; q--) {
789 if (ravb_queue_interrupt(ndev, q))
790 result = IRQ_HANDLED;
794 /* E-MAC status summary */
796 ravb_emac_interrupt_unlocked(ndev);
797 result = IRQ_HANDLED;
800 /* Error status summary */
802 ravb_error_interrupt(ndev);
803 result = IRQ_HANDLED;
806 /* gPTP interrupt status summary */
807 if (iss & ISS_CGIS) {
808 ravb_ptp_interrupt(ndev);
809 result = IRQ_HANDLED;
813 spin_unlock(&priv->lock);
817 /* Timestamp/Error/gPTP interrupt handler */
818 static irqreturn_t ravb_multi_interrupt(int irq, void *dev_id)
820 struct net_device *ndev = dev_id;
821 struct ravb_private *priv = netdev_priv(ndev);
822 irqreturn_t result = IRQ_NONE;
825 spin_lock(&priv->lock);
826 /* Get interrupt status */
827 iss = ravb_read(ndev, ISS);
829 /* Timestamp updated */
830 if ((iss & ISS_TFUS) && ravb_timestamp_interrupt(ndev))
831 result = IRQ_HANDLED;
833 /* Error status summary */
835 ravb_error_interrupt(ndev);
836 result = IRQ_HANDLED;
839 /* gPTP interrupt status summary */
840 if (iss & ISS_CGIS) {
841 ravb_ptp_interrupt(ndev);
842 result = IRQ_HANDLED;
846 spin_unlock(&priv->lock);
850 static irqreturn_t ravb_dma_interrupt(int irq, void *dev_id, int q)
852 struct net_device *ndev = dev_id;
853 struct ravb_private *priv = netdev_priv(ndev);
854 irqreturn_t result = IRQ_NONE;
856 spin_lock(&priv->lock);
858 /* Network control/Best effort queue RX/TX */
859 if (ravb_queue_interrupt(ndev, q))
860 result = IRQ_HANDLED;
863 spin_unlock(&priv->lock);
867 static irqreturn_t ravb_be_interrupt(int irq, void *dev_id)
869 return ravb_dma_interrupt(irq, dev_id, RAVB_BE);
872 static irqreturn_t ravb_nc_interrupt(int irq, void *dev_id)
874 return ravb_dma_interrupt(irq, dev_id, RAVB_NC);
877 static int ravb_poll(struct napi_struct *napi, int budget)
879 struct net_device *ndev = napi->dev;
880 struct ravb_private *priv = netdev_priv(ndev);
882 int q = napi - priv->napi;
888 tis = ravb_read(ndev, TIS);
889 ris0 = ravb_read(ndev, RIS0);
890 if (!((ris0 & mask) || (tis & mask)))
893 /* Processing RX Descriptor Ring */
895 /* Clear RX interrupt */
896 ravb_write(ndev, ~mask, RIS0);
897 if (ravb_rx(ndev, "a, q))
900 /* Processing TX Descriptor Ring */
902 spin_lock_irqsave(&priv->lock, flags);
903 /* Clear TX interrupt */
904 ravb_write(ndev, ~mask, TIS);
905 ravb_tx_free(ndev, q);
906 netif_wake_subqueue(ndev, q);
908 spin_unlock_irqrestore(&priv->lock, flags);
914 /* Re-enable RX/TX interrupts */
915 spin_lock_irqsave(&priv->lock, flags);
916 if (priv->chip_id == RCAR_GEN2) {
917 ravb_modify(ndev, RIC0, mask, mask);
918 ravb_modify(ndev, TIC, mask, mask);
920 ravb_write(ndev, mask, RIE0);
921 ravb_write(ndev, mask, TIE);
924 spin_unlock_irqrestore(&priv->lock, flags);
926 /* Receive error message handling */
927 priv->rx_over_errors = priv->stats[RAVB_BE].rx_over_errors;
928 priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors;
929 if (priv->rx_over_errors != ndev->stats.rx_over_errors) {
930 ndev->stats.rx_over_errors = priv->rx_over_errors;
931 netif_err(priv, rx_err, ndev, "Receive Descriptor Empty\n");
933 if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors) {
934 ndev->stats.rx_fifo_errors = priv->rx_fifo_errors;
935 netif_err(priv, rx_err, ndev, "Receive FIFO Overflow\n");
938 return budget - quota;
941 /* PHY state control function */
942 static void ravb_adjust_link(struct net_device *ndev)
944 struct ravb_private *priv = netdev_priv(ndev);
945 struct phy_device *phydev = ndev->phydev;
946 bool new_state = false;
949 if (phydev->duplex != priv->duplex) {
951 priv->duplex = phydev->duplex;
952 ravb_set_duplex(ndev);
955 if (phydev->speed != priv->speed) {
957 priv->speed = phydev->speed;
961 ravb_modify(ndev, ECMR, ECMR_TXF, 0);
963 priv->link = phydev->link;
964 if (priv->no_avb_link)
965 ravb_rcv_snd_enable(ndev);
967 } else if (priv->link) {
972 if (priv->no_avb_link)
973 ravb_rcv_snd_disable(ndev);
976 if (new_state && netif_msg_link(priv))
977 phy_print_status(phydev);
980 /* PHY init function */
981 static int ravb_phy_init(struct net_device *ndev)
983 struct device_node *np = ndev->dev.parent->of_node;
984 struct ravb_private *priv = netdev_priv(ndev);
985 struct phy_device *phydev;
986 struct device_node *pn;
993 /* Try connecting to PHY */
994 pn = of_parse_phandle(np, "phy-handle", 0);
996 /* In the case of a fixed PHY, the DT node associated
997 * to the PHY is the Ethernet MAC DT node.
999 if (of_phy_is_fixed_link(np)) {
1000 err = of_phy_register_fixed_link(np);
1004 pn = of_node_get(np);
1006 phydev = of_phy_connect(ndev, pn, ravb_adjust_link, 0,
1007 priv->phy_interface);
1010 netdev_err(ndev, "failed to connect PHY\n");
1012 goto err_deregister_fixed_link;
1015 /* This driver only support 10/100Mbit speeds on Gen3
1018 if (priv->chip_id == RCAR_GEN3) {
1019 err = phy_set_max_speed(phydev, SPEED_100);
1021 netdev_err(ndev, "failed to limit PHY to 100Mbit/s\n");
1022 goto err_phy_disconnect;
1025 netdev_info(ndev, "limited PHY to 100Mbit/s\n");
1028 /* 10BASE is not supported */
1029 phydev->supported &= ~PHY_10BT_FEATURES;
1031 phy_attached_info(phydev);
1036 phy_disconnect(phydev);
1037 err_deregister_fixed_link:
1038 if (of_phy_is_fixed_link(np))
1039 of_phy_deregister_fixed_link(np);
1044 /* PHY control start function */
1045 static int ravb_phy_start(struct net_device *ndev)
1049 error = ravb_phy_init(ndev);
1053 phy_start(ndev->phydev);
1058 static int ravb_get_link_ksettings(struct net_device *ndev,
1059 struct ethtool_link_ksettings *cmd)
1061 struct ravb_private *priv = netdev_priv(ndev);
1062 int error = -ENODEV;
1063 unsigned long flags;
1066 spin_lock_irqsave(&priv->lock, flags);
1067 error = phy_ethtool_ksettings_get(ndev->phydev, cmd);
1068 spin_unlock_irqrestore(&priv->lock, flags);
1074 static int ravb_set_link_ksettings(struct net_device *ndev,
1075 const struct ethtool_link_ksettings *cmd)
1077 struct ravb_private *priv = netdev_priv(ndev);
1078 unsigned long flags;
1084 spin_lock_irqsave(&priv->lock, flags);
1086 /* Disable TX and RX */
1087 ravb_rcv_snd_disable(ndev);
1089 error = phy_ethtool_ksettings_set(ndev->phydev, cmd);
1093 if (cmd->base.duplex == DUPLEX_FULL)
1098 ravb_set_duplex(ndev);
1103 /* Enable TX and RX */
1104 ravb_rcv_snd_enable(ndev);
1107 spin_unlock_irqrestore(&priv->lock, flags);
1112 static int ravb_nway_reset(struct net_device *ndev)
1114 struct ravb_private *priv = netdev_priv(ndev);
1115 int error = -ENODEV;
1116 unsigned long flags;
1119 spin_lock_irqsave(&priv->lock, flags);
1120 error = phy_start_aneg(ndev->phydev);
1121 spin_unlock_irqrestore(&priv->lock, flags);
1127 static u32 ravb_get_msglevel(struct net_device *ndev)
1129 struct ravb_private *priv = netdev_priv(ndev);
1131 return priv->msg_enable;
1134 static void ravb_set_msglevel(struct net_device *ndev, u32 value)
1136 struct ravb_private *priv = netdev_priv(ndev);
1138 priv->msg_enable = value;
1141 static const char ravb_gstrings_stats[][ETH_GSTRING_LEN] = {
1142 "rx_queue_0_current",
1143 "tx_queue_0_current",
1146 "rx_queue_0_packets",
1147 "tx_queue_0_packets",
1150 "rx_queue_0_mcast_packets",
1151 "rx_queue_0_errors",
1152 "rx_queue_0_crc_errors",
1153 "rx_queue_0_frame_errors",
1154 "rx_queue_0_length_errors",
1155 "rx_queue_0_missed_errors",
1156 "rx_queue_0_over_errors",
1158 "rx_queue_1_current",
1159 "tx_queue_1_current",
1162 "rx_queue_1_packets",
1163 "tx_queue_1_packets",
1166 "rx_queue_1_mcast_packets",
1167 "rx_queue_1_errors",
1168 "rx_queue_1_crc_errors",
1169 "rx_queue_1_frame_errors",
1170 "rx_queue_1_length_errors",
1171 "rx_queue_1_missed_errors",
1172 "rx_queue_1_over_errors",
1175 #define RAVB_STATS_LEN ARRAY_SIZE(ravb_gstrings_stats)
1177 static int ravb_get_sset_count(struct net_device *netdev, int sset)
1181 return RAVB_STATS_LEN;
1187 static void ravb_get_ethtool_stats(struct net_device *ndev,
1188 struct ethtool_stats *stats, u64 *data)
1190 struct ravb_private *priv = netdev_priv(ndev);
1194 /* Device-specific stats */
1195 for (q = RAVB_BE; q < NUM_RX_QUEUE; q++) {
1196 struct net_device_stats *stats = &priv->stats[q];
1198 data[i++] = priv->cur_rx[q];
1199 data[i++] = priv->cur_tx[q];
1200 data[i++] = priv->dirty_rx[q];
1201 data[i++] = priv->dirty_tx[q];
1202 data[i++] = stats->rx_packets;
1203 data[i++] = stats->tx_packets;
1204 data[i++] = stats->rx_bytes;
1205 data[i++] = stats->tx_bytes;
1206 data[i++] = stats->multicast;
1207 data[i++] = stats->rx_errors;
1208 data[i++] = stats->rx_crc_errors;
1209 data[i++] = stats->rx_frame_errors;
1210 data[i++] = stats->rx_length_errors;
1211 data[i++] = stats->rx_missed_errors;
1212 data[i++] = stats->rx_over_errors;
1216 static void ravb_get_strings(struct net_device *ndev, u32 stringset, u8 *data)
1218 switch (stringset) {
1220 memcpy(data, *ravb_gstrings_stats, sizeof(ravb_gstrings_stats));
1225 static void ravb_get_ringparam(struct net_device *ndev,
1226 struct ethtool_ringparam *ring)
1228 struct ravb_private *priv = netdev_priv(ndev);
1230 ring->rx_max_pending = BE_RX_RING_MAX;
1231 ring->tx_max_pending = BE_TX_RING_MAX;
1232 ring->rx_pending = priv->num_rx_ring[RAVB_BE];
1233 ring->tx_pending = priv->num_tx_ring[RAVB_BE];
1236 static int ravb_set_ringparam(struct net_device *ndev,
1237 struct ethtool_ringparam *ring)
1239 struct ravb_private *priv = netdev_priv(ndev);
1242 if (ring->tx_pending > BE_TX_RING_MAX ||
1243 ring->rx_pending > BE_RX_RING_MAX ||
1244 ring->tx_pending < BE_TX_RING_MIN ||
1245 ring->rx_pending < BE_RX_RING_MIN)
1247 if (ring->rx_mini_pending || ring->rx_jumbo_pending)
1250 if (netif_running(ndev)) {
1251 netif_device_detach(ndev);
1252 /* Stop PTP Clock driver */
1253 if (priv->chip_id == RCAR_GEN2)
1254 ravb_ptp_stop(ndev);
1255 /* Wait for DMA stopping */
1256 error = ravb_stop_dma(ndev);
1259 "cannot set ringparam! Any AVB processes are still running?\n");
1262 synchronize_irq(ndev->irq);
1264 /* Free all the skb's in the RX queue and the DMA buffers. */
1265 ravb_ring_free(ndev, RAVB_BE);
1266 ravb_ring_free(ndev, RAVB_NC);
1269 /* Set new parameters */
1270 priv->num_rx_ring[RAVB_BE] = ring->rx_pending;
1271 priv->num_tx_ring[RAVB_BE] = ring->tx_pending;
1273 if (netif_running(ndev)) {
1274 error = ravb_dmac_init(ndev);
1277 "%s: ravb_dmac_init() failed, error %d\n",
1282 ravb_emac_init(ndev);
1284 /* Initialise PTP Clock driver */
1285 if (priv->chip_id == RCAR_GEN2)
1286 ravb_ptp_init(ndev, priv->pdev);
1288 netif_device_attach(ndev);
1294 static int ravb_get_ts_info(struct net_device *ndev,
1295 struct ethtool_ts_info *info)
1297 struct ravb_private *priv = netdev_priv(ndev);
1299 info->so_timestamping =
1300 SOF_TIMESTAMPING_TX_SOFTWARE |
1301 SOF_TIMESTAMPING_RX_SOFTWARE |
1302 SOF_TIMESTAMPING_SOFTWARE |
1303 SOF_TIMESTAMPING_TX_HARDWARE |
1304 SOF_TIMESTAMPING_RX_HARDWARE |
1305 SOF_TIMESTAMPING_RAW_HARDWARE;
1306 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
1308 (1 << HWTSTAMP_FILTER_NONE) |
1309 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1310 (1 << HWTSTAMP_FILTER_ALL);
1311 info->phc_index = ptp_clock_index(priv->ptp.clock);
1316 static const struct ethtool_ops ravb_ethtool_ops = {
1317 .nway_reset = ravb_nway_reset,
1318 .get_msglevel = ravb_get_msglevel,
1319 .set_msglevel = ravb_set_msglevel,
1320 .get_link = ethtool_op_get_link,
1321 .get_strings = ravb_get_strings,
1322 .get_ethtool_stats = ravb_get_ethtool_stats,
1323 .get_sset_count = ravb_get_sset_count,
1324 .get_ringparam = ravb_get_ringparam,
1325 .set_ringparam = ravb_set_ringparam,
1326 .get_ts_info = ravb_get_ts_info,
1327 .get_link_ksettings = ravb_get_link_ksettings,
1328 .set_link_ksettings = ravb_set_link_ksettings,
1331 static inline int ravb_hook_irq(unsigned int irq, irq_handler_t handler,
1332 struct net_device *ndev, struct device *dev,
1338 name = devm_kasprintf(dev, GFP_KERNEL, "%s:%s", ndev->name, ch);
1341 error = request_irq(irq, handler, 0, name, ndev);
1343 netdev_err(ndev, "cannot request IRQ %s\n", name);
1348 /* Network device open function for Ethernet AVB */
1349 static int ravb_open(struct net_device *ndev)
1351 struct ravb_private *priv = netdev_priv(ndev);
1352 struct platform_device *pdev = priv->pdev;
1353 struct device *dev = &pdev->dev;
1356 napi_enable(&priv->napi[RAVB_BE]);
1357 napi_enable(&priv->napi[RAVB_NC]);
1359 if (priv->chip_id == RCAR_GEN2) {
1360 error = request_irq(ndev->irq, ravb_interrupt, IRQF_SHARED,
1363 netdev_err(ndev, "cannot request IRQ\n");
1367 error = ravb_hook_irq(ndev->irq, ravb_multi_interrupt, ndev,
1371 error = ravb_hook_irq(priv->emac_irq, ravb_emac_interrupt, ndev,
1375 error = ravb_hook_irq(priv->rx_irqs[RAVB_BE], ravb_be_interrupt,
1376 ndev, dev, "ch0:rx_be");
1378 goto out_free_irq_emac;
1379 error = ravb_hook_irq(priv->tx_irqs[RAVB_BE], ravb_be_interrupt,
1380 ndev, dev, "ch18:tx_be");
1382 goto out_free_irq_be_rx;
1383 error = ravb_hook_irq(priv->rx_irqs[RAVB_NC], ravb_nc_interrupt,
1384 ndev, dev, "ch1:rx_nc");
1386 goto out_free_irq_be_tx;
1387 error = ravb_hook_irq(priv->tx_irqs[RAVB_NC], ravb_nc_interrupt,
1388 ndev, dev, "ch19:tx_nc");
1390 goto out_free_irq_nc_rx;
1394 error = ravb_dmac_init(ndev);
1396 goto out_free_irq_nc_tx;
1397 ravb_emac_init(ndev);
1399 /* Initialise PTP Clock driver */
1400 if (priv->chip_id == RCAR_GEN2)
1401 ravb_ptp_init(ndev, priv->pdev);
1403 netif_tx_start_all_queues(ndev);
1405 /* PHY control start */
1406 error = ravb_phy_start(ndev);
1413 /* Stop PTP Clock driver */
1414 if (priv->chip_id == RCAR_GEN2)
1415 ravb_ptp_stop(ndev);
1417 if (priv->chip_id == RCAR_GEN2)
1419 free_irq(priv->tx_irqs[RAVB_NC], ndev);
1421 free_irq(priv->rx_irqs[RAVB_NC], ndev);
1423 free_irq(priv->tx_irqs[RAVB_BE], ndev);
1425 free_irq(priv->rx_irqs[RAVB_BE], ndev);
1427 free_irq(priv->emac_irq, ndev);
1429 free_irq(ndev->irq, ndev);
1431 napi_disable(&priv->napi[RAVB_NC]);
1432 napi_disable(&priv->napi[RAVB_BE]);
1436 /* Timeout function for Ethernet AVB */
1437 static void ravb_tx_timeout(struct net_device *ndev)
1439 struct ravb_private *priv = netdev_priv(ndev);
1441 netif_err(priv, tx_err, ndev,
1442 "transmit timed out, status %08x, resetting...\n",
1443 ravb_read(ndev, ISS));
1445 /* tx_errors count up */
1446 ndev->stats.tx_errors++;
1448 schedule_work(&priv->work);
1451 static void ravb_tx_timeout_work(struct work_struct *work)
1453 struct ravb_private *priv = container_of(work, struct ravb_private,
1455 struct net_device *ndev = priv->ndev;
1457 netif_tx_stop_all_queues(ndev);
1459 /* Stop PTP Clock driver */
1460 if (priv->chip_id == RCAR_GEN2)
1461 ravb_ptp_stop(ndev);
1463 /* Wait for DMA stopping */
1464 ravb_stop_dma(ndev);
1466 ravb_ring_free(ndev, RAVB_BE);
1467 ravb_ring_free(ndev, RAVB_NC);
1470 ravb_dmac_init(ndev);
1471 ravb_emac_init(ndev);
1473 /* Initialise PTP Clock driver */
1474 if (priv->chip_id == RCAR_GEN2)
1475 ravb_ptp_init(ndev, priv->pdev);
1477 netif_tx_start_all_queues(ndev);
1480 /* Packet transmit function for Ethernet AVB */
1481 static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1483 struct ravb_private *priv = netdev_priv(ndev);
1484 u16 q = skb_get_queue_mapping(skb);
1485 struct ravb_tstamp_skb *ts_skb;
1486 struct ravb_tx_desc *desc;
1487 unsigned long flags;
1493 spin_lock_irqsave(&priv->lock, flags);
1494 if (priv->cur_tx[q] - priv->dirty_tx[q] > (priv->num_tx_ring[q] - 1) *
1496 netif_err(priv, tx_queued, ndev,
1497 "still transmitting with the full ring!\n");
1498 netif_stop_subqueue(ndev, q);
1499 spin_unlock_irqrestore(&priv->lock, flags);
1500 return NETDEV_TX_BUSY;
1502 entry = priv->cur_tx[q] % (priv->num_tx_ring[q] * NUM_TX_DESC);
1503 priv->tx_skb[q][entry / NUM_TX_DESC] = skb;
1505 if (skb_put_padto(skb, ETH_ZLEN))
1508 buffer = PTR_ALIGN(priv->tx_align[q], DPTR_ALIGN) +
1509 entry / NUM_TX_DESC * DPTR_ALIGN;
1510 len = PTR_ALIGN(skb->data, DPTR_ALIGN) - skb->data;
1511 memcpy(buffer, skb->data, len);
1512 dma_addr = dma_map_single(ndev->dev.parent, buffer, len, DMA_TO_DEVICE);
1513 if (dma_mapping_error(ndev->dev.parent, dma_addr))
1516 desc = &priv->tx_ring[q][entry];
1517 desc->ds_tagl = cpu_to_le16(len);
1518 desc->dptr = cpu_to_le32(dma_addr);
1520 buffer = skb->data + len;
1521 len = skb->len - len;
1522 dma_addr = dma_map_single(ndev->dev.parent, buffer, len, DMA_TO_DEVICE);
1523 if (dma_mapping_error(ndev->dev.parent, dma_addr))
1527 desc->ds_tagl = cpu_to_le16(len);
1528 desc->dptr = cpu_to_le32(dma_addr);
1530 /* TX timestamp required */
1532 ts_skb = kmalloc(sizeof(*ts_skb), GFP_ATOMIC);
1535 dma_unmap_single(ndev->dev.parent, dma_addr, len,
1540 ts_skb->tag = priv->ts_skb_tag++;
1541 priv->ts_skb_tag &= 0x3ff;
1542 list_add_tail(&ts_skb->list, &priv->ts_skb_list);
1544 /* TAG and timestamp required flag */
1545 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1546 desc->tagh_tsr = (ts_skb->tag >> 4) | TX_TSR;
1547 desc->ds_tagl |= le16_to_cpu(ts_skb->tag << 12);
1550 skb_tx_timestamp(skb);
1551 /* Descriptor type must be set after all the above writes */
1553 desc->die_dt = DT_FEND;
1555 desc->die_dt = DT_FSTART;
1557 ravb_modify(ndev, TCCR, TCCR_TSRQ0 << q, TCCR_TSRQ0 << q);
1559 priv->cur_tx[q] += NUM_TX_DESC;
1560 if (priv->cur_tx[q] - priv->dirty_tx[q] >
1561 (priv->num_tx_ring[q] - 1) * NUM_TX_DESC && !ravb_tx_free(ndev, q))
1562 netif_stop_subqueue(ndev, q);
1566 spin_unlock_irqrestore(&priv->lock, flags);
1567 return NETDEV_TX_OK;
1570 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr),
1571 le16_to_cpu(desc->ds_tagl), DMA_TO_DEVICE);
1573 dev_kfree_skb_any(skb);
1574 priv->tx_skb[q][entry / NUM_TX_DESC] = NULL;
1578 static u16 ravb_select_queue(struct net_device *ndev, struct sk_buff *skb,
1579 void *accel_priv, select_queue_fallback_t fallback)
1581 /* If skb needs TX timestamp, it is handled in network control queue */
1582 return (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) ? RAVB_NC :
1587 static struct net_device_stats *ravb_get_stats(struct net_device *ndev)
1589 struct ravb_private *priv = netdev_priv(ndev);
1590 struct net_device_stats *nstats, *stats0, *stats1;
1592 nstats = &ndev->stats;
1593 stats0 = &priv->stats[RAVB_BE];
1594 stats1 = &priv->stats[RAVB_NC];
1596 nstats->tx_dropped += ravb_read(ndev, TROCR);
1597 ravb_write(ndev, 0, TROCR); /* (write clear) */
1598 nstats->collisions += ravb_read(ndev, CDCR);
1599 ravb_write(ndev, 0, CDCR); /* (write clear) */
1600 nstats->tx_carrier_errors += ravb_read(ndev, LCCR);
1601 ravb_write(ndev, 0, LCCR); /* (write clear) */
1603 nstats->tx_carrier_errors += ravb_read(ndev, CERCR);
1604 ravb_write(ndev, 0, CERCR); /* (write clear) */
1605 nstats->tx_carrier_errors += ravb_read(ndev, CEECR);
1606 ravb_write(ndev, 0, CEECR); /* (write clear) */
1608 nstats->rx_packets = stats0->rx_packets + stats1->rx_packets;
1609 nstats->tx_packets = stats0->tx_packets + stats1->tx_packets;
1610 nstats->rx_bytes = stats0->rx_bytes + stats1->rx_bytes;
1611 nstats->tx_bytes = stats0->tx_bytes + stats1->tx_bytes;
1612 nstats->multicast = stats0->multicast + stats1->multicast;
1613 nstats->rx_errors = stats0->rx_errors + stats1->rx_errors;
1614 nstats->rx_crc_errors = stats0->rx_crc_errors + stats1->rx_crc_errors;
1615 nstats->rx_frame_errors =
1616 stats0->rx_frame_errors + stats1->rx_frame_errors;
1617 nstats->rx_length_errors =
1618 stats0->rx_length_errors + stats1->rx_length_errors;
1619 nstats->rx_missed_errors =
1620 stats0->rx_missed_errors + stats1->rx_missed_errors;
1621 nstats->rx_over_errors =
1622 stats0->rx_over_errors + stats1->rx_over_errors;
1627 /* Update promiscuous bit */
1628 static void ravb_set_rx_mode(struct net_device *ndev)
1630 struct ravb_private *priv = netdev_priv(ndev);
1631 unsigned long flags;
1633 spin_lock_irqsave(&priv->lock, flags);
1634 ravb_modify(ndev, ECMR, ECMR_PRM,
1635 ndev->flags & IFF_PROMISC ? ECMR_PRM : 0);
1637 spin_unlock_irqrestore(&priv->lock, flags);
1640 /* Device close function for Ethernet AVB */
1641 static int ravb_close(struct net_device *ndev)
1643 struct device_node *np = ndev->dev.parent->of_node;
1644 struct ravb_private *priv = netdev_priv(ndev);
1645 struct ravb_tstamp_skb *ts_skb, *ts_skb2;
1647 netif_tx_stop_all_queues(ndev);
1649 /* Disable interrupts by clearing the interrupt masks. */
1650 ravb_write(ndev, 0, RIC0);
1651 ravb_write(ndev, 0, RIC2);
1652 ravb_write(ndev, 0, TIC);
1654 /* Stop PTP Clock driver */
1655 if (priv->chip_id == RCAR_GEN2)
1656 ravb_ptp_stop(ndev);
1658 /* Set the config mode to stop the AVB-DMAC's processes */
1659 if (ravb_stop_dma(ndev) < 0)
1661 "device will be stopped after h/w processes are done.\n");
1663 /* Clear the timestamp list */
1664 list_for_each_entry_safe(ts_skb, ts_skb2, &priv->ts_skb_list, list) {
1665 list_del(&ts_skb->list);
1669 /* PHY disconnect */
1671 phy_stop(ndev->phydev);
1672 phy_disconnect(ndev->phydev);
1673 if (of_phy_is_fixed_link(np))
1674 of_phy_deregister_fixed_link(np);
1677 if (priv->chip_id != RCAR_GEN2) {
1678 free_irq(priv->tx_irqs[RAVB_NC], ndev);
1679 free_irq(priv->rx_irqs[RAVB_NC], ndev);
1680 free_irq(priv->tx_irqs[RAVB_BE], ndev);
1681 free_irq(priv->rx_irqs[RAVB_BE], ndev);
1682 free_irq(priv->emac_irq, ndev);
1684 free_irq(ndev->irq, ndev);
1686 napi_disable(&priv->napi[RAVB_NC]);
1687 napi_disable(&priv->napi[RAVB_BE]);
1689 /* Free all the skb's in the RX queue and the DMA buffers. */
1690 ravb_ring_free(ndev, RAVB_BE);
1691 ravb_ring_free(ndev, RAVB_NC);
1696 static int ravb_hwtstamp_get(struct net_device *ndev, struct ifreq *req)
1698 struct ravb_private *priv = netdev_priv(ndev);
1699 struct hwtstamp_config config;
1702 config.tx_type = priv->tstamp_tx_ctrl ? HWTSTAMP_TX_ON :
1704 if (priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE_V2_L2_EVENT)
1705 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
1706 else if (priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE_ALL)
1707 config.rx_filter = HWTSTAMP_FILTER_ALL;
1709 config.rx_filter = HWTSTAMP_FILTER_NONE;
1711 return copy_to_user(req->ifr_data, &config, sizeof(config)) ?
1715 /* Control hardware time stamping */
1716 static int ravb_hwtstamp_set(struct net_device *ndev, struct ifreq *req)
1718 struct ravb_private *priv = netdev_priv(ndev);
1719 struct hwtstamp_config config;
1720 u32 tstamp_rx_ctrl = RAVB_RXTSTAMP_ENABLED;
1723 if (copy_from_user(&config, req->ifr_data, sizeof(config)))
1726 /* Reserved for future extensions */
1730 switch (config.tx_type) {
1731 case HWTSTAMP_TX_OFF:
1734 case HWTSTAMP_TX_ON:
1735 tstamp_tx_ctrl = RAVB_TXTSTAMP_ENABLED;
1741 switch (config.rx_filter) {
1742 case HWTSTAMP_FILTER_NONE:
1745 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1746 tstamp_rx_ctrl |= RAVB_RXTSTAMP_TYPE_V2_L2_EVENT;
1749 config.rx_filter = HWTSTAMP_FILTER_ALL;
1750 tstamp_rx_ctrl |= RAVB_RXTSTAMP_TYPE_ALL;
1753 priv->tstamp_tx_ctrl = tstamp_tx_ctrl;
1754 priv->tstamp_rx_ctrl = tstamp_rx_ctrl;
1756 return copy_to_user(req->ifr_data, &config, sizeof(config)) ?
1760 /* ioctl to device function */
1761 static int ravb_do_ioctl(struct net_device *ndev, struct ifreq *req, int cmd)
1763 struct phy_device *phydev = ndev->phydev;
1765 if (!netif_running(ndev))
1773 return ravb_hwtstamp_get(ndev, req);
1775 return ravb_hwtstamp_set(ndev, req);
1778 return phy_mii_ioctl(phydev, req, cmd);
1781 static const struct net_device_ops ravb_netdev_ops = {
1782 .ndo_open = ravb_open,
1783 .ndo_stop = ravb_close,
1784 .ndo_start_xmit = ravb_start_xmit,
1785 .ndo_select_queue = ravb_select_queue,
1786 .ndo_get_stats = ravb_get_stats,
1787 .ndo_set_rx_mode = ravb_set_rx_mode,
1788 .ndo_tx_timeout = ravb_tx_timeout,
1789 .ndo_do_ioctl = ravb_do_ioctl,
1790 .ndo_validate_addr = eth_validate_addr,
1791 .ndo_set_mac_address = eth_mac_addr,
1794 /* MDIO bus init function */
1795 static int ravb_mdio_init(struct ravb_private *priv)
1797 struct platform_device *pdev = priv->pdev;
1798 struct device *dev = &pdev->dev;
1802 priv->mdiobb.ops = &bb_ops;
1804 /* MII controller setting */
1805 priv->mii_bus = alloc_mdio_bitbang(&priv->mdiobb);
1809 /* Hook up MII support for ethtool */
1810 priv->mii_bus->name = "ravb_mii";
1811 priv->mii_bus->parent = dev;
1812 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1813 pdev->name, pdev->id);
1815 /* Register MDIO bus */
1816 error = of_mdiobus_register(priv->mii_bus, dev->of_node);
1823 free_mdio_bitbang(priv->mii_bus);
1827 /* MDIO bus release function */
1828 static int ravb_mdio_release(struct ravb_private *priv)
1830 /* Unregister mdio bus */
1831 mdiobus_unregister(priv->mii_bus);
1833 /* Free bitbang info */
1834 free_mdio_bitbang(priv->mii_bus);
1839 static const struct of_device_id ravb_match_table[] = {
1840 { .compatible = "renesas,etheravb-r8a7790", .data = (void *)RCAR_GEN2 },
1841 { .compatible = "renesas,etheravb-r8a7794", .data = (void *)RCAR_GEN2 },
1842 { .compatible = "renesas,etheravb-rcar-gen2", .data = (void *)RCAR_GEN2 },
1843 { .compatible = "renesas,etheravb-r8a7795", .data = (void *)RCAR_GEN3 },
1844 { .compatible = "renesas,etheravb-rcar-gen3", .data = (void *)RCAR_GEN3 },
1847 MODULE_DEVICE_TABLE(of, ravb_match_table);
1849 static int ravb_set_gti(struct net_device *ndev)
1852 struct device *dev = ndev->dev.parent;
1853 struct device_node *np = dev->of_node;
1858 clk = of_clk_get(np, 0);
1860 dev_err(dev, "could not get clock\n");
1861 return PTR_ERR(clk);
1864 rate = clk_get_rate(clk);
1870 inc = 1000000000ULL << 20;
1873 if (inc < GTI_TIV_MIN || inc > GTI_TIV_MAX) {
1874 dev_err(dev, "gti.tiv increment 0x%llx is outside the range 0x%x - 0x%x\n",
1875 inc, GTI_TIV_MIN, GTI_TIV_MAX);
1879 ravb_write(ndev, inc, GTI);
1884 static void ravb_set_config_mode(struct net_device *ndev)
1886 struct ravb_private *priv = netdev_priv(ndev);
1888 if (priv->chip_id == RCAR_GEN2) {
1889 ravb_modify(ndev, CCC, CCC_OPC, CCC_OPC_CONFIG);
1890 /* Set CSEL value */
1891 ravb_modify(ndev, CCC, CCC_CSEL, CCC_CSEL_HPB);
1893 ravb_modify(ndev, CCC, CCC_OPC, CCC_OPC_CONFIG |
1894 CCC_GAC | CCC_CSEL_HPB);
1898 static int ravb_probe(struct platform_device *pdev)
1900 struct device_node *np = pdev->dev.of_node;
1901 struct ravb_private *priv;
1902 enum ravb_chip_id chip_id;
1903 struct net_device *ndev;
1905 struct resource *res;
1910 "this driver is required to be instantiated from device tree\n");
1914 /* Get base address */
1915 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1917 dev_err(&pdev->dev, "invalid resource\n");
1921 ndev = alloc_etherdev_mqs(sizeof(struct ravb_private),
1922 NUM_TX_QUEUE, NUM_RX_QUEUE);
1926 pm_runtime_enable(&pdev->dev);
1927 pm_runtime_get_sync(&pdev->dev);
1929 /* The Ether-specific entries in the device structure. */
1930 ndev->base_addr = res->start;
1932 chip_id = (enum ravb_chip_id)of_device_get_match_data(&pdev->dev);
1934 if (chip_id == RCAR_GEN3)
1935 irq = platform_get_irq_byname(pdev, "ch22");
1937 irq = platform_get_irq(pdev, 0);
1944 SET_NETDEV_DEV(ndev, &pdev->dev);
1946 priv = netdev_priv(ndev);
1949 priv->num_tx_ring[RAVB_BE] = BE_TX_RING_SIZE;
1950 priv->num_rx_ring[RAVB_BE] = BE_RX_RING_SIZE;
1951 priv->num_tx_ring[RAVB_NC] = NC_TX_RING_SIZE;
1952 priv->num_rx_ring[RAVB_NC] = NC_RX_RING_SIZE;
1953 priv->addr = devm_ioremap_resource(&pdev->dev, res);
1954 if (IS_ERR(priv->addr)) {
1955 error = PTR_ERR(priv->addr);
1959 spin_lock_init(&priv->lock);
1960 INIT_WORK(&priv->work, ravb_tx_timeout_work);
1962 priv->phy_interface = of_get_phy_mode(np);
1964 priv->no_avb_link = of_property_read_bool(np, "renesas,no-ether-link");
1965 priv->avb_link_active_low =
1966 of_property_read_bool(np, "renesas,ether-link-active-low");
1968 if (chip_id == RCAR_GEN3) {
1969 irq = platform_get_irq_byname(pdev, "ch24");
1974 priv->emac_irq = irq;
1975 for (i = 0; i < NUM_RX_QUEUE; i++) {
1976 irq = platform_get_irq_byname(pdev, ravb_rx_irqs[i]);
1981 priv->rx_irqs[i] = irq;
1983 for (i = 0; i < NUM_TX_QUEUE; i++) {
1984 irq = platform_get_irq_byname(pdev, ravb_tx_irqs[i]);
1989 priv->tx_irqs[i] = irq;
1993 priv->chip_id = chip_id;
1996 ndev->netdev_ops = &ravb_netdev_ops;
1997 ndev->ethtool_ops = &ravb_ethtool_ops;
1999 /* Set AVB config mode */
2000 ravb_set_config_mode(ndev);
2003 error = ravb_set_gti(ndev);
2007 /* Request GTI loading */
2008 ravb_modify(ndev, GCCR, GCCR_LTI, GCCR_LTI);
2010 /* Allocate descriptor base address table */
2011 priv->desc_bat_size = sizeof(struct ravb_desc) * DBAT_ENTRY_NUM;
2012 priv->desc_bat = dma_alloc_coherent(ndev->dev.parent, priv->desc_bat_size,
2013 &priv->desc_bat_dma, GFP_KERNEL);
2014 if (!priv->desc_bat) {
2016 "Cannot allocate desc base address table (size %d bytes)\n",
2017 priv->desc_bat_size);
2021 for (q = RAVB_BE; q < DBAT_ENTRY_NUM; q++)
2022 priv->desc_bat[q].die_dt = DT_EOS;
2023 ravb_write(ndev, priv->desc_bat_dma, DBAT);
2025 /* Initialise HW timestamp list */
2026 INIT_LIST_HEAD(&priv->ts_skb_list);
2028 /* Initialise PTP Clock driver */
2029 if (chip_id != RCAR_GEN2)
2030 ravb_ptp_init(ndev, pdev);
2032 /* Debug message level */
2033 priv->msg_enable = RAVB_DEF_MSG_ENABLE;
2035 /* Read and set MAC address */
2036 ravb_read_mac_address(ndev, of_get_mac_address(np));
2037 if (!is_valid_ether_addr(ndev->dev_addr)) {
2038 dev_warn(&pdev->dev,
2039 "no valid MAC address supplied, using a random one\n");
2040 eth_hw_addr_random(ndev);
2044 error = ravb_mdio_init(priv);
2046 dev_err(&pdev->dev, "failed to initialize MDIO\n");
2050 netif_napi_add(ndev, &priv->napi[RAVB_BE], ravb_poll, 64);
2051 netif_napi_add(ndev, &priv->napi[RAVB_NC], ravb_poll, 64);
2053 /* Network device register */
2054 error = register_netdev(ndev);
2058 /* Print device information */
2059 netdev_info(ndev, "Base address at %#x, %pM, IRQ %d.\n",
2060 (u32)ndev->base_addr, ndev->dev_addr, ndev->irq);
2062 platform_set_drvdata(pdev, ndev);
2067 netif_napi_del(&priv->napi[RAVB_NC]);
2068 netif_napi_del(&priv->napi[RAVB_BE]);
2069 ravb_mdio_release(priv);
2071 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat,
2072 priv->desc_bat_dma);
2074 /* Stop PTP Clock driver */
2075 if (chip_id != RCAR_GEN2)
2076 ravb_ptp_stop(ndev);
2081 pm_runtime_put(&pdev->dev);
2082 pm_runtime_disable(&pdev->dev);
2086 static int ravb_remove(struct platform_device *pdev)
2088 struct net_device *ndev = platform_get_drvdata(pdev);
2089 struct ravb_private *priv = netdev_priv(ndev);
2091 /* Stop PTP Clock driver */
2092 if (priv->chip_id != RCAR_GEN2)
2093 ravb_ptp_stop(ndev);
2095 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat,
2096 priv->desc_bat_dma);
2097 /* Set reset mode */
2098 ravb_write(ndev, CCC_OPC_RESET, CCC);
2099 pm_runtime_put_sync(&pdev->dev);
2100 unregister_netdev(ndev);
2101 netif_napi_del(&priv->napi[RAVB_NC]);
2102 netif_napi_del(&priv->napi[RAVB_BE]);
2103 ravb_mdio_release(priv);
2104 pm_runtime_disable(&pdev->dev);
2106 platform_set_drvdata(pdev, NULL);
2111 static int __maybe_unused ravb_suspend(struct device *dev)
2113 struct net_device *ndev = dev_get_drvdata(dev);
2116 if (netif_running(ndev)) {
2117 netif_device_detach(ndev);
2118 ret = ravb_close(ndev);
2124 static int __maybe_unused ravb_resume(struct device *dev)
2126 struct net_device *ndev = dev_get_drvdata(dev);
2127 struct ravb_private *priv = netdev_priv(ndev);
2130 /* All register have been reset to default values.
2131 * Restore all registers which where setup at probe time and
2132 * reopen device if it was running before system suspended.
2135 /* Set AVB config mode */
2136 ravb_set_config_mode(ndev);
2139 ret = ravb_set_gti(ndev);
2143 /* Request GTI loading */
2144 ravb_modify(ndev, GCCR, GCCR_LTI, GCCR_LTI);
2146 /* Restore descriptor base address table */
2147 ravb_write(ndev, priv->desc_bat_dma, DBAT);
2149 if (netif_running(ndev)) {
2150 ret = ravb_open(ndev);
2153 netif_device_attach(ndev);
2159 static int __maybe_unused ravb_runtime_nop(struct device *dev)
2161 /* Runtime PM callback shared between ->runtime_suspend()
2162 * and ->runtime_resume(). Simply returns success.
2164 * This driver re-initializes all registers after
2165 * pm_runtime_get_sync() anyway so there is no need
2166 * to save and restore registers here.
2171 static const struct dev_pm_ops ravb_dev_pm_ops = {
2172 SET_SYSTEM_SLEEP_PM_OPS(ravb_suspend, ravb_resume)
2173 SET_RUNTIME_PM_OPS(ravb_runtime_nop, ravb_runtime_nop, NULL)
2176 static struct platform_driver ravb_driver = {
2177 .probe = ravb_probe,
2178 .remove = ravb_remove,
2181 .pm = &ravb_dev_pm_ops,
2182 .of_match_table = ravb_match_table,
2186 module_platform_driver(ravb_driver);
2188 MODULE_AUTHOR("Mitsuhiro Kimura, Masaru Nagai");
2189 MODULE_DESCRIPTION("Renesas Ethernet AVB driver");
2190 MODULE_LICENSE("GPL v2");