1 // SPDX-License-Identifier: GPL-2.0-only
2 /****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
8 #include <linux/module.h>
10 #include <linux/netdevice.h>
11 #include <linux/etherdevice.h>
12 #include <linux/delay.h>
13 #include <linux/notifier.h>
15 #include <linux/tcp.h>
17 #include <linux/ethtool.h>
18 #include <linux/topology.h>
19 #include <linux/gfp.h>
20 #include <linux/aer.h>
21 #include <linux/interrupt.h>
22 #include "net_driver.h"
24 #include <net/udp_tunnel.h>
32 #include "mcdi_pcol.h"
33 #include "workarounds.h"
35 /**************************************************************************
39 **************************************************************************
42 /* Loopback mode names (see LOOPBACK_MODE()) */
43 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
44 const char *const efx_loopback_mode_names[] = {
45 [LOOPBACK_NONE] = "NONE",
46 [LOOPBACK_DATA] = "DATAPATH",
47 [LOOPBACK_GMAC] = "GMAC",
48 [LOOPBACK_XGMII] = "XGMII",
49 [LOOPBACK_XGXS] = "XGXS",
50 [LOOPBACK_XAUI] = "XAUI",
51 [LOOPBACK_GMII] = "GMII",
52 [LOOPBACK_SGMII] = "SGMII",
53 [LOOPBACK_XGBR] = "XGBR",
54 [LOOPBACK_XFI] = "XFI",
55 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
56 [LOOPBACK_GMII_FAR] = "GMII_FAR",
57 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
58 [LOOPBACK_XFI_FAR] = "XFI_FAR",
59 [LOOPBACK_GPHY] = "GPHY",
60 [LOOPBACK_PHYXS] = "PHYXS",
61 [LOOPBACK_PCS] = "PCS",
62 [LOOPBACK_PMAPMD] = "PMA/PMD",
63 [LOOPBACK_XPORT] = "XPORT",
64 [LOOPBACK_XGMII_WS] = "XGMII_WS",
65 [LOOPBACK_XAUI_WS] = "XAUI_WS",
66 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
67 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
68 [LOOPBACK_GMII_WS] = "GMII_WS",
69 [LOOPBACK_XFI_WS] = "XFI_WS",
70 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
71 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
74 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
75 const char *const efx_reset_type_names[] = {
76 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
77 [RESET_TYPE_ALL] = "ALL",
78 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
79 [RESET_TYPE_WORLD] = "WORLD",
80 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
81 [RESET_TYPE_DATAPATH] = "DATAPATH",
82 [RESET_TYPE_MC_BIST] = "MC_BIST",
83 [RESET_TYPE_DISABLE] = "DISABLE",
84 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
85 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
92 /* UDP tunnel type names */
93 static const char *const efx_udp_tunnel_type_names[] = {
94 [TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN] = "vxlan",
95 [TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE] = "geneve",
98 void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen)
100 if (type < ARRAY_SIZE(efx_udp_tunnel_type_names) &&
101 efx_udp_tunnel_type_names[type] != NULL)
102 snprintf(buf, buflen, "%s", efx_udp_tunnel_type_names[type]);
104 snprintf(buf, buflen, "type %d", type);
107 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
108 * queued onto this work queue. This is not a per-nic work queue, because
109 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
111 static struct workqueue_struct *reset_workqueue;
113 /* How often and how many times to poll for a reset while waiting for a
114 * BIST that another function started to complete.
116 #define BIST_WAIT_DELAY_MS 100
117 #define BIST_WAIT_DELAY_COUNT 100
119 /**************************************************************************
121 * Configurable values
123 *************************************************************************/
126 * Use separate channels for TX and RX events
128 * Set this to 1 to use separate channels for TX and RX. It allows us
129 * to control interrupt affinity separately for TX and RX.
131 * This is only used in MSI-X interrupt mode
133 bool efx_separate_tx_channels;
134 module_param(efx_separate_tx_channels, bool, 0444);
135 MODULE_PARM_DESC(efx_separate_tx_channels,
136 "Use separate channels for TX and RX");
138 /* This is the weight assigned to each of the (per-channel) virtual
141 static int napi_weight = 64;
143 /* This is the time (in jiffies) between invocations of the hardware
145 * On Falcon-based NICs, this will:
146 * - Check the on-board hardware monitor;
147 * - Poll the link state and reconfigure the hardware as necessary.
148 * On Siena-based NICs for power systems with EEH support, this will give EEH a
151 static unsigned int efx_monitor_interval = 1 * HZ;
153 /* Initial interrupt moderation settings. They can be modified after
154 * module load with ethtool.
156 * The default for RX should strike a balance between increasing the
157 * round-trip latency and reducing overhead.
159 static unsigned int rx_irq_mod_usec = 60;
161 /* Initial interrupt moderation settings. They can be modified after
162 * module load with ethtool.
164 * This default is chosen to ensure that a 10G link does not go idle
165 * while a TX queue is stopped after it has become full. A queue is
166 * restarted when it drops below half full. The time this takes (assuming
167 * worst case 3 descriptors per packet and 1024 descriptors) is
168 * 512 / 3 * 1.2 = 205 usec.
170 static unsigned int tx_irq_mod_usec = 150;
172 /* This is the first interrupt mode to try out of:
177 static unsigned int interrupt_mode;
179 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
180 * i.e. the number of CPUs among which we may distribute simultaneous
181 * interrupt handling.
183 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
184 * The default (0) means to assign an interrupt to each core.
186 static unsigned int rss_cpus;
187 module_param(rss_cpus, uint, 0444);
188 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
190 static bool phy_flash_cfg;
191 module_param(phy_flash_cfg, bool, 0644);
192 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
194 static unsigned irq_adapt_low_thresh = 8000;
195 module_param(irq_adapt_low_thresh, uint, 0644);
196 MODULE_PARM_DESC(irq_adapt_low_thresh,
197 "Threshold score for reducing IRQ moderation");
199 static unsigned irq_adapt_high_thresh = 16000;
200 module_param(irq_adapt_high_thresh, uint, 0644);
201 MODULE_PARM_DESC(irq_adapt_high_thresh,
202 "Threshold score for increasing IRQ moderation");
204 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
205 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
206 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
207 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
208 module_param(debug, uint, 0);
209 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
211 /**************************************************************************
213 * Utility functions and prototypes
215 *************************************************************************/
217 static int efx_soft_enable_interrupts(struct efx_nic *efx);
218 static void efx_soft_disable_interrupts(struct efx_nic *efx);
219 static void efx_remove_channel(struct efx_channel *channel);
220 static void efx_remove_channels(struct efx_nic *efx);
221 static const struct efx_channel_type efx_default_channel_type;
222 static void efx_remove_port(struct efx_nic *efx);
223 static void efx_init_napi_channel(struct efx_channel *channel);
224 static void efx_fini_napi(struct efx_nic *efx);
225 static void efx_fini_napi_channel(struct efx_channel *channel);
226 static void efx_fini_struct(struct efx_nic *efx);
227 static void efx_start_all(struct efx_nic *efx);
228 static void efx_stop_all(struct efx_nic *efx);
229 static int efx_xdp_setup_prog(struct efx_nic *efx, struct bpf_prog *prog);
230 static int efx_xdp(struct net_device *dev, struct netdev_bpf *xdp);
231 static int efx_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **xdpfs,
234 #define EFX_ASSERT_RESET_SERIALISED(efx) \
236 if ((efx->state == STATE_READY) || \
237 (efx->state == STATE_RECOVERY) || \
238 (efx->state == STATE_DISABLED)) \
242 static int efx_check_disabled(struct efx_nic *efx)
244 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
245 netif_err(efx, drv, efx->net_dev,
246 "device is disabled due to earlier errors\n");
252 /**************************************************************************
254 * Event queue processing
256 *************************************************************************/
258 /* Process channel's event queue
260 * This function is responsible for processing the event queue of a
261 * single channel. The caller must guarantee that this function will
262 * never be concurrently called more than once on the same channel,
263 * though different channels may be being processed concurrently.
265 static int efx_process_channel(struct efx_channel *channel, int budget)
267 struct efx_tx_queue *tx_queue;
268 struct list_head rx_list;
271 if (unlikely(!channel->enabled))
274 /* Prepare the batch receive list */
275 EFX_WARN_ON_PARANOID(channel->rx_list != NULL);
276 INIT_LIST_HEAD(&rx_list);
277 channel->rx_list = &rx_list;
279 efx_for_each_channel_tx_queue(tx_queue, channel) {
280 tx_queue->pkts_compl = 0;
281 tx_queue->bytes_compl = 0;
284 spent = efx_nic_process_eventq(channel, budget);
285 if (spent && efx_channel_has_rx_queue(channel)) {
286 struct efx_rx_queue *rx_queue =
287 efx_channel_get_rx_queue(channel);
289 efx_rx_flush_packet(channel);
290 efx_fast_push_rx_descriptors(rx_queue, true);
294 efx_for_each_channel_tx_queue(tx_queue, channel) {
295 if (tx_queue->bytes_compl) {
296 netdev_tx_completed_queue(tx_queue->core_txq,
297 tx_queue->pkts_compl, tx_queue->bytes_compl);
301 /* Receive any packets we queued up */
302 netif_receive_skb_list(channel->rx_list);
303 channel->rx_list = NULL;
310 * NAPI guarantees serialisation of polls of the same device, which
311 * provides the guarantee required by efx_process_channel().
313 static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
315 int step = efx->irq_mod_step_us;
317 if (channel->irq_mod_score < irq_adapt_low_thresh) {
318 if (channel->irq_moderation_us > step) {
319 channel->irq_moderation_us -= step;
320 efx->type->push_irq_moderation(channel);
322 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
323 if (channel->irq_moderation_us <
324 efx->irq_rx_moderation_us) {
325 channel->irq_moderation_us += step;
326 efx->type->push_irq_moderation(channel);
330 channel->irq_count = 0;
331 channel->irq_mod_score = 0;
334 static int efx_poll(struct napi_struct *napi, int budget)
336 struct efx_channel *channel =
337 container_of(napi, struct efx_channel, napi_str);
338 struct efx_nic *efx = channel->efx;
341 netif_vdbg(efx, intr, efx->net_dev,
342 "channel %d NAPI poll executing on CPU %d\n",
343 channel->channel, raw_smp_processor_id());
345 spent = efx_process_channel(channel, budget);
349 if (spent < budget) {
350 if (efx_channel_has_rx_queue(channel) &&
351 efx->irq_rx_adaptive &&
352 unlikely(++channel->irq_count == 1000)) {
353 efx_update_irq_mod(efx, channel);
356 #ifdef CONFIG_RFS_ACCEL
357 /* Perhaps expire some ARFS filters */
358 mod_delayed_work(system_wq, &channel->filter_work, 0);
361 /* There is no race here; although napi_disable() will
362 * only wait for napi_complete(), this isn't a problem
363 * since efx_nic_eventq_read_ack() will have no effect if
364 * interrupts have already been disabled.
366 if (napi_complete_done(napi, spent))
367 efx_nic_eventq_read_ack(channel);
373 /* Create event queue
374 * Event queue memory allocations are done only once. If the channel
375 * is reset, the memory buffer will be reused; this guards against
376 * errors during channel reset and also simplifies interrupt handling.
378 static int efx_probe_eventq(struct efx_channel *channel)
380 struct efx_nic *efx = channel->efx;
381 unsigned long entries;
383 netif_dbg(efx, probe, efx->net_dev,
384 "chan %d create event queue\n", channel->channel);
386 /* Build an event queue with room for one event per tx and rx buffer,
387 * plus some extra for link state events and MCDI completions. */
388 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
389 EFX_WARN_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
390 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
392 return efx_nic_probe_eventq(channel);
395 /* Prepare channel's event queue */
396 static int efx_init_eventq(struct efx_channel *channel)
398 struct efx_nic *efx = channel->efx;
401 EFX_WARN_ON_PARANOID(channel->eventq_init);
403 netif_dbg(efx, drv, efx->net_dev,
404 "chan %d init event queue\n", channel->channel);
406 rc = efx_nic_init_eventq(channel);
408 efx->type->push_irq_moderation(channel);
409 channel->eventq_read_ptr = 0;
410 channel->eventq_init = true;
415 /* Enable event queue processing and NAPI */
416 void efx_start_eventq(struct efx_channel *channel)
418 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
419 "chan %d start event queue\n", channel->channel);
421 /* Make sure the NAPI handler sees the enabled flag set */
422 channel->enabled = true;
425 napi_enable(&channel->napi_str);
426 efx_nic_eventq_read_ack(channel);
429 /* Disable event queue processing and NAPI */
430 void efx_stop_eventq(struct efx_channel *channel)
432 if (!channel->enabled)
435 napi_disable(&channel->napi_str);
436 channel->enabled = false;
439 static void efx_fini_eventq(struct efx_channel *channel)
441 if (!channel->eventq_init)
444 netif_dbg(channel->efx, drv, channel->efx->net_dev,
445 "chan %d fini event queue\n", channel->channel);
447 efx_nic_fini_eventq(channel);
448 channel->eventq_init = false;
451 static void efx_remove_eventq(struct efx_channel *channel)
453 netif_dbg(channel->efx, drv, channel->efx->net_dev,
454 "chan %d remove event queue\n", channel->channel);
456 efx_nic_remove_eventq(channel);
459 /**************************************************************************
463 *************************************************************************/
465 /* Allocate and initialise a channel structure. */
466 static struct efx_channel *
467 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
469 struct efx_channel *channel;
470 struct efx_rx_queue *rx_queue;
471 struct efx_tx_queue *tx_queue;
474 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
479 channel->channel = i;
480 channel->type = &efx_default_channel_type;
482 for (j = 0; j < EFX_TXQ_TYPES; j++) {
483 tx_queue = &channel->tx_queue[j];
485 tx_queue->queue = i * EFX_TXQ_TYPES + j;
486 tx_queue->channel = channel;
489 #ifdef CONFIG_RFS_ACCEL
490 INIT_DELAYED_WORK(&channel->filter_work, efx_filter_rfs_expire);
493 rx_queue = &channel->rx_queue;
495 timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0);
500 /* Allocate and initialise a channel structure, copying parameters
501 * (but not resources) from an old channel structure.
503 static struct efx_channel *
504 efx_copy_channel(const struct efx_channel *old_channel)
506 struct efx_channel *channel;
507 struct efx_rx_queue *rx_queue;
508 struct efx_tx_queue *tx_queue;
511 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
515 *channel = *old_channel;
517 channel->napi_dev = NULL;
518 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
519 channel->napi_str.napi_id = 0;
520 channel->napi_str.state = 0;
521 memset(&channel->eventq, 0, sizeof(channel->eventq));
523 for (j = 0; j < EFX_TXQ_TYPES; j++) {
524 tx_queue = &channel->tx_queue[j];
525 if (tx_queue->channel)
526 tx_queue->channel = channel;
527 tx_queue->buffer = NULL;
528 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
531 rx_queue = &channel->rx_queue;
532 rx_queue->buffer = NULL;
533 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
534 timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0);
535 #ifdef CONFIG_RFS_ACCEL
536 INIT_DELAYED_WORK(&channel->filter_work, efx_filter_rfs_expire);
542 static int efx_probe_channel(struct efx_channel *channel)
544 struct efx_tx_queue *tx_queue;
545 struct efx_rx_queue *rx_queue;
548 netif_dbg(channel->efx, probe, channel->efx->net_dev,
549 "creating channel %d\n", channel->channel);
551 rc = channel->type->pre_probe(channel);
555 rc = efx_probe_eventq(channel);
559 efx_for_each_channel_tx_queue(tx_queue, channel) {
560 rc = efx_probe_tx_queue(tx_queue);
565 efx_for_each_channel_rx_queue(rx_queue, channel) {
566 rc = efx_probe_rx_queue(rx_queue);
571 channel->rx_list = NULL;
576 efx_remove_channel(channel);
581 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
583 struct efx_nic *efx = channel->efx;
587 number = channel->channel;
589 if (number >= efx->xdp_channel_offset &&
590 !WARN_ON_ONCE(!efx->n_xdp_channels)) {
592 number -= efx->xdp_channel_offset;
593 } else if (efx->tx_channel_offset == 0) {
595 } else if (number < efx->tx_channel_offset) {
599 number -= efx->tx_channel_offset;
601 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
604 static void efx_set_channel_names(struct efx_nic *efx)
606 struct efx_channel *channel;
608 efx_for_each_channel(channel, efx)
609 channel->type->get_name(channel,
610 efx->msi_context[channel->channel].name,
611 sizeof(efx->msi_context[0].name));
614 static int efx_probe_channels(struct efx_nic *efx)
616 struct efx_channel *channel;
619 /* Restart special buffer allocation */
620 efx->next_buffer_table = 0;
622 /* Probe channels in reverse, so that any 'extra' channels
623 * use the start of the buffer table. This allows the traffic
624 * channels to be resized without moving them or wasting the
625 * entries before them.
627 efx_for_each_channel_rev(channel, efx) {
628 rc = efx_probe_channel(channel);
630 netif_err(efx, probe, efx->net_dev,
631 "failed to create channel %d\n",
636 efx_set_channel_names(efx);
641 efx_remove_channels(efx);
645 /* Channels are shutdown and reinitialised whilst the NIC is running
646 * to propagate configuration changes (mtu, checksum offload), or
647 * to clear hardware error conditions
649 static void efx_start_datapath(struct efx_nic *efx)
651 netdev_features_t old_features = efx->net_dev->features;
652 bool old_rx_scatter = efx->rx_scatter;
653 struct efx_tx_queue *tx_queue;
654 struct efx_rx_queue *rx_queue;
655 struct efx_channel *channel;
658 /* Calculate the rx buffer allocation parameters required to
659 * support the current MTU, including padding for header
660 * alignment and overruns.
662 efx->rx_dma_len = (efx->rx_prefix_size +
663 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
664 efx->type->rx_buffer_padding);
665 rx_buf_len = (sizeof(struct efx_rx_page_state) + XDP_PACKET_HEADROOM +
666 efx->rx_ip_align + efx->rx_dma_len);
667 if (rx_buf_len <= PAGE_SIZE) {
668 efx->rx_scatter = efx->type->always_rx_scatter;
669 efx->rx_buffer_order = 0;
670 } else if (efx->type->can_rx_scatter) {
671 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
672 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
673 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
674 EFX_RX_BUF_ALIGNMENT) >
676 efx->rx_scatter = true;
677 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
678 efx->rx_buffer_order = 0;
680 efx->rx_scatter = false;
681 efx->rx_buffer_order = get_order(rx_buf_len);
684 efx_rx_config_page_split(efx);
685 if (efx->rx_buffer_order)
686 netif_dbg(efx, drv, efx->net_dev,
687 "RX buf len=%u; page order=%u batch=%u\n",
688 efx->rx_dma_len, efx->rx_buffer_order,
689 efx->rx_pages_per_batch);
691 netif_dbg(efx, drv, efx->net_dev,
692 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
693 efx->rx_dma_len, efx->rx_page_buf_step,
694 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
696 /* Restore previously fixed features in hw_features and remove
697 * features which are fixed now
699 efx->net_dev->hw_features |= efx->net_dev->features;
700 efx->net_dev->hw_features &= ~efx->fixed_features;
701 efx->net_dev->features |= efx->fixed_features;
702 if (efx->net_dev->features != old_features)
703 netdev_features_change(efx->net_dev);
705 /* RX filters may also have scatter-enabled flags */
706 if (efx->rx_scatter != old_rx_scatter)
707 efx->type->filter_update_rx_scatter(efx);
709 /* We must keep at least one descriptor in a TX ring empty.
710 * We could avoid this when the queue size does not exactly
711 * match the hardware ring size, but it's not that important.
712 * Therefore we stop the queue when one more skb might fill
713 * the ring completely. We wake it when half way back to
716 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
717 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
719 /* Initialise the channels */
720 efx_for_each_channel(channel, efx) {
721 efx_for_each_channel_tx_queue(tx_queue, channel) {
722 efx_init_tx_queue(tx_queue);
723 atomic_inc(&efx->active_queues);
726 efx_for_each_channel_rx_queue(rx_queue, channel) {
727 efx_init_rx_queue(rx_queue);
728 atomic_inc(&efx->active_queues);
729 efx_stop_eventq(channel);
730 efx_fast_push_rx_descriptors(rx_queue, false);
731 efx_start_eventq(channel);
734 WARN_ON(channel->rx_pkt_n_frags);
737 efx_ptp_start_datapath(efx);
739 if (netif_device_present(efx->net_dev))
740 netif_tx_wake_all_queues(efx->net_dev);
743 static void efx_stop_datapath(struct efx_nic *efx)
745 struct efx_channel *channel;
746 struct efx_tx_queue *tx_queue;
747 struct efx_rx_queue *rx_queue;
750 EFX_ASSERT_RESET_SERIALISED(efx);
751 BUG_ON(efx->port_enabled);
753 efx_ptp_stop_datapath(efx);
756 efx_for_each_channel(channel, efx) {
757 efx_for_each_channel_rx_queue(rx_queue, channel)
758 rx_queue->refill_enabled = false;
761 efx_for_each_channel(channel, efx) {
762 /* RX packet processing is pipelined, so wait for the
763 * NAPI handler to complete. At least event queue 0
764 * might be kept active by non-data events, so don't
765 * use napi_synchronize() but actually disable NAPI
768 if (efx_channel_has_rx_queue(channel)) {
769 efx_stop_eventq(channel);
770 efx_start_eventq(channel);
774 rc = efx->type->fini_dmaq(efx);
776 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
778 netif_dbg(efx, drv, efx->net_dev,
779 "successfully flushed all queues\n");
782 efx_for_each_channel(channel, efx) {
783 efx_for_each_channel_rx_queue(rx_queue, channel)
784 efx_fini_rx_queue(rx_queue);
785 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
786 efx_fini_tx_queue(tx_queue);
788 efx->xdp_rxq_info_failed = false;
791 static void efx_remove_channel(struct efx_channel *channel)
793 struct efx_tx_queue *tx_queue;
794 struct efx_rx_queue *rx_queue;
796 netif_dbg(channel->efx, drv, channel->efx->net_dev,
797 "destroy chan %d\n", channel->channel);
799 efx_for_each_channel_rx_queue(rx_queue, channel)
800 efx_remove_rx_queue(rx_queue);
801 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
802 efx_remove_tx_queue(tx_queue);
803 efx_remove_eventq(channel);
804 channel->type->post_remove(channel);
807 static void efx_remove_channels(struct efx_nic *efx)
809 struct efx_channel *channel;
811 efx_for_each_channel(channel, efx)
812 efx_remove_channel(channel);
814 kfree(efx->xdp_tx_queues);
818 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
820 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
821 u32 old_rxq_entries, old_txq_entries;
822 unsigned i, next_buffer_table = 0;
825 rc = efx_check_disabled(efx);
829 /* Not all channels should be reallocated. We must avoid
830 * reallocating their buffer table entries.
832 efx_for_each_channel(channel, efx) {
833 struct efx_rx_queue *rx_queue;
834 struct efx_tx_queue *tx_queue;
836 if (channel->type->copy)
838 next_buffer_table = max(next_buffer_table,
839 channel->eventq.index +
840 channel->eventq.entries);
841 efx_for_each_channel_rx_queue(rx_queue, channel)
842 next_buffer_table = max(next_buffer_table,
843 rx_queue->rxd.index +
844 rx_queue->rxd.entries);
845 efx_for_each_channel_tx_queue(tx_queue, channel)
846 next_buffer_table = max(next_buffer_table,
847 tx_queue->txd.index +
848 tx_queue->txd.entries);
851 efx_device_detach_sync(efx);
853 efx_soft_disable_interrupts(efx);
855 /* Clone channels (where possible) */
856 memset(other_channel, 0, sizeof(other_channel));
857 for (i = 0; i < efx->n_channels; i++) {
858 channel = efx->channel[i];
859 if (channel->type->copy)
860 channel = channel->type->copy(channel);
865 other_channel[i] = channel;
868 /* Swap entry counts and channel pointers */
869 old_rxq_entries = efx->rxq_entries;
870 old_txq_entries = efx->txq_entries;
871 efx->rxq_entries = rxq_entries;
872 efx->txq_entries = txq_entries;
873 for (i = 0; i < efx->n_channels; i++) {
874 channel = efx->channel[i];
875 efx->channel[i] = other_channel[i];
876 other_channel[i] = channel;
879 /* Restart buffer table allocation */
880 efx->next_buffer_table = next_buffer_table;
882 for (i = 0; i < efx->n_channels; i++) {
883 channel = efx->channel[i];
884 if (!channel->type->copy)
886 rc = efx_probe_channel(channel);
889 efx_init_napi_channel(efx->channel[i]);
893 /* Destroy unused channel structures */
894 for (i = 0; i < efx->n_channels; i++) {
895 channel = other_channel[i];
896 if (channel && channel->type->copy) {
897 efx_fini_napi_channel(channel);
898 efx_remove_channel(channel);
903 rc2 = efx_soft_enable_interrupts(efx);
906 netif_err(efx, drv, efx->net_dev,
907 "unable to restart interrupts on channel reallocation\n");
908 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
911 efx_device_attach_if_not_resetting(efx);
917 efx->rxq_entries = old_rxq_entries;
918 efx->txq_entries = old_txq_entries;
919 for (i = 0; i < efx->n_channels; i++) {
920 channel = efx->channel[i];
921 efx->channel[i] = other_channel[i];
922 other_channel[i] = channel;
927 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
929 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(10));
932 static bool efx_default_channel_want_txqs(struct efx_channel *channel)
934 return channel->channel - channel->efx->tx_channel_offset <
935 channel->efx->n_tx_channels;
938 static const struct efx_channel_type efx_default_channel_type = {
939 .pre_probe = efx_channel_dummy_op_int,
940 .post_remove = efx_channel_dummy_op_void,
941 .get_name = efx_get_channel_name,
942 .copy = efx_copy_channel,
943 .want_txqs = efx_default_channel_want_txqs,
944 .keep_eventq = false,
948 int efx_channel_dummy_op_int(struct efx_channel *channel)
953 void efx_channel_dummy_op_void(struct efx_channel *channel)
957 /**************************************************************************
961 **************************************************************************/
963 /* This ensures that the kernel is kept informed (via
964 * netif_carrier_on/off) of the link status, and also maintains the
965 * link status's stop on the port's TX queue.
967 void efx_link_status_changed(struct efx_nic *efx)
969 struct efx_link_state *link_state = &efx->link_state;
971 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
972 * that no events are triggered between unregister_netdev() and the
973 * driver unloading. A more general condition is that NETDEV_CHANGE
974 * can only be generated between NETDEV_UP and NETDEV_DOWN */
975 if (!netif_running(efx->net_dev))
978 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
979 efx->n_link_state_changes++;
982 netif_carrier_on(efx->net_dev);
984 netif_carrier_off(efx->net_dev);
987 /* Status message for kernel log */
989 netif_info(efx, link, efx->net_dev,
990 "link up at %uMbps %s-duplex (MTU %d)\n",
991 link_state->speed, link_state->fd ? "full" : "half",
994 netif_info(efx, link, efx->net_dev, "link down\n");
997 void efx_link_set_advertising(struct efx_nic *efx,
998 const unsigned long *advertising)
1000 memcpy(efx->link_advertising, advertising,
1001 sizeof(__ETHTOOL_DECLARE_LINK_MODE_MASK()));
1003 efx->link_advertising[0] |= ADVERTISED_Autoneg;
1004 if (advertising[0] & ADVERTISED_Pause)
1005 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
1007 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
1008 if (advertising[0] & ADVERTISED_Asym_Pause)
1009 efx->wanted_fc ^= EFX_FC_TX;
1012 /* Equivalent to efx_link_set_advertising with all-zeroes, except does not
1013 * force the Autoneg bit on.
1015 void efx_link_clear_advertising(struct efx_nic *efx)
1017 bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS);
1018 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
1021 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
1023 efx->wanted_fc = wanted_fc;
1024 if (efx->link_advertising[0]) {
1025 if (wanted_fc & EFX_FC_RX)
1026 efx->link_advertising[0] |= (ADVERTISED_Pause |
1027 ADVERTISED_Asym_Pause);
1029 efx->link_advertising[0] &= ~(ADVERTISED_Pause |
1030 ADVERTISED_Asym_Pause);
1031 if (wanted_fc & EFX_FC_TX)
1032 efx->link_advertising[0] ^= ADVERTISED_Asym_Pause;
1036 static void efx_fini_port(struct efx_nic *efx);
1038 /* We assume that efx->type->reconfigure_mac will always try to sync RX
1039 * filters and therefore needs to read-lock the filter table against freeing
1041 void efx_mac_reconfigure(struct efx_nic *efx)
1043 down_read(&efx->filter_sem);
1044 efx->type->reconfigure_mac(efx);
1045 up_read(&efx->filter_sem);
1048 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
1049 * the MAC appropriately. All other PHY configuration changes are pushed
1050 * through phy_op->set_settings(), and pushed asynchronously to the MAC
1051 * through efx_monitor().
1053 * Callers must hold the mac_lock
1055 int __efx_reconfigure_port(struct efx_nic *efx)
1057 enum efx_phy_mode phy_mode;
1060 WARN_ON(!mutex_is_locked(&efx->mac_lock));
1062 /* Disable PHY transmit in mac level loopbacks */
1063 phy_mode = efx->phy_mode;
1064 if (LOOPBACK_INTERNAL(efx))
1065 efx->phy_mode |= PHY_MODE_TX_DISABLED;
1067 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1069 rc = efx->type->reconfigure_port(efx);
1072 efx->phy_mode = phy_mode;
1077 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1079 int efx_reconfigure_port(struct efx_nic *efx)
1083 EFX_ASSERT_RESET_SERIALISED(efx);
1085 mutex_lock(&efx->mac_lock);
1086 rc = __efx_reconfigure_port(efx);
1087 mutex_unlock(&efx->mac_lock);
1092 /* Asynchronous work item for changing MAC promiscuity and multicast
1093 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1095 static void efx_mac_work(struct work_struct *data)
1097 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1099 mutex_lock(&efx->mac_lock);
1100 if (efx->port_enabled)
1101 efx_mac_reconfigure(efx);
1102 mutex_unlock(&efx->mac_lock);
1105 static int efx_probe_port(struct efx_nic *efx)
1109 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1112 efx->phy_mode = PHY_MODE_SPECIAL;
1114 /* Connect up MAC/PHY operations table */
1115 rc = efx->type->probe_port(efx);
1119 /* Initialise MAC address to permanent address */
1120 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1125 static int efx_init_port(struct efx_nic *efx)
1129 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1131 mutex_lock(&efx->mac_lock);
1133 rc = efx->phy_op->init(efx);
1137 efx->port_initialized = true;
1139 /* Reconfigure the MAC before creating dma queues (required for
1140 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1141 efx_mac_reconfigure(efx);
1143 /* Ensure the PHY advertises the correct flow control settings */
1144 rc = efx->phy_op->reconfigure(efx);
1145 if (rc && rc != -EPERM)
1148 mutex_unlock(&efx->mac_lock);
1152 efx->phy_op->fini(efx);
1154 mutex_unlock(&efx->mac_lock);
1158 static void efx_start_port(struct efx_nic *efx)
1160 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1161 BUG_ON(efx->port_enabled);
1163 mutex_lock(&efx->mac_lock);
1164 efx->port_enabled = true;
1166 /* Ensure MAC ingress/egress is enabled */
1167 efx_mac_reconfigure(efx);
1169 mutex_unlock(&efx->mac_lock);
1172 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1173 * and the async self-test, wait for them to finish and prevent them
1174 * being scheduled again. This doesn't cover online resets, which
1175 * should only be cancelled when removing the device.
1177 static void efx_stop_port(struct efx_nic *efx)
1179 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1181 EFX_ASSERT_RESET_SERIALISED(efx);
1183 mutex_lock(&efx->mac_lock);
1184 efx->port_enabled = false;
1185 mutex_unlock(&efx->mac_lock);
1187 /* Serialise against efx_set_multicast_list() */
1188 netif_addr_lock_bh(efx->net_dev);
1189 netif_addr_unlock_bh(efx->net_dev);
1191 cancel_delayed_work_sync(&efx->monitor_work);
1192 efx_selftest_async_cancel(efx);
1193 cancel_work_sync(&efx->mac_work);
1196 static void efx_fini_port(struct efx_nic *efx)
1198 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1200 if (!efx->port_initialized)
1203 efx->phy_op->fini(efx);
1204 efx->port_initialized = false;
1206 efx->link_state.up = false;
1207 efx_link_status_changed(efx);
1210 static void efx_remove_port(struct efx_nic *efx)
1212 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1214 efx->type->remove_port(efx);
1217 /**************************************************************************
1221 **************************************************************************/
1223 static LIST_HEAD(efx_primary_list);
1224 static LIST_HEAD(efx_unassociated_list);
1226 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1228 return left->type == right->type &&
1229 left->vpd_sn && right->vpd_sn &&
1230 !strcmp(left->vpd_sn, right->vpd_sn);
1233 static void efx_associate(struct efx_nic *efx)
1235 struct efx_nic *other, *next;
1237 if (efx->primary == efx) {
1238 /* Adding primary function; look for secondaries */
1240 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1241 list_add_tail(&efx->node, &efx_primary_list);
1243 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1245 if (efx_same_controller(efx, other)) {
1246 list_del(&other->node);
1247 netif_dbg(other, probe, other->net_dev,
1248 "moving to secondary list of %s %s\n",
1249 pci_name(efx->pci_dev),
1250 efx->net_dev->name);
1251 list_add_tail(&other->node,
1252 &efx->secondary_list);
1253 other->primary = efx;
1257 /* Adding secondary function; look for primary */
1259 list_for_each_entry(other, &efx_primary_list, node) {
1260 if (efx_same_controller(efx, other)) {
1261 netif_dbg(efx, probe, efx->net_dev,
1262 "adding to secondary list of %s %s\n",
1263 pci_name(other->pci_dev),
1264 other->net_dev->name);
1265 list_add_tail(&efx->node,
1266 &other->secondary_list);
1267 efx->primary = other;
1272 netif_dbg(efx, probe, efx->net_dev,
1273 "adding to unassociated list\n");
1274 list_add_tail(&efx->node, &efx_unassociated_list);
1278 static void efx_dissociate(struct efx_nic *efx)
1280 struct efx_nic *other, *next;
1282 list_del(&efx->node);
1283 efx->primary = NULL;
1285 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1286 list_del(&other->node);
1287 netif_dbg(other, probe, other->net_dev,
1288 "moving to unassociated list\n");
1289 list_add_tail(&other->node, &efx_unassociated_list);
1290 other->primary = NULL;
1294 /* This configures the PCI device to enable I/O and DMA. */
1295 static int efx_init_io(struct efx_nic *efx)
1297 struct pci_dev *pci_dev = efx->pci_dev;
1298 dma_addr_t dma_mask = efx->type->max_dma_mask;
1299 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1302 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1304 bar = efx->type->mem_bar(efx);
1306 rc = pci_enable_device(pci_dev);
1308 netif_err(efx, probe, efx->net_dev,
1309 "failed to enable PCI device\n");
1313 pci_set_master(pci_dev);
1315 /* Set the PCI DMA mask. Try all possibilities from our genuine mask
1316 * down to 32 bits, because some architectures will allow 40 bit
1317 * masks event though they reject 46 bit masks.
1319 while (dma_mask > 0x7fffffffUL) {
1320 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1326 netif_err(efx, probe, efx->net_dev,
1327 "could not find a suitable DMA mask\n");
1330 netif_dbg(efx, probe, efx->net_dev,
1331 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1333 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1334 rc = pci_request_region(pci_dev, bar, "sfc");
1336 netif_err(efx, probe, efx->net_dev,
1337 "request for memory BAR failed\n");
1341 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1342 if (!efx->membase) {
1343 netif_err(efx, probe, efx->net_dev,
1344 "could not map memory BAR at %llx+%x\n",
1345 (unsigned long long)efx->membase_phys, mem_map_size);
1349 netif_dbg(efx, probe, efx->net_dev,
1350 "memory BAR at %llx+%x (virtual %p)\n",
1351 (unsigned long long)efx->membase_phys, mem_map_size,
1357 pci_release_region(efx->pci_dev, bar);
1359 efx->membase_phys = 0;
1361 pci_disable_device(efx->pci_dev);
1366 static void efx_fini_io(struct efx_nic *efx)
1370 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1373 iounmap(efx->membase);
1374 efx->membase = NULL;
1377 if (efx->membase_phys) {
1378 bar = efx->type->mem_bar(efx);
1379 pci_release_region(efx->pci_dev, bar);
1380 efx->membase_phys = 0;
1383 /* Don't disable bus-mastering if VFs are assigned */
1384 if (!pci_vfs_assigned(efx->pci_dev))
1385 pci_disable_device(efx->pci_dev);
1388 void efx_set_default_rx_indir_table(struct efx_nic *efx,
1389 struct efx_rss_context *ctx)
1393 for (i = 0; i < ARRAY_SIZE(ctx->rx_indir_table); i++)
1394 ctx->rx_indir_table[i] =
1395 ethtool_rxfh_indir_default(i, efx->rss_spread);
1398 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1400 cpumask_var_t thread_mask;
1407 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1408 netif_warn(efx, probe, efx->net_dev,
1409 "RSS disabled due to allocation failure\n");
1414 for_each_online_cpu(cpu) {
1415 if (!cpumask_test_cpu(cpu, thread_mask)) {
1417 cpumask_or(thread_mask, thread_mask,
1418 topology_sibling_cpumask(cpu));
1422 free_cpumask_var(thread_mask);
1425 if (count > EFX_MAX_RX_QUEUES) {
1426 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn,
1427 "Reducing number of rx queues from %u to %u.\n",
1428 count, EFX_MAX_RX_QUEUES);
1429 count = EFX_MAX_RX_QUEUES;
1432 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1433 * table entries that are inaccessible to VFs
1435 #ifdef CONFIG_SFC_SRIOV
1436 if (efx->type->sriov_wanted) {
1437 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1438 count > efx_vf_size(efx)) {
1439 netif_warn(efx, probe, efx->net_dev,
1440 "Reducing number of RSS channels from %u to %u for "
1441 "VF support. Increase vf-msix-limit to use more "
1442 "channels on the PF.\n",
1443 count, efx_vf_size(efx));
1444 count = efx_vf_size(efx);
1452 static int efx_allocate_msix_channels(struct efx_nic *efx,
1453 unsigned int max_channels,
1454 unsigned int extra_channels,
1455 unsigned int parallelism)
1457 unsigned int n_channels = parallelism;
1462 if (efx_separate_tx_channels)
1464 n_channels += extra_channels;
1466 /* To allow XDP transmit to happen from arbitrary NAPI contexts
1467 * we allocate a TX queue per CPU. We share event queues across
1468 * multiple tx queues, assuming tx and ev queues are both
1472 n_xdp_tx = num_possible_cpus();
1473 n_xdp_ev = DIV_ROUND_UP(n_xdp_tx, EFX_TXQ_TYPES);
1475 vec_count = pci_msix_vec_count(efx->pci_dev);
1479 max_channels = min_t(unsigned int, vec_count, max_channels);
1482 * We need a channel per event queue, plus a VI per tx queue.
1483 * This may be more pessimistic than it needs to be.
1485 if (n_channels + n_xdp_ev > max_channels) {
1486 netif_err(efx, drv, efx->net_dev,
1487 "Insufficient resources for %d XDP event queues (%d other channels, max %d)\n",
1488 n_xdp_ev, n_channels, max_channels);
1489 efx->n_xdp_channels = 0;
1490 efx->xdp_tx_per_channel = 0;
1491 efx->xdp_tx_queue_count = 0;
1493 efx->n_xdp_channels = n_xdp_ev;
1494 efx->xdp_tx_per_channel = EFX_TXQ_TYPES;
1495 efx->xdp_tx_queue_count = n_xdp_tx;
1496 n_channels += n_xdp_ev;
1497 netif_dbg(efx, drv, efx->net_dev,
1498 "Allocating %d TX and %d event queues for XDP\n",
1499 n_xdp_tx, n_xdp_ev);
1502 if (vec_count < n_channels) {
1503 netif_err(efx, drv, efx->net_dev,
1504 "WARNING: Insufficient MSI-X vectors available (%d < %u).\n",
1505 vec_count, n_channels);
1506 netif_err(efx, drv, efx->net_dev,
1507 "WARNING: Performance may be reduced.\n");
1508 n_channels = vec_count;
1511 n_channels = min(n_channels, max_channels);
1513 efx->n_channels = n_channels;
1515 /* Ignore XDP tx channels when creating rx channels. */
1516 n_channels -= efx->n_xdp_channels;
1518 if (efx_separate_tx_channels) {
1519 efx->n_tx_channels =
1520 min(max(n_channels / 2, 1U),
1521 efx->max_tx_channels);
1522 efx->tx_channel_offset =
1523 n_channels - efx->n_tx_channels;
1524 efx->n_rx_channels =
1526 efx->n_tx_channels, 1U);
1528 efx->n_tx_channels = min(n_channels, efx->max_tx_channels);
1529 efx->tx_channel_offset = 0;
1530 efx->n_rx_channels = n_channels;
1533 efx->n_rx_channels = min(efx->n_rx_channels, parallelism);
1534 efx->n_tx_channels = min(efx->n_tx_channels, parallelism);
1536 efx->xdp_channel_offset = n_channels;
1538 netif_dbg(efx, drv, efx->net_dev,
1539 "Allocating %u RX channels\n",
1540 efx->n_rx_channels);
1542 return efx->n_channels;
1545 /* Probe the number and type of interrupts we are able to obtain, and
1546 * the resulting numbers of channels and RX queues.
1548 static int efx_probe_interrupts(struct efx_nic *efx)
1550 unsigned int extra_channels = 0;
1551 unsigned int rss_spread;
1555 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1556 if (efx->extra_channel_type[i])
1559 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1560 unsigned int parallelism = efx_wanted_parallelism(efx);
1561 struct msix_entry xentries[EFX_MAX_CHANNELS];
1562 unsigned int n_channels;
1564 rc = efx_allocate_msix_channels(efx, efx->max_channels,
1565 extra_channels, parallelism);
1568 for (i = 0; i < n_channels; i++)
1569 xentries[i].entry = i;
1570 rc = pci_enable_msix_range(efx->pci_dev, xentries, 1,
1574 /* Fall back to single channel MSI */
1575 netif_err(efx, drv, efx->net_dev,
1576 "could not enable MSI-X\n");
1577 if (efx->type->min_interrupt_mode >= EFX_INT_MODE_MSI)
1578 efx->interrupt_mode = EFX_INT_MODE_MSI;
1581 } else if (rc < n_channels) {
1582 netif_err(efx, drv, efx->net_dev,
1583 "WARNING: Insufficient MSI-X vectors"
1584 " available (%d < %u).\n", rc, n_channels);
1585 netif_err(efx, drv, efx->net_dev,
1586 "WARNING: Performance may be reduced.\n");
1591 for (i = 0; i < efx->n_channels; i++)
1592 efx_get_channel(efx, i)->irq =
1597 /* Try single interrupt MSI */
1598 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1599 efx->n_channels = 1;
1600 efx->n_rx_channels = 1;
1601 efx->n_tx_channels = 1;
1602 efx->n_xdp_channels = 0;
1603 efx->xdp_channel_offset = efx->n_channels;
1604 rc = pci_enable_msi(efx->pci_dev);
1606 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1608 netif_err(efx, drv, efx->net_dev,
1609 "could not enable MSI\n");
1610 if (efx->type->min_interrupt_mode >= EFX_INT_MODE_LEGACY)
1611 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1617 /* Assume legacy interrupts */
1618 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1619 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1620 efx->n_rx_channels = 1;
1621 efx->n_tx_channels = 1;
1622 efx->n_xdp_channels = 0;
1623 efx->xdp_channel_offset = efx->n_channels;
1624 efx->legacy_irq = efx->pci_dev->irq;
1627 /* Assign extra channels if possible, before XDP channels */
1628 efx->n_extra_tx_channels = 0;
1629 j = efx->xdp_channel_offset;
1630 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1631 if (!efx->extra_channel_type[i])
1633 if (j <= efx->tx_channel_offset + efx->n_tx_channels) {
1634 efx->extra_channel_type[i]->handle_no_channel(efx);
1637 efx_get_channel(efx, j)->type =
1638 efx->extra_channel_type[i];
1639 if (efx_channel_has_tx_queues(efx_get_channel(efx, j)))
1640 efx->n_extra_tx_channels++;
1644 rss_spread = efx->n_rx_channels;
1645 /* RSS might be usable on VFs even if it is disabled on the PF */
1646 #ifdef CONFIG_SFC_SRIOV
1647 if (efx->type->sriov_wanted) {
1648 efx->rss_spread = ((rss_spread > 1 ||
1649 !efx->type->sriov_wanted(efx)) ?
1650 rss_spread : efx_vf_size(efx));
1654 efx->rss_spread = rss_spread;
1659 #if defined(CONFIG_SMP)
1660 static void efx_set_interrupt_affinity(struct efx_nic *efx)
1662 struct efx_channel *channel;
1665 efx_for_each_channel(channel, efx) {
1666 cpu = cpumask_local_spread(channel->channel,
1667 pcibus_to_node(efx->pci_dev->bus));
1668 irq_set_affinity_hint(channel->irq, cpumask_of(cpu));
1672 static void efx_clear_interrupt_affinity(struct efx_nic *efx)
1674 struct efx_channel *channel;
1676 efx_for_each_channel(channel, efx)
1677 irq_set_affinity_hint(channel->irq, NULL);
1681 efx_set_interrupt_affinity(struct efx_nic *efx __attribute__ ((unused)))
1686 efx_clear_interrupt_affinity(struct efx_nic *efx __attribute__ ((unused)))
1689 #endif /* CONFIG_SMP */
1691 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1693 struct efx_channel *channel, *end_channel;
1696 BUG_ON(efx->state == STATE_DISABLED);
1698 efx->irq_soft_enabled = true;
1701 efx_for_each_channel(channel, efx) {
1702 if (!channel->type->keep_eventq) {
1703 rc = efx_init_eventq(channel);
1707 efx_start_eventq(channel);
1710 efx_mcdi_mode_event(efx);
1714 end_channel = channel;
1715 efx_for_each_channel(channel, efx) {
1716 if (channel == end_channel)
1718 efx_stop_eventq(channel);
1719 if (!channel->type->keep_eventq)
1720 efx_fini_eventq(channel);
1726 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1728 struct efx_channel *channel;
1730 if (efx->state == STATE_DISABLED)
1733 efx_mcdi_mode_poll(efx);
1735 efx->irq_soft_enabled = false;
1738 if (efx->legacy_irq)
1739 synchronize_irq(efx->legacy_irq);
1741 efx_for_each_channel(channel, efx) {
1743 synchronize_irq(channel->irq);
1745 efx_stop_eventq(channel);
1746 if (!channel->type->keep_eventq)
1747 efx_fini_eventq(channel);
1750 /* Flush the asynchronous MCDI request queue */
1751 efx_mcdi_flush_async(efx);
1754 static int efx_enable_interrupts(struct efx_nic *efx)
1756 struct efx_channel *channel, *end_channel;
1759 BUG_ON(efx->state == STATE_DISABLED);
1761 if (efx->eeh_disabled_legacy_irq) {
1762 enable_irq(efx->legacy_irq);
1763 efx->eeh_disabled_legacy_irq = false;
1766 efx->type->irq_enable_master(efx);
1768 efx_for_each_channel(channel, efx) {
1769 if (channel->type->keep_eventq) {
1770 rc = efx_init_eventq(channel);
1776 rc = efx_soft_enable_interrupts(efx);
1783 end_channel = channel;
1784 efx_for_each_channel(channel, efx) {
1785 if (channel == end_channel)
1787 if (channel->type->keep_eventq)
1788 efx_fini_eventq(channel);
1791 efx->type->irq_disable_non_ev(efx);
1796 static void efx_disable_interrupts(struct efx_nic *efx)
1798 struct efx_channel *channel;
1800 efx_soft_disable_interrupts(efx);
1802 efx_for_each_channel(channel, efx) {
1803 if (channel->type->keep_eventq)
1804 efx_fini_eventq(channel);
1807 efx->type->irq_disable_non_ev(efx);
1810 static void efx_remove_interrupts(struct efx_nic *efx)
1812 struct efx_channel *channel;
1814 /* Remove MSI/MSI-X interrupts */
1815 efx_for_each_channel(channel, efx)
1817 pci_disable_msi(efx->pci_dev);
1818 pci_disable_msix(efx->pci_dev);
1820 /* Remove legacy interrupt */
1821 efx->legacy_irq = 0;
1824 static int efx_set_channels(struct efx_nic *efx)
1826 struct efx_channel *channel;
1827 struct efx_tx_queue *tx_queue;
1828 int xdp_queue_number;
1830 efx->tx_channel_offset =
1831 efx_separate_tx_channels ?
1832 efx->n_channels - efx->n_tx_channels : 0;
1834 if (efx->xdp_tx_queue_count) {
1835 EFX_WARN_ON_PARANOID(efx->xdp_tx_queues);
1837 /* Allocate array for XDP TX queue lookup. */
1838 efx->xdp_tx_queues = kcalloc(efx->xdp_tx_queue_count,
1839 sizeof(*efx->xdp_tx_queues),
1841 if (!efx->xdp_tx_queues)
1845 /* We need to mark which channels really have RX and TX
1846 * queues, and adjust the TX queue numbers if we have separate
1847 * RX-only and TX-only channels.
1849 xdp_queue_number = 0;
1850 efx_for_each_channel(channel, efx) {
1851 if (channel->channel < efx->n_rx_channels)
1852 channel->rx_queue.core_index = channel->channel;
1854 channel->rx_queue.core_index = -1;
1856 efx_for_each_channel_tx_queue(tx_queue, channel) {
1857 tx_queue->queue -= (efx->tx_channel_offset *
1860 if (efx_channel_is_xdp_tx(channel) &&
1861 xdp_queue_number < efx->xdp_tx_queue_count) {
1862 efx->xdp_tx_queues[xdp_queue_number] = tx_queue;
1870 static int efx_probe_nic(struct efx_nic *efx)
1874 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1876 /* Carry out hardware-type specific initialisation */
1877 rc = efx->type->probe(efx);
1882 if (!efx->max_channels || !efx->max_tx_channels) {
1883 netif_err(efx, drv, efx->net_dev,
1884 "Insufficient resources to allocate"
1890 /* Determine the number of channels and queues by trying
1891 * to hook in MSI-X interrupts.
1893 rc = efx_probe_interrupts(efx);
1897 rc = efx_set_channels(efx);
1901 /* dimension_resources can fail with EAGAIN */
1902 rc = efx->type->dimension_resources(efx);
1903 if (rc != 0 && rc != -EAGAIN)
1907 /* try again with new max_channels */
1908 efx_remove_interrupts(efx);
1910 } while (rc == -EAGAIN);
1912 if (efx->n_channels > 1)
1913 netdev_rss_key_fill(efx->rss_context.rx_hash_key,
1914 sizeof(efx->rss_context.rx_hash_key));
1915 efx_set_default_rx_indir_table(efx, &efx->rss_context);
1917 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1918 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1920 /* Initialise the interrupt moderation settings */
1921 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1922 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1928 efx_remove_interrupts(efx);
1930 efx->type->remove(efx);
1934 static void efx_remove_nic(struct efx_nic *efx)
1936 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1938 efx_remove_interrupts(efx);
1939 efx->type->remove(efx);
1942 static int efx_probe_filters(struct efx_nic *efx)
1946 init_rwsem(&efx->filter_sem);
1947 mutex_lock(&efx->mac_lock);
1948 down_write(&efx->filter_sem);
1949 rc = efx->type->filter_table_probe(efx);
1953 #ifdef CONFIG_RFS_ACCEL
1954 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1955 struct efx_channel *channel;
1958 efx_for_each_channel(channel, efx) {
1959 channel->rps_flow_id =
1960 kcalloc(efx->type->max_rx_ip_filters,
1961 sizeof(*channel->rps_flow_id),
1963 if (!channel->rps_flow_id)
1967 i < efx->type->max_rx_ip_filters;
1969 channel->rps_flow_id[i] =
1970 RPS_FLOW_ID_INVALID;
1971 channel->rfs_expire_index = 0;
1972 channel->rfs_filter_count = 0;
1976 efx_for_each_channel(channel, efx)
1977 kfree(channel->rps_flow_id);
1978 efx->type->filter_table_remove(efx);
1985 up_write(&efx->filter_sem);
1986 mutex_unlock(&efx->mac_lock);
1990 static void efx_remove_filters(struct efx_nic *efx)
1992 #ifdef CONFIG_RFS_ACCEL
1993 struct efx_channel *channel;
1995 efx_for_each_channel(channel, efx) {
1996 cancel_delayed_work_sync(&channel->filter_work);
1997 kfree(channel->rps_flow_id);
2000 down_write(&efx->filter_sem);
2001 efx->type->filter_table_remove(efx);
2002 up_write(&efx->filter_sem);
2006 /**************************************************************************
2008 * NIC startup/shutdown
2010 *************************************************************************/
2012 static int efx_probe_all(struct efx_nic *efx)
2016 rc = efx_probe_nic(efx);
2018 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
2022 rc = efx_probe_port(efx);
2024 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
2028 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
2029 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
2033 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
2035 #ifdef CONFIG_SFC_SRIOV
2036 rc = efx->type->vswitching_probe(efx);
2037 if (rc) /* not fatal; the PF will still work fine */
2038 netif_warn(efx, probe, efx->net_dev,
2039 "failed to setup vswitching rc=%d;"
2040 " VFs may not function\n", rc);
2043 rc = efx_probe_filters(efx);
2045 netif_err(efx, probe, efx->net_dev,
2046 "failed to create filter tables\n");
2050 rc = efx_probe_channels(efx);
2057 efx_remove_filters(efx);
2059 #ifdef CONFIG_SFC_SRIOV
2060 efx->type->vswitching_remove(efx);
2063 efx_remove_port(efx);
2065 efx_remove_nic(efx);
2070 /* If the interface is supposed to be running but is not, start
2071 * the hardware and software data path, regular activity for the port
2072 * (MAC statistics, link polling, etc.) and schedule the port to be
2073 * reconfigured. Interrupts must already be enabled. This function
2074 * is safe to call multiple times, so long as the NIC is not disabled.
2075 * Requires the RTNL lock.
2077 static void efx_start_all(struct efx_nic *efx)
2079 EFX_ASSERT_RESET_SERIALISED(efx);
2080 BUG_ON(efx->state == STATE_DISABLED);
2082 /* Check that it is appropriate to restart the interface. All
2083 * of these flags are safe to read under just the rtnl lock */
2084 if (efx->port_enabled || !netif_running(efx->net_dev) ||
2088 efx_start_port(efx);
2089 efx_start_datapath(efx);
2091 /* Start the hardware monitor if there is one */
2092 if (efx->type->monitor != NULL)
2093 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2094 efx_monitor_interval);
2096 /* Link state detection is normally event-driven; we have
2097 * to poll now because we could have missed a change
2099 mutex_lock(&efx->mac_lock);
2100 if (efx->phy_op->poll(efx))
2101 efx_link_status_changed(efx);
2102 mutex_unlock(&efx->mac_lock);
2104 efx->type->start_stats(efx);
2105 efx->type->pull_stats(efx);
2106 spin_lock_bh(&efx->stats_lock);
2107 efx->type->update_stats(efx, NULL, NULL);
2108 spin_unlock_bh(&efx->stats_lock);
2111 /* Quiesce the hardware and software data path, and regular activity
2112 * for the port without bringing the link down. Safe to call multiple
2113 * times with the NIC in almost any state, but interrupts should be
2114 * enabled. Requires the RTNL lock.
2116 static void efx_stop_all(struct efx_nic *efx)
2118 EFX_ASSERT_RESET_SERIALISED(efx);
2120 /* port_enabled can be read safely under the rtnl lock */
2121 if (!efx->port_enabled)
2124 /* update stats before we go down so we can accurately count
2127 efx->type->pull_stats(efx);
2128 spin_lock_bh(&efx->stats_lock);
2129 efx->type->update_stats(efx, NULL, NULL);
2130 spin_unlock_bh(&efx->stats_lock);
2131 efx->type->stop_stats(efx);
2134 /* Stop the kernel transmit interface. This is only valid if
2135 * the device is stopped or detached; otherwise the watchdog
2136 * may fire immediately.
2138 WARN_ON(netif_running(efx->net_dev) &&
2139 netif_device_present(efx->net_dev));
2140 netif_tx_disable(efx->net_dev);
2142 efx_stop_datapath(efx);
2145 static void efx_remove_all(struct efx_nic *efx)
2148 efx_xdp_setup_prog(efx, NULL);
2151 efx_remove_channels(efx);
2152 efx_remove_filters(efx);
2153 #ifdef CONFIG_SFC_SRIOV
2154 efx->type->vswitching_remove(efx);
2156 efx_remove_port(efx);
2157 efx_remove_nic(efx);
2160 /**************************************************************************
2162 * Interrupt moderation
2164 **************************************************************************/
2165 unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
2169 if (usecs * 1000 < efx->timer_quantum_ns)
2170 return 1; /* never round down to 0 */
2171 return usecs * 1000 / efx->timer_quantum_ns;
2174 unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
2176 /* We must round up when converting ticks to microseconds
2177 * because we round down when converting the other way.
2179 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
2182 /* Set interrupt moderation parameters */
2183 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
2184 unsigned int rx_usecs, bool rx_adaptive,
2185 bool rx_may_override_tx)
2187 struct efx_channel *channel;
2188 unsigned int timer_max_us;
2190 EFX_ASSERT_RESET_SERIALISED(efx);
2192 timer_max_us = efx->timer_max_ns / 1000;
2194 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
2197 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
2198 !rx_may_override_tx) {
2199 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
2200 "RX and TX IRQ moderation must be equal\n");
2204 efx->irq_rx_adaptive = rx_adaptive;
2205 efx->irq_rx_moderation_us = rx_usecs;
2206 efx_for_each_channel(channel, efx) {
2207 if (efx_channel_has_rx_queue(channel))
2208 channel->irq_moderation_us = rx_usecs;
2209 else if (efx_channel_has_tx_queues(channel))
2210 channel->irq_moderation_us = tx_usecs;
2211 else if (efx_channel_is_xdp_tx(channel))
2212 channel->irq_moderation_us = tx_usecs;
2218 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
2219 unsigned int *rx_usecs, bool *rx_adaptive)
2221 *rx_adaptive = efx->irq_rx_adaptive;
2222 *rx_usecs = efx->irq_rx_moderation_us;
2224 /* If channels are shared between RX and TX, so is IRQ
2225 * moderation. Otherwise, IRQ moderation is the same for all
2226 * TX channels and is not adaptive.
2228 if (efx->tx_channel_offset == 0) {
2229 *tx_usecs = *rx_usecs;
2231 struct efx_channel *tx_channel;
2233 tx_channel = efx->channel[efx->tx_channel_offset];
2234 *tx_usecs = tx_channel->irq_moderation_us;
2238 /**************************************************************************
2242 **************************************************************************/
2244 /* Run periodically off the general workqueue */
2245 static void efx_monitor(struct work_struct *data)
2247 struct efx_nic *efx = container_of(data, struct efx_nic,
2250 netif_vdbg(efx, timer, efx->net_dev,
2251 "hardware monitor executing on CPU %d\n",
2252 raw_smp_processor_id());
2253 BUG_ON(efx->type->monitor == NULL);
2255 /* If the mac_lock is already held then it is likely a port
2256 * reconfiguration is already in place, which will likely do
2257 * most of the work of monitor() anyway. */
2258 if (mutex_trylock(&efx->mac_lock)) {
2259 if (efx->port_enabled)
2260 efx->type->monitor(efx);
2261 mutex_unlock(&efx->mac_lock);
2264 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2265 efx_monitor_interval);
2268 /**************************************************************************
2272 *************************************************************************/
2275 * Context: process, rtnl_lock() held.
2277 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2279 struct efx_nic *efx = netdev_priv(net_dev);
2280 struct mii_ioctl_data *data = if_mii(ifr);
2282 if (cmd == SIOCSHWTSTAMP)
2283 return efx_ptp_set_ts_config(efx, ifr);
2284 if (cmd == SIOCGHWTSTAMP)
2285 return efx_ptp_get_ts_config(efx, ifr);
2287 /* Convert phy_id from older PRTAD/DEVAD format */
2288 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2289 (data->phy_id & 0xfc00) == 0x0400)
2290 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2292 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2295 /**************************************************************************
2299 **************************************************************************/
2301 static void efx_init_napi_channel(struct efx_channel *channel)
2303 struct efx_nic *efx = channel->efx;
2305 channel->napi_dev = efx->net_dev;
2306 netif_napi_add(channel->napi_dev, &channel->napi_str,
2307 efx_poll, napi_weight);
2310 static void efx_init_napi(struct efx_nic *efx)
2312 struct efx_channel *channel;
2314 efx_for_each_channel(channel, efx)
2315 efx_init_napi_channel(channel);
2318 static void efx_fini_napi_channel(struct efx_channel *channel)
2320 if (channel->napi_dev)
2321 netif_napi_del(&channel->napi_str);
2323 channel->napi_dev = NULL;
2326 static void efx_fini_napi(struct efx_nic *efx)
2328 struct efx_channel *channel;
2330 efx_for_each_channel(channel, efx)
2331 efx_fini_napi_channel(channel);
2334 /**************************************************************************
2336 * Kernel net device interface
2338 *************************************************************************/
2340 /* Context: process, rtnl_lock() held. */
2341 int efx_net_open(struct net_device *net_dev)
2343 struct efx_nic *efx = netdev_priv(net_dev);
2346 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2347 raw_smp_processor_id());
2349 rc = efx_check_disabled(efx);
2352 if (efx->phy_mode & PHY_MODE_SPECIAL)
2354 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2357 /* Notify the kernel of the link state polled during driver load,
2358 * before the monitor starts running */
2359 efx_link_status_changed(efx);
2362 if (efx->state == STATE_DISABLED || efx->reset_pending)
2363 netif_device_detach(efx->net_dev);
2364 efx_selftest_async_start(efx);
2368 /* Context: process, rtnl_lock() held.
2369 * Note that the kernel will ignore our return code; this method
2370 * should really be a void.
2372 int efx_net_stop(struct net_device *net_dev)
2374 struct efx_nic *efx = netdev_priv(net_dev);
2376 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2377 raw_smp_processor_id());
2379 /* Stop the device and flush all the channels */
2385 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2386 static void efx_net_stats(struct net_device *net_dev,
2387 struct rtnl_link_stats64 *stats)
2389 struct efx_nic *efx = netdev_priv(net_dev);
2391 spin_lock_bh(&efx->stats_lock);
2392 efx->type->update_stats(efx, NULL, stats);
2393 spin_unlock_bh(&efx->stats_lock);
2396 /* Context: netif_tx_lock held, BHs disabled. */
2397 static void efx_watchdog(struct net_device *net_dev)
2399 struct efx_nic *efx = netdev_priv(net_dev);
2401 netif_err(efx, tx_err, efx->net_dev,
2402 "TX stuck with port_enabled=%d: resetting channels\n",
2405 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2408 static unsigned int efx_xdp_max_mtu(struct efx_nic *efx)
2410 /* The maximum MTU that we can fit in a single page, allowing for
2411 * framing, overhead and XDP headroom.
2413 int overhead = EFX_MAX_FRAME_LEN(0) + sizeof(struct efx_rx_page_state) +
2414 efx->rx_prefix_size + efx->type->rx_buffer_padding +
2415 efx->rx_ip_align + XDP_PACKET_HEADROOM;
2417 return PAGE_SIZE - overhead;
2420 /* Context: process, rtnl_lock() held. */
2421 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2423 struct efx_nic *efx = netdev_priv(net_dev);
2426 rc = efx_check_disabled(efx);
2430 if (rtnl_dereference(efx->xdp_prog) &&
2431 new_mtu > efx_xdp_max_mtu(efx)) {
2432 netif_err(efx, drv, efx->net_dev,
2433 "Requested MTU of %d too big for XDP (max: %d)\n",
2434 new_mtu, efx_xdp_max_mtu(efx));
2438 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2440 efx_device_detach_sync(efx);
2443 mutex_lock(&efx->mac_lock);
2444 net_dev->mtu = new_mtu;
2445 efx_mac_reconfigure(efx);
2446 mutex_unlock(&efx->mac_lock);
2449 efx_device_attach_if_not_resetting(efx);
2453 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2455 struct efx_nic *efx = netdev_priv(net_dev);
2456 struct sockaddr *addr = data;
2457 u8 *new_addr = addr->sa_data;
2461 if (!is_valid_ether_addr(new_addr)) {
2462 netif_err(efx, drv, efx->net_dev,
2463 "invalid ethernet MAC address requested: %pM\n",
2465 return -EADDRNOTAVAIL;
2468 /* save old address */
2469 ether_addr_copy(old_addr, net_dev->dev_addr);
2470 ether_addr_copy(net_dev->dev_addr, new_addr);
2471 if (efx->type->set_mac_address) {
2472 rc = efx->type->set_mac_address(efx);
2474 ether_addr_copy(net_dev->dev_addr, old_addr);
2479 /* Reconfigure the MAC */
2480 mutex_lock(&efx->mac_lock);
2481 efx_mac_reconfigure(efx);
2482 mutex_unlock(&efx->mac_lock);
2487 /* Context: netif_addr_lock held, BHs disabled. */
2488 static void efx_set_rx_mode(struct net_device *net_dev)
2490 struct efx_nic *efx = netdev_priv(net_dev);
2492 if (efx->port_enabled)
2493 queue_work(efx->workqueue, &efx->mac_work);
2494 /* Otherwise efx_start_port() will do this */
2497 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2499 struct efx_nic *efx = netdev_priv(net_dev);
2502 /* If disabling RX n-tuple filtering, clear existing filters */
2503 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2504 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2509 /* If Rx VLAN filter is changed, update filters via mac_reconfigure.
2510 * If rx-fcs is changed, mac_reconfigure updates that too.
2512 if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER |
2514 /* efx_set_rx_mode() will schedule MAC work to update filters
2515 * when a new features are finally set in net_dev.
2517 efx_set_rx_mode(net_dev);
2523 static int efx_get_phys_port_id(struct net_device *net_dev,
2524 struct netdev_phys_item_id *ppid)
2526 struct efx_nic *efx = netdev_priv(net_dev);
2528 if (efx->type->get_phys_port_id)
2529 return efx->type->get_phys_port_id(efx, ppid);
2534 static int efx_get_phys_port_name(struct net_device *net_dev,
2535 char *name, size_t len)
2537 struct efx_nic *efx = netdev_priv(net_dev);
2539 if (snprintf(name, len, "p%u", efx->port_num) >= len)
2544 static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2546 struct efx_nic *efx = netdev_priv(net_dev);
2548 if (efx->type->vlan_rx_add_vid)
2549 return efx->type->vlan_rx_add_vid(efx, proto, vid);
2554 static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2556 struct efx_nic *efx = netdev_priv(net_dev);
2558 if (efx->type->vlan_rx_kill_vid)
2559 return efx->type->vlan_rx_kill_vid(efx, proto, vid);
2564 static int efx_udp_tunnel_type_map(enum udp_parsable_tunnel_type in)
2567 case UDP_TUNNEL_TYPE_VXLAN:
2568 return TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN;
2569 case UDP_TUNNEL_TYPE_GENEVE:
2570 return TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE;
2576 static void efx_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti)
2578 struct efx_nic *efx = netdev_priv(dev);
2579 struct efx_udp_tunnel tnl;
2580 int efx_tunnel_type;
2582 efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
2583 if (efx_tunnel_type < 0)
2586 tnl.type = (u16)efx_tunnel_type;
2587 tnl.port = ti->port;
2589 if (efx->type->udp_tnl_add_port)
2590 (void)efx->type->udp_tnl_add_port(efx, tnl);
2593 static void efx_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti)
2595 struct efx_nic *efx = netdev_priv(dev);
2596 struct efx_udp_tunnel tnl;
2597 int efx_tunnel_type;
2599 efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
2600 if (efx_tunnel_type < 0)
2603 tnl.type = (u16)efx_tunnel_type;
2604 tnl.port = ti->port;
2606 if (efx->type->udp_tnl_del_port)
2607 (void)efx->type->udp_tnl_del_port(efx, tnl);
2610 static const struct net_device_ops efx_netdev_ops = {
2611 .ndo_open = efx_net_open,
2612 .ndo_stop = efx_net_stop,
2613 .ndo_get_stats64 = efx_net_stats,
2614 .ndo_tx_timeout = efx_watchdog,
2615 .ndo_start_xmit = efx_hard_start_xmit,
2616 .ndo_validate_addr = eth_validate_addr,
2617 .ndo_do_ioctl = efx_ioctl,
2618 .ndo_change_mtu = efx_change_mtu,
2619 .ndo_set_mac_address = efx_set_mac_address,
2620 .ndo_set_rx_mode = efx_set_rx_mode,
2621 .ndo_set_features = efx_set_features,
2622 .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
2623 .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
2624 #ifdef CONFIG_SFC_SRIOV
2625 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2626 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2627 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2628 .ndo_get_vf_config = efx_sriov_get_vf_config,
2629 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2631 .ndo_get_phys_port_id = efx_get_phys_port_id,
2632 .ndo_get_phys_port_name = efx_get_phys_port_name,
2633 .ndo_setup_tc = efx_setup_tc,
2634 #ifdef CONFIG_RFS_ACCEL
2635 .ndo_rx_flow_steer = efx_filter_rfs,
2637 .ndo_udp_tunnel_add = efx_udp_tunnel_add,
2638 .ndo_udp_tunnel_del = efx_udp_tunnel_del,
2639 .ndo_xdp_xmit = efx_xdp_xmit,
2643 static int efx_xdp_setup_prog(struct efx_nic *efx, struct bpf_prog *prog)
2645 struct bpf_prog *old_prog;
2647 if (efx->xdp_rxq_info_failed) {
2648 netif_err(efx, drv, efx->net_dev,
2649 "Unable to bind XDP program due to previous failure of rxq_info\n");
2653 if (prog && efx->net_dev->mtu > efx_xdp_max_mtu(efx)) {
2654 netif_err(efx, drv, efx->net_dev,
2655 "Unable to configure XDP with MTU of %d (max: %d)\n",
2656 efx->net_dev->mtu, efx_xdp_max_mtu(efx));
2660 old_prog = rtnl_dereference(efx->xdp_prog);
2661 rcu_assign_pointer(efx->xdp_prog, prog);
2662 /* Release the reference that was originally passed by the caller. */
2664 bpf_prog_put(old_prog);
2669 /* Context: process, rtnl_lock() held. */
2670 static int efx_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2672 struct efx_nic *efx = netdev_priv(dev);
2673 struct bpf_prog *xdp_prog;
2675 switch (xdp->command) {
2676 case XDP_SETUP_PROG:
2677 return efx_xdp_setup_prog(efx, xdp->prog);
2678 case XDP_QUERY_PROG:
2679 xdp_prog = rtnl_dereference(efx->xdp_prog);
2680 xdp->prog_id = xdp_prog ? xdp_prog->aux->id : 0;
2687 static int efx_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **xdpfs,
2690 struct efx_nic *efx = netdev_priv(dev);
2692 if (!netif_running(dev))
2695 return efx_xdp_tx_buffers(efx, n, xdpfs, flags & XDP_XMIT_FLUSH);
2698 static void efx_update_name(struct efx_nic *efx)
2700 strcpy(efx->name, efx->net_dev->name);
2701 efx_mtd_rename(efx);
2702 efx_set_channel_names(efx);
2705 static int efx_netdev_event(struct notifier_block *this,
2706 unsigned long event, void *ptr)
2708 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2710 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2711 event == NETDEV_CHANGENAME)
2712 efx_update_name(netdev_priv(net_dev));
2717 static struct notifier_block efx_netdev_notifier = {
2718 .notifier_call = efx_netdev_event,
2722 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2724 struct efx_nic *efx = dev_get_drvdata(dev);
2725 return sprintf(buf, "%d\n", efx->phy_type);
2727 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2729 #ifdef CONFIG_SFC_MCDI_LOGGING
2730 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2733 struct efx_nic *efx = dev_get_drvdata(dev);
2734 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2736 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2738 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2739 const char *buf, size_t count)
2741 struct efx_nic *efx = dev_get_drvdata(dev);
2742 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2743 bool enable = count > 0 && *buf != '0';
2745 mcdi->logging_enabled = enable;
2748 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2751 static int efx_register_netdev(struct efx_nic *efx)
2753 struct net_device *net_dev = efx->net_dev;
2754 struct efx_channel *channel;
2757 net_dev->watchdog_timeo = 5 * HZ;
2758 net_dev->irq = efx->pci_dev->irq;
2759 net_dev->netdev_ops = &efx_netdev_ops;
2760 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2761 net_dev->priv_flags |= IFF_UNICAST_FLT;
2762 net_dev->ethtool_ops = &efx_ethtool_ops;
2763 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2764 net_dev->min_mtu = EFX_MIN_MTU;
2765 net_dev->max_mtu = EFX_MAX_MTU;
2769 /* Enable resets to be scheduled and check whether any were
2770 * already requested. If so, the NIC is probably hosed so we
2773 efx->state = STATE_READY;
2774 smp_mb(); /* ensure we change state before checking reset_pending */
2775 if (efx->reset_pending) {
2776 netif_err(efx, probe, efx->net_dev,
2777 "aborting probe due to scheduled reset\n");
2782 rc = dev_alloc_name(net_dev, net_dev->name);
2785 efx_update_name(efx);
2787 /* Always start with carrier off; PHY events will detect the link */
2788 netif_carrier_off(net_dev);
2790 rc = register_netdevice(net_dev);
2794 efx_for_each_channel(channel, efx) {
2795 struct efx_tx_queue *tx_queue;
2796 efx_for_each_channel_tx_queue(tx_queue, channel)
2797 efx_init_tx_queue_core_txq(tx_queue);
2804 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2806 netif_err(efx, drv, efx->net_dev,
2807 "failed to init net dev attributes\n");
2808 goto fail_registered;
2810 #ifdef CONFIG_SFC_MCDI_LOGGING
2811 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2813 netif_err(efx, drv, efx->net_dev,
2814 "failed to init net dev attributes\n");
2815 goto fail_attr_mcdi_logging;
2821 #ifdef CONFIG_SFC_MCDI_LOGGING
2822 fail_attr_mcdi_logging:
2823 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2827 efx_dissociate(efx);
2828 unregister_netdevice(net_dev);
2830 efx->state = STATE_UNINIT;
2832 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2836 static void efx_unregister_netdev(struct efx_nic *efx)
2841 BUG_ON(netdev_priv(efx->net_dev) != efx);
2843 if (efx_dev_registered(efx)) {
2844 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2845 #ifdef CONFIG_SFC_MCDI_LOGGING
2846 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2848 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2849 unregister_netdev(efx->net_dev);
2853 /**************************************************************************
2855 * Device reset and suspend
2857 **************************************************************************/
2859 /* Tears down the entire software state and most of the hardware state
2861 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2863 EFX_ASSERT_RESET_SERIALISED(efx);
2865 if (method == RESET_TYPE_MCDI_TIMEOUT)
2866 efx->type->prepare_flr(efx);
2869 efx_disable_interrupts(efx);
2871 mutex_lock(&efx->mac_lock);
2872 down_write(&efx->filter_sem);
2873 mutex_lock(&efx->rss_lock);
2874 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2875 method != RESET_TYPE_DATAPATH)
2876 efx->phy_op->fini(efx);
2877 efx->type->fini(efx);
2880 /* This function will always ensure that the locks acquired in
2881 * efx_reset_down() are released. A failure return code indicates
2882 * that we were unable to reinitialise the hardware, and the
2883 * driver should be disabled. If ok is false, then the rx and tx
2884 * engines are not restarted, pending a RESET_DISABLE. */
2885 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2889 EFX_ASSERT_RESET_SERIALISED(efx);
2891 if (method == RESET_TYPE_MCDI_TIMEOUT)
2892 efx->type->finish_flr(efx);
2894 /* Ensure that SRAM is initialised even if we're disabling the device */
2895 rc = efx->type->init(efx);
2897 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2904 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2905 method != RESET_TYPE_DATAPATH) {
2906 rc = efx->phy_op->init(efx);
2909 rc = efx->phy_op->reconfigure(efx);
2910 if (rc && rc != -EPERM)
2911 netif_err(efx, drv, efx->net_dev,
2912 "could not restore PHY settings\n");
2915 rc = efx_enable_interrupts(efx);
2919 #ifdef CONFIG_SFC_SRIOV
2920 rc = efx->type->vswitching_restore(efx);
2921 if (rc) /* not fatal; the PF will still work fine */
2922 netif_warn(efx, probe, efx->net_dev,
2923 "failed to restore vswitching rc=%d;"
2924 " VFs may not function\n", rc);
2927 if (efx->type->rx_restore_rss_contexts)
2928 efx->type->rx_restore_rss_contexts(efx);
2929 mutex_unlock(&efx->rss_lock);
2930 efx->type->filter_table_restore(efx);
2931 up_write(&efx->filter_sem);
2932 if (efx->type->sriov_reset)
2933 efx->type->sriov_reset(efx);
2935 mutex_unlock(&efx->mac_lock);
2939 if (efx->type->udp_tnl_push_ports)
2940 efx->type->udp_tnl_push_ports(efx);
2945 efx->port_initialized = false;
2947 mutex_unlock(&efx->rss_lock);
2948 up_write(&efx->filter_sem);
2949 mutex_unlock(&efx->mac_lock);
2954 /* Reset the NIC using the specified method. Note that the reset may
2955 * fail, in which case the card will be left in an unusable state.
2957 * Caller must hold the rtnl_lock.
2959 int efx_reset(struct efx_nic *efx, enum reset_type method)
2964 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2965 RESET_TYPE(method));
2967 efx_device_detach_sync(efx);
2968 efx_reset_down(efx, method);
2970 rc = efx->type->reset(efx, method);
2972 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2976 /* Clear flags for the scopes we covered. We assume the NIC and
2977 * driver are now quiescent so that there is no race here.
2979 if (method < RESET_TYPE_MAX_METHOD)
2980 efx->reset_pending &= -(1 << (method + 1));
2981 else /* it doesn't fit into the well-ordered scope hierarchy */
2982 __clear_bit(method, &efx->reset_pending);
2984 /* Reinitialise bus-mastering, which may have been turned off before
2985 * the reset was scheduled. This is still appropriate, even in the
2986 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2987 * can respond to requests. */
2988 pci_set_master(efx->pci_dev);
2991 /* Leave device stopped if necessary */
2993 method == RESET_TYPE_DISABLE ||
2994 method == RESET_TYPE_RECOVER_OR_DISABLE;
2995 rc2 = efx_reset_up(efx, method, !disabled);
3003 dev_close(efx->net_dev);
3004 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
3005 efx->state = STATE_DISABLED;
3007 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
3008 efx_device_attach_if_not_resetting(efx);
3013 /* Try recovery mechanisms.
3014 * For now only EEH is supported.
3015 * Returns 0 if the recovery mechanisms are unsuccessful.
3016 * Returns a non-zero value otherwise.
3018 int efx_try_recovery(struct efx_nic *efx)
3021 /* A PCI error can occur and not be seen by EEH because nothing
3022 * happens on the PCI bus. In this case the driver may fail and
3023 * schedule a 'recover or reset', leading to this recovery handler.
3024 * Manually call the eeh failure check function.
3026 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
3027 if (eeh_dev_check_failure(eehdev)) {
3028 /* The EEH mechanisms will handle the error and reset the
3029 * device if necessary.
3037 static void efx_wait_for_bist_end(struct efx_nic *efx)
3041 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
3042 if (efx_mcdi_poll_reboot(efx))
3044 msleep(BIST_WAIT_DELAY_MS);
3047 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
3049 /* Either way unset the BIST flag. If we found no reboot we probably
3050 * won't recover, but we should try.
3052 efx->mc_bist_for_other_fn = false;
3055 /* The worker thread exists so that code that cannot sleep can
3056 * schedule a reset for later.
3058 static void efx_reset_work(struct work_struct *data)
3060 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
3061 unsigned long pending;
3062 enum reset_type method;
3064 pending = READ_ONCE(efx->reset_pending);
3065 method = fls(pending) - 1;
3067 if (method == RESET_TYPE_MC_BIST)
3068 efx_wait_for_bist_end(efx);
3070 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
3071 method == RESET_TYPE_RECOVER_OR_ALL) &&
3072 efx_try_recovery(efx))
3080 /* We checked the state in efx_schedule_reset() but it may
3081 * have changed by now. Now that we have the RTNL lock,
3082 * it cannot change again.
3084 if (efx->state == STATE_READY)
3085 (void)efx_reset(efx, method);
3090 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
3092 enum reset_type method;
3094 if (efx->state == STATE_RECOVERY) {
3095 netif_dbg(efx, drv, efx->net_dev,
3096 "recovering: skip scheduling %s reset\n",
3102 case RESET_TYPE_INVISIBLE:
3103 case RESET_TYPE_ALL:
3104 case RESET_TYPE_RECOVER_OR_ALL:
3105 case RESET_TYPE_WORLD:
3106 case RESET_TYPE_DISABLE:
3107 case RESET_TYPE_RECOVER_OR_DISABLE:
3108 case RESET_TYPE_DATAPATH:
3109 case RESET_TYPE_MC_BIST:
3110 case RESET_TYPE_MCDI_TIMEOUT:
3112 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
3113 RESET_TYPE(method));
3116 method = efx->type->map_reset_reason(type);
3117 netif_dbg(efx, drv, efx->net_dev,
3118 "scheduling %s reset for %s\n",
3119 RESET_TYPE(method), RESET_TYPE(type));
3123 set_bit(method, &efx->reset_pending);
3124 smp_mb(); /* ensure we change reset_pending before checking state */
3126 /* If we're not READY then just leave the flags set as the cue
3127 * to abort probing or reschedule the reset later.
3129 if (READ_ONCE(efx->state) != STATE_READY)
3132 /* efx_process_channel() will no longer read events once a
3133 * reset is scheduled. So switch back to poll'd MCDI completions. */
3134 efx_mcdi_mode_poll(efx);
3136 queue_work(reset_workqueue, &efx->reset_work);
3139 /**************************************************************************
3141 * List of NICs we support
3143 **************************************************************************/
3145 /* PCI device ID table */
3146 static const struct pci_device_id efx_pci_table[] = {
3147 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
3148 .driver_data = (unsigned long) &siena_a0_nic_type},
3149 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
3150 .driver_data = (unsigned long) &siena_a0_nic_type},
3151 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
3152 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
3153 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
3154 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
3155 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
3156 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
3157 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
3158 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
3159 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
3160 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
3161 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
3162 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
3163 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0b03), /* SFC9250 PF */
3164 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
3165 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1b03), /* SFC9250 VF */
3166 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
3167 {0} /* end of list */
3170 /**************************************************************************
3172 * Dummy PHY/MAC operations
3174 * Can be used for some unimplemented operations
3175 * Needed so all function pointers are valid and do not have to be tested
3178 **************************************************************************/
3179 int efx_port_dummy_op_int(struct efx_nic *efx)
3183 void efx_port_dummy_op_void(struct efx_nic *efx) {}
3185 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
3190 static const struct efx_phy_operations efx_dummy_phy_operations = {
3191 .init = efx_port_dummy_op_int,
3192 .reconfigure = efx_port_dummy_op_int,
3193 .poll = efx_port_dummy_op_poll,
3194 .fini = efx_port_dummy_op_void,
3197 /**************************************************************************
3201 **************************************************************************/
3203 /* This zeroes out and then fills in the invariants in a struct
3204 * efx_nic (including all sub-structures).
3206 static int efx_init_struct(struct efx_nic *efx,
3207 struct pci_dev *pci_dev, struct net_device *net_dev)
3209 int rc = -ENOMEM, i;
3211 /* Initialise common structures */
3212 INIT_LIST_HEAD(&efx->node);
3213 INIT_LIST_HEAD(&efx->secondary_list);
3214 spin_lock_init(&efx->biu_lock);
3215 #ifdef CONFIG_SFC_MTD
3216 INIT_LIST_HEAD(&efx->mtd_list);
3218 INIT_WORK(&efx->reset_work, efx_reset_work);
3219 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
3220 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
3221 efx->pci_dev = pci_dev;
3222 efx->msg_enable = debug;
3223 efx->state = STATE_UNINIT;
3224 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
3226 efx->net_dev = net_dev;
3227 efx->rx_prefix_size = efx->type->rx_prefix_size;
3229 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
3230 efx->rx_packet_hash_offset =
3231 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
3232 efx->rx_packet_ts_offset =
3233 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
3234 INIT_LIST_HEAD(&efx->rss_context.list);
3235 mutex_init(&efx->rss_lock);
3236 spin_lock_init(&efx->stats_lock);
3237 efx->vi_stride = EFX_DEFAULT_VI_STRIDE;
3238 efx->num_mac_stats = MC_CMD_MAC_NSTATS;
3239 BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END);
3240 mutex_init(&efx->mac_lock);
3241 #ifdef CONFIG_RFS_ACCEL
3242 mutex_init(&efx->rps_mutex);
3243 spin_lock_init(&efx->rps_hash_lock);
3244 /* Failure to allocate is not fatal, but may degrade ARFS performance */
3245 efx->rps_hash_table = kcalloc(EFX_ARFS_HASH_TABLE_SIZE,
3246 sizeof(*efx->rps_hash_table), GFP_KERNEL);
3248 efx->phy_op = &efx_dummy_phy_operations;
3249 efx->mdio.dev = net_dev;
3250 INIT_WORK(&efx->mac_work, efx_mac_work);
3251 init_waitqueue_head(&efx->flush_wq);
3253 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
3254 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
3255 if (!efx->channel[i])
3257 efx->msi_context[i].efx = efx;
3258 efx->msi_context[i].index = i;
3261 /* Higher numbered interrupt modes are less capable! */
3262 if (WARN_ON_ONCE(efx->type->max_interrupt_mode >
3263 efx->type->min_interrupt_mode)) {
3267 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
3269 efx->interrupt_mode = min(efx->type->min_interrupt_mode,
3272 /* Would be good to use the net_dev name, but we're too early */
3273 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
3275 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
3276 if (!efx->workqueue)
3282 efx_fini_struct(efx);
3286 static void efx_fini_struct(struct efx_nic *efx)
3290 #ifdef CONFIG_RFS_ACCEL
3291 kfree(efx->rps_hash_table);
3294 for (i = 0; i < EFX_MAX_CHANNELS; i++)
3295 kfree(efx->channel[i]);
3299 if (efx->workqueue) {
3300 destroy_workqueue(efx->workqueue);
3301 efx->workqueue = NULL;
3305 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
3307 u64 n_rx_nodesc_trunc = 0;
3308 struct efx_channel *channel;
3310 efx_for_each_channel(channel, efx)
3311 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
3312 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
3313 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
3316 bool efx_filter_spec_equal(const struct efx_filter_spec *left,
3317 const struct efx_filter_spec *right)
3319 if ((left->match_flags ^ right->match_flags) |
3320 ((left->flags ^ right->flags) &
3321 (EFX_FILTER_FLAG_RX | EFX_FILTER_FLAG_TX)))
3324 return memcmp(&left->outer_vid, &right->outer_vid,
3325 sizeof(struct efx_filter_spec) -
3326 offsetof(struct efx_filter_spec, outer_vid)) == 0;
3329 u32 efx_filter_spec_hash(const struct efx_filter_spec *spec)
3331 BUILD_BUG_ON(offsetof(struct efx_filter_spec, outer_vid) & 3);
3332 return jhash2((const u32 *)&spec->outer_vid,
3333 (sizeof(struct efx_filter_spec) -
3334 offsetof(struct efx_filter_spec, outer_vid)) / 4,
3338 #ifdef CONFIG_RFS_ACCEL
3339 bool efx_rps_check_rule(struct efx_arfs_rule *rule, unsigned int filter_idx,
3342 if (rule->filter_id == EFX_ARFS_FILTER_ID_PENDING) {
3343 /* ARFS is currently updating this entry, leave it */
3346 if (rule->filter_id == EFX_ARFS_FILTER_ID_ERROR) {
3347 /* ARFS tried and failed to update this, so it's probably out
3348 * of date. Remove the filter and the ARFS rule entry.
3350 rule->filter_id = EFX_ARFS_FILTER_ID_REMOVING;
3353 } else if (WARN_ON(rule->filter_id != filter_idx)) { /* can't happen */
3354 /* ARFS has moved on, so old filter is not needed. Since we did
3355 * not mark the rule with EFX_ARFS_FILTER_ID_REMOVING, it will
3356 * not be removed by efx_rps_hash_del() subsequently.
3361 /* Remove it iff ARFS wants to. */
3366 struct hlist_head *efx_rps_hash_bucket(struct efx_nic *efx,
3367 const struct efx_filter_spec *spec)
3369 u32 hash = efx_filter_spec_hash(spec);
3371 lockdep_assert_held(&efx->rps_hash_lock);
3372 if (!efx->rps_hash_table)
3374 return &efx->rps_hash_table[hash % EFX_ARFS_HASH_TABLE_SIZE];
3377 struct efx_arfs_rule *efx_rps_hash_find(struct efx_nic *efx,
3378 const struct efx_filter_spec *spec)
3380 struct efx_arfs_rule *rule;
3381 struct hlist_head *head;
3382 struct hlist_node *node;
3384 head = efx_rps_hash_bucket(efx, spec);
3387 hlist_for_each(node, head) {
3388 rule = container_of(node, struct efx_arfs_rule, node);
3389 if (efx_filter_spec_equal(spec, &rule->spec))
3395 struct efx_arfs_rule *efx_rps_hash_add(struct efx_nic *efx,
3396 const struct efx_filter_spec *spec,
3399 struct efx_arfs_rule *rule;
3400 struct hlist_head *head;
3401 struct hlist_node *node;
3403 head = efx_rps_hash_bucket(efx, spec);
3406 hlist_for_each(node, head) {
3407 rule = container_of(node, struct efx_arfs_rule, node);
3408 if (efx_filter_spec_equal(spec, &rule->spec)) {
3413 rule = kmalloc(sizeof(*rule), GFP_ATOMIC);
3416 memcpy(&rule->spec, spec, sizeof(rule->spec));
3417 hlist_add_head(&rule->node, head);
3422 void efx_rps_hash_del(struct efx_nic *efx, const struct efx_filter_spec *spec)
3424 struct efx_arfs_rule *rule;
3425 struct hlist_head *head;
3426 struct hlist_node *node;
3428 head = efx_rps_hash_bucket(efx, spec);
3431 hlist_for_each(node, head) {
3432 rule = container_of(node, struct efx_arfs_rule, node);
3433 if (efx_filter_spec_equal(spec, &rule->spec)) {
3434 /* Someone already reused the entry. We know that if
3435 * this check doesn't fire (i.e. filter_id == REMOVING)
3436 * then the REMOVING mark was put there by our caller,
3437 * because caller is holding a lock on filter table and
3438 * only holders of that lock set REMOVING.
3440 if (rule->filter_id != EFX_ARFS_FILTER_ID_REMOVING)
3447 /* We didn't find it. */
3452 /* RSS contexts. We're using linked lists and crappy O(n) algorithms, because
3453 * (a) this is an infrequent control-plane operation and (b) n is small (max 64)
3455 struct efx_rss_context *efx_alloc_rss_context_entry(struct efx_nic *efx)
3457 struct list_head *head = &efx->rss_context.list;
3458 struct efx_rss_context *ctx, *new;
3459 u32 id = 1; /* Don't use zero, that refers to the master RSS context */
3461 WARN_ON(!mutex_is_locked(&efx->rss_lock));
3463 /* Search for first gap in the numbering */
3464 list_for_each_entry(ctx, head, list) {
3465 if (ctx->user_id != id)
3468 /* Check for wrap. If this happens, we have nearly 2^32
3469 * allocated RSS contexts, which seems unlikely.
3471 if (WARN_ON_ONCE(!id))
3475 /* Create the new entry */
3476 new = kmalloc(sizeof(struct efx_rss_context), GFP_KERNEL);
3479 new->context_id = EFX_EF10_RSS_CONTEXT_INVALID;
3480 new->rx_hash_udp_4tuple = false;
3482 /* Insert the new entry into the gap */
3484 list_add_tail(&new->list, &ctx->list);
3488 struct efx_rss_context *efx_find_rss_context_entry(struct efx_nic *efx, u32 id)
3490 struct list_head *head = &efx->rss_context.list;
3491 struct efx_rss_context *ctx;
3493 WARN_ON(!mutex_is_locked(&efx->rss_lock));
3495 list_for_each_entry(ctx, head, list)
3496 if (ctx->user_id == id)
3501 void efx_free_rss_context_entry(struct efx_rss_context *ctx)
3503 list_del(&ctx->list);
3507 /**************************************************************************
3511 **************************************************************************/
3513 /* Main body of final NIC shutdown code
3514 * This is called only at module unload (or hotplug removal).
3516 static void efx_pci_remove_main(struct efx_nic *efx)
3518 /* Flush reset_work. It can no longer be scheduled since we
3521 BUG_ON(efx->state == STATE_READY);
3522 cancel_work_sync(&efx->reset_work);
3524 efx_disable_interrupts(efx);
3525 efx_clear_interrupt_affinity(efx);
3526 efx_nic_fini_interrupt(efx);
3528 efx->type->fini(efx);
3530 efx_remove_all(efx);
3533 /* Final NIC shutdown
3534 * This is called only at module unload (or hotplug removal). A PF can call
3535 * this on its VFs to ensure they are unbound first.
3537 static void efx_pci_remove(struct pci_dev *pci_dev)
3539 struct efx_nic *efx;
3541 efx = pci_get_drvdata(pci_dev);
3545 /* Mark the NIC as fini, then stop the interface */
3547 efx_dissociate(efx);
3548 dev_close(efx->net_dev);
3549 efx_disable_interrupts(efx);
3550 efx->state = STATE_UNINIT;
3553 if (efx->type->sriov_fini)
3554 efx->type->sriov_fini(efx);
3556 efx_unregister_netdev(efx);
3558 efx_mtd_remove(efx);
3560 efx_pci_remove_main(efx);
3563 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
3565 efx_fini_struct(efx);
3566 free_netdev(efx->net_dev);
3568 pci_disable_pcie_error_reporting(pci_dev);
3571 /* NIC VPD information
3572 * Called during probe to display the part number of the
3573 * installed NIC. VPD is potentially very large but this should
3574 * always appear within the first 512 bytes.
3576 #define SFC_VPD_LEN 512
3577 static void efx_probe_vpd_strings(struct efx_nic *efx)
3579 struct pci_dev *dev = efx->pci_dev;
3580 char vpd_data[SFC_VPD_LEN];
3582 int ro_start, ro_size, i, j;
3584 /* Get the vpd data from the device */
3585 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
3586 if (vpd_size <= 0) {
3587 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
3591 /* Get the Read only section */
3592 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3594 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3598 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3600 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3601 if (i + j > vpd_size)
3604 /* Get the Part number */
3605 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3607 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3611 j = pci_vpd_info_field_size(&vpd_data[i]);
3612 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3613 if (i + j > vpd_size) {
3614 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3618 netif_info(efx, drv, efx->net_dev,
3619 "Part Number : %.*s\n", j, &vpd_data[i]);
3621 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3623 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3625 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3629 j = pci_vpd_info_field_size(&vpd_data[i]);
3630 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3631 if (i + j > vpd_size) {
3632 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3636 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3640 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3644 /* Main body of NIC initialisation
3645 * This is called at module load (or hotplug insertion, theoretically).
3647 static int efx_pci_probe_main(struct efx_nic *efx)
3651 /* Do start-of-day initialisation */
3652 rc = efx_probe_all(efx);
3658 down_write(&efx->filter_sem);
3659 rc = efx->type->init(efx);
3660 up_write(&efx->filter_sem);
3662 netif_err(efx, probe, efx->net_dev,
3663 "failed to initialise NIC\n");
3667 rc = efx_init_port(efx);
3669 netif_err(efx, probe, efx->net_dev,
3670 "failed to initialise port\n");
3674 rc = efx_nic_init_interrupt(efx);
3678 efx_set_interrupt_affinity(efx);
3679 rc = efx_enable_interrupts(efx);
3686 efx_clear_interrupt_affinity(efx);
3687 efx_nic_fini_interrupt(efx);
3691 efx->type->fini(efx);
3694 efx_remove_all(efx);
3699 static int efx_pci_probe_post_io(struct efx_nic *efx)
3701 struct net_device *net_dev = efx->net_dev;
3702 int rc = efx_pci_probe_main(efx);
3707 if (efx->type->sriov_init) {
3708 rc = efx->type->sriov_init(efx);
3710 netif_err(efx, probe, efx->net_dev,
3711 "SR-IOV can't be enabled rc %d\n", rc);
3714 /* Determine netdevice features */
3715 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3716 NETIF_F_TSO | NETIF_F_RXCSUM | NETIF_F_RXALL);
3717 if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
3718 net_dev->features |= NETIF_F_TSO6;
3719 /* Check whether device supports TSO */
3720 if (!efx->type->tso_versions || !efx->type->tso_versions(efx))
3721 net_dev->features &= ~NETIF_F_ALL_TSO;
3722 /* Mask for features that also apply to VLAN devices */
3723 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
3724 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3727 net_dev->hw_features |= net_dev->features & ~efx->fixed_features;
3729 /* Disable receiving frames with bad FCS, by default. */
3730 net_dev->features &= ~NETIF_F_RXALL;
3732 /* Disable VLAN filtering by default. It may be enforced if
3733 * the feature is fixed (i.e. VLAN filters are required to
3734 * receive VLAN tagged packets due to vPort restrictions).
3736 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3737 net_dev->features |= efx->fixed_features;
3739 rc = efx_register_netdev(efx);
3743 efx_pci_remove_main(efx);
3747 /* NIC initialisation
3749 * This is called at module load (or hotplug insertion,
3750 * theoretically). It sets up PCI mappings, resets the NIC,
3751 * sets up and registers the network devices with the kernel and hooks
3752 * the interrupt service routine. It does not prepare the device for
3753 * transmission; this is left to the first time one of the network
3754 * interfaces is brought up (i.e. efx_net_open).
3756 static int efx_pci_probe(struct pci_dev *pci_dev,
3757 const struct pci_device_id *entry)
3759 struct net_device *net_dev;
3760 struct efx_nic *efx;
3763 /* Allocate and initialise a struct net_device and struct efx_nic */
3764 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3768 efx = netdev_priv(net_dev);
3769 efx->type = (const struct efx_nic_type *) entry->driver_data;
3770 efx->fixed_features |= NETIF_F_HIGHDMA;
3772 pci_set_drvdata(pci_dev, efx);
3773 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3774 rc = efx_init_struct(efx, pci_dev, net_dev);
3778 netif_info(efx, probe, efx->net_dev,
3779 "Solarflare NIC detected\n");
3781 if (!efx->type->is_vf)
3782 efx_probe_vpd_strings(efx);
3784 /* Set up basic I/O (BAR mappings etc) */
3785 rc = efx_init_io(efx);
3789 rc = efx_pci_probe_post_io(efx);
3791 /* On failure, retry once immediately.
3792 * If we aborted probe due to a scheduled reset, dismiss it.
3794 efx->reset_pending = 0;
3795 rc = efx_pci_probe_post_io(efx);
3797 /* On another failure, retry once more
3798 * after a 50-305ms delay.
3802 get_random_bytes(&r, 1);
3803 msleep((unsigned int)r + 50);
3804 efx->reset_pending = 0;
3805 rc = efx_pci_probe_post_io(efx);
3811 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3813 /* Try to create MTDs, but allow this to fail */
3815 rc = efx_mtd_probe(efx);
3817 if (rc && rc != -EPERM)
3818 netif_warn(efx, probe, efx->net_dev,
3819 "failed to create MTDs (%d)\n", rc);
3821 (void)pci_enable_pcie_error_reporting(pci_dev);
3823 if (efx->type->udp_tnl_push_ports)
3824 efx->type->udp_tnl_push_ports(efx);
3831 efx_fini_struct(efx);
3834 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3835 free_netdev(net_dev);
3839 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3840 * enabled on success
3842 #ifdef CONFIG_SFC_SRIOV
3843 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3846 struct efx_nic *efx = pci_get_drvdata(dev);
3848 if (efx->type->sriov_configure) {
3849 rc = efx->type->sriov_configure(efx, num_vfs);
3859 static int efx_pm_freeze(struct device *dev)
3861 struct efx_nic *efx = dev_get_drvdata(dev);
3865 if (efx->state != STATE_DISABLED) {
3866 efx->state = STATE_UNINIT;
3868 efx_device_detach_sync(efx);
3871 efx_disable_interrupts(efx);
3879 static int efx_pm_thaw(struct device *dev)
3882 struct efx_nic *efx = dev_get_drvdata(dev);
3886 if (efx->state != STATE_DISABLED) {
3887 rc = efx_enable_interrupts(efx);
3891 mutex_lock(&efx->mac_lock);
3892 efx->phy_op->reconfigure(efx);
3893 mutex_unlock(&efx->mac_lock);
3897 efx_device_attach_if_not_resetting(efx);
3899 efx->state = STATE_READY;
3901 efx->type->resume_wol(efx);
3906 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3907 queue_work(reset_workqueue, &efx->reset_work);
3917 static int efx_pm_poweroff(struct device *dev)
3919 struct pci_dev *pci_dev = to_pci_dev(dev);
3920 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3922 efx->type->fini(efx);
3924 efx->reset_pending = 0;
3926 pci_save_state(pci_dev);
3927 return pci_set_power_state(pci_dev, PCI_D3hot);
3930 /* Used for both resume and restore */
3931 static int efx_pm_resume(struct device *dev)
3933 struct pci_dev *pci_dev = to_pci_dev(dev);
3934 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3937 rc = pci_set_power_state(pci_dev, PCI_D0);
3940 pci_restore_state(pci_dev);
3941 rc = pci_enable_device(pci_dev);
3944 pci_set_master(efx->pci_dev);
3945 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3948 down_write(&efx->filter_sem);
3949 rc = efx->type->init(efx);
3950 up_write(&efx->filter_sem);
3953 rc = efx_pm_thaw(dev);
3957 static int efx_pm_suspend(struct device *dev)
3962 rc = efx_pm_poweroff(dev);
3968 static const struct dev_pm_ops efx_pm_ops = {
3969 .suspend = efx_pm_suspend,
3970 .resume = efx_pm_resume,
3971 .freeze = efx_pm_freeze,
3972 .thaw = efx_pm_thaw,
3973 .poweroff = efx_pm_poweroff,
3974 .restore = efx_pm_resume,
3977 /* A PCI error affecting this device was detected.
3978 * At this point MMIO and DMA may be disabled.
3979 * Stop the software path and request a slot reset.
3981 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3982 enum pci_channel_state state)
3984 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3985 struct efx_nic *efx = pci_get_drvdata(pdev);
3987 if (state == pci_channel_io_perm_failure)
3988 return PCI_ERS_RESULT_DISCONNECT;
3992 if (efx->state != STATE_DISABLED) {
3993 efx->state = STATE_RECOVERY;
3994 efx->reset_pending = 0;
3996 efx_device_detach_sync(efx);
3999 efx_disable_interrupts(efx);
4001 status = PCI_ERS_RESULT_NEED_RESET;
4003 /* If the interface is disabled we don't want to do anything
4006 status = PCI_ERS_RESULT_RECOVERED;
4011 pci_disable_device(pdev);
4016 /* Fake a successful reset, which will be performed later in efx_io_resume. */
4017 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
4019 struct efx_nic *efx = pci_get_drvdata(pdev);
4020 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
4022 if (pci_enable_device(pdev)) {
4023 netif_err(efx, hw, efx->net_dev,
4024 "Cannot re-enable PCI device after reset.\n");
4025 status = PCI_ERS_RESULT_DISCONNECT;
4031 /* Perform the actual reset and resume I/O operations. */
4032 static void efx_io_resume(struct pci_dev *pdev)
4034 struct efx_nic *efx = pci_get_drvdata(pdev);
4039 if (efx->state == STATE_DISABLED)
4042 rc = efx_reset(efx, RESET_TYPE_ALL);
4044 netif_err(efx, hw, efx->net_dev,
4045 "efx_reset failed after PCI error (%d)\n", rc);
4047 efx->state = STATE_READY;
4048 netif_dbg(efx, hw, efx->net_dev,
4049 "Done resetting and resuming IO after PCI error.\n");
4056 /* For simplicity and reliability, we always require a slot reset and try to
4057 * reset the hardware when a pci error affecting the device is detected.
4058 * We leave both the link_reset and mmio_enabled callback unimplemented:
4059 * with our request for slot reset the mmio_enabled callback will never be
4060 * called, and the link_reset callback is not used by AER or EEH mechanisms.
4062 static const struct pci_error_handlers efx_err_handlers = {
4063 .error_detected = efx_io_error_detected,
4064 .slot_reset = efx_io_slot_reset,
4065 .resume = efx_io_resume,
4068 static struct pci_driver efx_pci_driver = {
4069 .name = KBUILD_MODNAME,
4070 .id_table = efx_pci_table,
4071 .probe = efx_pci_probe,
4072 .remove = efx_pci_remove,
4073 .driver.pm = &efx_pm_ops,
4074 .err_handler = &efx_err_handlers,
4075 #ifdef CONFIG_SFC_SRIOV
4076 .sriov_configure = efx_pci_sriov_configure,
4080 /**************************************************************************
4082 * Kernel module interface
4084 *************************************************************************/
4086 module_param(interrupt_mode, uint, 0444);
4087 MODULE_PARM_DESC(interrupt_mode,
4088 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
4090 static int __init efx_init_module(void)
4094 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
4096 rc = register_netdevice_notifier(&efx_netdev_notifier);
4100 #ifdef CONFIG_SFC_SRIOV
4101 rc = efx_init_sriov();
4106 reset_workqueue = create_singlethread_workqueue("sfc_reset");
4107 if (!reset_workqueue) {
4112 rc = pci_register_driver(&efx_pci_driver);
4119 destroy_workqueue(reset_workqueue);
4121 #ifdef CONFIG_SFC_SRIOV
4125 unregister_netdevice_notifier(&efx_netdev_notifier);
4130 static void __exit efx_exit_module(void)
4132 printk(KERN_INFO "Solarflare NET driver unloading\n");
4134 pci_unregister_driver(&efx_pci_driver);
4135 destroy_workqueue(reset_workqueue);
4136 #ifdef CONFIG_SFC_SRIOV
4139 unregister_netdevice_notifier(&efx_netdev_notifier);
4143 module_init(efx_init_module);
4144 module_exit(efx_exit_module);
4146 MODULE_AUTHOR("Solarflare Communications and "
4147 "Michael Brown <mbrown@fensystems.co.uk>");
4148 MODULE_DESCRIPTION("Solarflare network driver");
4149 MODULE_LICENSE("GPL");
4150 MODULE_DEVICE_TABLE(pci, efx_pci_table);
4151 MODULE_VERSION(EFX_DRIVER_VERSION);