1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
14 #include <linux/net_tstamp.h>
15 #include <linux/i2c-algo-bit.h>
16 #include "net_driver.h"
25 static inline int efx_nic_rev(struct efx_nic *efx)
27 return efx->type->revision;
30 u32 efx_farch_fpga_ver(struct efx_nic *efx);
32 /* Read the current event from the event queue */
33 static inline efx_qword_t *efx_event(struct efx_channel *channel,
36 return ((efx_qword_t *) (channel->eventq.buf.addr)) +
37 (index & channel->eventq_mask);
40 /* See if an event is present
42 * We check both the high and low dword of the event for all ones. We
43 * wrote all ones when we cleared the event, and no valid event can
44 * have all ones in either its high or low dwords. This approach is
45 * robust against reordering.
47 * Note that using a single 64-bit comparison is incorrect; even
48 * though the CPU read will be atomic, the DMA write may not be.
50 static inline int efx_event_present(efx_qword_t *event)
52 return !(EFX_DWORD_IS_ALL_ONES(event->dword[0]) |
53 EFX_DWORD_IS_ALL_ONES(event->dword[1]));
56 /* Returns a pointer to the specified transmit descriptor in the TX
57 * descriptor queue belonging to the specified channel.
59 static inline efx_qword_t *
60 efx_tx_desc(struct efx_tx_queue *tx_queue, unsigned int index)
62 return ((efx_qword_t *) (tx_queue->txd.buf.addr)) + index;
65 /* Get partner of a TX queue, seen as part of the same net core queue */
66 static struct efx_tx_queue *efx_tx_queue_partner(struct efx_tx_queue *tx_queue)
68 if (tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD)
69 return tx_queue - EFX_TXQ_TYPE_OFFLOAD;
71 return tx_queue + EFX_TXQ_TYPE_OFFLOAD;
74 /* Report whether this TX queue would be empty for the given write_count.
75 * May return false negative.
77 static inline bool __efx_nic_tx_is_empty(struct efx_tx_queue *tx_queue,
78 unsigned int write_count)
80 unsigned int empty_read_count = ACCESS_ONCE(tx_queue->empty_read_count);
82 if (empty_read_count == 0)
85 return ((empty_read_count ^ write_count) & ~EFX_EMPTY_COUNT_VALID) == 0;
88 /* Report whether the NIC considers this TX queue empty, using
89 * packet_write_count (the write count recorded for the last completable
90 * doorbell push). May return false negative. EF10 only, which is OK
91 * because only EF10 supports PIO.
93 static inline bool efx_nic_tx_is_empty(struct efx_tx_queue *tx_queue)
95 EFX_WARN_ON_ONCE_PARANOID(!tx_queue->efx->type->option_descriptors);
96 return __efx_nic_tx_is_empty(tx_queue, tx_queue->packet_write_count);
99 /* Decide whether we can use TX PIO, ie. write packet data directly into
100 * a buffer on the device. This can reduce latency at the expense of
101 * throughput, so we only do this if both hardware and software TX rings
102 * are empty. This also ensures that only one packet at a time can be
103 * using the PIO buffer.
105 static inline bool efx_nic_may_tx_pio(struct efx_tx_queue *tx_queue)
107 struct efx_tx_queue *partner = efx_tx_queue_partner(tx_queue);
109 return tx_queue->piobuf && efx_nic_tx_is_empty(tx_queue) &&
110 efx_nic_tx_is_empty(partner);
113 /* Decide whether to push a TX descriptor to the NIC vs merely writing
114 * the doorbell. This can reduce latency when we are adding a single
115 * descriptor to an empty queue, but is otherwise pointless. Further,
116 * Falcon and Siena have hardware bugs (SF bug 33851) that may be
117 * triggered if we don't check this.
118 * We use the write_count used for the last doorbell push, to get the
119 * NIC's view of the tx queue.
121 static inline bool efx_nic_may_push_tx_desc(struct efx_tx_queue *tx_queue,
122 unsigned int write_count)
124 bool was_empty = __efx_nic_tx_is_empty(tx_queue, write_count);
126 tx_queue->empty_read_count = 0;
127 return was_empty && tx_queue->write_count - write_count == 1;
130 /* Returns a pointer to the specified descriptor in the RX descriptor queue */
131 static inline efx_qword_t *
132 efx_rx_desc(struct efx_rx_queue *rx_queue, unsigned int index)
134 return ((efx_qword_t *) (rx_queue->rxd.buf.addr)) + index;
139 PHY_TYPE_TXC43128 = 1,
140 PHY_TYPE_88E1111 = 2,
141 PHY_TYPE_SFX7101 = 3,
142 PHY_TYPE_QT2022C2 = 4,
144 PHY_TYPE_SFT9001A = 8,
145 PHY_TYPE_QT2025C = 9,
146 PHY_TYPE_SFT9001B = 10,
149 /* Alignment of PCIe DMA boundaries (4KB) */
150 #define EFX_PAGE_SIZE 4096
151 /* Size and alignment of buffer table entries (same) */
152 #define EFX_BUF_SIZE EFX_PAGE_SIZE
154 /* NIC-generic software stats */
156 GENERIC_STAT_rx_noskb_drops,
157 GENERIC_STAT_rx_nodesc_trunc,
162 SIENA_STAT_tx_bytes = GENERIC_STAT_COUNT,
163 SIENA_STAT_tx_good_bytes,
164 SIENA_STAT_tx_bad_bytes,
165 SIENA_STAT_tx_packets,
168 SIENA_STAT_tx_control,
169 SIENA_STAT_tx_unicast,
170 SIENA_STAT_tx_multicast,
171 SIENA_STAT_tx_broadcast,
174 SIENA_STAT_tx_65_to_127,
175 SIENA_STAT_tx_128_to_255,
176 SIENA_STAT_tx_256_to_511,
177 SIENA_STAT_tx_512_to_1023,
178 SIENA_STAT_tx_1024_to_15xx,
179 SIENA_STAT_tx_15xx_to_jumbo,
180 SIENA_STAT_tx_gtjumbo,
181 SIENA_STAT_tx_collision,
182 SIENA_STAT_tx_single_collision,
183 SIENA_STAT_tx_multiple_collision,
184 SIENA_STAT_tx_excessive_collision,
185 SIENA_STAT_tx_deferred,
186 SIENA_STAT_tx_late_collision,
187 SIENA_STAT_tx_excessive_deferred,
188 SIENA_STAT_tx_non_tcpudp,
189 SIENA_STAT_tx_mac_src_error,
190 SIENA_STAT_tx_ip_src_error,
192 SIENA_STAT_rx_good_bytes,
193 SIENA_STAT_rx_bad_bytes,
194 SIENA_STAT_rx_packets,
198 SIENA_STAT_rx_control,
199 SIENA_STAT_rx_unicast,
200 SIENA_STAT_rx_multicast,
201 SIENA_STAT_rx_broadcast,
204 SIENA_STAT_rx_65_to_127,
205 SIENA_STAT_rx_128_to_255,
206 SIENA_STAT_rx_256_to_511,
207 SIENA_STAT_rx_512_to_1023,
208 SIENA_STAT_rx_1024_to_15xx,
209 SIENA_STAT_rx_15xx_to_jumbo,
210 SIENA_STAT_rx_gtjumbo,
211 SIENA_STAT_rx_bad_gtjumbo,
212 SIENA_STAT_rx_overflow,
213 SIENA_STAT_rx_false_carrier,
214 SIENA_STAT_rx_symbol_error,
215 SIENA_STAT_rx_align_error,
216 SIENA_STAT_rx_length_error,
217 SIENA_STAT_rx_internal_error,
218 SIENA_STAT_rx_nodesc_drop_cnt,
223 * struct siena_nic_data - Siena NIC state
224 * @efx: Pointer back to main interface structure
225 * @wol_filter_id: Wake-on-LAN packet filter id
226 * @stats: Hardware statistics
227 * @vf: Array of &struct siena_vf objects
228 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
229 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
230 * @local_addr_list: List of local addresses. Protected by %local_lock.
231 * @local_page_list: List of DMA addressable pages used to broadcast
232 * %local_addr_list. Protected by %local_lock.
233 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
234 * @peer_work: Work item to broadcast peer addresses to VMs.
236 struct siena_nic_data {
239 u64 stats[SIENA_STAT_COUNT];
240 #ifdef CONFIG_SFC_SRIOV
242 struct efx_channel *vfdi_channel;
243 unsigned vf_buftbl_base;
244 struct efx_buffer vfdi_status;
245 struct list_head local_addr_list;
246 struct list_head local_page_list;
247 struct mutex local_lock;
248 struct work_struct peer_work;
253 EF10_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
254 EF10_STAT_port_tx_packets,
255 EF10_STAT_port_tx_pause,
256 EF10_STAT_port_tx_control,
257 EF10_STAT_port_tx_unicast,
258 EF10_STAT_port_tx_multicast,
259 EF10_STAT_port_tx_broadcast,
260 EF10_STAT_port_tx_lt64,
261 EF10_STAT_port_tx_64,
262 EF10_STAT_port_tx_65_to_127,
263 EF10_STAT_port_tx_128_to_255,
264 EF10_STAT_port_tx_256_to_511,
265 EF10_STAT_port_tx_512_to_1023,
266 EF10_STAT_port_tx_1024_to_15xx,
267 EF10_STAT_port_tx_15xx_to_jumbo,
268 EF10_STAT_port_rx_bytes,
269 EF10_STAT_port_rx_bytes_minus_good_bytes,
270 EF10_STAT_port_rx_good_bytes,
271 EF10_STAT_port_rx_bad_bytes,
272 EF10_STAT_port_rx_packets,
273 EF10_STAT_port_rx_good,
274 EF10_STAT_port_rx_bad,
275 EF10_STAT_port_rx_pause,
276 EF10_STAT_port_rx_control,
277 EF10_STAT_port_rx_unicast,
278 EF10_STAT_port_rx_multicast,
279 EF10_STAT_port_rx_broadcast,
280 EF10_STAT_port_rx_lt64,
281 EF10_STAT_port_rx_64,
282 EF10_STAT_port_rx_65_to_127,
283 EF10_STAT_port_rx_128_to_255,
284 EF10_STAT_port_rx_256_to_511,
285 EF10_STAT_port_rx_512_to_1023,
286 EF10_STAT_port_rx_1024_to_15xx,
287 EF10_STAT_port_rx_15xx_to_jumbo,
288 EF10_STAT_port_rx_gtjumbo,
289 EF10_STAT_port_rx_bad_gtjumbo,
290 EF10_STAT_port_rx_overflow,
291 EF10_STAT_port_rx_align_error,
292 EF10_STAT_port_rx_length_error,
293 EF10_STAT_port_rx_nodesc_drops,
294 EF10_STAT_port_rx_pm_trunc_bb_overflow,
295 EF10_STAT_port_rx_pm_discard_bb_overflow,
296 EF10_STAT_port_rx_pm_trunc_vfifo_full,
297 EF10_STAT_port_rx_pm_discard_vfifo_full,
298 EF10_STAT_port_rx_pm_trunc_qbb,
299 EF10_STAT_port_rx_pm_discard_qbb,
300 EF10_STAT_port_rx_pm_discard_mapping,
301 EF10_STAT_port_rx_dp_q_disabled_packets,
302 EF10_STAT_port_rx_dp_di_dropped_packets,
303 EF10_STAT_port_rx_dp_streaming_packets,
304 EF10_STAT_port_rx_dp_hlb_fetch,
305 EF10_STAT_port_rx_dp_hlb_wait,
306 EF10_STAT_rx_unicast,
307 EF10_STAT_rx_unicast_bytes,
308 EF10_STAT_rx_multicast,
309 EF10_STAT_rx_multicast_bytes,
310 EF10_STAT_rx_broadcast,
311 EF10_STAT_rx_broadcast_bytes,
313 EF10_STAT_rx_bad_bytes,
314 EF10_STAT_rx_overflow,
315 EF10_STAT_tx_unicast,
316 EF10_STAT_tx_unicast_bytes,
317 EF10_STAT_tx_multicast,
318 EF10_STAT_tx_multicast_bytes,
319 EF10_STAT_tx_broadcast,
320 EF10_STAT_tx_broadcast_bytes,
322 EF10_STAT_tx_bad_bytes,
323 EF10_STAT_tx_overflow,
327 /* Maximum number of TX PIO buffers we may allocate to a function.
328 * This matches the total number of buffers on each SFC9100-family
331 #define EF10_TX_PIOBUF_COUNT 16
334 * struct efx_ef10_nic_data - EF10 architecture NIC state
335 * @mcdi_buf: DMA buffer for MCDI
336 * @warm_boot_count: Last seen MC warm boot count
337 * @vi_base: Absolute index of first VI in this function
338 * @n_allocated_vis: Number of VIs allocated to this function
339 * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot
340 * @must_restore_filters: Flag: filters have yet to be restored after MC reboot
341 * @n_piobufs: Number of PIO buffers allocated to this function
342 * @wc_membase: Base address of write-combining mapping of the memory BAR
343 * @pio_write_base: Base address for writing PIO buffers
344 * @pio_write_vi_base: Relative VI number for @pio_write_base
345 * @piobuf_handle: Handle of each PIO buffer allocated
346 * @piobuf_size: size of a single PIO buffer
347 * @must_restore_piobufs: Flag: PIO buffers have yet to be restored after MC
349 * @rx_rss_context: Firmware handle for our RSS context
350 * @rx_rss_context_exclusive: Whether our RSS context is exclusive or shared
351 * @stats: Hardware statistics
352 * @workaround_35388: Flag: firmware supports workaround for bug 35388
353 * @workaround_26807: Flag: firmware supports workaround for bug 26807
354 * @workaround_61265: Flag: firmware supports workaround for bug 61265
355 * @must_check_datapath_caps: Flag: @datapath_caps needs to be revalidated
357 * @datapath_caps: Capabilities of datapath firmware (FLAGS1 field of
358 * %MC_CMD_GET_CAPABILITIES response)
359 * @datapath_caps2: Further Capabilities of datapath firmware (FLAGS2 field of
360 * %MC_CMD_GET_CAPABILITIES response)
361 * @rx_dpcpu_fw_id: Firmware ID of the RxDPCPU
362 * @tx_dpcpu_fw_id: Firmware ID of the TxDPCPU
363 * @vport_id: The function's vport ID, only relevant for PFs
364 * @must_probe_vswitching: Flag: vswitching has yet to be setup after MC reboot
365 * @pf_index: The number for this PF, or the parent PF if this is a VF
366 #ifdef CONFIG_SFC_SRIOV
367 * @vf: Pointer to VF data structure
369 * @vport_mac: The MAC address on the vport, only for PFs; VFs will be zero
370 * @vlan_list: List of VLANs added over the interface. Serialised by vlan_lock.
371 * @vlan_lock: Lock to serialize access to vlan_list.
372 * @udp_tunnels: UDP tunnel port numbers and types.
373 * @udp_tunnels_dirty: flag indicating a reboot occurred while pushing
374 * @udp_tunnels to hardware and thus the push must be re-done.
375 * @udp_tunnels_lock: Serialises writes to @udp_tunnels and @udp_tunnels_dirty.
377 struct efx_ef10_nic_data {
378 struct efx_buffer mcdi_buf;
380 unsigned int vi_base;
381 unsigned int n_allocated_vis;
382 bool must_realloc_vis;
383 bool must_restore_filters;
384 unsigned int n_piobufs;
385 void __iomem *wc_membase, *pio_write_base;
386 unsigned int pio_write_vi_base;
387 unsigned int piobuf_handle[EF10_TX_PIOBUF_COUNT];
389 bool must_restore_piobufs;
391 bool rx_rss_context_exclusive;
392 u64 stats[EF10_STAT_COUNT];
393 bool workaround_35388;
394 bool workaround_26807;
395 bool workaround_61265;
396 bool must_check_datapath_caps;
399 unsigned int rx_dpcpu_fw_id;
400 unsigned int tx_dpcpu_fw_id;
401 unsigned int vport_id;
402 bool must_probe_vswitching;
403 unsigned int pf_index;
404 u8 port_id[ETH_ALEN];
405 #ifdef CONFIG_SFC_SRIOV
406 unsigned int vf_index;
409 u8 vport_mac[ETH_ALEN];
410 struct list_head vlan_list;
411 struct mutex vlan_lock;
412 struct efx_udp_tunnel udp_tunnels[16];
413 bool udp_tunnels_dirty;
414 struct mutex udp_tunnels_lock;
417 int efx_init_sriov(void);
418 void efx_fini_sriov(void);
420 struct ethtool_ts_info;
421 int efx_ptp_probe(struct efx_nic *efx, struct efx_channel *channel);
422 void efx_ptp_defer_probe_with_channel(struct efx_nic *efx);
423 void efx_ptp_remove(struct efx_nic *efx);
424 int efx_ptp_set_ts_config(struct efx_nic *efx, struct ifreq *ifr);
425 int efx_ptp_get_ts_config(struct efx_nic *efx, struct ifreq *ifr);
426 void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info);
427 bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
428 int efx_ptp_get_mode(struct efx_nic *efx);
429 int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,
430 unsigned int new_mode);
431 int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
432 void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);
433 size_t efx_ptp_describe_stats(struct efx_nic *efx, u8 *strings);
434 size_t efx_ptp_update_stats(struct efx_nic *efx, u64 *stats);
435 void efx_time_sync_event(struct efx_channel *channel, efx_qword_t *ev);
436 void __efx_rx_skb_attach_timestamp(struct efx_channel *channel,
437 struct sk_buff *skb);
438 static inline void efx_rx_skb_attach_timestamp(struct efx_channel *channel,
441 if (channel->sync_events_state == SYNC_EVENTS_VALID)
442 __efx_rx_skb_attach_timestamp(channel, skb);
444 void efx_ptp_start_datapath(struct efx_nic *efx);
445 void efx_ptp_stop_datapath(struct efx_nic *efx);
447 extern const struct efx_nic_type falcon_a1_nic_type;
448 extern const struct efx_nic_type falcon_b0_nic_type;
449 extern const struct efx_nic_type siena_a0_nic_type;
450 extern const struct efx_nic_type efx_hunt_a0_nic_type;
451 extern const struct efx_nic_type efx_hunt_a0_vf_nic_type;
453 /**************************************************************************
457 **************************************************************************
460 int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
463 static inline int efx_nic_probe_tx(struct efx_tx_queue *tx_queue)
465 return tx_queue->efx->type->tx_probe(tx_queue);
467 static inline void efx_nic_init_tx(struct efx_tx_queue *tx_queue)
469 tx_queue->efx->type->tx_init(tx_queue);
471 static inline void efx_nic_remove_tx(struct efx_tx_queue *tx_queue)
473 tx_queue->efx->type->tx_remove(tx_queue);
475 static inline void efx_nic_push_buffers(struct efx_tx_queue *tx_queue)
477 tx_queue->efx->type->tx_write(tx_queue);
481 static inline int efx_nic_probe_rx(struct efx_rx_queue *rx_queue)
483 return rx_queue->efx->type->rx_probe(rx_queue);
485 static inline void efx_nic_init_rx(struct efx_rx_queue *rx_queue)
487 rx_queue->efx->type->rx_init(rx_queue);
489 static inline void efx_nic_remove_rx(struct efx_rx_queue *rx_queue)
491 rx_queue->efx->type->rx_remove(rx_queue);
493 static inline void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue)
495 rx_queue->efx->type->rx_write(rx_queue);
497 static inline void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue)
499 rx_queue->efx->type->rx_defer_refill(rx_queue);
502 /* Event data path */
503 static inline int efx_nic_probe_eventq(struct efx_channel *channel)
505 return channel->efx->type->ev_probe(channel);
507 static inline int efx_nic_init_eventq(struct efx_channel *channel)
509 return channel->efx->type->ev_init(channel);
511 static inline void efx_nic_fini_eventq(struct efx_channel *channel)
513 channel->efx->type->ev_fini(channel);
515 static inline void efx_nic_remove_eventq(struct efx_channel *channel)
517 channel->efx->type->ev_remove(channel);
520 efx_nic_process_eventq(struct efx_channel *channel, int quota)
522 return channel->efx->type->ev_process(channel, quota);
524 static inline void efx_nic_eventq_read_ack(struct efx_channel *channel)
526 channel->efx->type->ev_read_ack(channel);
528 void efx_nic_event_test_start(struct efx_channel *channel);
530 /* Falcon/Siena queue operations */
531 int efx_farch_tx_probe(struct efx_tx_queue *tx_queue);
532 void efx_farch_tx_init(struct efx_tx_queue *tx_queue);
533 void efx_farch_tx_fini(struct efx_tx_queue *tx_queue);
534 void efx_farch_tx_remove(struct efx_tx_queue *tx_queue);
535 void efx_farch_tx_write(struct efx_tx_queue *tx_queue);
536 unsigned int efx_farch_tx_limit_len(struct efx_tx_queue *tx_queue,
537 dma_addr_t dma_addr, unsigned int len);
538 int efx_farch_rx_probe(struct efx_rx_queue *rx_queue);
539 void efx_farch_rx_init(struct efx_rx_queue *rx_queue);
540 void efx_farch_rx_fini(struct efx_rx_queue *rx_queue);
541 void efx_farch_rx_remove(struct efx_rx_queue *rx_queue);
542 void efx_farch_rx_write(struct efx_rx_queue *rx_queue);
543 void efx_farch_rx_defer_refill(struct efx_rx_queue *rx_queue);
544 int efx_farch_ev_probe(struct efx_channel *channel);
545 int efx_farch_ev_init(struct efx_channel *channel);
546 void efx_farch_ev_fini(struct efx_channel *channel);
547 void efx_farch_ev_remove(struct efx_channel *channel);
548 int efx_farch_ev_process(struct efx_channel *channel, int quota);
549 void efx_farch_ev_read_ack(struct efx_channel *channel);
550 void efx_farch_ev_test_generate(struct efx_channel *channel);
552 /* Falcon/Siena filter operations */
553 int efx_farch_filter_table_probe(struct efx_nic *efx);
554 void efx_farch_filter_table_restore(struct efx_nic *efx);
555 void efx_farch_filter_table_remove(struct efx_nic *efx);
556 void efx_farch_filter_update_rx_scatter(struct efx_nic *efx);
557 s32 efx_farch_filter_insert(struct efx_nic *efx, struct efx_filter_spec *spec,
559 int efx_farch_filter_remove_safe(struct efx_nic *efx,
560 enum efx_filter_priority priority,
562 int efx_farch_filter_get_safe(struct efx_nic *efx,
563 enum efx_filter_priority priority, u32 filter_id,
564 struct efx_filter_spec *);
565 int efx_farch_filter_clear_rx(struct efx_nic *efx,
566 enum efx_filter_priority priority);
567 u32 efx_farch_filter_count_rx_used(struct efx_nic *efx,
568 enum efx_filter_priority priority);
569 u32 efx_farch_filter_get_rx_id_limit(struct efx_nic *efx);
570 s32 efx_farch_filter_get_rx_ids(struct efx_nic *efx,
571 enum efx_filter_priority priority, u32 *buf,
573 #ifdef CONFIG_RFS_ACCEL
574 s32 efx_farch_filter_rfs_insert(struct efx_nic *efx,
575 struct efx_filter_spec *spec);
576 bool efx_farch_filter_rfs_expire_one(struct efx_nic *efx, u32 flow_id,
579 void efx_farch_filter_sync_rx_mode(struct efx_nic *efx);
581 bool efx_nic_event_present(struct efx_channel *channel);
583 /* Some statistics are computed as A - B where A and B each increase
584 * linearly with some hardware counter(s) and the counters are read
585 * asynchronously. If the counters contributing to B are always read
586 * after those contributing to A, the computed value may be lower than
587 * the true value by some variable amount, and may decrease between
588 * subsequent computations.
590 * We should never allow statistics to decrease or to exceed the true
591 * value. Since the computed value will never be greater than the
592 * true value, we can achieve this by only storing the computed value
595 static inline void efx_update_diff_stat(u64 *stat, u64 diff)
597 if ((s64)(diff - *stat) > 0)
602 int efx_nic_init_interrupt(struct efx_nic *efx);
603 int efx_nic_irq_test_start(struct efx_nic *efx);
604 void efx_nic_fini_interrupt(struct efx_nic *efx);
606 /* Falcon/Siena interrupts */
607 void efx_farch_irq_enable_master(struct efx_nic *efx);
608 int efx_farch_irq_test_generate(struct efx_nic *efx);
609 void efx_farch_irq_disable_master(struct efx_nic *efx);
610 irqreturn_t efx_farch_msi_interrupt(int irq, void *dev_id);
611 irqreturn_t efx_farch_legacy_interrupt(int irq, void *dev_id);
612 irqreturn_t efx_farch_fatal_interrupt(struct efx_nic *efx);
614 static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
616 return ACCESS_ONCE(channel->event_test_cpu);
618 static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
620 return ACCESS_ONCE(efx->last_irq_cpu);
623 /* Global Resources */
624 int efx_nic_flush_queues(struct efx_nic *efx);
625 void siena_prepare_flush(struct efx_nic *efx);
626 int efx_farch_fini_dmaq(struct efx_nic *efx);
627 void efx_farch_finish_flr(struct efx_nic *efx);
628 void siena_finish_flush(struct efx_nic *efx);
629 void falcon_start_nic_stats(struct efx_nic *efx);
630 void falcon_stop_nic_stats(struct efx_nic *efx);
631 int falcon_reset_xaui(struct efx_nic *efx);
632 void efx_farch_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
633 void efx_farch_init_common(struct efx_nic *efx);
634 void efx_ef10_handle_drain_event(struct efx_nic *efx);
635 void efx_farch_rx_push_indir_table(struct efx_nic *efx);
636 void efx_farch_rx_pull_indir_table(struct efx_nic *efx);
638 int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
639 unsigned int len, gfp_t gfp_flags);
640 void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
643 struct efx_farch_register_test {
647 int efx_farch_test_registers(struct efx_nic *efx,
648 const struct efx_farch_register_test *regs,
651 size_t efx_nic_get_regs_len(struct efx_nic *efx);
652 void efx_nic_get_regs(struct efx_nic *efx, void *buf);
654 size_t efx_nic_describe_stats(const struct efx_hw_stat_desc *desc, size_t count,
655 const unsigned long *mask, u8 *names);
656 void efx_nic_update_stats(const struct efx_hw_stat_desc *desc, size_t count,
657 const unsigned long *mask, u64 *stats,
658 const void *dma_buf, bool accumulate);
659 void efx_nic_fix_nodesc_drop_stat(struct efx_nic *efx, u64 *stat);
661 #define EFX_MAX_FLUSH_TIME 5000
663 void efx_farch_generate_event(struct efx_nic *efx, unsigned int evq,
666 #endif /* EFX_NIC_H */