2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@xilinx.com>.
7 * 2007 - 2013 (c) Xilinx, Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/skbuff.h>
21 #include <linux/slab.h>
22 #include <linux/of_address.h>
23 #include <linux/of_device.h>
24 #include <linux/of_platform.h>
25 #include <linux/of_mdio.h>
26 #include <linux/of_net.h>
27 #include <linux/phy.h>
28 #include <linux/interrupt.h>
30 #define DRIVER_NAME "xilinx_emaclite"
32 /* Register offsets for the EmacLite Core */
33 #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
34 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
35 #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
36 #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
37 #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
38 #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
39 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
40 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
42 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
43 #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
44 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
46 #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
48 /* MDIO Address Register Bit Masks */
49 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
50 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
51 #define XEL_MDIOADDR_PHYADR_SHIFT 5
52 #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
54 /* MDIO Write Data Register Bit Masks */
55 #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
57 /* MDIO Read Data Register Bit Masks */
58 #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
60 /* MDIO Control Register Bit Masks */
61 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
62 #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
64 /* Global Interrupt Enable Register (GIER) Bit Masks */
65 #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
67 /* Transmit Status Register (TSR) Bit Masks */
68 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
69 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
70 #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
71 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
72 * only. This is not documented
75 /* Define for programming the MAC address into the EmacLite */
76 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
78 /* Receive Status Register (RSR) */
79 #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
80 #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
82 /* Transmit Packet Length Register (TPLR) */
83 #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
85 /* Receive Packet Length Register (RPLR) */
86 #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
88 #define XEL_HEADER_OFFSET 12 /* Offset to length field */
89 #define XEL_HEADER_SHIFT 16 /* Shift value for length */
91 /* General Ethernet Definitions */
92 #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
93 #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
97 #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
100 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
101 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
104 * struct net_local - Our private per device data
105 * @ndev: instance of the network device
106 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
107 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
108 * @next_tx_buf_to_use: next Tx buffer to write to
109 * @next_rx_buf_to_use: next Rx buffer to read from
110 * @base_addr: base address of the Emaclite device
111 * @reset_lock: lock used for synchronization
112 * @deferred_skb: holds an skb (for transmission at a later time) when the
113 * Tx buffer is not free
114 * @phy_dev: pointer to the PHY device
115 * @phy_node: pointer to the PHY device node
116 * @mii_bus: pointer to the MII bus
117 * @last_link: last link status
118 * @has_mdio: indicates whether MDIO is included in the HW
122 struct net_device *ndev;
126 u32 next_tx_buf_to_use;
127 u32 next_rx_buf_to_use;
128 void __iomem *base_addr;
130 spinlock_t reset_lock;
131 struct sk_buff *deferred_skb;
133 struct phy_device *phy_dev;
134 struct device_node *phy_node;
136 struct mii_bus *mii_bus;
143 /*************************/
144 /* EmacLite driver calls */
145 /*************************/
148 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
149 * @drvdata: Pointer to the Emaclite device private data
151 * This function enables the Tx and Rx interrupts for the Emaclite device along
152 * with the Global Interrupt Enable.
154 static void xemaclite_enable_interrupts(struct net_local *drvdata)
158 /* Enable the Tx interrupts for the first Buffer */
159 reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
160 __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
161 drvdata->base_addr + XEL_TSR_OFFSET);
163 /* Enable the Rx interrupts for the first buffer */
164 __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
166 /* Enable the Global Interrupt Enable */
167 __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
171 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
172 * @drvdata: Pointer to the Emaclite device private data
174 * This function disables the Tx and Rx interrupts for the Emaclite device,
175 * along with the Global Interrupt Enable.
177 static void xemaclite_disable_interrupts(struct net_local *drvdata)
181 /* Disable the Global Interrupt Enable */
182 __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
184 /* Disable the Tx interrupts for the first buffer */
185 reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
186 __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
187 drvdata->base_addr + XEL_TSR_OFFSET);
189 /* Disable the Rx interrupts for the first buffer */
190 reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
191 __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
192 drvdata->base_addr + XEL_RSR_OFFSET);
196 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
197 * @src_ptr: Void pointer to the 16-bit aligned source address
198 * @dest_ptr: Pointer to the 32-bit aligned destination address
199 * @length: Number bytes to write from source to destination
201 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
202 * address in the EmacLite device.
204 static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
209 u16 *from_u16_ptr, *to_u16_ptr;
211 to_u32_ptr = dest_ptr;
212 from_u16_ptr = src_ptr;
215 for (; length > 3; length -= 4) {
216 to_u16_ptr = (u16 *)&align_buffer;
217 *to_u16_ptr++ = *from_u16_ptr++;
218 *to_u16_ptr++ = *from_u16_ptr++;
220 /* This barrier resolves occasional issues seen around
221 * cases where the data is not properly flushed out
222 * from the processor store buffers to the destination
228 *to_u32_ptr++ = align_buffer;
231 u8 *from_u8_ptr, *to_u8_ptr;
233 /* Set up to output the remaining data */
235 to_u8_ptr = (u8 *) &align_buffer;
236 from_u8_ptr = (u8 *) from_u16_ptr;
238 /* Output the remaining data */
239 for (; length > 0; length--)
240 *to_u8_ptr++ = *from_u8_ptr++;
242 /* This barrier resolves occasional issues seen around
243 * cases where the data is not properly flushed out
244 * from the processor store buffers to the destination
248 *to_u32_ptr = align_buffer;
253 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
254 * @src_ptr: Pointer to the 32-bit aligned source address
255 * @dest_ptr: Pointer to the 16-bit aligned destination address
256 * @length: Number bytes to read from source to destination
258 * This function reads data from a 32-bit aligned address in the EmacLite device
259 * to a 16-bit aligned buffer.
261 static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
264 u16 *to_u16_ptr, *from_u16_ptr;
268 from_u32_ptr = src_ptr;
269 to_u16_ptr = (u16 *) dest_ptr;
271 for (; length > 3; length -= 4) {
272 /* Copy each word into the temporary buffer */
273 align_buffer = *from_u32_ptr++;
274 from_u16_ptr = (u16 *)&align_buffer;
276 /* Read data from source */
277 *to_u16_ptr++ = *from_u16_ptr++;
278 *to_u16_ptr++ = *from_u16_ptr++;
282 u8 *to_u8_ptr, *from_u8_ptr;
284 /* Set up to read the remaining data */
285 to_u8_ptr = (u8 *) to_u16_ptr;
286 align_buffer = *from_u32_ptr++;
287 from_u8_ptr = (u8 *) &align_buffer;
289 /* Read the remaining data */
290 for (; length > 0; length--)
291 *to_u8_ptr = *from_u8_ptr;
296 * xemaclite_send_data - Send an Ethernet frame
297 * @drvdata: Pointer to the Emaclite device private data
298 * @data: Pointer to the data to be sent
299 * @byte_count: Total frame size, including header
301 * This function checks if the Tx buffer of the Emaclite device is free to send
302 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
305 * Return: 0 upon success or -1 if the buffer(s) are full.
307 * Note: The maximum Tx packet size can not be more than Ethernet header
308 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
310 static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
311 unsigned int byte_count)
316 /* Determine the expected Tx buffer address */
317 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
319 /* If the length is too large, truncate it */
320 if (byte_count > ETH_FRAME_LEN)
321 byte_count = ETH_FRAME_LEN;
323 /* Check if the expected buffer is available */
324 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
325 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
326 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
328 /* Switch to next buffer if configured */
329 if (drvdata->tx_ping_pong != 0)
330 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
331 } else if (drvdata->tx_ping_pong != 0) {
332 /* If the expected buffer is full, try the other buffer,
333 * if it is configured in HW */
335 addr = (void __iomem __force *)((u32 __force)addr ^
337 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
339 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
340 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
341 return -1; /* Buffers were full, return failure */
343 return -1; /* Buffer was full, return failure */
345 /* Write the frame to the buffer */
346 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
348 __raw_writel((byte_count & XEL_TPLR_LENGTH_MASK),
349 addr + XEL_TPLR_OFFSET);
351 /* Update the Tx Status Register to indicate that there is a
352 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
353 * is used by the interrupt handler to check whether a frame
354 * has been transmitted */
355 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
356 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
357 __raw_writel(reg_data, addr + XEL_TSR_OFFSET);
363 * xemaclite_recv_data - Receive a frame
364 * @drvdata: Pointer to the Emaclite device private data
365 * @data: Address where the data is to be received
367 * This function is intended to be called from the interrupt context or
368 * with a wrapper which waits for the receive frame to be available.
370 * Return: Total number of bytes received
372 static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data, int maxlen)
375 u16 length, proto_type;
378 /* Determine the expected buffer address */
379 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
381 /* Verify which buffer has valid data */
382 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
384 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
385 if (drvdata->rx_ping_pong != 0)
386 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
388 /* The instance is out of sync, try other buffer if other
389 * buffer is configured, return 0 otherwise. If the instance is
390 * out of sync, do not update the 'next_rx_buf_to_use' since it
391 * will correct on subsequent calls */
392 if (drvdata->rx_ping_pong != 0)
393 addr = (void __iomem __force *)((u32 __force)addr ^
396 return 0; /* No data was available */
398 /* Verify that buffer has valid data */
399 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
400 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
401 XEL_RSR_RECV_DONE_MASK)
402 return 0; /* No data was available */
405 /* Get the protocol type of the ethernet frame that arrived */
406 proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET +
407 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
408 XEL_RPLR_LENGTH_MASK);
410 /* Check if received ethernet frame is a raw ethernet frame
411 * or an IP packet or an ARP packet */
412 if (proto_type > ETH_DATA_LEN) {
414 if (proto_type == ETH_P_IP) {
415 length = ((ntohl(__raw_readl(addr +
416 XEL_HEADER_IP_LENGTH_OFFSET +
417 XEL_RXBUFF_OFFSET)) >>
419 XEL_RPLR_LENGTH_MASK);
420 length = min_t(u16, length, ETH_DATA_LEN);
421 length += ETH_HLEN + ETH_FCS_LEN;
423 } else if (proto_type == ETH_P_ARP)
424 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
426 /* Field contains type other than IP or ARP, use max
427 * frame size and let user parse it */
428 length = ETH_FRAME_LEN + ETH_FCS_LEN;
430 /* Use the length in the frame, plus the header and trailer */
431 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
433 if (WARN_ON(length > maxlen))
436 /* Read from the EmacLite device */
437 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
440 /* Acknowledge the frame */
441 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
442 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
443 __raw_writel(reg_data, addr + XEL_RSR_OFFSET);
449 * xemaclite_update_address - Update the MAC address in the device
450 * @drvdata: Pointer to the Emaclite device private data
451 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
453 * Tx must be idle and Rx should be idle for deterministic results.
454 * It is recommended that this function should be called after the
455 * initialization and before transmission of any packets from the device.
456 * The MAC address can be programmed using any of the two transmit
457 * buffers (if configured).
459 static void xemaclite_update_address(struct net_local *drvdata,
465 /* Determine the expected Tx buffer address */
466 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
468 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
470 __raw_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
472 /* Update the MAC address in the EmacLite */
473 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
474 __raw_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
476 /* Wait for EmacLite to finish with the MAC address update */
477 while ((__raw_readl(addr + XEL_TSR_OFFSET) &
478 XEL_TSR_PROG_MAC_ADDR) != 0)
483 * xemaclite_set_mac_address - Set the MAC address for this device
484 * @dev: Pointer to the network device instance
485 * @addr: Void pointer to the sockaddr structure
487 * This function copies the HW address from the sockaddr strucutre to the
488 * net_device structure and updates the address in HW.
490 * Return: Error if the net device is busy or 0 if the addr is set
493 static int xemaclite_set_mac_address(struct net_device *dev, void *address)
495 struct net_local *lp = netdev_priv(dev);
496 struct sockaddr *addr = address;
498 if (netif_running(dev))
501 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
502 xemaclite_update_address(lp, dev->dev_addr);
507 * xemaclite_tx_timeout - Callback for Tx Timeout
508 * @dev: Pointer to the network device
510 * This function is called when Tx time out occurs for Emaclite device.
512 static void xemaclite_tx_timeout(struct net_device *dev)
514 struct net_local *lp = netdev_priv(dev);
517 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
518 TX_TIMEOUT * 1000UL / HZ);
520 dev->stats.tx_errors++;
522 /* Reset the device */
523 spin_lock_irqsave(&lp->reset_lock, flags);
525 /* Shouldn't really be necessary, but shouldn't hurt */
526 netif_stop_queue(dev);
528 xemaclite_disable_interrupts(lp);
529 xemaclite_enable_interrupts(lp);
531 if (lp->deferred_skb) {
532 dev_kfree_skb(lp->deferred_skb);
533 lp->deferred_skb = NULL;
534 dev->stats.tx_errors++;
537 /* To exclude tx timeout */
538 netif_trans_update(dev); /* prevent tx timeout */
540 /* We're all ready to go. Start the queue */
541 netif_wake_queue(dev);
542 spin_unlock_irqrestore(&lp->reset_lock, flags);
545 /**********************/
546 /* Interrupt Handlers */
547 /**********************/
550 * xemaclite_tx_handler - Interrupt handler for frames sent
551 * @dev: Pointer to the network device
553 * This function updates the number of packets transmitted and handles the
554 * deferred skb, if there is one.
556 static void xemaclite_tx_handler(struct net_device *dev)
558 struct net_local *lp = netdev_priv(dev);
560 dev->stats.tx_packets++;
561 if (lp->deferred_skb) {
562 if (xemaclite_send_data(lp,
563 (u8 *) lp->deferred_skb->data,
564 lp->deferred_skb->len) != 0)
567 dev->stats.tx_bytes += lp->deferred_skb->len;
568 dev_kfree_skb_irq(lp->deferred_skb);
569 lp->deferred_skb = NULL;
570 netif_trans_update(dev); /* prevent tx timeout */
571 netif_wake_queue(dev);
577 * xemaclite_rx_handler- Interrupt handler for frames received
578 * @dev: Pointer to the network device
580 * This function allocates memory for a socket buffer, fills it with data
581 * received and hands it over to the TCP/IP stack.
583 static void xemaclite_rx_handler(struct net_device *dev)
585 struct net_local *lp = netdev_priv(dev);
590 len = ETH_FRAME_LEN + ETH_FCS_LEN;
591 skb = netdev_alloc_skb(dev, len + ALIGNMENT);
593 /* Couldn't get memory. */
594 dev->stats.rx_dropped++;
595 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
600 * A new skb should have the data halfword aligned, but this code is
601 * here just in case that isn't true. Calculate how many
602 * bytes we should reserve to get the data to start on a word
604 align = BUFFER_ALIGN(skb->data);
606 skb_reserve(skb, align);
610 len = xemaclite_recv_data(lp, (u8 *) skb->data, len);
613 dev->stats.rx_errors++;
614 dev_kfree_skb_irq(skb);
618 skb_put(skb, len); /* Tell the skb how much data we got */
620 skb->protocol = eth_type_trans(skb, dev);
621 skb_checksum_none_assert(skb);
623 dev->stats.rx_packets++;
624 dev->stats.rx_bytes += len;
626 if (!skb_defer_rx_timestamp(skb))
627 netif_rx(skb); /* Send the packet upstream */
631 * xemaclite_interrupt - Interrupt handler for this driver
632 * @irq: Irq of the Emaclite device
633 * @dev_id: Void pointer to the network device instance used as callback
636 * This function handles the Tx and Rx interrupts of the EmacLite device.
638 static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
640 bool tx_complete = false;
641 struct net_device *dev = dev_id;
642 struct net_local *lp = netdev_priv(dev);
643 void __iomem *base_addr = lp->base_addr;
646 /* Check if there is Rx Data available */
647 if ((__raw_readl(base_addr + XEL_RSR_OFFSET) &
648 XEL_RSR_RECV_DONE_MASK) ||
649 (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
650 & XEL_RSR_RECV_DONE_MASK))
652 xemaclite_rx_handler(dev);
654 /* Check if the Transmission for the first buffer is completed */
655 tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET);
656 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
657 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
659 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
660 __raw_writel(tx_status, base_addr + XEL_TSR_OFFSET);
665 /* Check if the Transmission for the second buffer is completed */
666 tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
667 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
668 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
670 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
671 __raw_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
677 /* If there was a Tx interrupt, call the Tx Handler */
678 if (tx_complete != 0)
679 xemaclite_tx_handler(dev);
684 /**********************/
685 /* MDIO Bus functions */
686 /**********************/
689 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
690 * @lp: Pointer to the Emaclite device private data
692 * This function waits till the device is ready to accept a new MDIO
695 * Return: 0 for success or ETIMEDOUT for a timeout
698 static int xemaclite_mdio_wait(struct net_local *lp)
700 unsigned long end = jiffies + 2;
702 /* wait for the MDIO interface to not be busy or timeout
705 while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
706 XEL_MDIOCTRL_MDIOSTS_MASK) {
707 if (time_before_eq(end, jiffies)) {
717 * xemaclite_mdio_read - Read from a given MII management register
718 * @bus: the mii_bus struct
719 * @phy_id: the phy address
720 * @reg: register number to read from
722 * This function waits till the device is ready to accept a new MDIO
723 * request and then writes the phy address to the MDIO Address register
724 * and reads data from MDIO Read Data register, when its available.
726 * Return: Value read from the MII management register
728 static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
730 struct net_local *lp = bus->priv;
734 if (xemaclite_mdio_wait(lp))
737 /* Write the PHY address, register number and set the OP bit in the
738 * MDIO Address register. Set the Status bit in the MDIO Control
739 * register to start a MDIO read transaction.
741 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
742 __raw_writel(XEL_MDIOADDR_OP_MASK |
743 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
744 lp->base_addr + XEL_MDIOADDR_OFFSET);
745 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
746 lp->base_addr + XEL_MDIOCTRL_OFFSET);
748 if (xemaclite_mdio_wait(lp))
751 rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET);
753 dev_dbg(&lp->ndev->dev,
754 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
761 * xemaclite_mdio_write - Write to a given MII management register
762 * @bus: the mii_bus struct
763 * @phy_id: the phy address
764 * @reg: register number to write to
765 * @val: value to write to the register number specified by reg
767 * This function waits till the device is ready to accept a new MDIO
768 * request and then writes the val to the MDIO Write Data register.
770 static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
773 struct net_local *lp = bus->priv;
776 dev_dbg(&lp->ndev->dev,
777 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
780 if (xemaclite_mdio_wait(lp))
783 /* Write the PHY address, register number and clear the OP bit in the
784 * MDIO Address register and then write the value into the MDIO Write
785 * Data register. Finally, set the Status bit in the MDIO Control
786 * register to start a MDIO write transaction.
788 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
789 __raw_writel(~XEL_MDIOADDR_OP_MASK &
790 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
791 lp->base_addr + XEL_MDIOADDR_OFFSET);
792 __raw_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
793 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
794 lp->base_addr + XEL_MDIOCTRL_OFFSET);
800 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
801 * @lp: Pointer to the Emaclite device private data
802 * @ofdev: Pointer to OF device structure
804 * This function enables MDIO bus in the Emaclite device and registers a
807 * Return: 0 upon success or a negative error upon failure
809 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
814 struct device_node *np = of_get_parent(lp->phy_node);
815 struct device_node *npp;
817 /* Don't register the MDIO bus if the phy_node or its parent node
821 dev_err(dev, "Failed to register mdio bus.\n");
824 npp = of_get_parent(np);
826 of_address_to_resource(npp, 0, &res);
827 if (lp->ndev->mem_start != res.start) {
828 struct phy_device *phydev;
829 phydev = of_phy_find_device(lp->phy_node);
832 "MDIO of the phy is not registered yet\n");
834 put_device(&phydev->mdio.dev);
838 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
841 __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK,
842 lp->base_addr + XEL_MDIOCTRL_OFFSET);
844 bus = mdiobus_alloc();
846 dev_err(dev, "Failed to allocate mdiobus\n");
850 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
851 (unsigned long long)res.start);
853 bus->name = "Xilinx Emaclite MDIO";
854 bus->read = xemaclite_mdio_read;
855 bus->write = xemaclite_mdio_write;
860 rc = of_mdiobus_register(bus, np);
862 dev_err(dev, "Failed to register mdio bus.\n");
874 * xemaclite_adjust_link - Link state callback for the Emaclite device
875 * @ndev: pointer to net_device struct
877 * There's nothing in the Emaclite device to be configured when the link
878 * state changes. We just print the status.
880 static void xemaclite_adjust_link(struct net_device *ndev)
882 struct net_local *lp = netdev_priv(ndev);
883 struct phy_device *phy = lp->phy_dev;
886 /* hash together the state values to decide if something has changed */
887 link_state = phy->speed | (phy->duplex << 1) | phy->link;
889 if (lp->last_link != link_state) {
890 lp->last_link = link_state;
891 phy_print_status(phy);
896 * xemaclite_open - Open the network device
897 * @dev: Pointer to the network device
899 * This function sets the MAC address, requests an IRQ and enables interrupts
900 * for the Emaclite device and starts the Tx queue.
901 * It also connects to the phy device, if MDIO is included in Emaclite device.
903 static int xemaclite_open(struct net_device *dev)
905 struct net_local *lp = netdev_priv(dev);
908 /* Just to be safe, stop the device first */
909 xemaclite_disable_interrupts(lp);
914 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
915 xemaclite_adjust_link, 0,
916 PHY_INTERFACE_MODE_MII);
918 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
922 /* EmacLite doesn't support giga-bit speeds */
923 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
924 lp->phy_dev->advertising = lp->phy_dev->supported;
926 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
927 phy_write(lp->phy_dev, MII_CTRL1000, 0);
929 /* Advertise only 10 and 100mbps full/half duplex speeds */
930 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL |
933 /* Restart auto negotiation */
934 bmcr = phy_read(lp->phy_dev, MII_BMCR);
935 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
936 phy_write(lp->phy_dev, MII_BMCR, bmcr);
938 phy_start(lp->phy_dev);
941 /* Set the MAC address each time opened */
942 xemaclite_update_address(lp, dev->dev_addr);
945 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
947 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
950 phy_disconnect(lp->phy_dev);
956 /* Enable Interrupts */
957 xemaclite_enable_interrupts(lp);
959 /* We're ready to go */
960 netif_start_queue(dev);
966 * xemaclite_close - Close the network device
967 * @dev: Pointer to the network device
969 * This function stops the Tx queue, disables interrupts and frees the IRQ for
970 * the Emaclite device.
971 * It also disconnects the phy device associated with the Emaclite device.
973 static int xemaclite_close(struct net_device *dev)
975 struct net_local *lp = netdev_priv(dev);
977 netif_stop_queue(dev);
978 xemaclite_disable_interrupts(lp);
979 free_irq(dev->irq, dev);
982 phy_disconnect(lp->phy_dev);
989 * xemaclite_send - Transmit a frame
990 * @orig_skb: Pointer to the socket buffer to be transmitted
991 * @dev: Pointer to the network device
993 * This function checks if the Tx buffer of the Emaclite device is free to send
994 * data. If so, it fills the Tx buffer with data from socket buffer data,
995 * updates the stats and frees the socket buffer. The Tx completion is signaled
996 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
997 * deferred and the Tx queue is stopped so that the deferred socket buffer can
998 * be transmitted when the Emaclite device is free to transmit data.
1000 * Return: 0, always.
1002 static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1004 struct net_local *lp = netdev_priv(dev);
1005 struct sk_buff *new_skb;
1007 unsigned long flags;
1009 len = orig_skb->len;
1013 spin_lock_irqsave(&lp->reset_lock, flags);
1014 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1015 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1016 * defer the skb for transmission during the ISR, after the
1017 * current transmission is complete */
1018 netif_stop_queue(dev);
1019 lp->deferred_skb = new_skb;
1020 /* Take the time stamp now, since we can't do this in an ISR. */
1021 skb_tx_timestamp(new_skb);
1022 spin_unlock_irqrestore(&lp->reset_lock, flags);
1025 spin_unlock_irqrestore(&lp->reset_lock, flags);
1027 skb_tx_timestamp(new_skb);
1029 dev->stats.tx_bytes += len;
1030 dev_consume_skb_any(new_skb);
1036 * xemaclite_remove_ndev - Free the network device
1037 * @ndev: Pointer to the network device to be freed
1039 * This function un maps the IO region of the Emaclite device and frees the net
1042 static void xemaclite_remove_ndev(struct net_device *ndev)
1050 * get_bool - Get a parameter from the OF device
1051 * @ofdev: Pointer to OF device structure
1052 * @s: Property to be retrieved
1054 * This function looks for a property in the device node and returns the value
1055 * of the property if its found or 0 if the property is not found.
1057 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1059 static bool get_bool(struct platform_device *ofdev, const char *s)
1061 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1066 dev_warn(&ofdev->dev, "Parameter %s not found,"
1067 "defaulting to false\n", s);
1072 static struct net_device_ops xemaclite_netdev_ops;
1075 * xemaclite_of_probe - Probe method for the Emaclite device.
1076 * @ofdev: Pointer to OF device structure
1077 * @match: Pointer to the structure used for matching a device
1079 * This function probes for the Emaclite device in the device tree.
1080 * It initializes the driver data structure and the hardware, sets the MAC
1081 * address and registers the network device.
1082 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1085 * Return: 0, if the driver is bound to the Emaclite device, or
1086 * a negative error if there is failure.
1088 static int xemaclite_of_probe(struct platform_device *ofdev)
1090 struct resource *res;
1091 struct net_device *ndev = NULL;
1092 struct net_local *lp = NULL;
1093 struct device *dev = &ofdev->dev;
1094 const void *mac_address;
1098 dev_info(dev, "Device Tree Probing\n");
1100 /* Create an ethernet device instance */
1101 ndev = alloc_etherdev(sizeof(struct net_local));
1105 dev_set_drvdata(dev, ndev);
1106 SET_NETDEV_DEV(ndev, &ofdev->dev);
1108 lp = netdev_priv(ndev);
1111 /* Get IRQ for the device */
1112 res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
1114 dev_err(dev, "no IRQ found\n");
1119 ndev->irq = res->start;
1121 res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
1122 lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);
1123 if (IS_ERR(lp->base_addr)) {
1124 rc = PTR_ERR(lp->base_addr);
1128 ndev->mem_start = res->start;
1129 ndev->mem_end = res->end;
1131 spin_lock_init(&lp->reset_lock);
1132 lp->next_tx_buf_to_use = 0x0;
1133 lp->next_rx_buf_to_use = 0x0;
1134 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1135 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1136 mac_address = of_get_mac_address(ofdev->dev.of_node);
1139 /* Set the MAC address. */
1140 memcpy(ndev->dev_addr, mac_address, ETH_ALEN);
1142 dev_warn(dev, "No MAC address found, using random\n");
1143 eth_hw_addr_random(ndev);
1146 /* Clear the Tx CSR's in case this is a restart */
1147 __raw_writel(0, lp->base_addr + XEL_TSR_OFFSET);
1148 __raw_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
1150 /* Set the MAC address in the EmacLite device */
1151 xemaclite_update_address(lp, ndev->dev_addr);
1153 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1154 rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1156 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1158 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1160 ndev->netdev_ops = &xemaclite_netdev_ops;
1161 ndev->flags &= ~IFF_MULTICAST;
1162 ndev->watchdog_timeo = TX_TIMEOUT;
1164 /* Finally, register the device */
1165 rc = register_netdev(ndev);
1168 "Cannot register network device, aborting\n");
1173 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1174 (unsigned int __force)ndev->mem_start,
1175 (unsigned int __force)lp->base_addr, ndev->irq);
1179 xemaclite_remove_ndev(ndev);
1184 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1185 * @of_dev: Pointer to OF device structure
1187 * This function is called if a device is physically removed from the system or
1188 * if the driver module is being unloaded. It frees any resources allocated to
1191 * Return: 0, always.
1193 static int xemaclite_of_remove(struct platform_device *of_dev)
1195 struct net_device *ndev = platform_get_drvdata(of_dev);
1197 struct net_local *lp = netdev_priv(ndev);
1199 /* Un-register the mii_bus, if configured */
1201 mdiobus_unregister(lp->mii_bus);
1202 mdiobus_free(lp->mii_bus);
1206 unregister_netdev(ndev);
1208 of_node_put(lp->phy_node);
1209 lp->phy_node = NULL;
1211 xemaclite_remove_ndev(ndev);
1216 #ifdef CONFIG_NET_POLL_CONTROLLER
1218 xemaclite_poll_controller(struct net_device *ndev)
1220 disable_irq(ndev->irq);
1221 xemaclite_interrupt(ndev->irq, ndev);
1222 enable_irq(ndev->irq);
1226 static struct net_device_ops xemaclite_netdev_ops = {
1227 .ndo_open = xemaclite_open,
1228 .ndo_stop = xemaclite_close,
1229 .ndo_start_xmit = xemaclite_send,
1230 .ndo_set_mac_address = xemaclite_set_mac_address,
1231 .ndo_tx_timeout = xemaclite_tx_timeout,
1232 #ifdef CONFIG_NET_POLL_CONTROLLER
1233 .ndo_poll_controller = xemaclite_poll_controller,
1237 /* Match table for OF platform binding */
1238 static const struct of_device_id xemaclite_of_match[] = {
1239 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1240 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1241 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1242 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1243 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1244 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1245 { /* end of list */ },
1247 MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1249 static struct platform_driver xemaclite_of_driver = {
1251 .name = DRIVER_NAME,
1252 .of_match_table = xemaclite_of_match,
1254 .probe = xemaclite_of_probe,
1255 .remove = xemaclite_of_remove,
1258 module_platform_driver(xemaclite_of_driver);
1260 MODULE_AUTHOR("Xilinx, Inc.");
1261 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1262 MODULE_LICENSE("GPL");