1 // SPDX-License-Identifier: GPL-2.0-only
3 * FUJITSU Extended Socket Network Device driver
4 * Copyright (c) 2015 FUJITSU LIMITED
9 #include "fjes_trace.h"
11 static void fjes_hw_update_zone_task(struct work_struct *);
12 static void fjes_hw_epstop_task(struct work_struct *);
14 /* supported MTU list */
15 const u32 fjes_support_mtu[] = {
16 FJES_MTU_DEFINE(8 * 1024),
17 FJES_MTU_DEFINE(16 * 1024),
18 FJES_MTU_DEFINE(32 * 1024),
19 FJES_MTU_DEFINE(64 * 1024),
23 u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg)
28 value = readl(&base[reg]);
33 static u8 *fjes_hw_iomap(struct fjes_hw *hw)
37 if (!request_mem_region(hw->hw_res.start, hw->hw_res.size,
39 pr_err("request_mem_region failed\n");
43 base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size);
48 static void fjes_hw_iounmap(struct fjes_hw *hw)
51 release_mem_region(hw->hw_res.start, hw->hw_res.size);
54 int fjes_hw_reset(struct fjes_hw *hw)
61 wr32(XSCT_DCTL, dctl.reg);
63 timeout = FJES_DEVICE_RESET_TIMEOUT * 1000;
64 dctl.reg = rd32(XSCT_DCTL);
65 while ((dctl.bits.reset == 1) && (timeout > 0)) {
67 dctl.reg = rd32(XSCT_DCTL);
71 return timeout > 0 ? 0 : -EIO;
74 static int fjes_hw_get_max_epid(struct fjes_hw *hw)
76 union REG_MAX_EP info;
78 info.reg = rd32(XSCT_MAX_EP);
80 return info.bits.maxep;
83 static int fjes_hw_get_my_epid(struct fjes_hw *hw)
85 union REG_OWNER_EPID info;
87 info.reg = rd32(XSCT_OWNER_EPID);
89 return info.bits.epid;
92 static int fjes_hw_alloc_shared_status_region(struct fjes_hw *hw)
96 size = sizeof(struct fjes_device_shared_info) +
97 (sizeof(u8) * hw->max_epid);
98 hw->hw_info.share = kzalloc(size, GFP_KERNEL);
99 if (!hw->hw_info.share)
102 hw->hw_info.share->epnum = hw->max_epid;
107 static void fjes_hw_free_shared_status_region(struct fjes_hw *hw)
109 kfree(hw->hw_info.share);
110 hw->hw_info.share = NULL;
113 static int fjes_hw_alloc_epbuf(struct epbuf_handler *epbh)
117 mem = vzalloc(EP_BUFFER_SIZE);
122 epbh->size = EP_BUFFER_SIZE;
124 epbh->info = (union ep_buffer_info *)mem;
125 epbh->ring = (u8 *)(mem + sizeof(union ep_buffer_info));
130 static void fjes_hw_free_epbuf(struct epbuf_handler *epbh)
140 void fjes_hw_setup_epbuf(struct epbuf_handler *epbh, u8 *mac_addr, u32 mtu)
142 union ep_buffer_info *info = epbh->info;
143 u16 vlan_id[EP_BUFFER_SUPPORT_VLAN_MAX];
146 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
147 vlan_id[i] = info->v1i.vlan_id[i];
149 memset(info, 0, sizeof(union ep_buffer_info));
151 info->v1i.version = 0; /* version 0 */
153 for (i = 0; i < ETH_ALEN; i++)
154 info->v1i.mac_addr[i] = mac_addr[i];
159 info->v1i.info_size = sizeof(union ep_buffer_info);
160 info->v1i.buffer_size = epbh->size - info->v1i.info_size;
162 info->v1i.frame_max = FJES_MTU_TO_FRAME_SIZE(mtu);
163 info->v1i.count_max =
164 EP_RING_NUM(info->v1i.buffer_size, info->v1i.frame_max);
166 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
167 info->v1i.vlan_id[i] = vlan_id[i];
169 info->v1i.rx_status |= FJES_RX_MTU_CHANGING_DONE;
173 fjes_hw_init_command_registers(struct fjes_hw *hw,
174 struct fjes_device_command_param *param)
176 /* Request Buffer length */
177 wr32(XSCT_REQBL, (__le32)(param->req_len));
178 /* Response Buffer Length */
179 wr32(XSCT_RESPBL, (__le32)(param->res_len));
181 /* Request Buffer Address */
183 (__le32)(param->req_start & GENMASK_ULL(31, 0)));
185 (__le32)((param->req_start & GENMASK_ULL(63, 32)) >> 32));
187 /* Response Buffer Address */
189 (__le32)(param->res_start & GENMASK_ULL(31, 0)));
191 (__le32)((param->res_start & GENMASK_ULL(63, 32)) >> 32));
193 /* Share status address */
195 (__le32)(param->share_start & GENMASK_ULL(31, 0)));
197 (__le32)((param->share_start & GENMASK_ULL(63, 32)) >> 32));
200 static int fjes_hw_setup(struct fjes_hw *hw)
202 u8 mac[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
203 struct fjes_device_command_param param;
204 struct ep_share_mem_info *buf_pair;
211 hw->hw_info.max_epid = &hw->max_epid;
212 hw->hw_info.my_epid = &hw->my_epid;
214 buf = kcalloc(hw->max_epid, sizeof(struct ep_share_mem_info),
219 hw->ep_shm_info = (struct ep_share_mem_info *)buf;
221 mem_size = FJES_DEV_REQ_BUF_SIZE(hw->max_epid);
222 hw->hw_info.req_buf = kzalloc(mem_size, GFP_KERNEL);
223 if (!(hw->hw_info.req_buf))
226 hw->hw_info.req_buf_size = mem_size;
228 mem_size = FJES_DEV_RES_BUF_SIZE(hw->max_epid);
229 hw->hw_info.res_buf = kzalloc(mem_size, GFP_KERNEL);
230 if (!(hw->hw_info.res_buf))
233 hw->hw_info.res_buf_size = mem_size;
235 result = fjes_hw_alloc_shared_status_region(hw);
239 hw->hw_info.buffer_share_bit = 0;
240 hw->hw_info.buffer_unshare_reserve_bit = 0;
242 for (epidx = 0; epidx < hw->max_epid; epidx++) {
243 if (epidx != hw->my_epid) {
244 buf_pair = &hw->ep_shm_info[epidx];
246 result = fjes_hw_alloc_epbuf(&buf_pair->tx);
250 result = fjes_hw_alloc_epbuf(&buf_pair->rx);
254 spin_lock_irqsave(&hw->rx_status_lock, flags);
255 fjes_hw_setup_epbuf(&buf_pair->tx, mac,
256 fjes_support_mtu[0]);
257 fjes_hw_setup_epbuf(&buf_pair->rx, mac,
258 fjes_support_mtu[0]);
259 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
263 memset(¶m, 0, sizeof(param));
265 param.req_len = hw->hw_info.req_buf_size;
266 param.req_start = __pa(hw->hw_info.req_buf);
267 param.res_len = hw->hw_info.res_buf_size;
268 param.res_start = __pa(hw->hw_info.res_buf);
270 param.share_start = __pa(hw->hw_info.share->ep_status);
272 fjes_hw_init_command_registers(hw, ¶m);
277 static void fjes_hw_cleanup(struct fjes_hw *hw)
281 if (!hw->ep_shm_info)
284 fjes_hw_free_shared_status_region(hw);
286 kfree(hw->hw_info.req_buf);
287 hw->hw_info.req_buf = NULL;
289 kfree(hw->hw_info.res_buf);
290 hw->hw_info.res_buf = NULL;
292 for (epidx = 0; epidx < hw->max_epid ; epidx++) {
293 if (epidx == hw->my_epid)
295 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].tx);
296 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].rx);
299 kfree(hw->ep_shm_info);
300 hw->ep_shm_info = NULL;
303 int fjes_hw_init(struct fjes_hw *hw)
307 hw->base = fjes_hw_iomap(hw);
311 ret = fjes_hw_reset(hw);
315 fjes_hw_set_irqmask(hw, REG_ICTL_MASK_ALL, true);
317 INIT_WORK(&hw->update_zone_task, fjes_hw_update_zone_task);
318 INIT_WORK(&hw->epstop_task, fjes_hw_epstop_task);
320 mutex_init(&hw->hw_info.lock);
321 spin_lock_init(&hw->rx_status_lock);
323 hw->max_epid = fjes_hw_get_max_epid(hw);
324 hw->my_epid = fjes_hw_get_my_epid(hw);
326 if ((hw->max_epid == 0) || (hw->my_epid >= hw->max_epid))
329 ret = fjes_hw_setup(hw);
331 hw->hw_info.trace = vzalloc(FJES_DEBUG_BUFFER_SIZE);
332 hw->hw_info.trace_size = FJES_DEBUG_BUFFER_SIZE;
337 void fjes_hw_exit(struct fjes_hw *hw)
343 if (hw->debug_mode) {
344 /* disable debug mode */
345 mutex_lock(&hw->hw_info.lock);
346 fjes_hw_stop_debug(hw);
347 mutex_unlock(&hw->hw_info.lock);
349 vfree(hw->hw_info.trace);
350 hw->hw_info.trace = NULL;
351 hw->hw_info.trace_size = 0;
354 ret = fjes_hw_reset(hw);
356 pr_err("%s: reset error", __func__);
364 cancel_work_sync(&hw->update_zone_task);
365 cancel_work_sync(&hw->epstop_task);
368 static enum fjes_dev_command_response_e
369 fjes_hw_issue_request_command(struct fjes_hw *hw,
370 enum fjes_dev_command_request_type type)
372 enum fjes_dev_command_response_e ret = FJES_CMD_STATUS_UNKNOWN;
375 int timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
378 cr.bits.req_start = 1;
379 cr.bits.req_code = type;
380 wr32(XSCT_CR, cr.reg);
381 cr.reg = rd32(XSCT_CR);
383 if (cr.bits.error == 0) {
384 timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
385 cs.reg = rd32(XSCT_CS);
387 while ((cs.bits.complete != 1) && timeout > 0) {
389 cs.reg = rd32(XSCT_CS);
393 if (cs.bits.complete == 1)
394 ret = FJES_CMD_STATUS_NORMAL;
395 else if (timeout <= 0)
396 ret = FJES_CMD_STATUS_TIMEOUT;
399 switch (cr.bits.err_info) {
400 case FJES_CMD_REQ_ERR_INFO_PARAM:
401 ret = FJES_CMD_STATUS_ERROR_PARAM;
403 case FJES_CMD_REQ_ERR_INFO_STATUS:
404 ret = FJES_CMD_STATUS_ERROR_STATUS;
407 ret = FJES_CMD_STATUS_UNKNOWN;
412 trace_fjes_hw_issue_request_command(&cr, &cs, timeout, ret);
417 int fjes_hw_request_info(struct fjes_hw *hw)
419 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
420 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
421 enum fjes_dev_command_response_e ret;
424 memset(req_buf, 0, hw->hw_info.req_buf_size);
425 memset(res_buf, 0, hw->hw_info.res_buf_size);
427 req_buf->info.length = FJES_DEV_COMMAND_INFO_REQ_LEN;
429 res_buf->info.length = 0;
430 res_buf->info.code = 0;
432 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_INFO);
433 trace_fjes_hw_request_info(hw, res_buf);
437 if (FJES_DEV_COMMAND_INFO_RES_LEN((*hw->hw_info.max_epid)) !=
438 res_buf->info.length) {
439 trace_fjes_hw_request_info_err("Invalid res_buf");
441 } else if (ret == FJES_CMD_STATUS_NORMAL) {
442 switch (res_buf->info.code) {
443 case FJES_CMD_REQ_RES_CODE_NORMAL:
452 case FJES_CMD_STATUS_UNKNOWN:
455 case FJES_CMD_STATUS_TIMEOUT:
456 trace_fjes_hw_request_info_err("Timeout");
459 case FJES_CMD_STATUS_ERROR_PARAM:
462 case FJES_CMD_STATUS_ERROR_STATUS:
474 int fjes_hw_register_buff_addr(struct fjes_hw *hw, int dest_epid,
475 struct ep_share_mem_info *buf_pair)
477 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
478 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
479 enum fjes_dev_command_response_e ret;
486 if (test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
489 memset(req_buf, 0, hw->hw_info.req_buf_size);
490 memset(res_buf, 0, hw->hw_info.res_buf_size);
492 req_buf->share_buffer.length = FJES_DEV_COMMAND_SHARE_BUFFER_REQ_LEN(
495 req_buf->share_buffer.epid = dest_epid;
498 req_buf->share_buffer.buffer[idx++] = buf_pair->tx.size;
499 page_count = buf_pair->tx.size / EP_BUFFER_INFO_SIZE;
500 for (i = 0; i < page_count; i++) {
501 addr = ((u8 *)(buf_pair->tx.buffer)) +
502 (i * EP_BUFFER_INFO_SIZE);
503 req_buf->share_buffer.buffer[idx++] =
504 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
505 offset_in_page(addr));
508 req_buf->share_buffer.buffer[idx++] = buf_pair->rx.size;
509 page_count = buf_pair->rx.size / EP_BUFFER_INFO_SIZE;
510 for (i = 0; i < page_count; i++) {
511 addr = ((u8 *)(buf_pair->rx.buffer)) +
512 (i * EP_BUFFER_INFO_SIZE);
513 req_buf->share_buffer.buffer[idx++] =
514 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
515 offset_in_page(addr));
518 res_buf->share_buffer.length = 0;
519 res_buf->share_buffer.code = 0;
521 trace_fjes_hw_register_buff_addr_req(req_buf, buf_pair);
523 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_SHARE_BUFFER);
525 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
526 while ((ret == FJES_CMD_STATUS_NORMAL) &&
527 (res_buf->share_buffer.length ==
528 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) &&
529 (res_buf->share_buffer.code == FJES_CMD_REQ_RES_CODE_BUSY) &&
531 msleep(200 + hw->my_epid * 20);
532 timeout -= (200 + hw->my_epid * 20);
534 res_buf->share_buffer.length = 0;
535 res_buf->share_buffer.code = 0;
537 ret = fjes_hw_issue_request_command(
538 hw, FJES_CMD_REQ_SHARE_BUFFER);
543 trace_fjes_hw_register_buff_addr(res_buf, timeout);
545 if (res_buf->share_buffer.length !=
546 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) {
547 trace_fjes_hw_register_buff_addr_err("Invalid res_buf");
549 } else if (ret == FJES_CMD_STATUS_NORMAL) {
550 switch (res_buf->share_buffer.code) {
551 case FJES_CMD_REQ_RES_CODE_NORMAL:
553 set_bit(dest_epid, &hw->hw_info.buffer_share_bit);
555 case FJES_CMD_REQ_RES_CODE_BUSY:
556 trace_fjes_hw_register_buff_addr_err("Busy Timeout");
565 case FJES_CMD_STATUS_UNKNOWN:
568 case FJES_CMD_STATUS_TIMEOUT:
569 trace_fjes_hw_register_buff_addr_err("Timeout");
572 case FJES_CMD_STATUS_ERROR_PARAM:
573 case FJES_CMD_STATUS_ERROR_STATUS:
583 int fjes_hw_unregister_buff_addr(struct fjes_hw *hw, int dest_epid)
585 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
586 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
587 struct fjes_device_shared_info *share = hw->hw_info.share;
588 enum fjes_dev_command_response_e ret;
595 if (!req_buf || !res_buf || !share)
598 if (!test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
601 memset(req_buf, 0, hw->hw_info.req_buf_size);
602 memset(res_buf, 0, hw->hw_info.res_buf_size);
604 req_buf->unshare_buffer.length =
605 FJES_DEV_COMMAND_UNSHARE_BUFFER_REQ_LEN;
606 req_buf->unshare_buffer.epid = dest_epid;
608 res_buf->unshare_buffer.length = 0;
609 res_buf->unshare_buffer.code = 0;
611 trace_fjes_hw_unregister_buff_addr_req(req_buf);
612 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
614 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
615 while ((ret == FJES_CMD_STATUS_NORMAL) &&
616 (res_buf->unshare_buffer.length ==
617 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) &&
618 (res_buf->unshare_buffer.code ==
619 FJES_CMD_REQ_RES_CODE_BUSY) &&
621 msleep(200 + hw->my_epid * 20);
622 timeout -= (200 + hw->my_epid * 20);
624 res_buf->unshare_buffer.length = 0;
625 res_buf->unshare_buffer.code = 0;
628 fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
633 trace_fjes_hw_unregister_buff_addr(res_buf, timeout);
635 if (res_buf->unshare_buffer.length !=
636 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) {
637 trace_fjes_hw_unregister_buff_addr_err("Invalid res_buf");
639 } else if (ret == FJES_CMD_STATUS_NORMAL) {
640 switch (res_buf->unshare_buffer.code) {
641 case FJES_CMD_REQ_RES_CODE_NORMAL:
643 clear_bit(dest_epid, &hw->hw_info.buffer_share_bit);
645 case FJES_CMD_REQ_RES_CODE_BUSY:
646 trace_fjes_hw_unregister_buff_addr_err("Busy Timeout");
655 case FJES_CMD_STATUS_UNKNOWN:
658 case FJES_CMD_STATUS_TIMEOUT:
659 trace_fjes_hw_unregister_buff_addr_err("Timeout");
662 case FJES_CMD_STATUS_ERROR_PARAM:
663 case FJES_CMD_STATUS_ERROR_STATUS:
673 int fjes_hw_raise_interrupt(struct fjes_hw *hw, int dest_epid,
674 enum REG_ICTL_MASK mask)
676 u32 ig = mask | dest_epid;
678 wr32(XSCT_IG, cpu_to_le32(ig));
683 u32 fjes_hw_capture_interrupt_status(struct fjes_hw *hw)
687 cur_is = rd32(XSCT_IS);
692 void fjes_hw_set_irqmask(struct fjes_hw *hw,
693 enum REG_ICTL_MASK intr_mask, bool mask)
696 wr32(XSCT_IMS, intr_mask);
698 wr32(XSCT_IMC, intr_mask);
701 bool fjes_hw_epid_is_same_zone(struct fjes_hw *hw, int epid)
703 if (epid >= hw->max_epid)
706 if ((hw->ep_shm_info[epid].es_status !=
707 FJES_ZONING_STATUS_ENABLE) ||
708 (hw->ep_shm_info[hw->my_epid].zone ==
709 FJES_ZONING_ZONE_TYPE_NONE))
712 return (hw->ep_shm_info[epid].zone ==
713 hw->ep_shm_info[hw->my_epid].zone);
716 int fjes_hw_epid_is_shared(struct fjes_device_shared_info *share,
721 if (dest_epid < share->epnum)
722 value = share->ep_status[dest_epid];
727 static bool fjes_hw_epid_is_stop_requested(struct fjes_hw *hw, int src_epid)
729 return test_bit(src_epid, &hw->txrx_stop_req_bit);
732 static bool fjes_hw_epid_is_stop_process_done(struct fjes_hw *hw, int src_epid)
734 return (hw->ep_shm_info[src_epid].tx.info->v1i.rx_status &
735 FJES_RX_STOP_REQ_DONE);
738 enum ep_partner_status
739 fjes_hw_get_partner_ep_status(struct fjes_hw *hw, int epid)
741 enum ep_partner_status status;
743 if (fjes_hw_epid_is_shared(hw->hw_info.share, epid)) {
744 if (fjes_hw_epid_is_stop_requested(hw, epid)) {
745 status = EP_PARTNER_WAITING;
747 if (fjes_hw_epid_is_stop_process_done(hw, epid))
748 status = EP_PARTNER_COMPLETE;
750 status = EP_PARTNER_SHARED;
753 status = EP_PARTNER_UNSHARE;
759 void fjes_hw_raise_epstop(struct fjes_hw *hw)
761 enum ep_partner_status status;
765 for (epidx = 0; epidx < hw->max_epid; epidx++) {
766 if (epidx == hw->my_epid)
769 status = fjes_hw_get_partner_ep_status(hw, epidx);
771 case EP_PARTNER_SHARED:
772 fjes_hw_raise_interrupt(hw, epidx,
773 REG_ICTL_MASK_TXRX_STOP_REQ);
774 hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
780 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
781 set_bit(epidx, &hw->txrx_stop_req_bit);
783 spin_lock_irqsave(&hw->rx_status_lock, flags);
784 hw->ep_shm_info[epidx].tx.info->v1i.rx_status |=
785 FJES_RX_STOP_REQ_REQUEST;
786 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
790 int fjes_hw_wait_epstop(struct fjes_hw *hw)
792 enum ep_partner_status status;
793 union ep_buffer_info *info;
797 while (hw->hw_info.buffer_unshare_reserve_bit &&
798 (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)) {
799 for (epidx = 0; epidx < hw->max_epid; epidx++) {
800 if (epidx == hw->my_epid)
802 status = fjes_hw_epid_is_shared(hw->hw_info.share,
804 info = hw->ep_shm_info[epidx].rx.info;
806 (info->v1i.rx_status &
807 FJES_RX_STOP_REQ_DONE)) &&
809 &hw->hw_info.buffer_unshare_reserve_bit)) {
811 &hw->hw_info.buffer_unshare_reserve_bit);
819 for (epidx = 0; epidx < hw->max_epid; epidx++) {
820 if (epidx == hw->my_epid)
822 if (test_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit))
824 &hw->hw_info.buffer_unshare_reserve_bit);
827 return (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)
831 bool fjes_hw_check_epbuf_version(struct epbuf_handler *epbh, u32 version)
833 union ep_buffer_info *info = epbh->info;
835 return (info->common.version == version);
838 bool fjes_hw_check_mtu(struct epbuf_handler *epbh, u32 mtu)
840 union ep_buffer_info *info = epbh->info;
842 return ((info->v1i.frame_max == FJES_MTU_TO_FRAME_SIZE(mtu)) &&
843 info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE);
846 bool fjes_hw_check_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
848 union ep_buffer_info *info = epbh->info;
855 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
856 if (vlan_id == info->v1i.vlan_id[i]) {
865 bool fjes_hw_set_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
867 union ep_buffer_info *info = epbh->info;
870 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
871 if (info->v1i.vlan_id[i] == 0) {
872 info->v1i.vlan_id[i] = vlan_id;
879 void fjes_hw_del_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
881 union ep_buffer_info *info = epbh->info;
885 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
886 if (vlan_id == info->v1i.vlan_id[i])
887 info->v1i.vlan_id[i] = 0;
892 bool fjes_hw_epbuf_rx_is_empty(struct epbuf_handler *epbh)
894 union ep_buffer_info *info = epbh->info;
896 if (!(info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE))
899 if (info->v1i.count_max == 0)
902 return EP_RING_EMPTY(info->v1i.head, info->v1i.tail,
903 info->v1i.count_max);
906 void *fjes_hw_epbuf_rx_curpkt_get_addr(struct epbuf_handler *epbh,
909 union ep_buffer_info *info = epbh->info;
910 struct esmem_frame *ring_frame;
913 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
915 info->v1i.count_max) *
916 info->v1i.frame_max]);
918 *psize = (size_t)ring_frame->frame_size;
920 frame = ring_frame->frame_data;
925 void fjes_hw_epbuf_rx_curpkt_drop(struct epbuf_handler *epbh)
927 union ep_buffer_info *info = epbh->info;
929 if (fjes_hw_epbuf_rx_is_empty(epbh))
932 EP_RING_INDEX_INC(epbh->info->v1i.head, info->v1i.count_max);
935 int fjes_hw_epbuf_tx_pkt_send(struct epbuf_handler *epbh,
936 void *frame, size_t size)
938 union ep_buffer_info *info = epbh->info;
939 struct esmem_frame *ring_frame;
941 if (EP_RING_FULL(info->v1i.head, info->v1i.tail, info->v1i.count_max))
944 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
946 info->v1i.count_max) *
947 info->v1i.frame_max]);
949 ring_frame->frame_size = size;
950 memcpy((void *)(ring_frame->frame_data), (void *)frame, size);
952 EP_RING_INDEX_INC(epbh->info->v1i.tail, info->v1i.count_max);
957 static void fjes_hw_update_zone_task(struct work_struct *work)
959 struct fjes_hw *hw = container_of(work,
960 struct fjes_hw, update_zone_task);
962 struct my_s {u8 es_status; u8 zone; } *info;
963 union fjes_device_command_res *res_buf;
964 enum ep_partner_status pstatus;
966 struct fjes_adapter *adapter;
967 struct net_device *netdev;
970 ulong unshare_bit = 0;
977 adapter = (struct fjes_adapter *)hw->back;
978 netdev = adapter->netdev;
979 res_buf = hw->hw_info.res_buf;
980 info = (struct my_s *)&res_buf->info.info;
982 mutex_lock(&hw->hw_info.lock);
984 ret = fjes_hw_request_info(hw);
989 if (!work_pending(&adapter->force_close_task)) {
990 adapter->force_reset = true;
991 schedule_work(&adapter->force_close_task);
997 for (epidx = 0; epidx < hw->max_epid; epidx++) {
998 if (epidx == hw->my_epid) {
999 hw->ep_shm_info[epidx].es_status =
1000 info[epidx].es_status;
1001 hw->ep_shm_info[epidx].zone =
1006 pstatus = fjes_hw_get_partner_ep_status(hw, epidx);
1008 case EP_PARTNER_UNSHARE:
1010 if ((info[epidx].zone !=
1011 FJES_ZONING_ZONE_TYPE_NONE) &&
1012 (info[epidx].es_status ==
1013 FJES_ZONING_STATUS_ENABLE) &&
1014 (info[epidx].zone ==
1015 info[hw->my_epid].zone))
1016 set_bit(epidx, &share_bit);
1018 set_bit(epidx, &unshare_bit);
1021 case EP_PARTNER_COMPLETE:
1022 case EP_PARTNER_WAITING:
1023 if ((info[epidx].zone ==
1024 FJES_ZONING_ZONE_TYPE_NONE) ||
1025 (info[epidx].es_status !=
1026 FJES_ZONING_STATUS_ENABLE) ||
1027 (info[epidx].zone !=
1028 info[hw->my_epid].zone)) {
1030 &adapter->unshare_watch_bitmask);
1032 &hw->hw_info.buffer_unshare_reserve_bit);
1036 case EP_PARTNER_SHARED:
1037 if ((info[epidx].zone ==
1038 FJES_ZONING_ZONE_TYPE_NONE) ||
1039 (info[epidx].es_status !=
1040 FJES_ZONING_STATUS_ENABLE) ||
1041 (info[epidx].zone !=
1042 info[hw->my_epid].zone))
1043 set_bit(epidx, &irq_bit);
1047 hw->ep_shm_info[epidx].es_status =
1048 info[epidx].es_status;
1049 hw->ep_shm_info[epidx].zone = info[epidx].zone;
1054 mutex_unlock(&hw->hw_info.lock);
1056 for (epidx = 0; epidx < hw->max_epid; epidx++) {
1057 if (epidx == hw->my_epid)
1060 if (test_bit(epidx, &share_bit)) {
1061 spin_lock_irqsave(&hw->rx_status_lock, flags);
1062 fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
1063 netdev->dev_addr, netdev->mtu);
1064 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1066 mutex_lock(&hw->hw_info.lock);
1068 ret = fjes_hw_register_buff_addr(
1069 hw, epidx, &hw->ep_shm_info[epidx]);
1077 if (!work_pending(&adapter->force_close_task)) {
1078 adapter->force_reset = true;
1080 &adapter->force_close_task);
1084 mutex_unlock(&hw->hw_info.lock);
1086 hw->ep_shm_info[epidx].ep_stats
1087 .com_regist_buf_exec += 1;
1090 if (test_bit(epidx, &unshare_bit)) {
1091 mutex_lock(&hw->hw_info.lock);
1093 ret = fjes_hw_unregister_buff_addr(hw, epidx);
1101 if (!work_pending(&adapter->force_close_task)) {
1102 adapter->force_reset = true;
1104 &adapter->force_close_task);
1109 mutex_unlock(&hw->hw_info.lock);
1111 hw->ep_shm_info[epidx].ep_stats
1112 .com_unregist_buf_exec += 1;
1115 spin_lock_irqsave(&hw->rx_status_lock, flags);
1116 fjes_hw_setup_epbuf(
1117 &hw->ep_shm_info[epidx].tx,
1118 netdev->dev_addr, netdev->mtu);
1119 spin_unlock_irqrestore(&hw->rx_status_lock,
1124 if (test_bit(epidx, &irq_bit)) {
1125 fjes_hw_raise_interrupt(hw, epidx,
1126 REG_ICTL_MASK_TXRX_STOP_REQ);
1128 hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
1130 set_bit(epidx, &hw->txrx_stop_req_bit);
1131 spin_lock_irqsave(&hw->rx_status_lock, flags);
1132 hw->ep_shm_info[epidx].tx.
1133 info->v1i.rx_status |=
1134 FJES_RX_STOP_REQ_REQUEST;
1135 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1136 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
1140 if (irq_bit || adapter->unshare_watch_bitmask) {
1141 if (!work_pending(&adapter->unshare_watch_task))
1142 queue_work(adapter->control_wq,
1143 &adapter->unshare_watch_task);
1147 static void fjes_hw_epstop_task(struct work_struct *work)
1149 struct fjes_hw *hw = container_of(work, struct fjes_hw, epstop_task);
1150 struct fjes_adapter *adapter = (struct fjes_adapter *)hw->back;
1151 unsigned long flags;
1156 while ((remain_bit = hw->epstop_req_bit)) {
1157 for (epid_bit = 0; remain_bit; remain_bit >>= 1, epid_bit++) {
1158 if (remain_bit & 1) {
1159 spin_lock_irqsave(&hw->rx_status_lock, flags);
1160 hw->ep_shm_info[epid_bit].
1161 tx.info->v1i.rx_status |=
1162 FJES_RX_STOP_REQ_DONE;
1163 spin_unlock_irqrestore(&hw->rx_status_lock,
1166 clear_bit(epid_bit, &hw->epstop_req_bit);
1168 &adapter->unshare_watch_bitmask);
1170 if (!work_pending(&adapter->unshare_watch_task))
1172 adapter->control_wq,
1173 &adapter->unshare_watch_task);
1179 int fjes_hw_start_debug(struct fjes_hw *hw)
1181 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
1182 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
1183 enum fjes_dev_command_response_e ret;
1189 if (!hw->hw_info.trace)
1191 memset(hw->hw_info.trace, 0, FJES_DEBUG_BUFFER_SIZE);
1193 memset(req_buf, 0, hw->hw_info.req_buf_size);
1194 memset(res_buf, 0, hw->hw_info.res_buf_size);
1196 req_buf->start_trace.length =
1197 FJES_DEV_COMMAND_START_DBG_REQ_LEN(hw->hw_info.trace_size);
1198 req_buf->start_trace.mode = hw->debug_mode;
1199 req_buf->start_trace.buffer_len = hw->hw_info.trace_size;
1200 page_count = hw->hw_info.trace_size / FJES_DEBUG_PAGE_SIZE;
1201 for (i = 0; i < page_count; i++) {
1202 addr = ((u8 *)hw->hw_info.trace) + i * FJES_DEBUG_PAGE_SIZE;
1203 req_buf->start_trace.buffer[i] =
1204 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
1205 offset_in_page(addr));
1208 res_buf->start_trace.length = 0;
1209 res_buf->start_trace.code = 0;
1211 trace_fjes_hw_start_debug_req(req_buf);
1212 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_START_DEBUG);
1213 trace_fjes_hw_start_debug(res_buf);
1215 if (res_buf->start_trace.length !=
1216 FJES_DEV_COMMAND_START_DBG_RES_LEN) {
1218 trace_fjes_hw_start_debug_err("Invalid res_buf");
1219 } else if (ret == FJES_CMD_STATUS_NORMAL) {
1220 switch (res_buf->start_trace.code) {
1221 case FJES_CMD_REQ_RES_CODE_NORMAL:
1230 case FJES_CMD_STATUS_UNKNOWN:
1233 case FJES_CMD_STATUS_TIMEOUT:
1234 trace_fjes_hw_start_debug_err("Busy Timeout");
1237 case FJES_CMD_STATUS_ERROR_PARAM:
1238 case FJES_CMD_STATUS_ERROR_STATUS:
1248 int fjes_hw_stop_debug(struct fjes_hw *hw)
1250 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
1251 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
1252 enum fjes_dev_command_response_e ret;
1255 if (!hw->hw_info.trace)
1258 memset(req_buf, 0, hw->hw_info.req_buf_size);
1259 memset(res_buf, 0, hw->hw_info.res_buf_size);
1260 req_buf->stop_trace.length = FJES_DEV_COMMAND_STOP_DBG_REQ_LEN;
1262 res_buf->stop_trace.length = 0;
1263 res_buf->stop_trace.code = 0;
1265 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_STOP_DEBUG);
1266 trace_fjes_hw_stop_debug(res_buf);
1268 if (res_buf->stop_trace.length != FJES_DEV_COMMAND_STOP_DBG_RES_LEN) {
1269 trace_fjes_hw_stop_debug_err("Invalid res_buf");
1271 } else if (ret == FJES_CMD_STATUS_NORMAL) {
1272 switch (res_buf->stop_trace.code) {
1273 case FJES_CMD_REQ_RES_CODE_NORMAL:
1283 case FJES_CMD_STATUS_UNKNOWN:
1286 case FJES_CMD_STATUS_TIMEOUT:
1288 trace_fjes_hw_stop_debug_err("Busy Timeout");
1290 case FJES_CMD_STATUS_ERROR_PARAM:
1291 case FJES_CMD_STATUS_ERROR_STATUS: