1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/net/phy/marvell.c
5 * Driver for Marvell PHYs
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/phy.h>
31 #include <linux/marvell_phy.h>
32 #include <linux/bitfield.h>
37 #include <linux/uaccess.h>
39 #define MII_MARVELL_PHY_PAGE 22
40 #define MII_MARVELL_COPPER_PAGE 0x00
41 #define MII_MARVELL_FIBER_PAGE 0x01
42 #define MII_MARVELL_MSCR_PAGE 0x02
43 #define MII_MARVELL_LED_PAGE 0x03
44 #define MII_MARVELL_MISC_TEST_PAGE 0x06
45 #define MII_MARVELL_WOL_PAGE 0x11
47 #define MII_M1011_IEVENT 0x13
48 #define MII_M1011_IEVENT_CLEAR 0x0000
50 #define MII_M1011_IMASK 0x12
51 #define MII_M1011_IMASK_INIT 0x6400
52 #define MII_M1011_IMASK_CLEAR 0x0000
54 #define MII_M1011_PHY_SCR 0x10
55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
56 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
57 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
62 #define MII_M1111_PHY_LED_CONTROL 0x18
63 #define MII_M1111_PHY_LED_DIRECT 0x4100
64 #define MII_M1111_PHY_LED_COMBINE 0x411c
65 #define MII_M1111_PHY_EXT_CR 0x14
66 #define MII_M1111_RGMII_RX_DELAY BIT(7)
67 #define MII_M1111_RGMII_TX_DELAY BIT(1)
68 #define MII_M1111_PHY_EXT_SR 0x1b
70 #define MII_M1111_HWCFG_MODE_MASK 0xf
71 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
72 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
73 #define MII_M1111_HWCFG_MODE_RTBI 0x7
74 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
75 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
76 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
77 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
79 #define MII_88E1121_PHY_MSCR_REG 21
80 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
81 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
82 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
84 #define MII_88E1121_MISC_TEST 0x1a
85 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
86 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
87 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
88 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
89 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
90 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
92 #define MII_88E1510_TEMP_SENSOR 0x1b
93 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
95 #define MII_88E1540_COPPER_CTRL3 0x1a
96 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
97 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
98 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
99 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
100 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
101 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
103 #define MII_88E6390_MISC_TEST 0x1b
104 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
105 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
106 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
107 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
108 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
110 #define MII_88E6390_TEMP_SENSOR 0x1c
111 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
112 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
114 #define MII_88E1318S_PHY_MSCR1_REG 16
115 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
117 /* Copper Specific Interrupt Enable Register */
118 #define MII_88E1318S_PHY_CSIER 0x12
119 /* WOL Event Interrupt Enable */
120 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
122 /* LED Timer Control Register */
123 #define MII_88E1318S_PHY_LED_TCR 0x12
124 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
125 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
126 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
128 /* Magic Packet MAC address registers */
129 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
130 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
131 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
133 #define MII_88E1318S_PHY_WOL_CTRL 0x10
134 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
135 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
137 #define MII_PHY_LED_CTRL 16
138 #define MII_88E1121_PHY_LED_DEF 0x0030
139 #define MII_88E1510_PHY_LED_DEF 0x1177
141 #define MII_M1011_PHY_STATUS 0x11
142 #define MII_M1011_PHY_STATUS_1000 0x8000
143 #define MII_M1011_PHY_STATUS_100 0x4000
144 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
145 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
146 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
147 #define MII_M1011_PHY_STATUS_LINK 0x0400
149 #define MII_88E3016_PHY_SPEC_CTRL 0x10
150 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
151 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
153 #define MII_88E1510_GEN_CTRL_REG_1 0x14
154 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
155 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
156 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
158 #define LPA_FIBER_1000HALF 0x40
159 #define LPA_FIBER_1000FULL 0x20
161 #define LPA_PAUSE_FIBER 0x180
162 #define LPA_PAUSE_ASYM_FIBER 0x100
164 #define ADVERTISE_FIBER_1000HALF 0x40
165 #define ADVERTISE_FIBER_1000FULL 0x20
167 #define ADVERTISE_PAUSE_FIBER 0x180
168 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
170 #define REGISTER_LINK_STATUS 0x400
171 #define NB_FIBER_STATS 1
173 MODULE_DESCRIPTION("Marvell PHY driver");
174 MODULE_AUTHOR("Andy Fleming");
175 MODULE_LICENSE("GPL");
177 struct marvell_hw_stat {
184 static struct marvell_hw_stat marvell_hw_stats[] = {
185 { "phy_receive_errors_copper", 0, 21, 16},
186 { "phy_idle_errors", 0, 10, 8 },
187 { "phy_receive_errors_fiber", 1, 21, 16},
190 struct marvell_priv {
191 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
193 struct device *hwmon_dev;
196 static int marvell_read_page(struct phy_device *phydev)
198 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
201 static int marvell_write_page(struct phy_device *phydev, int page)
203 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
206 static int marvell_set_page(struct phy_device *phydev, int page)
208 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
211 static int marvell_ack_interrupt(struct phy_device *phydev)
215 /* Clear the interrupts by reading the reg */
216 err = phy_read(phydev, MII_M1011_IEVENT);
224 static int marvell_config_intr(struct phy_device *phydev)
228 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
229 err = phy_write(phydev, MII_M1011_IMASK,
230 MII_M1011_IMASK_INIT);
232 err = phy_write(phydev, MII_M1011_IMASK,
233 MII_M1011_IMASK_CLEAR);
238 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
244 /* get the current settings */
245 reg = phy_read(phydev, MII_M1011_PHY_SCR);
250 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
253 val |= MII_M1011_PHY_SCR_MDI;
256 val |= MII_M1011_PHY_SCR_MDI_X;
258 case ETH_TP_MDI_AUTO:
259 case ETH_TP_MDI_INVALID:
261 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
266 /* Set the new polarity value in the register */
267 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
275 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
280 reg = phy_read(phydev, MII_M1011_PHY_SCR);
284 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
285 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
287 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
289 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
292 static int marvell_config_aneg(struct phy_device *phydev)
297 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
303 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
304 MII_M1111_PHY_LED_DIRECT);
308 err = genphy_config_aneg(phydev);
312 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
313 /* A write to speed/duplex bits (that is performed by
314 * genphy_config_aneg() call above) must be followed by
315 * a software reset. Otherwise, the write has no effect.
317 err = genphy_soft_reset(phydev);
325 static int m88e1101_config_aneg(struct phy_device *phydev)
329 /* This Marvell PHY has an errata which requires
330 * that certain registers get written in order
331 * to restart autonegotiation
333 err = genphy_soft_reset(phydev);
337 err = phy_write(phydev, 0x1d, 0x1f);
341 err = phy_write(phydev, 0x1e, 0x200c);
345 err = phy_write(phydev, 0x1d, 0x5);
349 err = phy_write(phydev, 0x1e, 0);
353 err = phy_write(phydev, 0x1e, 0x100);
357 return marvell_config_aneg(phydev);
360 #ifdef CONFIG_OF_MDIO
361 /* Set and/or override some configuration registers based on the
362 * marvell,reg-init property stored in the of_node for the phydev.
364 * marvell,reg-init = <reg-page reg mask value>,...;
366 * There may be one or more sets of <reg-page reg mask value>:
368 * reg-page: which register bank to use.
370 * mask: if non-zero, ANDed with existing register value.
371 * value: ORed with the masked value and written to the regiser.
374 static int marvell_of_reg_init(struct phy_device *phydev)
377 int len, i, saved_page, current_page, ret = 0;
379 if (!phydev->mdio.dev.of_node)
382 paddr = of_get_property(phydev->mdio.dev.of_node,
383 "marvell,reg-init", &len);
384 if (!paddr || len < (4 * sizeof(*paddr)))
387 saved_page = phy_save_page(phydev);
390 current_page = saved_page;
392 len /= sizeof(*paddr);
393 for (i = 0; i < len - 3; i += 4) {
394 u16 page = be32_to_cpup(paddr + i);
395 u16 reg = be32_to_cpup(paddr + i + 1);
396 u16 mask = be32_to_cpup(paddr + i + 2);
397 u16 val_bits = be32_to_cpup(paddr + i + 3);
400 if (page != current_page) {
402 ret = marvell_write_page(phydev, page);
409 val = __phy_read(phydev, reg);
418 ret = __phy_write(phydev, reg, val);
423 return phy_restore_page(phydev, saved_page, ret);
426 static int marvell_of_reg_init(struct phy_device *phydev)
430 #endif /* CONFIG_OF_MDIO */
432 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
436 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
437 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
438 MII_88E1121_PHY_MSCR_TX_DELAY;
439 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
440 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
441 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
442 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
446 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
447 MII_88E1121_PHY_MSCR_REG,
448 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
451 static int m88e1121_config_aneg(struct phy_device *phydev)
456 if (phy_interface_is_rgmii(phydev)) {
457 err = m88e1121_config_aneg_rgmii_delays(phydev);
462 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
468 err = genphy_config_aneg(phydev);
472 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
473 /* A software reset is used to ensure a "commit" of the
476 err = genphy_soft_reset(phydev);
484 static int m88e1318_config_aneg(struct phy_device *phydev)
488 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
489 MII_88E1318S_PHY_MSCR1_REG,
490 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
494 return m88e1121_config_aneg(phydev);
498 * linkmode_adv_to_fiber_adv_t
499 * @advertise: the linkmode advertisement settings
501 * A small helper function that translates linkmode advertisement
502 * settings to phy autonegotiation advertisements for the MII_ADV
503 * register for fiber link.
505 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
509 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
510 result |= ADVERTISE_FIBER_1000HALF;
511 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
512 result |= ADVERTISE_FIBER_1000FULL;
514 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
515 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
516 result |= LPA_PAUSE_ASYM_FIBER;
517 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
518 result |= (ADVERTISE_PAUSE_FIBER
519 & (~ADVERTISE_PAUSE_ASYM_FIBER));
525 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
526 * @phydev: target phy_device struct
528 * Description: If auto-negotiation is enabled, we configure the
529 * advertising, and then restart auto-negotiation. If it is not
530 * enabled, then we write the BMCR. Adapted for fiber link in
531 * some Marvell's devices.
533 static int marvell_config_aneg_fiber(struct phy_device *phydev)
539 if (phydev->autoneg != AUTONEG_ENABLE)
540 return genphy_setup_forced(phydev);
542 /* Only allow advertising what this PHY supports */
543 linkmode_and(phydev->advertising, phydev->advertising,
546 /* Setup fiber advertisement */
547 adv = phy_read(phydev, MII_ADVERTISE);
552 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
554 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
557 err = phy_write(phydev, MII_ADVERTISE, adv);
565 /* Advertisement hasn't changed, but maybe aneg was never on to
566 * begin with? Or maybe phy was isolated?
568 int ctl = phy_read(phydev, MII_BMCR);
573 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
574 changed = 1; /* do restart aneg */
577 /* Only restart aneg if we are advertising something different
578 * than we were before.
581 changed = genphy_restart_aneg(phydev);
586 static int m88e1510_config_aneg(struct phy_device *phydev)
590 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
594 /* Configure the copper link first */
595 err = m88e1318_config_aneg(phydev);
599 /* Do not touch the fiber page if we're in copper->sgmii mode */
600 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
603 /* Then the fiber link */
604 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
608 err = marvell_config_aneg_fiber(phydev);
612 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
615 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
619 static void marvell_config_led(struct phy_device *phydev)
624 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
625 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
626 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
627 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
628 def_config = MII_88E1121_PHY_LED_DEF;
630 /* Default PHY LED config:
631 * LED[0] .. 1000Mbps Link
632 * LED[1] .. 100Mbps Link
633 * LED[2] .. Blink, Activity
635 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
636 def_config = MII_88E1510_PHY_LED_DEF;
642 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
645 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
648 static int marvell_config_init(struct phy_device *phydev)
650 /* Set defalut LED */
651 marvell_config_led(phydev);
653 /* Set registers from marvell,reg-init DT property */
654 return marvell_of_reg_init(phydev);
657 static int m88e1116r_config_init(struct phy_device *phydev)
661 err = genphy_soft_reset(phydev);
667 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
671 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
675 err = marvell_set_downshift(phydev, true, 8);
679 if (phy_interface_is_rgmii(phydev)) {
680 err = m88e1121_config_aneg_rgmii_delays(phydev);
685 err = genphy_soft_reset(phydev);
689 return marvell_config_init(phydev);
692 static int m88e3016_config_init(struct phy_device *phydev)
696 /* Enable Scrambler and Auto-Crossover */
697 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
698 MII_88E3016_DISABLE_SCRAMBLER,
699 MII_88E3016_AUTO_MDIX_CROSSOVER);
703 return marvell_config_init(phydev);
706 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
708 int fibre_copper_auto)
710 if (fibre_copper_auto)
711 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
713 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
714 MII_M1111_HWCFG_MODE_MASK |
715 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
716 MII_M1111_HWCFG_FIBER_COPPER_RES,
720 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
724 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
725 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
726 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
727 delay = MII_M1111_RGMII_RX_DELAY;
728 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
729 delay = MII_M1111_RGMII_TX_DELAY;
734 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
735 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
739 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
744 err = m88e1111_config_init_rgmii_delays(phydev);
748 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
752 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
754 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
755 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
757 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
759 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
762 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
766 err = m88e1111_config_init_hwcfg_mode(
768 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
769 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
773 /* make sure copper is selected */
774 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
777 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
781 err = m88e1111_config_init_rgmii_delays(phydev);
785 err = m88e1111_config_init_hwcfg_mode(
787 MII_M1111_HWCFG_MODE_RTBI,
788 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
793 err = genphy_soft_reset(phydev);
797 return m88e1111_config_init_hwcfg_mode(
799 MII_M1111_HWCFG_MODE_RTBI,
800 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
803 static int m88e1111_config_init(struct phy_device *phydev)
807 if (phy_interface_is_rgmii(phydev)) {
808 err = m88e1111_config_init_rgmii(phydev);
813 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
814 err = m88e1111_config_init_sgmii(phydev);
819 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
820 err = m88e1111_config_init_rtbi(phydev);
825 err = marvell_of_reg_init(phydev);
829 return genphy_soft_reset(phydev);
832 static int m88e1318_config_init(struct phy_device *phydev)
834 if (phy_interrupt_is_valid(phydev)) {
835 int err = phy_modify_paged(
836 phydev, MII_MARVELL_LED_PAGE,
837 MII_88E1318S_PHY_LED_TCR,
838 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
839 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
840 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
845 return marvell_config_init(phydev);
848 static int m88e1510_config_init(struct phy_device *phydev)
852 /* SGMII-to-Copper mode initialization */
853 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
855 err = marvell_set_page(phydev, 18);
859 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
860 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
861 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
862 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
866 /* PHY reset is necessary after changing MODE[2:0] */
867 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
868 MII_88E1510_GEN_CTRL_REG_1_RESET);
872 /* Reset page selection */
873 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
878 return m88e1318_config_init(phydev);
881 static int m88e1118_config_aneg(struct phy_device *phydev)
885 err = genphy_soft_reset(phydev);
889 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
893 err = genphy_config_aneg(phydev);
897 static int m88e1118_config_init(struct phy_device *phydev)
902 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
906 /* Enable 1000 Mbit */
907 err = phy_write(phydev, 0x15, 0x1070);
912 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
916 /* Adjust LED Control */
917 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
918 err = phy_write(phydev, 0x10, 0x1100);
920 err = phy_write(phydev, 0x10, 0x021e);
924 err = marvell_of_reg_init(phydev);
929 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
933 return genphy_soft_reset(phydev);
936 static int m88e1149_config_init(struct phy_device *phydev)
941 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
945 /* Enable 1000 Mbit */
946 err = phy_write(phydev, 0x15, 0x1048);
950 err = marvell_of_reg_init(phydev);
955 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
959 return genphy_soft_reset(phydev);
962 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
966 err = m88e1111_config_init_rgmii_delays(phydev);
970 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
971 err = phy_write(phydev, 0x1d, 0x0012);
975 err = phy_modify(phydev, 0x1e, 0x0fc0,
976 2 << 9 | /* 36 ohm */
977 2 << 6); /* 39 ohm */
981 err = phy_write(phydev, 0x1d, 0x3);
985 err = phy_write(phydev, 0x1e, 0x8000);
990 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
992 return m88e1111_config_init_hwcfg_mode(
993 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
994 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
997 static int m88e1145_config_init(struct phy_device *phydev)
1001 /* Take care of errata E0 & E1 */
1002 err = phy_write(phydev, 0x1d, 0x001b);
1006 err = phy_write(phydev, 0x1e, 0x418f);
1010 err = phy_write(phydev, 0x1d, 0x0016);
1014 err = phy_write(phydev, 0x1e, 0xa2da);
1018 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1019 err = m88e1145_config_init_rgmii(phydev);
1024 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1025 err = m88e1145_config_init_sgmii(phydev);
1030 err = marvell_of_reg_init(phydev);
1037 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1041 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1045 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1046 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1050 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1053 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1056 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1059 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1062 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1072 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1074 struct ethtool_eee eee;
1077 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1078 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1079 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1081 /* According to the Marvell data sheet EEE must be disabled for
1082 * Fast Link Down detection to work properly
1084 ret = phy_ethtool_get_eee(phydev, &eee);
1085 if (!ret && eee.eee_enabled) {
1086 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1091 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1092 else if (*msecs <= 15)
1093 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1094 else if (*msecs <= 30)
1095 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1097 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1099 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1101 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1102 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1106 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1107 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1110 static int m88e1540_get_tunable(struct phy_device *phydev,
1111 struct ethtool_tunable *tuna, void *data)
1114 case ETHTOOL_PHY_FAST_LINK_DOWN:
1115 return m88e1540_get_fld(phydev, data);
1121 static int m88e1540_set_tunable(struct phy_device *phydev,
1122 struct ethtool_tunable *tuna, const void *data)
1125 case ETHTOOL_PHY_FAST_LINK_DOWN:
1126 return m88e1540_set_fld(phydev, data);
1132 /* The VOD can be out of specification on link up. Poke an
1133 * undocumented register, in an undocumented page, with a magic value
1136 static int m88e6390_errata(struct phy_device *phydev)
1140 err = phy_write(phydev, MII_BMCR,
1141 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1145 usleep_range(300, 400);
1147 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1151 return genphy_soft_reset(phydev);
1154 static int m88e6390_config_aneg(struct phy_device *phydev)
1158 err = m88e6390_errata(phydev);
1162 return m88e1510_config_aneg(phydev);
1166 * fiber_lpa_mod_linkmode_lpa_t
1167 * @advertising: the linkmode advertisement settings
1168 * @lpa: value of the MII_LPA register for fiber link
1170 * A small helper function that translates MII_LPA bits to linkmode LP
1171 * advertisement settings. Other bits in advertising are left
1174 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1176 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1177 advertising, lpa & LPA_FIBER_1000HALF);
1179 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1180 advertising, lpa & LPA_FIBER_1000FULL);
1184 * marvell_update_link - update link status in real time in @phydev
1185 * @phydev: target phy_device struct
1187 * Description: Update the value in phydev->link to reflect the
1188 * current link value.
1190 static int marvell_update_link(struct phy_device *phydev, int fiber)
1194 /* Use the generic register for copper link, or specific
1195 * register for fiber case
1198 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1202 if ((status & REGISTER_LINK_STATUS) == 0)
1207 return genphy_update_link(phydev);
1213 static int marvell_read_status_page_an(struct phy_device *phydev,
1220 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1224 lpa = phy_read(phydev, MII_LPA);
1228 lpagb = phy_read(phydev, MII_STAT1000);
1232 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1233 phydev->duplex = DUPLEX_FULL;
1235 phydev->duplex = DUPLEX_HALF;
1237 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1239 phydev->asym_pause = 0;
1242 case MII_M1011_PHY_STATUS_1000:
1243 phydev->speed = SPEED_1000;
1246 case MII_M1011_PHY_STATUS_100:
1247 phydev->speed = SPEED_100;
1251 phydev->speed = SPEED_10;
1256 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
1257 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb);
1259 if (phydev->duplex == DUPLEX_FULL) {
1260 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1261 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1264 /* The fiber link is only 1000M capable */
1265 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1267 if (phydev->duplex == DUPLEX_FULL) {
1268 if (!(lpa & LPA_PAUSE_FIBER)) {
1270 phydev->asym_pause = 0;
1271 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1273 phydev->asym_pause = 1;
1276 phydev->asym_pause = 0;
1283 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1285 int bmcr = phy_read(phydev, MII_BMCR);
1290 if (bmcr & BMCR_FULLDPLX)
1291 phydev->duplex = DUPLEX_FULL;
1293 phydev->duplex = DUPLEX_HALF;
1295 if (bmcr & BMCR_SPEED1000)
1296 phydev->speed = SPEED_1000;
1297 else if (bmcr & BMCR_SPEED100)
1298 phydev->speed = SPEED_100;
1300 phydev->speed = SPEED_10;
1303 phydev->asym_pause = 0;
1304 linkmode_zero(phydev->lp_advertising);
1309 /* marvell_read_status_page
1312 * Check the link, then figure out the current state
1313 * by comparing what we advertise with what the link partner
1314 * advertises. Start by checking the gigabit possibilities,
1315 * then move on to 10/100.
1317 static int marvell_read_status_page(struct phy_device *phydev, int page)
1322 /* Detect and update the link, but return if there
1325 if (page == MII_MARVELL_FIBER_PAGE)
1330 err = marvell_update_link(phydev, fiber);
1334 if (phydev->autoneg == AUTONEG_ENABLE)
1335 err = marvell_read_status_page_an(phydev, fiber);
1337 err = marvell_read_status_page_fixed(phydev);
1342 /* marvell_read_status
1344 * Some Marvell's phys have two modes: fiber and copper.
1345 * Both need status checked.
1347 * First, check the fiber link and status.
1348 * If the fiber link is down, check the copper link and status which
1349 * will be the default value if both link are down.
1351 static int marvell_read_status(struct phy_device *phydev)
1355 /* Check the fiber mode first */
1356 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1357 phydev->supported) &&
1358 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1359 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1363 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1367 /* If the fiber link is up, it is the selected and
1368 * used link. In this case, we need to stay in the
1369 * fiber page. Please to be careful about that, avoid
1370 * to restore Copper page in other functions which
1371 * could break the behaviour for some fiber phy like
1377 /* If fiber link is down, check and save copper mode state */
1378 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1383 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1386 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1392 * Some Marvell's phys have two modes: fiber and copper.
1393 * Both need to be suspended
1395 static int marvell_suspend(struct phy_device *phydev)
1399 /* Suspend the fiber mode first */
1400 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1401 phydev->supported)) {
1402 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1406 /* With the page set, use the generic suspend */
1407 err = genphy_suspend(phydev);
1411 /* Then, the copper link */
1412 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1417 /* With the page set, use the generic suspend */
1418 return genphy_suspend(phydev);
1421 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1427 * Some Marvell's phys have two modes: fiber and copper.
1428 * Both need to be resumed
1430 static int marvell_resume(struct phy_device *phydev)
1434 /* Resume the fiber mode first */
1435 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1436 phydev->supported)) {
1437 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1441 /* With the page set, use the generic resume */
1442 err = genphy_resume(phydev);
1446 /* Then, the copper link */
1447 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1452 /* With the page set, use the generic resume */
1453 return genphy_resume(phydev);
1456 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1460 static int marvell_aneg_done(struct phy_device *phydev)
1462 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1464 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1467 static int m88e1121_did_interrupt(struct phy_device *phydev)
1471 imask = phy_read(phydev, MII_M1011_IEVENT);
1473 if (imask & MII_M1011_IMASK_INIT)
1479 static void m88e1318_get_wol(struct phy_device *phydev,
1480 struct ethtool_wolinfo *wol)
1482 int oldpage, ret = 0;
1484 wol->supported = WAKE_MAGIC;
1487 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1491 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1492 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1493 wol->wolopts |= WAKE_MAGIC;
1496 phy_restore_page(phydev, oldpage, ret);
1499 static int m88e1318_set_wol(struct phy_device *phydev,
1500 struct ethtool_wolinfo *wol)
1502 int err = 0, oldpage;
1504 oldpage = phy_save_page(phydev);
1508 if (wol->wolopts & WAKE_MAGIC) {
1509 /* Explicitly switch to page 0x00, just to be sure */
1510 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1514 /* If WOL event happened once, the LED[2] interrupt pin
1515 * will not be cleared unless we reading the interrupt status
1516 * register. If interrupts are in use, the normal interrupt
1517 * handling will clear the WOL event. Clear the WOL event
1518 * before enabling it if !phy_interrupt_is_valid()
1520 if (!phy_interrupt_is_valid(phydev))
1521 __phy_read(phydev, MII_M1011_IEVENT);
1523 /* Enable the WOL interrupt */
1524 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1525 MII_88E1318S_PHY_CSIER_WOL_EIE);
1529 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1533 /* Setup LED[2] as interrupt pin (active low) */
1534 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1535 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1536 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1537 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1541 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1545 /* Store the device address for the magic packet */
1546 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1547 ((phydev->attached_dev->dev_addr[5] << 8) |
1548 phydev->attached_dev->dev_addr[4]));
1551 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1552 ((phydev->attached_dev->dev_addr[3] << 8) |
1553 phydev->attached_dev->dev_addr[2]));
1556 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1557 ((phydev->attached_dev->dev_addr[1] << 8) |
1558 phydev->attached_dev->dev_addr[0]));
1562 /* Clear WOL status and enable magic packet matching */
1563 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1564 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1565 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1569 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1573 /* Clear WOL status and disable magic packet matching */
1574 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1575 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1576 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1582 return phy_restore_page(phydev, oldpage, err);
1585 static int marvell_get_sset_count(struct phy_device *phydev)
1587 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1589 return ARRAY_SIZE(marvell_hw_stats);
1591 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1594 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1598 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1599 strlcpy(data + i * ETH_GSTRING_LEN,
1600 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1604 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1606 struct marvell_hw_stat stat = marvell_hw_stats[i];
1607 struct marvell_priv *priv = phydev->priv;
1611 val = phy_read_paged(phydev, stat.page, stat.reg);
1615 val = val & ((1 << stat.bits) - 1);
1616 priv->stats[i] += val;
1617 ret = priv->stats[i];
1623 static void marvell_get_stats(struct phy_device *phydev,
1624 struct ethtool_stats *stats, u64 *data)
1628 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1629 data[i] = marvell_get_stat(phydev, i);
1633 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1641 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1645 /* Enable temperature sensor */
1646 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1650 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1651 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1655 /* Wait for temperature to stabilize */
1656 usleep_range(10000, 12000);
1658 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1664 /* Disable temperature sensor */
1665 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1666 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1670 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1673 return phy_restore_page(phydev, oldpage, ret);
1676 static int m88e1121_hwmon_read(struct device *dev,
1677 enum hwmon_sensor_types type,
1678 u32 attr, int channel, long *temp)
1680 struct phy_device *phydev = dev_get_drvdata(dev);
1684 case hwmon_temp_input:
1685 err = m88e1121_get_temp(phydev, temp);
1694 static umode_t m88e1121_hwmon_is_visible(const void *data,
1695 enum hwmon_sensor_types type,
1696 u32 attr, int channel)
1698 if (type != hwmon_temp)
1702 case hwmon_temp_input:
1709 static u32 m88e1121_hwmon_chip_config[] = {
1710 HWMON_C_REGISTER_TZ,
1714 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1716 .config = m88e1121_hwmon_chip_config,
1719 static u32 m88e1121_hwmon_temp_config[] = {
1724 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1726 .config = m88e1121_hwmon_temp_config,
1729 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1730 &m88e1121_hwmon_chip,
1731 &m88e1121_hwmon_temp,
1735 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1736 .is_visible = m88e1121_hwmon_is_visible,
1737 .read = m88e1121_hwmon_read,
1740 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1741 .ops = &m88e1121_hwmon_hwmon_ops,
1742 .info = m88e1121_hwmon_info,
1745 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1751 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1752 MII_88E1510_TEMP_SENSOR);
1756 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1761 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1767 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1768 MII_88E1121_MISC_TEST);
1772 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1773 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1780 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1783 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1785 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1786 MII_88E1121_MISC_TEST,
1787 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1788 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1791 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1797 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1798 MII_88E1121_MISC_TEST);
1802 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1807 static int m88e1510_hwmon_read(struct device *dev,
1808 enum hwmon_sensor_types type,
1809 u32 attr, int channel, long *temp)
1811 struct phy_device *phydev = dev_get_drvdata(dev);
1815 case hwmon_temp_input:
1816 err = m88e1510_get_temp(phydev, temp);
1818 case hwmon_temp_crit:
1819 err = m88e1510_get_temp_critical(phydev, temp);
1821 case hwmon_temp_max_alarm:
1822 err = m88e1510_get_temp_alarm(phydev, temp);
1831 static int m88e1510_hwmon_write(struct device *dev,
1832 enum hwmon_sensor_types type,
1833 u32 attr, int channel, long temp)
1835 struct phy_device *phydev = dev_get_drvdata(dev);
1839 case hwmon_temp_crit:
1840 err = m88e1510_set_temp_critical(phydev, temp);
1848 static umode_t m88e1510_hwmon_is_visible(const void *data,
1849 enum hwmon_sensor_types type,
1850 u32 attr, int channel)
1852 if (type != hwmon_temp)
1856 case hwmon_temp_input:
1857 case hwmon_temp_max_alarm:
1859 case hwmon_temp_crit:
1866 static u32 m88e1510_hwmon_temp_config[] = {
1867 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1871 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1873 .config = m88e1510_hwmon_temp_config,
1876 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1877 &m88e1121_hwmon_chip,
1878 &m88e1510_hwmon_temp,
1882 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1883 .is_visible = m88e1510_hwmon_is_visible,
1884 .read = m88e1510_hwmon_read,
1885 .write = m88e1510_hwmon_write,
1888 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1889 .ops = &m88e1510_hwmon_hwmon_ops,
1890 .info = m88e1510_hwmon_info,
1893 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1902 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1906 /* Enable temperature sensor */
1907 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1911 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1912 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1913 MII_88E6390_MISC_TEST_SAMPLE_1S;
1915 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1919 /* Wait for temperature to stabilize */
1920 usleep_range(10000, 12000);
1922 /* Reading the temperature sense has an errata. You need to read
1923 * a number of times and take an average.
1925 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1926 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1929 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1932 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1933 *temp = (sum - 75) * 1000;
1935 /* Disable temperature sensor */
1936 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1940 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1941 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1943 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1946 phy_restore_page(phydev, oldpage, ret);
1951 static int m88e6390_hwmon_read(struct device *dev,
1952 enum hwmon_sensor_types type,
1953 u32 attr, int channel, long *temp)
1955 struct phy_device *phydev = dev_get_drvdata(dev);
1959 case hwmon_temp_input:
1960 err = m88e6390_get_temp(phydev, temp);
1969 static umode_t m88e6390_hwmon_is_visible(const void *data,
1970 enum hwmon_sensor_types type,
1971 u32 attr, int channel)
1973 if (type != hwmon_temp)
1977 case hwmon_temp_input:
1984 static u32 m88e6390_hwmon_temp_config[] = {
1989 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1991 .config = m88e6390_hwmon_temp_config,
1994 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1995 &m88e1121_hwmon_chip,
1996 &m88e6390_hwmon_temp,
2000 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2001 .is_visible = m88e6390_hwmon_is_visible,
2002 .read = m88e6390_hwmon_read,
2005 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2006 .ops = &m88e6390_hwmon_hwmon_ops,
2007 .info = m88e6390_hwmon_info,
2010 static int marvell_hwmon_name(struct phy_device *phydev)
2012 struct marvell_priv *priv = phydev->priv;
2013 struct device *dev = &phydev->mdio.dev;
2014 const char *devname = dev_name(dev);
2015 size_t len = strlen(devname);
2018 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2019 if (!priv->hwmon_name)
2022 for (i = j = 0; i < len && devname[i]; i++) {
2023 if (isalnum(devname[i]))
2024 priv->hwmon_name[j++] = devname[i];
2030 static int marvell_hwmon_probe(struct phy_device *phydev,
2031 const struct hwmon_chip_info *chip)
2033 struct marvell_priv *priv = phydev->priv;
2034 struct device *dev = &phydev->mdio.dev;
2037 err = marvell_hwmon_name(phydev);
2041 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2042 dev, priv->hwmon_name, phydev, chip, NULL);
2044 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2047 static int m88e1121_hwmon_probe(struct phy_device *phydev)
2049 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2052 static int m88e1510_hwmon_probe(struct phy_device *phydev)
2054 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2057 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2059 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2062 static int m88e1121_hwmon_probe(struct phy_device *phydev)
2067 static int m88e1510_hwmon_probe(struct phy_device *phydev)
2072 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2078 static int marvell_probe(struct phy_device *phydev)
2080 struct marvell_priv *priv;
2082 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2086 phydev->priv = priv;
2091 static int m88e1121_probe(struct phy_device *phydev)
2095 err = marvell_probe(phydev);
2099 return m88e1121_hwmon_probe(phydev);
2102 static int m88e1510_probe(struct phy_device *phydev)
2106 err = marvell_probe(phydev);
2110 return m88e1510_hwmon_probe(phydev);
2113 static int m88e6390_probe(struct phy_device *phydev)
2117 err = marvell_probe(phydev);
2121 return m88e6390_hwmon_probe(phydev);
2124 static struct phy_driver marvell_drivers[] = {
2126 .phy_id = MARVELL_PHY_ID_88E1101,
2127 .phy_id_mask = MARVELL_PHY_ID_MASK,
2128 .name = "Marvell 88E1101",
2129 /* PHY_GBIT_FEATURES */
2130 .probe = marvell_probe,
2131 .config_init = &marvell_config_init,
2132 .config_aneg = &m88e1101_config_aneg,
2133 .ack_interrupt = &marvell_ack_interrupt,
2134 .config_intr = &marvell_config_intr,
2135 .resume = &genphy_resume,
2136 .suspend = &genphy_suspend,
2137 .read_page = marvell_read_page,
2138 .write_page = marvell_write_page,
2139 .get_sset_count = marvell_get_sset_count,
2140 .get_strings = marvell_get_strings,
2141 .get_stats = marvell_get_stats,
2144 .phy_id = MARVELL_PHY_ID_88E1112,
2145 .phy_id_mask = MARVELL_PHY_ID_MASK,
2146 .name = "Marvell 88E1112",
2147 /* PHY_GBIT_FEATURES */
2148 .probe = marvell_probe,
2149 .config_init = &m88e1111_config_init,
2150 .config_aneg = &marvell_config_aneg,
2151 .ack_interrupt = &marvell_ack_interrupt,
2152 .config_intr = &marvell_config_intr,
2153 .resume = &genphy_resume,
2154 .suspend = &genphy_suspend,
2155 .read_page = marvell_read_page,
2156 .write_page = marvell_write_page,
2157 .get_sset_count = marvell_get_sset_count,
2158 .get_strings = marvell_get_strings,
2159 .get_stats = marvell_get_stats,
2162 .phy_id = MARVELL_PHY_ID_88E1111,
2163 .phy_id_mask = MARVELL_PHY_ID_MASK,
2164 .name = "Marvell 88E1111",
2165 /* PHY_GBIT_FEATURES */
2166 .probe = marvell_probe,
2167 .config_init = &m88e1111_config_init,
2168 .config_aneg = &marvell_config_aneg,
2169 .read_status = &marvell_read_status,
2170 .ack_interrupt = &marvell_ack_interrupt,
2171 .config_intr = &marvell_config_intr,
2172 .resume = &genphy_resume,
2173 .suspend = &genphy_suspend,
2174 .read_page = marvell_read_page,
2175 .write_page = marvell_write_page,
2176 .get_sset_count = marvell_get_sset_count,
2177 .get_strings = marvell_get_strings,
2178 .get_stats = marvell_get_stats,
2181 .phy_id = MARVELL_PHY_ID_88E1118,
2182 .phy_id_mask = MARVELL_PHY_ID_MASK,
2183 .name = "Marvell 88E1118",
2184 /* PHY_GBIT_FEATURES */
2185 .probe = marvell_probe,
2186 .config_init = &m88e1118_config_init,
2187 .config_aneg = &m88e1118_config_aneg,
2188 .ack_interrupt = &marvell_ack_interrupt,
2189 .config_intr = &marvell_config_intr,
2190 .resume = &genphy_resume,
2191 .suspend = &genphy_suspend,
2192 .read_page = marvell_read_page,
2193 .write_page = marvell_write_page,
2194 .get_sset_count = marvell_get_sset_count,
2195 .get_strings = marvell_get_strings,
2196 .get_stats = marvell_get_stats,
2199 .phy_id = MARVELL_PHY_ID_88E1121R,
2200 .phy_id_mask = MARVELL_PHY_ID_MASK,
2201 .name = "Marvell 88E1121R",
2202 /* PHY_GBIT_FEATURES */
2203 .probe = &m88e1121_probe,
2204 .config_init = &marvell_config_init,
2205 .config_aneg = &m88e1121_config_aneg,
2206 .read_status = &marvell_read_status,
2207 .ack_interrupt = &marvell_ack_interrupt,
2208 .config_intr = &marvell_config_intr,
2209 .did_interrupt = &m88e1121_did_interrupt,
2210 .resume = &genphy_resume,
2211 .suspend = &genphy_suspend,
2212 .read_page = marvell_read_page,
2213 .write_page = marvell_write_page,
2214 .get_sset_count = marvell_get_sset_count,
2215 .get_strings = marvell_get_strings,
2216 .get_stats = marvell_get_stats,
2219 .phy_id = MARVELL_PHY_ID_88E1318S,
2220 .phy_id_mask = MARVELL_PHY_ID_MASK,
2221 .name = "Marvell 88E1318S",
2222 /* PHY_GBIT_FEATURES */
2223 .probe = marvell_probe,
2224 .config_init = &m88e1318_config_init,
2225 .config_aneg = &m88e1318_config_aneg,
2226 .read_status = &marvell_read_status,
2227 .ack_interrupt = &marvell_ack_interrupt,
2228 .config_intr = &marvell_config_intr,
2229 .did_interrupt = &m88e1121_did_interrupt,
2230 .get_wol = &m88e1318_get_wol,
2231 .set_wol = &m88e1318_set_wol,
2232 .resume = &genphy_resume,
2233 .suspend = &genphy_suspend,
2234 .read_page = marvell_read_page,
2235 .write_page = marvell_write_page,
2236 .get_sset_count = marvell_get_sset_count,
2237 .get_strings = marvell_get_strings,
2238 .get_stats = marvell_get_stats,
2241 .phy_id = MARVELL_PHY_ID_88E1145,
2242 .phy_id_mask = MARVELL_PHY_ID_MASK,
2243 .name = "Marvell 88E1145",
2244 /* PHY_GBIT_FEATURES */
2245 .probe = marvell_probe,
2246 .config_init = &m88e1145_config_init,
2247 .config_aneg = &m88e1101_config_aneg,
2248 .read_status = &genphy_read_status,
2249 .ack_interrupt = &marvell_ack_interrupt,
2250 .config_intr = &marvell_config_intr,
2251 .resume = &genphy_resume,
2252 .suspend = &genphy_suspend,
2253 .read_page = marvell_read_page,
2254 .write_page = marvell_write_page,
2255 .get_sset_count = marvell_get_sset_count,
2256 .get_strings = marvell_get_strings,
2257 .get_stats = marvell_get_stats,
2260 .phy_id = MARVELL_PHY_ID_88E1149R,
2261 .phy_id_mask = MARVELL_PHY_ID_MASK,
2262 .name = "Marvell 88E1149R",
2263 /* PHY_GBIT_FEATURES */
2264 .probe = marvell_probe,
2265 .config_init = &m88e1149_config_init,
2266 .config_aneg = &m88e1118_config_aneg,
2267 .ack_interrupt = &marvell_ack_interrupt,
2268 .config_intr = &marvell_config_intr,
2269 .resume = &genphy_resume,
2270 .suspend = &genphy_suspend,
2271 .read_page = marvell_read_page,
2272 .write_page = marvell_write_page,
2273 .get_sset_count = marvell_get_sset_count,
2274 .get_strings = marvell_get_strings,
2275 .get_stats = marvell_get_stats,
2278 .phy_id = MARVELL_PHY_ID_88E1240,
2279 .phy_id_mask = MARVELL_PHY_ID_MASK,
2280 .name = "Marvell 88E1240",
2281 /* PHY_GBIT_FEATURES */
2282 .probe = marvell_probe,
2283 .config_init = &m88e1111_config_init,
2284 .config_aneg = &marvell_config_aneg,
2285 .ack_interrupt = &marvell_ack_interrupt,
2286 .config_intr = &marvell_config_intr,
2287 .resume = &genphy_resume,
2288 .suspend = &genphy_suspend,
2289 .read_page = marvell_read_page,
2290 .write_page = marvell_write_page,
2291 .get_sset_count = marvell_get_sset_count,
2292 .get_strings = marvell_get_strings,
2293 .get_stats = marvell_get_stats,
2296 .phy_id = MARVELL_PHY_ID_88E1116R,
2297 .phy_id_mask = MARVELL_PHY_ID_MASK,
2298 .name = "Marvell 88E1116R",
2299 /* PHY_GBIT_FEATURES */
2300 .probe = marvell_probe,
2301 .config_init = &m88e1116r_config_init,
2302 .ack_interrupt = &marvell_ack_interrupt,
2303 .config_intr = &marvell_config_intr,
2304 .resume = &genphy_resume,
2305 .suspend = &genphy_suspend,
2306 .read_page = marvell_read_page,
2307 .write_page = marvell_write_page,
2308 .get_sset_count = marvell_get_sset_count,
2309 .get_strings = marvell_get_strings,
2310 .get_stats = marvell_get_stats,
2313 .phy_id = MARVELL_PHY_ID_88E1510,
2314 .phy_id_mask = MARVELL_PHY_ID_MASK,
2315 .name = "Marvell 88E1510",
2316 .features = PHY_GBIT_FIBRE_FEATURES,
2317 .probe = &m88e1510_probe,
2318 .config_init = &m88e1510_config_init,
2319 .config_aneg = &m88e1510_config_aneg,
2320 .read_status = &marvell_read_status,
2321 .ack_interrupt = &marvell_ack_interrupt,
2322 .config_intr = &marvell_config_intr,
2323 .did_interrupt = &m88e1121_did_interrupt,
2324 .get_wol = &m88e1318_get_wol,
2325 .set_wol = &m88e1318_set_wol,
2326 .resume = &marvell_resume,
2327 .suspend = &marvell_suspend,
2328 .read_page = marvell_read_page,
2329 .write_page = marvell_write_page,
2330 .get_sset_count = marvell_get_sset_count,
2331 .get_strings = marvell_get_strings,
2332 .get_stats = marvell_get_stats,
2333 .set_loopback = genphy_loopback,
2336 .phy_id = MARVELL_PHY_ID_88E1540,
2337 .phy_id_mask = MARVELL_PHY_ID_MASK,
2338 .name = "Marvell 88E1540",
2339 /* PHY_GBIT_FEATURES */
2340 .probe = m88e1510_probe,
2341 .config_init = &marvell_config_init,
2342 .config_aneg = &m88e1510_config_aneg,
2343 .read_status = &marvell_read_status,
2344 .ack_interrupt = &marvell_ack_interrupt,
2345 .config_intr = &marvell_config_intr,
2346 .did_interrupt = &m88e1121_did_interrupt,
2347 .resume = &genphy_resume,
2348 .suspend = &genphy_suspend,
2349 .read_page = marvell_read_page,
2350 .write_page = marvell_write_page,
2351 .get_sset_count = marvell_get_sset_count,
2352 .get_strings = marvell_get_strings,
2353 .get_stats = marvell_get_stats,
2354 .get_tunable = m88e1540_get_tunable,
2355 .set_tunable = m88e1540_set_tunable,
2358 .phy_id = MARVELL_PHY_ID_88E1545,
2359 .phy_id_mask = MARVELL_PHY_ID_MASK,
2360 .name = "Marvell 88E1545",
2361 .probe = m88e1510_probe,
2362 /* PHY_GBIT_FEATURES */
2363 .config_init = &marvell_config_init,
2364 .config_aneg = &m88e1510_config_aneg,
2365 .read_status = &marvell_read_status,
2366 .ack_interrupt = &marvell_ack_interrupt,
2367 .config_intr = &marvell_config_intr,
2368 .did_interrupt = &m88e1121_did_interrupt,
2369 .resume = &genphy_resume,
2370 .suspend = &genphy_suspend,
2371 .read_page = marvell_read_page,
2372 .write_page = marvell_write_page,
2373 .get_sset_count = marvell_get_sset_count,
2374 .get_strings = marvell_get_strings,
2375 .get_stats = marvell_get_stats,
2378 .phy_id = MARVELL_PHY_ID_88E3016,
2379 .phy_id_mask = MARVELL_PHY_ID_MASK,
2380 .name = "Marvell 88E3016",
2381 /* PHY_BASIC_FEATURES */
2382 .probe = marvell_probe,
2383 .config_init = &m88e3016_config_init,
2384 .aneg_done = &marvell_aneg_done,
2385 .read_status = &marvell_read_status,
2386 .ack_interrupt = &marvell_ack_interrupt,
2387 .config_intr = &marvell_config_intr,
2388 .did_interrupt = &m88e1121_did_interrupt,
2389 .resume = &genphy_resume,
2390 .suspend = &genphy_suspend,
2391 .read_page = marvell_read_page,
2392 .write_page = marvell_write_page,
2393 .get_sset_count = marvell_get_sset_count,
2394 .get_strings = marvell_get_strings,
2395 .get_stats = marvell_get_stats,
2398 .phy_id = MARVELL_PHY_ID_88E6390,
2399 .phy_id_mask = MARVELL_PHY_ID_MASK,
2400 .name = "Marvell 88E6390",
2401 /* PHY_GBIT_FEATURES */
2402 .probe = m88e6390_probe,
2403 .config_init = &marvell_config_init,
2404 .config_aneg = &m88e6390_config_aneg,
2405 .read_status = &marvell_read_status,
2406 .ack_interrupt = &marvell_ack_interrupt,
2407 .config_intr = &marvell_config_intr,
2408 .did_interrupt = &m88e1121_did_interrupt,
2409 .resume = &genphy_resume,
2410 .suspend = &genphy_suspend,
2411 .read_page = marvell_read_page,
2412 .write_page = marvell_write_page,
2413 .get_sset_count = marvell_get_sset_count,
2414 .get_strings = marvell_get_strings,
2415 .get_stats = marvell_get_stats,
2416 .get_tunable = m88e1540_get_tunable,
2417 .set_tunable = m88e1540_set_tunable,
2421 module_phy_driver(marvell_drivers);
2423 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2424 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2425 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2426 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2427 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2428 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2429 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2430 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2431 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2432 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2433 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2434 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2435 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2436 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2437 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2438 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2442 MODULE_DEVICE_TABLE(mdio, marvell_tbl);