1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/net/phy/marvell.c
5 * Driver for Marvell PHYs
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/phy.h>
31 #include <linux/marvell_phy.h>
32 #include <linux/bitfield.h>
37 #include <linux/uaccess.h>
39 #define MII_MARVELL_PHY_PAGE 22
40 #define MII_MARVELL_COPPER_PAGE 0x00
41 #define MII_MARVELL_FIBER_PAGE 0x01
42 #define MII_MARVELL_MSCR_PAGE 0x02
43 #define MII_MARVELL_LED_PAGE 0x03
44 #define MII_MARVELL_MISC_TEST_PAGE 0x06
45 #define MII_MARVELL_WOL_PAGE 0x11
47 #define MII_M1011_IEVENT 0x13
48 #define MII_M1011_IEVENT_CLEAR 0x0000
50 #define MII_M1011_IMASK 0x12
51 #define MII_M1011_IMASK_INIT 0x6400
52 #define MII_M1011_IMASK_CLEAR 0x0000
54 #define MII_M1011_PHY_SCR 0x10
55 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
56 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
57 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
58 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
59 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
60 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
62 #define MII_M1011_PHY_SSR 0x11
63 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
65 #define MII_M1111_PHY_LED_CONTROL 0x18
66 #define MII_M1111_PHY_LED_DIRECT 0x4100
67 #define MII_M1111_PHY_LED_COMBINE 0x411c
68 #define MII_M1111_PHY_EXT_CR 0x14
69 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
70 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
71 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
72 #define MII_M1111_RGMII_RX_DELAY BIT(7)
73 #define MII_M1111_RGMII_TX_DELAY BIT(1)
74 #define MII_M1111_PHY_EXT_SR 0x1b
76 #define MII_M1111_HWCFG_MODE_MASK 0xf
77 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
78 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
79 #define MII_M1111_HWCFG_MODE_RTBI 0x7
80 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
81 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
82 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
83 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
85 #define MII_88E1121_PHY_MSCR_REG 21
86 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
87 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
88 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
90 #define MII_88E1121_MISC_TEST 0x1a
91 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
92 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
93 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
94 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
95 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
96 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
98 #define MII_88E1510_TEMP_SENSOR 0x1b
99 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
101 #define MII_88E1540_COPPER_CTRL3 0x1a
102 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
103 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
104 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
105 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
106 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
107 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
109 #define MII_88E6390_MISC_TEST 0x1b
110 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
111 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
112 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
113 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
114 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
116 #define MII_88E6390_TEMP_SENSOR 0x1c
117 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
118 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
120 #define MII_88E1318S_PHY_MSCR1_REG 16
121 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
123 /* Copper Specific Interrupt Enable Register */
124 #define MII_88E1318S_PHY_CSIER 0x12
125 /* WOL Event Interrupt Enable */
126 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
128 /* LED Timer Control Register */
129 #define MII_88E1318S_PHY_LED_TCR 0x12
130 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
131 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
132 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
134 /* Magic Packet MAC address registers */
135 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
136 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
137 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
139 #define MII_88E1318S_PHY_WOL_CTRL 0x10
140 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
141 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
143 #define MII_PHY_LED_CTRL 16
144 #define MII_88E1121_PHY_LED_DEF 0x0030
145 #define MII_88E1510_PHY_LED_DEF 0x1177
146 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
148 #define MII_M1011_PHY_STATUS 0x11
149 #define MII_M1011_PHY_STATUS_1000 0x8000
150 #define MII_M1011_PHY_STATUS_100 0x4000
151 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
152 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
153 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
154 #define MII_M1011_PHY_STATUS_LINK 0x0400
156 #define MII_88E3016_PHY_SPEC_CTRL 0x10
157 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
158 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
160 #define MII_88E1510_GEN_CTRL_REG_1 0x14
161 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
162 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
163 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
165 #define LPA_FIBER_1000HALF 0x40
166 #define LPA_FIBER_1000FULL 0x20
168 #define LPA_PAUSE_FIBER 0x180
169 #define LPA_PAUSE_ASYM_FIBER 0x100
171 #define ADVERTISE_FIBER_1000HALF 0x40
172 #define ADVERTISE_FIBER_1000FULL 0x20
174 #define ADVERTISE_PAUSE_FIBER 0x180
175 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
177 #define REGISTER_LINK_STATUS 0x400
178 #define NB_FIBER_STATS 1
180 MODULE_DESCRIPTION("Marvell PHY driver");
181 MODULE_AUTHOR("Andy Fleming");
182 MODULE_LICENSE("GPL");
184 struct marvell_hw_stat {
191 static struct marvell_hw_stat marvell_hw_stats[] = {
192 { "phy_receive_errors_copper", 0, 21, 16},
193 { "phy_idle_errors", 0, 10, 8 },
194 { "phy_receive_errors_fiber", 1, 21, 16},
197 struct marvell_priv {
198 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
200 struct device *hwmon_dev;
203 static int marvell_read_page(struct phy_device *phydev)
205 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
208 static int marvell_write_page(struct phy_device *phydev, int page)
210 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
213 static int marvell_set_page(struct phy_device *phydev, int page)
215 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
218 static int marvell_ack_interrupt(struct phy_device *phydev)
222 /* Clear the interrupts by reading the reg */
223 err = phy_read(phydev, MII_M1011_IEVENT);
231 static int marvell_config_intr(struct phy_device *phydev)
235 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
236 err = phy_write(phydev, MII_M1011_IMASK,
237 MII_M1011_IMASK_INIT);
239 err = phy_write(phydev, MII_M1011_IMASK,
240 MII_M1011_IMASK_CLEAR);
245 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
251 /* get the current settings */
252 reg = phy_read(phydev, MII_M1011_PHY_SCR);
257 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
260 val |= MII_M1011_PHY_SCR_MDI;
263 val |= MII_M1011_PHY_SCR_MDI_X;
265 case ETH_TP_MDI_AUTO:
266 case ETH_TP_MDI_INVALID:
268 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
273 /* Set the new polarity value in the register */
274 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
282 static int marvell_config_aneg(struct phy_device *phydev)
287 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
293 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
294 MII_M1111_PHY_LED_DIRECT);
298 err = genphy_config_aneg(phydev);
302 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
303 /* A write to speed/duplex bits (that is performed by
304 * genphy_config_aneg() call above) must be followed by
305 * a software reset. Otherwise, the write has no effect.
307 err = genphy_soft_reset(phydev);
315 static int m88e1101_config_aneg(struct phy_device *phydev)
319 /* This Marvell PHY has an errata which requires
320 * that certain registers get written in order
321 * to restart autonegotiation
323 err = genphy_soft_reset(phydev);
327 err = phy_write(phydev, 0x1d, 0x1f);
331 err = phy_write(phydev, 0x1e, 0x200c);
335 err = phy_write(phydev, 0x1d, 0x5);
339 err = phy_write(phydev, 0x1e, 0);
343 err = phy_write(phydev, 0x1e, 0x100);
347 return marvell_config_aneg(phydev);
350 #ifdef CONFIG_OF_MDIO
351 /* Set and/or override some configuration registers based on the
352 * marvell,reg-init property stored in the of_node for the phydev.
354 * marvell,reg-init = <reg-page reg mask value>,...;
356 * There may be one or more sets of <reg-page reg mask value>:
358 * reg-page: which register bank to use.
360 * mask: if non-zero, ANDed with existing register value.
361 * value: ORed with the masked value and written to the regiser.
364 static int marvell_of_reg_init(struct phy_device *phydev)
367 int len, i, saved_page, current_page, ret = 0;
369 if (!phydev->mdio.dev.of_node)
372 paddr = of_get_property(phydev->mdio.dev.of_node,
373 "marvell,reg-init", &len);
374 if (!paddr || len < (4 * sizeof(*paddr)))
377 saved_page = phy_save_page(phydev);
380 current_page = saved_page;
382 len /= sizeof(*paddr);
383 for (i = 0; i < len - 3; i += 4) {
384 u16 page = be32_to_cpup(paddr + i);
385 u16 reg = be32_to_cpup(paddr + i + 1);
386 u16 mask = be32_to_cpup(paddr + i + 2);
387 u16 val_bits = be32_to_cpup(paddr + i + 3);
390 if (page != current_page) {
392 ret = marvell_write_page(phydev, page);
399 val = __phy_read(phydev, reg);
408 ret = __phy_write(phydev, reg, val);
413 return phy_restore_page(phydev, saved_page, ret);
416 static int marvell_of_reg_init(struct phy_device *phydev)
420 #endif /* CONFIG_OF_MDIO */
422 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
426 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
427 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
428 MII_88E1121_PHY_MSCR_TX_DELAY;
429 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
430 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
431 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
432 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
436 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
437 MII_88E1121_PHY_MSCR_REG,
438 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
441 static int m88e1121_config_aneg(struct phy_device *phydev)
446 if (phy_interface_is_rgmii(phydev)) {
447 err = m88e1121_config_aneg_rgmii_delays(phydev);
452 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
458 err = genphy_config_aneg(phydev);
462 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
463 /* A software reset is used to ensure a "commit" of the
466 err = genphy_soft_reset(phydev);
474 static int m88e1318_config_aneg(struct phy_device *phydev)
478 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
479 MII_88E1318S_PHY_MSCR1_REG,
480 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
484 return m88e1121_config_aneg(phydev);
488 * linkmode_adv_to_fiber_adv_t
489 * @advertise: the linkmode advertisement settings
491 * A small helper function that translates linkmode advertisement
492 * settings to phy autonegotiation advertisements for the MII_ADV
493 * register for fiber link.
495 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
499 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
500 result |= ADVERTISE_FIBER_1000HALF;
501 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
502 result |= ADVERTISE_FIBER_1000FULL;
504 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
505 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
506 result |= LPA_PAUSE_ASYM_FIBER;
507 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
508 result |= (ADVERTISE_PAUSE_FIBER
509 & (~ADVERTISE_PAUSE_ASYM_FIBER));
515 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
516 * @phydev: target phy_device struct
518 * Description: If auto-negotiation is enabled, we configure the
519 * advertising, and then restart auto-negotiation. If it is not
520 * enabled, then we write the BMCR. Adapted for fiber link in
521 * some Marvell's devices.
523 static int marvell_config_aneg_fiber(struct phy_device *phydev)
529 if (phydev->autoneg != AUTONEG_ENABLE)
530 return genphy_setup_forced(phydev);
532 /* Only allow advertising what this PHY supports */
533 linkmode_and(phydev->advertising, phydev->advertising,
536 /* Setup fiber advertisement */
537 adv = phy_read(phydev, MII_ADVERTISE);
542 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
544 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
547 err = phy_write(phydev, MII_ADVERTISE, adv);
555 /* Advertisement hasn't changed, but maybe aneg was never on to
556 * begin with? Or maybe phy was isolated?
558 int ctl = phy_read(phydev, MII_BMCR);
563 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
564 changed = 1; /* do restart aneg */
567 /* Only restart aneg if we are advertising something different
568 * than we were before.
571 changed = genphy_restart_aneg(phydev);
576 static int m88e1510_config_aneg(struct phy_device *phydev)
580 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
584 /* Configure the copper link first */
585 err = m88e1318_config_aneg(phydev);
589 /* Do not touch the fiber page if we're in copper->sgmii mode */
590 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
593 /* Then the fiber link */
594 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
598 err = marvell_config_aneg_fiber(phydev);
602 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
605 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
609 static void marvell_config_led(struct phy_device *phydev)
614 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
615 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
616 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
617 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
618 def_config = MII_88E1121_PHY_LED_DEF;
620 /* Default PHY LED config:
621 * LED[0] .. 1000Mbps Link
622 * LED[1] .. 100Mbps Link
623 * LED[2] .. Blink, Activity
625 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
626 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
627 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
629 def_config = MII_88E1510_PHY_LED_DEF;
635 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
638 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
641 static int marvell_config_init(struct phy_device *phydev)
643 /* Set defalut LED */
644 marvell_config_led(phydev);
646 /* Set registers from marvell,reg-init DT property */
647 return marvell_of_reg_init(phydev);
650 static int m88e3016_config_init(struct phy_device *phydev)
654 /* Enable Scrambler and Auto-Crossover */
655 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
656 MII_88E3016_DISABLE_SCRAMBLER,
657 MII_88E3016_AUTO_MDIX_CROSSOVER);
661 return marvell_config_init(phydev);
664 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
666 int fibre_copper_auto)
668 if (fibre_copper_auto)
669 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
671 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
672 MII_M1111_HWCFG_MODE_MASK |
673 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
674 MII_M1111_HWCFG_FIBER_COPPER_RES,
678 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
682 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
683 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
684 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
685 delay = MII_M1111_RGMII_RX_DELAY;
686 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
687 delay = MII_M1111_RGMII_TX_DELAY;
692 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
693 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
697 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
702 err = m88e1111_config_init_rgmii_delays(phydev);
706 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
710 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
712 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
713 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
715 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
717 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
720 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
724 err = m88e1111_config_init_hwcfg_mode(
726 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
727 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
731 /* make sure copper is selected */
732 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
735 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
739 err = m88e1111_config_init_rgmii_delays(phydev);
743 err = m88e1111_config_init_hwcfg_mode(
745 MII_M1111_HWCFG_MODE_RTBI,
746 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
751 err = genphy_soft_reset(phydev);
755 return m88e1111_config_init_hwcfg_mode(
757 MII_M1111_HWCFG_MODE_RTBI,
758 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
761 static int m88e1111_config_init(struct phy_device *phydev)
765 if (phy_interface_is_rgmii(phydev)) {
766 err = m88e1111_config_init_rgmii(phydev);
771 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
772 err = m88e1111_config_init_sgmii(phydev);
777 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
778 err = m88e1111_config_init_rtbi(phydev);
783 err = marvell_of_reg_init(phydev);
787 return genphy_soft_reset(phydev);
790 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
792 int val, cnt, enable;
794 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
798 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
799 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
801 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
806 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
810 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
814 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
815 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
817 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
818 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
820 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
821 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
822 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
826 static int m88e1111_get_tunable(struct phy_device *phydev,
827 struct ethtool_tunable *tuna, void *data)
830 case ETHTOOL_PHY_DOWNSHIFT:
831 return m88e1111_get_downshift(phydev, data);
837 static int m88e1111_set_tunable(struct phy_device *phydev,
838 struct ethtool_tunable *tuna, const void *data)
841 case ETHTOOL_PHY_DOWNSHIFT:
842 return m88e1111_set_downshift(phydev, *(const u8 *)data);
848 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
850 int val, cnt, enable;
852 val = phy_read(phydev, MII_M1011_PHY_SCR);
856 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
857 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
859 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
864 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
868 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
872 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
873 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
875 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
876 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
878 return phy_modify(phydev, MII_M1011_PHY_SCR,
879 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
880 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
884 static int m88e1011_get_tunable(struct phy_device *phydev,
885 struct ethtool_tunable *tuna, void *data)
888 case ETHTOOL_PHY_DOWNSHIFT:
889 return m88e1011_get_downshift(phydev, data);
895 static int m88e1011_set_tunable(struct phy_device *phydev,
896 struct ethtool_tunable *tuna, const void *data)
899 case ETHTOOL_PHY_DOWNSHIFT:
900 return m88e1011_set_downshift(phydev, *(const u8 *)data);
906 static void m88e1011_link_change_notify(struct phy_device *phydev)
910 if (phydev->state != PHY_RUNNING)
913 /* we may be on fiber page currently */
914 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE,
917 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT)
918 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n");
921 static int m88e1116r_config_init(struct phy_device *phydev)
925 err = genphy_soft_reset(phydev);
931 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
935 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
939 err = m88e1011_set_downshift(phydev, 8);
943 if (phy_interface_is_rgmii(phydev)) {
944 err = m88e1121_config_aneg_rgmii_delays(phydev);
949 err = genphy_soft_reset(phydev);
953 return marvell_config_init(phydev);
956 static int m88e1318_config_init(struct phy_device *phydev)
958 if (phy_interrupt_is_valid(phydev)) {
959 int err = phy_modify_paged(
960 phydev, MII_MARVELL_LED_PAGE,
961 MII_88E1318S_PHY_LED_TCR,
962 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
963 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
964 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
969 return marvell_config_init(phydev);
972 static int m88e1510_config_init(struct phy_device *phydev)
976 /* SGMII-to-Copper mode initialization */
977 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
979 err = marvell_set_page(phydev, 18);
983 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
984 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
985 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
986 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
990 /* PHY reset is necessary after changing MODE[2:0] */
991 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
992 MII_88E1510_GEN_CTRL_REG_1_RESET);
996 /* Reset page selection */
997 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1002 return m88e1318_config_init(phydev);
1005 static int m88e1118_config_aneg(struct phy_device *phydev)
1009 err = genphy_soft_reset(phydev);
1013 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1017 err = genphy_config_aneg(phydev);
1021 static int m88e1118_config_init(struct phy_device *phydev)
1025 /* Change address */
1026 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1030 /* Enable 1000 Mbit */
1031 err = phy_write(phydev, 0x15, 0x1070);
1035 /* Change address */
1036 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1040 /* Adjust LED Control */
1041 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1042 err = phy_write(phydev, 0x10, 0x1100);
1044 err = phy_write(phydev, 0x10, 0x021e);
1048 err = marvell_of_reg_init(phydev);
1053 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1057 return genphy_soft_reset(phydev);
1060 static int m88e1149_config_init(struct phy_device *phydev)
1064 /* Change address */
1065 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1069 /* Enable 1000 Mbit */
1070 err = phy_write(phydev, 0x15, 0x1048);
1074 err = marvell_of_reg_init(phydev);
1079 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1083 return genphy_soft_reset(phydev);
1086 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1090 err = m88e1111_config_init_rgmii_delays(phydev);
1094 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1095 err = phy_write(phydev, 0x1d, 0x0012);
1099 err = phy_modify(phydev, 0x1e, 0x0fc0,
1100 2 << 9 | /* 36 ohm */
1101 2 << 6); /* 39 ohm */
1105 err = phy_write(phydev, 0x1d, 0x3);
1109 err = phy_write(phydev, 0x1e, 0x8000);
1114 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1116 return m88e1111_config_init_hwcfg_mode(
1117 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1118 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1121 static int m88e1145_config_init(struct phy_device *phydev)
1125 /* Take care of errata E0 & E1 */
1126 err = phy_write(phydev, 0x1d, 0x001b);
1130 err = phy_write(phydev, 0x1e, 0x418f);
1134 err = phy_write(phydev, 0x1d, 0x0016);
1138 err = phy_write(phydev, 0x1e, 0xa2da);
1142 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1143 err = m88e1145_config_init_rgmii(phydev);
1148 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1149 err = m88e1145_config_init_sgmii(phydev);
1154 err = marvell_of_reg_init(phydev);
1161 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1165 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1169 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1170 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1174 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1177 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1180 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1183 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1186 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1196 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1198 struct ethtool_eee eee;
1201 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1202 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1203 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1205 /* According to the Marvell data sheet EEE must be disabled for
1206 * Fast Link Down detection to work properly
1208 ret = phy_ethtool_get_eee(phydev, &eee);
1209 if (!ret && eee.eee_enabled) {
1210 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1215 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1216 else if (*msecs <= 15)
1217 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1218 else if (*msecs <= 30)
1219 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1221 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1223 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1225 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1226 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1230 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1231 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1234 static int m88e1540_get_tunable(struct phy_device *phydev,
1235 struct ethtool_tunable *tuna, void *data)
1238 case ETHTOOL_PHY_FAST_LINK_DOWN:
1239 return m88e1540_get_fld(phydev, data);
1240 case ETHTOOL_PHY_DOWNSHIFT:
1241 return m88e1011_get_downshift(phydev, data);
1247 static int m88e1540_set_tunable(struct phy_device *phydev,
1248 struct ethtool_tunable *tuna, const void *data)
1251 case ETHTOOL_PHY_FAST_LINK_DOWN:
1252 return m88e1540_set_fld(phydev, data);
1253 case ETHTOOL_PHY_DOWNSHIFT:
1254 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1260 /* The VOD can be out of specification on link up. Poke an
1261 * undocumented register, in an undocumented page, with a magic value
1264 static int m88e6390_errata(struct phy_device *phydev)
1268 err = phy_write(phydev, MII_BMCR,
1269 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1273 usleep_range(300, 400);
1275 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1279 return genphy_soft_reset(phydev);
1282 static int m88e6390_config_aneg(struct phy_device *phydev)
1286 err = m88e6390_errata(phydev);
1290 return m88e1510_config_aneg(phydev);
1294 * fiber_lpa_mod_linkmode_lpa_t
1295 * @advertising: the linkmode advertisement settings
1296 * @lpa: value of the MII_LPA register for fiber link
1298 * A small helper function that translates MII_LPA bits to linkmode LP
1299 * advertisement settings. Other bits in advertising are left
1302 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1304 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1305 advertising, lpa & LPA_FIBER_1000HALF);
1307 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1308 advertising, lpa & LPA_FIBER_1000FULL);
1312 * marvell_update_link - update link status in real time in @phydev
1313 * @phydev: target phy_device struct
1315 * Description: Update the value in phydev->link to reflect the
1316 * current link value.
1318 static int marvell_update_link(struct phy_device *phydev, int fiber)
1322 /* Use the generic register for copper link, or specific
1323 * register for fiber case
1326 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1330 if ((status & REGISTER_LINK_STATUS) == 0)
1335 return genphy_update_link(phydev);
1341 static int marvell_read_status_page_an(struct phy_device *phydev,
1348 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1352 lpa = phy_read(phydev, MII_LPA);
1356 lpagb = phy_read(phydev, MII_STAT1000);
1360 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1361 phydev->duplex = DUPLEX_FULL;
1363 phydev->duplex = DUPLEX_HALF;
1365 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1367 phydev->asym_pause = 0;
1370 case MII_M1011_PHY_STATUS_1000:
1371 phydev->speed = SPEED_1000;
1374 case MII_M1011_PHY_STATUS_100:
1375 phydev->speed = SPEED_100;
1379 phydev->speed = SPEED_10;
1384 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
1385 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb);
1387 if (phydev->duplex == DUPLEX_FULL) {
1388 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1389 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1392 /* The fiber link is only 1000M capable */
1393 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1395 if (phydev->duplex == DUPLEX_FULL) {
1396 if (!(lpa & LPA_PAUSE_FIBER)) {
1398 phydev->asym_pause = 0;
1399 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1401 phydev->asym_pause = 1;
1404 phydev->asym_pause = 0;
1411 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1413 int bmcr = phy_read(phydev, MII_BMCR);
1418 if (bmcr & BMCR_FULLDPLX)
1419 phydev->duplex = DUPLEX_FULL;
1421 phydev->duplex = DUPLEX_HALF;
1423 if (bmcr & BMCR_SPEED1000)
1424 phydev->speed = SPEED_1000;
1425 else if (bmcr & BMCR_SPEED100)
1426 phydev->speed = SPEED_100;
1428 phydev->speed = SPEED_10;
1431 phydev->asym_pause = 0;
1432 linkmode_zero(phydev->lp_advertising);
1437 /* marvell_read_status_page
1440 * Check the link, then figure out the current state
1441 * by comparing what we advertise with what the link partner
1442 * advertises. Start by checking the gigabit possibilities,
1443 * then move on to 10/100.
1445 static int marvell_read_status_page(struct phy_device *phydev, int page)
1450 /* Detect and update the link, but return if there
1453 if (page == MII_MARVELL_FIBER_PAGE)
1458 err = marvell_update_link(phydev, fiber);
1462 if (phydev->autoneg == AUTONEG_ENABLE)
1463 err = marvell_read_status_page_an(phydev, fiber);
1465 err = marvell_read_status_page_fixed(phydev);
1470 /* marvell_read_status
1472 * Some Marvell's phys have two modes: fiber and copper.
1473 * Both need status checked.
1475 * First, check the fiber link and status.
1476 * If the fiber link is down, check the copper link and status which
1477 * will be the default value if both link are down.
1479 static int marvell_read_status(struct phy_device *phydev)
1483 /* Check the fiber mode first */
1484 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1485 phydev->supported) &&
1486 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1487 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1491 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1495 /* If the fiber link is up, it is the selected and
1496 * used link. In this case, we need to stay in the
1497 * fiber page. Please to be careful about that, avoid
1498 * to restore Copper page in other functions which
1499 * could break the behaviour for some fiber phy like
1505 /* If fiber link is down, check and save copper mode state */
1506 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1511 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1514 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1520 * Some Marvell's phys have two modes: fiber and copper.
1521 * Both need to be suspended
1523 static int marvell_suspend(struct phy_device *phydev)
1527 /* Suspend the fiber mode first */
1528 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1529 phydev->supported)) {
1530 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1534 /* With the page set, use the generic suspend */
1535 err = genphy_suspend(phydev);
1539 /* Then, the copper link */
1540 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1545 /* With the page set, use the generic suspend */
1546 return genphy_suspend(phydev);
1549 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1555 * Some Marvell's phys have two modes: fiber and copper.
1556 * Both need to be resumed
1558 static int marvell_resume(struct phy_device *phydev)
1562 /* Resume the fiber mode first */
1563 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1564 phydev->supported)) {
1565 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1569 /* With the page set, use the generic resume */
1570 err = genphy_resume(phydev);
1574 /* Then, the copper link */
1575 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1580 /* With the page set, use the generic resume */
1581 return genphy_resume(phydev);
1584 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1588 static int marvell_aneg_done(struct phy_device *phydev)
1590 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1592 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1595 static int m88e1121_did_interrupt(struct phy_device *phydev)
1599 imask = phy_read(phydev, MII_M1011_IEVENT);
1601 if (imask & MII_M1011_IMASK_INIT)
1607 static void m88e1318_get_wol(struct phy_device *phydev,
1608 struct ethtool_wolinfo *wol)
1610 int oldpage, ret = 0;
1612 wol->supported = WAKE_MAGIC;
1615 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1619 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1620 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1621 wol->wolopts |= WAKE_MAGIC;
1624 phy_restore_page(phydev, oldpage, ret);
1627 static int m88e1318_set_wol(struct phy_device *phydev,
1628 struct ethtool_wolinfo *wol)
1630 int err = 0, oldpage;
1632 oldpage = phy_save_page(phydev);
1636 if (wol->wolopts & WAKE_MAGIC) {
1637 /* Explicitly switch to page 0x00, just to be sure */
1638 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1642 /* If WOL event happened once, the LED[2] interrupt pin
1643 * will not be cleared unless we reading the interrupt status
1644 * register. If interrupts are in use, the normal interrupt
1645 * handling will clear the WOL event. Clear the WOL event
1646 * before enabling it if !phy_interrupt_is_valid()
1648 if (!phy_interrupt_is_valid(phydev))
1649 __phy_read(phydev, MII_M1011_IEVENT);
1651 /* Enable the WOL interrupt */
1652 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1653 MII_88E1318S_PHY_CSIER_WOL_EIE);
1657 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1661 /* Setup LED[2] as interrupt pin (active low) */
1662 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1663 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1664 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1665 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1669 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1673 /* Store the device address for the magic packet */
1674 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1675 ((phydev->attached_dev->dev_addr[5] << 8) |
1676 phydev->attached_dev->dev_addr[4]));
1679 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1680 ((phydev->attached_dev->dev_addr[3] << 8) |
1681 phydev->attached_dev->dev_addr[2]));
1684 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1685 ((phydev->attached_dev->dev_addr[1] << 8) |
1686 phydev->attached_dev->dev_addr[0]));
1690 /* Clear WOL status and enable magic packet matching */
1691 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1692 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1693 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1697 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1701 /* Clear WOL status and disable magic packet matching */
1702 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1703 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1704 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1710 return phy_restore_page(phydev, oldpage, err);
1713 static int marvell_get_sset_count(struct phy_device *phydev)
1715 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1717 return ARRAY_SIZE(marvell_hw_stats);
1719 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1722 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1724 int count = marvell_get_sset_count(phydev);
1727 for (i = 0; i < count; i++) {
1728 strlcpy(data + i * ETH_GSTRING_LEN,
1729 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1733 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1735 struct marvell_hw_stat stat = marvell_hw_stats[i];
1736 struct marvell_priv *priv = phydev->priv;
1740 val = phy_read_paged(phydev, stat.page, stat.reg);
1744 val = val & ((1 << stat.bits) - 1);
1745 priv->stats[i] += val;
1746 ret = priv->stats[i];
1752 static void marvell_get_stats(struct phy_device *phydev,
1753 struct ethtool_stats *stats, u64 *data)
1755 int count = marvell_get_sset_count(phydev);
1758 for (i = 0; i < count; i++)
1759 data[i] = marvell_get_stat(phydev, i);
1763 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1771 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1775 /* Enable temperature sensor */
1776 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1780 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1781 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1785 /* Wait for temperature to stabilize */
1786 usleep_range(10000, 12000);
1788 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1794 /* Disable temperature sensor */
1795 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1796 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1800 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1803 return phy_restore_page(phydev, oldpage, ret);
1806 static int m88e1121_hwmon_read(struct device *dev,
1807 enum hwmon_sensor_types type,
1808 u32 attr, int channel, long *temp)
1810 struct phy_device *phydev = dev_get_drvdata(dev);
1814 case hwmon_temp_input:
1815 err = m88e1121_get_temp(phydev, temp);
1824 static umode_t m88e1121_hwmon_is_visible(const void *data,
1825 enum hwmon_sensor_types type,
1826 u32 attr, int channel)
1828 if (type != hwmon_temp)
1832 case hwmon_temp_input:
1839 static u32 m88e1121_hwmon_chip_config[] = {
1840 HWMON_C_REGISTER_TZ,
1844 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1846 .config = m88e1121_hwmon_chip_config,
1849 static u32 m88e1121_hwmon_temp_config[] = {
1854 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1856 .config = m88e1121_hwmon_temp_config,
1859 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1860 &m88e1121_hwmon_chip,
1861 &m88e1121_hwmon_temp,
1865 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1866 .is_visible = m88e1121_hwmon_is_visible,
1867 .read = m88e1121_hwmon_read,
1870 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1871 .ops = &m88e1121_hwmon_hwmon_ops,
1872 .info = m88e1121_hwmon_info,
1875 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1881 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1882 MII_88E1510_TEMP_SENSOR);
1886 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1891 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1897 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1898 MII_88E1121_MISC_TEST);
1902 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1903 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1910 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1913 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1915 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1916 MII_88E1121_MISC_TEST,
1917 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1918 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1921 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1927 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1928 MII_88E1121_MISC_TEST);
1932 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1937 static int m88e1510_hwmon_read(struct device *dev,
1938 enum hwmon_sensor_types type,
1939 u32 attr, int channel, long *temp)
1941 struct phy_device *phydev = dev_get_drvdata(dev);
1945 case hwmon_temp_input:
1946 err = m88e1510_get_temp(phydev, temp);
1948 case hwmon_temp_crit:
1949 err = m88e1510_get_temp_critical(phydev, temp);
1951 case hwmon_temp_max_alarm:
1952 err = m88e1510_get_temp_alarm(phydev, temp);
1961 static int m88e1510_hwmon_write(struct device *dev,
1962 enum hwmon_sensor_types type,
1963 u32 attr, int channel, long temp)
1965 struct phy_device *phydev = dev_get_drvdata(dev);
1969 case hwmon_temp_crit:
1970 err = m88e1510_set_temp_critical(phydev, temp);
1978 static umode_t m88e1510_hwmon_is_visible(const void *data,
1979 enum hwmon_sensor_types type,
1980 u32 attr, int channel)
1982 if (type != hwmon_temp)
1986 case hwmon_temp_input:
1987 case hwmon_temp_max_alarm:
1989 case hwmon_temp_crit:
1996 static u32 m88e1510_hwmon_temp_config[] = {
1997 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2001 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
2003 .config = m88e1510_hwmon_temp_config,
2006 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
2007 &m88e1121_hwmon_chip,
2008 &m88e1510_hwmon_temp,
2012 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
2013 .is_visible = m88e1510_hwmon_is_visible,
2014 .read = m88e1510_hwmon_read,
2015 .write = m88e1510_hwmon_write,
2018 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
2019 .ops = &m88e1510_hwmon_hwmon_ops,
2020 .info = m88e1510_hwmon_info,
2023 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2032 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2036 /* Enable temperature sensor */
2037 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2041 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2042 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
2043 MII_88E6390_MISC_TEST_SAMPLE_1S;
2045 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2049 /* Wait for temperature to stabilize */
2050 usleep_range(10000, 12000);
2052 /* Reading the temperature sense has an errata. You need to read
2053 * a number of times and take an average.
2055 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2056 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2059 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2062 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2063 *temp = (sum - 75) * 1000;
2065 /* Disable temperature sensor */
2066 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2070 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2071 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
2073 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2076 phy_restore_page(phydev, oldpage, ret);
2081 static int m88e6390_hwmon_read(struct device *dev,
2082 enum hwmon_sensor_types type,
2083 u32 attr, int channel, long *temp)
2085 struct phy_device *phydev = dev_get_drvdata(dev);
2089 case hwmon_temp_input:
2090 err = m88e6390_get_temp(phydev, temp);
2099 static umode_t m88e6390_hwmon_is_visible(const void *data,
2100 enum hwmon_sensor_types type,
2101 u32 attr, int channel)
2103 if (type != hwmon_temp)
2107 case hwmon_temp_input:
2114 static u32 m88e6390_hwmon_temp_config[] = {
2119 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2121 .config = m88e6390_hwmon_temp_config,
2124 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2125 &m88e1121_hwmon_chip,
2126 &m88e6390_hwmon_temp,
2130 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2131 .is_visible = m88e6390_hwmon_is_visible,
2132 .read = m88e6390_hwmon_read,
2135 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2136 .ops = &m88e6390_hwmon_hwmon_ops,
2137 .info = m88e6390_hwmon_info,
2140 static int marvell_hwmon_name(struct phy_device *phydev)
2142 struct marvell_priv *priv = phydev->priv;
2143 struct device *dev = &phydev->mdio.dev;
2144 const char *devname = dev_name(dev);
2145 size_t len = strlen(devname);
2148 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2149 if (!priv->hwmon_name)
2152 for (i = j = 0; i < len && devname[i]; i++) {
2153 if (isalnum(devname[i]))
2154 priv->hwmon_name[j++] = devname[i];
2160 static int marvell_hwmon_probe(struct phy_device *phydev,
2161 const struct hwmon_chip_info *chip)
2163 struct marvell_priv *priv = phydev->priv;
2164 struct device *dev = &phydev->mdio.dev;
2167 err = marvell_hwmon_name(phydev);
2171 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2172 dev, priv->hwmon_name, phydev, chip, NULL);
2174 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2177 static int m88e1121_hwmon_probe(struct phy_device *phydev)
2179 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2182 static int m88e1510_hwmon_probe(struct phy_device *phydev)
2184 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2187 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2189 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2192 static int m88e1121_hwmon_probe(struct phy_device *phydev)
2197 static int m88e1510_hwmon_probe(struct phy_device *phydev)
2202 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2208 static int marvell_probe(struct phy_device *phydev)
2210 struct marvell_priv *priv;
2212 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2216 phydev->priv = priv;
2221 static int m88e1121_probe(struct phy_device *phydev)
2225 err = marvell_probe(phydev);
2229 return m88e1121_hwmon_probe(phydev);
2232 static int m88e1510_probe(struct phy_device *phydev)
2236 err = marvell_probe(phydev);
2240 return m88e1510_hwmon_probe(phydev);
2243 static int m88e6390_probe(struct phy_device *phydev)
2247 err = marvell_probe(phydev);
2251 return m88e6390_hwmon_probe(phydev);
2254 static struct phy_driver marvell_drivers[] = {
2256 .phy_id = MARVELL_PHY_ID_88E1101,
2257 .phy_id_mask = MARVELL_PHY_ID_MASK,
2258 .name = "Marvell 88E1101",
2259 /* PHY_GBIT_FEATURES */
2260 .probe = marvell_probe,
2261 .config_init = &marvell_config_init,
2262 .config_aneg = &m88e1101_config_aneg,
2263 .ack_interrupt = &marvell_ack_interrupt,
2264 .config_intr = &marvell_config_intr,
2265 .resume = &genphy_resume,
2266 .suspend = &genphy_suspend,
2267 .read_page = marvell_read_page,
2268 .write_page = marvell_write_page,
2269 .get_sset_count = marvell_get_sset_count,
2270 .get_strings = marvell_get_strings,
2271 .get_stats = marvell_get_stats,
2274 .phy_id = MARVELL_PHY_ID_88E1112,
2275 .phy_id_mask = MARVELL_PHY_ID_MASK,
2276 .name = "Marvell 88E1112",
2277 /* PHY_GBIT_FEATURES */
2278 .probe = marvell_probe,
2279 .config_init = &m88e1111_config_init,
2280 .config_aneg = &marvell_config_aneg,
2281 .ack_interrupt = &marvell_ack_interrupt,
2282 .config_intr = &marvell_config_intr,
2283 .resume = &genphy_resume,
2284 .suspend = &genphy_suspend,
2285 .read_page = marvell_read_page,
2286 .write_page = marvell_write_page,
2287 .get_sset_count = marvell_get_sset_count,
2288 .get_strings = marvell_get_strings,
2289 .get_stats = marvell_get_stats,
2290 .get_tunable = m88e1011_get_tunable,
2291 .set_tunable = m88e1011_set_tunable,
2292 .link_change_notify = m88e1011_link_change_notify,
2295 .phy_id = MARVELL_PHY_ID_88E1111,
2296 .phy_id_mask = MARVELL_PHY_ID_MASK,
2297 .name = "Marvell 88E1111",
2298 /* PHY_GBIT_FEATURES */
2299 .probe = marvell_probe,
2300 .config_init = &m88e1111_config_init,
2301 .config_aneg = &marvell_config_aneg,
2302 .read_status = &marvell_read_status,
2303 .ack_interrupt = &marvell_ack_interrupt,
2304 .config_intr = &marvell_config_intr,
2305 .resume = &genphy_resume,
2306 .suspend = &genphy_suspend,
2307 .read_page = marvell_read_page,
2308 .write_page = marvell_write_page,
2309 .get_sset_count = marvell_get_sset_count,
2310 .get_strings = marvell_get_strings,
2311 .get_stats = marvell_get_stats,
2312 .get_tunable = m88e1111_get_tunable,
2313 .set_tunable = m88e1111_set_tunable,
2314 .link_change_notify = m88e1011_link_change_notify,
2317 .phy_id = MARVELL_PHY_ID_88E1118,
2318 .phy_id_mask = MARVELL_PHY_ID_MASK,
2319 .name = "Marvell 88E1118",
2320 /* PHY_GBIT_FEATURES */
2321 .probe = marvell_probe,
2322 .config_init = &m88e1118_config_init,
2323 .config_aneg = &m88e1118_config_aneg,
2324 .ack_interrupt = &marvell_ack_interrupt,
2325 .config_intr = &marvell_config_intr,
2326 .resume = &genphy_resume,
2327 .suspend = &genphy_suspend,
2328 .read_page = marvell_read_page,
2329 .write_page = marvell_write_page,
2330 .get_sset_count = marvell_get_sset_count,
2331 .get_strings = marvell_get_strings,
2332 .get_stats = marvell_get_stats,
2335 .phy_id = MARVELL_PHY_ID_88E1121R,
2336 .phy_id_mask = MARVELL_PHY_ID_MASK,
2337 .name = "Marvell 88E1121R",
2338 /* PHY_GBIT_FEATURES */
2339 .probe = &m88e1121_probe,
2340 .config_init = &marvell_config_init,
2341 .config_aneg = &m88e1121_config_aneg,
2342 .read_status = &marvell_read_status,
2343 .ack_interrupt = &marvell_ack_interrupt,
2344 .config_intr = &marvell_config_intr,
2345 .did_interrupt = &m88e1121_did_interrupt,
2346 .resume = &genphy_resume,
2347 .suspend = &genphy_suspend,
2348 .read_page = marvell_read_page,
2349 .write_page = marvell_write_page,
2350 .get_sset_count = marvell_get_sset_count,
2351 .get_strings = marvell_get_strings,
2352 .get_stats = marvell_get_stats,
2353 .get_tunable = m88e1011_get_tunable,
2354 .set_tunable = m88e1011_set_tunable,
2355 .link_change_notify = m88e1011_link_change_notify,
2358 .phy_id = MARVELL_PHY_ID_88E1318S,
2359 .phy_id_mask = MARVELL_PHY_ID_MASK,
2360 .name = "Marvell 88E1318S",
2361 /* PHY_GBIT_FEATURES */
2362 .probe = marvell_probe,
2363 .config_init = &m88e1318_config_init,
2364 .config_aneg = &m88e1318_config_aneg,
2365 .read_status = &marvell_read_status,
2366 .ack_interrupt = &marvell_ack_interrupt,
2367 .config_intr = &marvell_config_intr,
2368 .did_interrupt = &m88e1121_did_interrupt,
2369 .get_wol = &m88e1318_get_wol,
2370 .set_wol = &m88e1318_set_wol,
2371 .resume = &genphy_resume,
2372 .suspend = &genphy_suspend,
2373 .read_page = marvell_read_page,
2374 .write_page = marvell_write_page,
2375 .get_sset_count = marvell_get_sset_count,
2376 .get_strings = marvell_get_strings,
2377 .get_stats = marvell_get_stats,
2380 .phy_id = MARVELL_PHY_ID_88E1145,
2381 .phy_id_mask = MARVELL_PHY_ID_MASK,
2382 .name = "Marvell 88E1145",
2383 /* PHY_GBIT_FEATURES */
2384 .probe = marvell_probe,
2385 .config_init = &m88e1145_config_init,
2386 .config_aneg = &m88e1101_config_aneg,
2387 .read_status = &genphy_read_status,
2388 .ack_interrupt = &marvell_ack_interrupt,
2389 .config_intr = &marvell_config_intr,
2390 .resume = &genphy_resume,
2391 .suspend = &genphy_suspend,
2392 .read_page = marvell_read_page,
2393 .write_page = marvell_write_page,
2394 .get_sset_count = marvell_get_sset_count,
2395 .get_strings = marvell_get_strings,
2396 .get_stats = marvell_get_stats,
2397 .get_tunable = m88e1111_get_tunable,
2398 .set_tunable = m88e1111_set_tunable,
2399 .link_change_notify = m88e1011_link_change_notify,
2402 .phy_id = MARVELL_PHY_ID_88E1149R,
2403 .phy_id_mask = MARVELL_PHY_ID_MASK,
2404 .name = "Marvell 88E1149R",
2405 /* PHY_GBIT_FEATURES */
2406 .probe = marvell_probe,
2407 .config_init = &m88e1149_config_init,
2408 .config_aneg = &m88e1118_config_aneg,
2409 .ack_interrupt = &marvell_ack_interrupt,
2410 .config_intr = &marvell_config_intr,
2411 .resume = &genphy_resume,
2412 .suspend = &genphy_suspend,
2413 .read_page = marvell_read_page,
2414 .write_page = marvell_write_page,
2415 .get_sset_count = marvell_get_sset_count,
2416 .get_strings = marvell_get_strings,
2417 .get_stats = marvell_get_stats,
2420 .phy_id = MARVELL_PHY_ID_88E1240,
2421 .phy_id_mask = MARVELL_PHY_ID_MASK,
2422 .name = "Marvell 88E1240",
2423 /* PHY_GBIT_FEATURES */
2424 .probe = marvell_probe,
2425 .config_init = &m88e1111_config_init,
2426 .config_aneg = &marvell_config_aneg,
2427 .ack_interrupt = &marvell_ack_interrupt,
2428 .config_intr = &marvell_config_intr,
2429 .resume = &genphy_resume,
2430 .suspend = &genphy_suspend,
2431 .read_page = marvell_read_page,
2432 .write_page = marvell_write_page,
2433 .get_sset_count = marvell_get_sset_count,
2434 .get_strings = marvell_get_strings,
2435 .get_stats = marvell_get_stats,
2438 .phy_id = MARVELL_PHY_ID_88E1116R,
2439 .phy_id_mask = MARVELL_PHY_ID_MASK,
2440 .name = "Marvell 88E1116R",
2441 /* PHY_GBIT_FEATURES */
2442 .probe = marvell_probe,
2443 .config_init = &m88e1116r_config_init,
2444 .ack_interrupt = &marvell_ack_interrupt,
2445 .config_intr = &marvell_config_intr,
2446 .resume = &genphy_resume,
2447 .suspend = &genphy_suspend,
2448 .read_page = marvell_read_page,
2449 .write_page = marvell_write_page,
2450 .get_sset_count = marvell_get_sset_count,
2451 .get_strings = marvell_get_strings,
2452 .get_stats = marvell_get_stats,
2453 .get_tunable = m88e1011_get_tunable,
2454 .set_tunable = m88e1011_set_tunable,
2455 .link_change_notify = m88e1011_link_change_notify,
2458 .phy_id = MARVELL_PHY_ID_88E1510,
2459 .phy_id_mask = MARVELL_PHY_ID_MASK,
2460 .name = "Marvell 88E1510",
2461 .features = PHY_GBIT_FIBRE_FEATURES,
2462 .probe = &m88e1510_probe,
2463 .config_init = &m88e1510_config_init,
2464 .config_aneg = &m88e1510_config_aneg,
2465 .read_status = &marvell_read_status,
2466 .ack_interrupt = &marvell_ack_interrupt,
2467 .config_intr = &marvell_config_intr,
2468 .did_interrupt = &m88e1121_did_interrupt,
2469 .get_wol = &m88e1318_get_wol,
2470 .set_wol = &m88e1318_set_wol,
2471 .resume = &marvell_resume,
2472 .suspend = &marvell_suspend,
2473 .read_page = marvell_read_page,
2474 .write_page = marvell_write_page,
2475 .get_sset_count = marvell_get_sset_count,
2476 .get_strings = marvell_get_strings,
2477 .get_stats = marvell_get_stats,
2478 .set_loopback = genphy_loopback,
2479 .get_tunable = m88e1011_get_tunable,
2480 .set_tunable = m88e1011_set_tunable,
2481 .link_change_notify = m88e1011_link_change_notify,
2484 .phy_id = MARVELL_PHY_ID_88E1540,
2485 .phy_id_mask = MARVELL_PHY_ID_MASK,
2486 .name = "Marvell 88E1540",
2487 /* PHY_GBIT_FEATURES */
2488 .probe = m88e1510_probe,
2489 .config_init = &marvell_config_init,
2490 .config_aneg = &m88e1510_config_aneg,
2491 .read_status = &marvell_read_status,
2492 .ack_interrupt = &marvell_ack_interrupt,
2493 .config_intr = &marvell_config_intr,
2494 .did_interrupt = &m88e1121_did_interrupt,
2495 .resume = &genphy_resume,
2496 .suspend = &genphy_suspend,
2497 .read_page = marvell_read_page,
2498 .write_page = marvell_write_page,
2499 .get_sset_count = marvell_get_sset_count,
2500 .get_strings = marvell_get_strings,
2501 .get_stats = marvell_get_stats,
2502 .get_tunable = m88e1540_get_tunable,
2503 .set_tunable = m88e1540_set_tunable,
2504 .link_change_notify = m88e1011_link_change_notify,
2507 .phy_id = MARVELL_PHY_ID_88E1545,
2508 .phy_id_mask = MARVELL_PHY_ID_MASK,
2509 .name = "Marvell 88E1545",
2510 .probe = m88e1510_probe,
2511 /* PHY_GBIT_FEATURES */
2512 .config_init = &marvell_config_init,
2513 .config_aneg = &m88e1510_config_aneg,
2514 .read_status = &marvell_read_status,
2515 .ack_interrupt = &marvell_ack_interrupt,
2516 .config_intr = &marvell_config_intr,
2517 .did_interrupt = &m88e1121_did_interrupt,
2518 .resume = &genphy_resume,
2519 .suspend = &genphy_suspend,
2520 .read_page = marvell_read_page,
2521 .write_page = marvell_write_page,
2522 .get_sset_count = marvell_get_sset_count,
2523 .get_strings = marvell_get_strings,
2524 .get_stats = marvell_get_stats,
2525 .get_tunable = m88e1540_get_tunable,
2526 .set_tunable = m88e1540_set_tunable,
2527 .link_change_notify = m88e1011_link_change_notify,
2530 .phy_id = MARVELL_PHY_ID_88E3016,
2531 .phy_id_mask = MARVELL_PHY_ID_MASK,
2532 .name = "Marvell 88E3016",
2533 /* PHY_BASIC_FEATURES */
2534 .probe = marvell_probe,
2535 .config_init = &m88e3016_config_init,
2536 .aneg_done = &marvell_aneg_done,
2537 .read_status = &marvell_read_status,
2538 .ack_interrupt = &marvell_ack_interrupt,
2539 .config_intr = &marvell_config_intr,
2540 .did_interrupt = &m88e1121_did_interrupt,
2541 .resume = &genphy_resume,
2542 .suspend = &genphy_suspend,
2543 .read_page = marvell_read_page,
2544 .write_page = marvell_write_page,
2545 .get_sset_count = marvell_get_sset_count,
2546 .get_strings = marvell_get_strings,
2547 .get_stats = marvell_get_stats,
2550 .phy_id = MARVELL_PHY_ID_88E6390,
2551 .phy_id_mask = MARVELL_PHY_ID_MASK,
2552 .name = "Marvell 88E6390",
2553 /* PHY_GBIT_FEATURES */
2554 .probe = m88e6390_probe,
2555 .config_init = &marvell_config_init,
2556 .config_aneg = &m88e6390_config_aneg,
2557 .read_status = &marvell_read_status,
2558 .ack_interrupt = &marvell_ack_interrupt,
2559 .config_intr = &marvell_config_intr,
2560 .did_interrupt = &m88e1121_did_interrupt,
2561 .resume = &genphy_resume,
2562 .suspend = &genphy_suspend,
2563 .read_page = marvell_read_page,
2564 .write_page = marvell_write_page,
2565 .get_sset_count = marvell_get_sset_count,
2566 .get_strings = marvell_get_strings,
2567 .get_stats = marvell_get_stats,
2568 .get_tunable = m88e1540_get_tunable,
2569 .set_tunable = m88e1540_set_tunable,
2570 .link_change_notify = m88e1011_link_change_notify,
2574 module_phy_driver(marvell_drivers);
2576 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2577 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2578 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2579 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2580 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2581 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2582 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2583 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2584 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2585 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2586 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2587 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2588 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2589 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2590 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2591 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2595 MODULE_DEVICE_TABLE(mdio, marvell_tbl);