1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/net/phy/realtek.c
5 * Driver for Realtek PHYs
7 * Author: Johnson Leung <r58129@freescale.com>
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
11 #include <linux/bitops.h>
12 #include <linux/phy.h>
13 #include <linux/module.h>
15 #define RTL821x_PHYSR 0x11
16 #define RTL821x_PHYSR_DUPLEX BIT(13)
17 #define RTL821x_PHYSR_SPEED GENMASK(15, 14)
19 #define RTL821x_INER 0x12
20 #define RTL8211B_INER_INIT 0x6400
21 #define RTL8211E_INER_LINK_STATUS BIT(10)
22 #define RTL8211F_INER_LINK_STATUS BIT(4)
24 #define RTL821x_INSR 0x13
26 #define RTL821x_PAGE_SELECT 0x1f
28 #define RTL8211F_INSR 0x1d
30 #define RTL8211F_TX_DELAY BIT(8)
32 #define RTL8201F_ISR 0x1e
33 #define RTL8201F_IER 0x13
35 #define RTL8366RB_POWER_SAVE 0x15
36 #define RTL8366RB_POWER_SAVE_ON BIT(12)
38 MODULE_DESCRIPTION("Realtek PHY driver");
39 MODULE_AUTHOR("Johnson Leung");
40 MODULE_LICENSE("GPL");
42 static int rtl821x_read_page(struct phy_device *phydev)
44 return __phy_read(phydev, RTL821x_PAGE_SELECT);
47 static int rtl821x_write_page(struct phy_device *phydev, int page)
49 return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
52 static int rtl8201_ack_interrupt(struct phy_device *phydev)
56 err = phy_read(phydev, RTL8201F_ISR);
58 return (err < 0) ? err : 0;
61 static int rtl821x_ack_interrupt(struct phy_device *phydev)
65 err = phy_read(phydev, RTL821x_INSR);
67 return (err < 0) ? err : 0;
70 static int rtl8211f_ack_interrupt(struct phy_device *phydev)
74 err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
76 return (err < 0) ? err : 0;
79 static int rtl8201_config_intr(struct phy_device *phydev)
83 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
84 val = BIT(13) | BIT(12) | BIT(11);
88 return phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
91 static int rtl8211b_config_intr(struct phy_device *phydev)
95 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
96 err = phy_write(phydev, RTL821x_INER,
99 err = phy_write(phydev, RTL821x_INER, 0);
104 static int rtl8211e_config_intr(struct phy_device *phydev)
108 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
109 err = phy_write(phydev, RTL821x_INER,
110 RTL8211E_INER_LINK_STATUS);
112 err = phy_write(phydev, RTL821x_INER, 0);
117 static int rtl8211f_config_intr(struct phy_device *phydev)
121 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
122 val = RTL8211F_INER_LINK_STATUS;
126 return phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
129 static int rtl8211_config_aneg(struct phy_device *phydev)
133 ret = genphy_config_aneg(phydev);
137 /* Quirk was copied from vendor driver. Unfortunately it includes no
138 * description of the magic numbers.
140 if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
141 phy_write(phydev, 0x17, 0x2138);
142 phy_write(phydev, 0x0e, 0x0260);
144 phy_write(phydev, 0x17, 0x2108);
145 phy_write(phydev, 0x0e, 0x0000);
151 static int rtl8211c_config_init(struct phy_device *phydev)
153 /* RTL8211C has an issue when operating in Gigabit slave mode */
154 return phy_set_bits(phydev, MII_CTRL1000,
155 CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);
158 static int rtl8211f_config_init(struct phy_device *phydev)
162 /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
163 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
164 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
165 val = RTL8211F_TX_DELAY;
167 return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val);
170 static int rtl8211b_suspend(struct phy_device *phydev)
172 phy_write(phydev, MII_MMD_DATA, BIT(9));
174 return genphy_suspend(phydev);
177 static int rtl8211b_resume(struct phy_device *phydev)
179 phy_write(phydev, MII_MMD_DATA, 0);
181 return genphy_resume(phydev);
184 static int rtl8366rb_config_init(struct phy_device *phydev)
188 ret = phy_set_bits(phydev, RTL8366RB_POWER_SAVE,
189 RTL8366RB_POWER_SAVE_ON);
191 dev_err(&phydev->mdio.dev,
192 "error enabling power management\n");
198 static struct phy_driver realtek_drvs[] = {
200 PHY_ID_MATCH_EXACT(0x00008201),
201 .name = "RTL8201CP Ethernet",
202 .get_features = genphy_read_abilities,
204 PHY_ID_MATCH_EXACT(0x001cc816),
205 .name = "RTL8201F Fast Ethernet",
206 .get_features = genphy_read_abilities,
207 .ack_interrupt = &rtl8201_ack_interrupt,
208 .config_intr = &rtl8201_config_intr,
209 .suspend = genphy_suspend,
210 .resume = genphy_resume,
211 .read_page = rtl821x_read_page,
212 .write_page = rtl821x_write_page,
214 PHY_ID_MATCH_EXACT(0x001cc910),
215 .name = "RTL8211 Gigabit Ethernet",
216 .get_features = genphy_read_abilities,
217 .config_aneg = rtl8211_config_aneg,
218 .read_mmd = &genphy_read_mmd_unsupported,
219 .write_mmd = &genphy_write_mmd_unsupported,
221 PHY_ID_MATCH_EXACT(0x001cc912),
222 .name = "RTL8211B Gigabit Ethernet",
223 .get_features = genphy_read_abilities,
224 .ack_interrupt = &rtl821x_ack_interrupt,
225 .config_intr = &rtl8211b_config_intr,
226 .read_mmd = &genphy_read_mmd_unsupported,
227 .write_mmd = &genphy_write_mmd_unsupported,
228 .suspend = rtl8211b_suspend,
229 .resume = rtl8211b_resume,
231 PHY_ID_MATCH_EXACT(0x001cc913),
232 .name = "RTL8211C Gigabit Ethernet",
233 .get_features = genphy_read_abilities,
234 .config_init = rtl8211c_config_init,
235 .read_mmd = &genphy_read_mmd_unsupported,
236 .write_mmd = &genphy_write_mmd_unsupported,
238 PHY_ID_MATCH_EXACT(0x001cc914),
239 .name = "RTL8211DN Gigabit Ethernet",
240 .get_features = genphy_read_abilities,
241 .ack_interrupt = rtl821x_ack_interrupt,
242 .config_intr = rtl8211e_config_intr,
243 .suspend = genphy_suspend,
244 .resume = genphy_resume,
246 PHY_ID_MATCH_EXACT(0x001cc915),
247 .name = "RTL8211E Gigabit Ethernet",
248 .get_features = genphy_read_abilities,
249 .ack_interrupt = &rtl821x_ack_interrupt,
250 .config_intr = &rtl8211e_config_intr,
251 .suspend = genphy_suspend,
252 .resume = genphy_resume,
254 PHY_ID_MATCH_EXACT(0x001cc916),
255 .name = "RTL8211F Gigabit Ethernet",
256 .get_features = genphy_read_abilities,
257 .config_init = &rtl8211f_config_init,
258 .ack_interrupt = &rtl8211f_ack_interrupt,
259 .config_intr = &rtl8211f_config_intr,
260 .suspend = genphy_suspend,
261 .resume = genphy_resume,
262 .read_page = rtl821x_read_page,
263 .write_page = rtl821x_write_page,
265 PHY_ID_MATCH_EXACT(0x001cc800),
266 .name = "Generic Realtek PHY",
267 .get_features = genphy_read_abilities,
268 .suspend = genphy_suspend,
269 .resume = genphy_resume,
270 .read_page = rtl821x_read_page,
271 .write_page = rtl821x_write_page,
273 PHY_ID_MATCH_EXACT(0x001cc961),
274 .name = "RTL8366RB Gigabit Ethernet",
275 .get_features = genphy_read_abilities,
276 .config_init = &rtl8366rb_config_init,
277 /* These interrupts are handled by the irq controller
278 * embedded inside the RTL8366RB, they get unmasked when the
279 * irq is requested and ACKed by reading the status register,
280 * which is done by the irqchip code.
282 .ack_interrupt = genphy_no_ack_interrupt,
283 .config_intr = genphy_no_config_intr,
284 .suspend = genphy_suspend,
285 .resume = genphy_resume,
289 module_phy_driver(realtek_drvs);
291 static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
292 { PHY_ID_MATCH_VENDOR(0x001cc800) },
296 MODULE_DEVICE_TABLE(mdio, realtek_tbl);