1 // SPDX-License-Identifier: GPL-2.0-only
3 * wanXL serial card driver for Linux
6 * Copyright (C) 2003 Krzysztof Halasa <khc@pm.waw.pl>
9 * - Only DTE (external clock) support with NRZ and NRZI encodings
10 * - wanXL100 will require minor driver modifications, no access to hw
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/slab.h>
18 #include <linux/sched.h>
19 #include <linux/types.h>
20 #include <linux/fcntl.h>
21 #include <linux/string.h>
22 #include <linux/errno.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/netdevice.h>
27 #include <linux/hdlc.h>
28 #include <linux/pci.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
35 static const char* version = "wanXL serial card driver version: 0.48";
37 #define PLX_CTL_RESET 0x40000000 /* adapter reset */
42 /* MAILBOX #1 - PUTS COMMANDS */
43 #define MBX1_CMD_ABORTJ 0x85000000 /* Abort and Jump */
44 #ifdef __LITTLE_ENDIAN
45 #define MBX1_CMD_BSWAP 0x8C000001 /* little-endian Byte Swap Mode */
47 #define MBX1_CMD_BSWAP 0x8C000000 /* big-endian Byte Swap Mode */
50 /* MAILBOX #2 - DRAM SIZE */
51 #define MBX2_MEMSZ_MASK 0xFFFF0000 /* PUTS Memory Size Register mask */
55 struct net_device *dev;
57 spinlock_t lock; /* for wanxl_xmit */
58 int node; /* physical port #0 - 3 */
59 unsigned int clock_type;
61 struct sk_buff *tx_skbs[TX_BUFFERS];
66 desc_t rx_descs[RX_QUEUE_LENGTH];
67 port_status_t port_status[4];
72 int n_ports; /* 1, 2 or 4 ports */
75 u8 __iomem *plx; /* PLX PCI9060 virtual base address */
76 struct pci_dev *pdev; /* for pci_name(pdev) */
78 struct sk_buff *rx_skbs[RX_QUEUE_LENGTH];
79 struct card_status *status; /* shared between host and card */
80 dma_addr_t status_address;
81 struct port ports[0]; /* 1 - 4 port structures follow */
86 static inline struct port *dev_to_port(struct net_device *dev)
88 return (struct port *)dev_to_hdlc(dev)->priv;
92 static inline port_status_t *get_status(struct port *port)
94 return &port->card->status->port_status[port->node];
99 static inline dma_addr_t pci_map_single_debug(struct pci_dev *pdev, void *ptr,
100 size_t size, int direction)
102 dma_addr_t addr = pci_map_single(pdev, ptr, size, direction);
103 if (addr + size > 0x100000000LL)
104 pr_crit("%s: pci_map_single() returned memory at 0x%llx!\n",
105 pci_name(pdev), (unsigned long long)addr);
109 #undef pci_map_single
110 #define pci_map_single pci_map_single_debug
114 /* Cable and/or personality module change interrupt service */
115 static inline void wanxl_cable_intr(struct port *port)
117 u32 value = get_status(port)->cable;
119 const char *cable, *pm, *dte = "", *dsr = "", *dcd = "";
121 switch(value & 0x7) {
122 case STATUS_CABLE_V35: cable = "V.35"; break;
123 case STATUS_CABLE_X21: cable = "X.21"; break;
124 case STATUS_CABLE_V24: cable = "V.24"; break;
125 case STATUS_CABLE_EIA530: cable = "EIA530"; break;
126 case STATUS_CABLE_NONE: cable = "no"; break;
127 default: cable = "invalid";
130 switch((value >> STATUS_CABLE_PM_SHIFT) & 0x7) {
131 case STATUS_CABLE_V35: pm = "V.35"; break;
132 case STATUS_CABLE_X21: pm = "X.21"; break;
133 case STATUS_CABLE_V24: pm = "V.24"; break;
134 case STATUS_CABLE_EIA530: pm = "EIA530"; break;
135 case STATUS_CABLE_NONE: pm = "no personality"; valid = 0; break;
136 default: pm = "invalid personality"; valid = 0;
140 if ((value & 7) == ((value >> STATUS_CABLE_PM_SHIFT) & 7)) {
141 dsr = (value & STATUS_CABLE_DSR) ? ", DSR ON" :
143 dcd = (value & STATUS_CABLE_DCD) ? ", carrier ON" :
146 dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE";
148 netdev_info(port->dev, "%s%s module, %s cable%s%s\n",
149 pm, dte, cable, dsr, dcd);
151 if (value & STATUS_CABLE_DCD)
152 netif_carrier_on(port->dev);
154 netif_carrier_off(port->dev);
159 /* Transmit complete interrupt service */
160 static inline void wanxl_tx_intr(struct port *port)
162 struct net_device *dev = port->dev;
164 desc_t *desc = &get_status(port)->tx_descs[port->tx_in];
165 struct sk_buff *skb = port->tx_skbs[port->tx_in];
167 switch (desc->stat) {
170 netif_wake_queue(dev);
173 case PACKET_UNDERRUN:
174 dev->stats.tx_errors++;
175 dev->stats.tx_fifo_errors++;
179 dev->stats.tx_packets++;
180 dev->stats.tx_bytes += skb->len;
182 desc->stat = PACKET_EMPTY; /* Free descriptor */
183 pci_unmap_single(port->card->pdev, desc->address, skb->len,
185 dev_consume_skb_irq(skb);
186 port->tx_in = (port->tx_in + 1) % TX_BUFFERS;
192 /* Receive complete interrupt service */
193 static inline void wanxl_rx_intr(struct card *card)
196 while (desc = &card->status->rx_descs[card->rx_in],
197 desc->stat != PACKET_EMPTY) {
198 if ((desc->stat & PACKET_PORT_MASK) > card->n_ports)
199 pr_crit("%s: received packet for nonexistent port\n",
200 pci_name(card->pdev));
202 struct sk_buff *skb = card->rx_skbs[card->rx_in];
203 struct port *port = &card->ports[desc->stat &
205 struct net_device *dev = port->dev;
208 dev->stats.rx_dropped++;
210 pci_unmap_single(card->pdev, desc->address,
213 skb_put(skb, desc->length);
216 printk(KERN_DEBUG "%s RX(%i):", dev->name,
220 dev->stats.rx_packets++;
221 dev->stats.rx_bytes += skb->len;
222 skb->protocol = hdlc_type_trans(skb, dev);
228 skb = dev_alloc_skb(BUFFER_LENGTH);
229 desc->address = skb ?
230 pci_map_single(card->pdev, skb->data,
232 PCI_DMA_FROMDEVICE) : 0;
233 card->rx_skbs[card->rx_in] = skb;
236 desc->stat = PACKET_EMPTY; /* Free descriptor */
237 card->rx_in = (card->rx_in + 1) % RX_QUEUE_LENGTH;
243 static irqreturn_t wanxl_intr(int irq, void* dev_id)
245 struct card *card = dev_id;
251 while((stat = readl(card->plx + PLX_DOORBELL_FROM_CARD)) != 0) {
253 writel(stat, card->plx + PLX_DOORBELL_FROM_CARD);
255 for (i = 0; i < card->n_ports; i++) {
256 if (stat & (1 << (DOORBELL_FROM_CARD_TX_0 + i)))
257 wanxl_tx_intr(&card->ports[i]);
258 if (stat & (1 << (DOORBELL_FROM_CARD_CABLE_0 + i)))
259 wanxl_cable_intr(&card->ports[i]);
261 if (stat & (1 << DOORBELL_FROM_CARD_RX))
265 return IRQ_RETVAL(handled);
270 static netdev_tx_t wanxl_xmit(struct sk_buff *skb, struct net_device *dev)
272 struct port *port = dev_to_port(dev);
275 spin_lock(&port->lock);
277 desc = &get_status(port)->tx_descs[port->tx_out];
278 if (desc->stat != PACKET_EMPTY) {
279 /* should never happen - previous xmit should stop queue */
281 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name);
283 netif_stop_queue(dev);
284 spin_unlock(&port->lock);
285 return NETDEV_TX_BUSY; /* request packet to be queued */
289 printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len);
293 port->tx_skbs[port->tx_out] = skb;
294 desc->address = pci_map_single(port->card->pdev, skb->data, skb->len,
296 desc->length = skb->len;
297 desc->stat = PACKET_FULL;
298 writel(1 << (DOORBELL_TO_CARD_TX_0 + port->node),
299 port->card->plx + PLX_DOORBELL_TO_CARD);
301 port->tx_out = (port->tx_out + 1) % TX_BUFFERS;
303 if (get_status(port)->tx_descs[port->tx_out].stat != PACKET_EMPTY) {
304 netif_stop_queue(dev);
306 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name);
310 spin_unlock(&port->lock);
316 static int wanxl_attach(struct net_device *dev, unsigned short encoding,
317 unsigned short parity)
319 struct port *port = dev_to_port(dev);
321 if (encoding != ENCODING_NRZ &&
322 encoding != ENCODING_NRZI)
325 if (parity != PARITY_NONE &&
326 parity != PARITY_CRC32_PR1_CCITT &&
327 parity != PARITY_CRC16_PR1_CCITT &&
328 parity != PARITY_CRC32_PR0_CCITT &&
329 parity != PARITY_CRC16_PR0_CCITT)
332 get_status(port)->encoding = encoding;
333 get_status(port)->parity = parity;
339 static int wanxl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
341 const size_t size = sizeof(sync_serial_settings);
342 sync_serial_settings line;
343 struct port *port = dev_to_port(dev);
345 if (cmd != SIOCWANDEV)
346 return hdlc_ioctl(dev, ifr, cmd);
348 switch (ifr->ifr_settings.type) {
350 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
351 if (ifr->ifr_settings.size < size) {
352 ifr->ifr_settings.size = size; /* data size wanted */
355 memset(&line, 0, sizeof(line));
356 line.clock_type = get_status(port)->clocking;
360 if (copy_to_user(ifr->ifr_settings.ifs_ifsu.sync, &line, size))
364 case IF_IFACE_SYNC_SERIAL:
365 if (!capable(CAP_NET_ADMIN))
367 if (dev->flags & IFF_UP)
370 if (copy_from_user(&line, ifr->ifr_settings.ifs_ifsu.sync,
374 if (line.clock_type != CLOCK_EXT &&
375 line.clock_type != CLOCK_TXFROMRX)
376 return -EINVAL; /* No such clock setting */
378 if (line.loopback != 0)
381 get_status(port)->clocking = line.clock_type;
385 return hdlc_ioctl(dev, ifr, cmd);
391 static int wanxl_open(struct net_device *dev)
393 struct port *port = dev_to_port(dev);
394 u8 __iomem *dbr = port->card->plx + PLX_DOORBELL_TO_CARD;
395 unsigned long timeout;
398 if (get_status(port)->open) {
399 netdev_err(dev, "port already open\n");
402 if ((i = hdlc_open(dev)) != 0)
405 port->tx_in = port->tx_out = 0;
406 for (i = 0; i < TX_BUFFERS; i++)
407 get_status(port)->tx_descs[i].stat = PACKET_EMPTY;
408 /* signal the card */
409 writel(1 << (DOORBELL_TO_CARD_OPEN_0 + port->node), dbr);
411 timeout = jiffies + HZ;
413 if (get_status(port)->open) {
414 netif_start_queue(dev);
417 } while (time_after(timeout, jiffies));
419 netdev_err(dev, "unable to open port\n");
420 /* ask the card to close the port, should it be still alive */
421 writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), dbr);
427 static int wanxl_close(struct net_device *dev)
429 struct port *port = dev_to_port(dev);
430 unsigned long timeout;
434 /* signal the card */
435 writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node),
436 port->card->plx + PLX_DOORBELL_TO_CARD);
438 timeout = jiffies + HZ;
440 if (!get_status(port)->open)
442 } while (time_after(timeout, jiffies));
444 if (get_status(port)->open)
445 netdev_err(dev, "unable to close port\n");
447 netif_stop_queue(dev);
449 for (i = 0; i < TX_BUFFERS; i++) {
450 desc_t *desc = &get_status(port)->tx_descs[i];
452 if (desc->stat != PACKET_EMPTY) {
453 desc->stat = PACKET_EMPTY;
454 pci_unmap_single(port->card->pdev, desc->address,
455 port->tx_skbs[i]->len,
457 dev_kfree_skb(port->tx_skbs[i]);
465 static struct net_device_stats *wanxl_get_stats(struct net_device *dev)
467 struct port *port = dev_to_port(dev);
469 dev->stats.rx_over_errors = get_status(port)->rx_overruns;
470 dev->stats.rx_frame_errors = get_status(port)->rx_frame_errors;
471 dev->stats.rx_errors = dev->stats.rx_over_errors +
472 dev->stats.rx_frame_errors;
478 static int wanxl_puts_command(struct card *card, u32 cmd)
480 unsigned long timeout = jiffies + 5 * HZ;
482 writel(cmd, card->plx + PLX_MAILBOX_1);
484 if (readl(card->plx + PLX_MAILBOX_1) == 0)
488 }while (time_after(timeout, jiffies));
495 static void wanxl_reset(struct card *card)
497 u32 old_value = readl(card->plx + PLX_CONTROL) & ~PLX_CTL_RESET;
499 writel(0x80, card->plx + PLX_MAILBOX_0);
500 writel(old_value | PLX_CTL_RESET, card->plx + PLX_CONTROL);
501 readl(card->plx + PLX_CONTROL); /* wait for posted write */
503 writel(old_value, card->plx + PLX_CONTROL);
504 readl(card->plx + PLX_CONTROL); /* wait for posted write */
509 static void wanxl_pci_remove_one(struct pci_dev *pdev)
511 struct card *card = pci_get_drvdata(pdev);
514 for (i = 0; i < card->n_ports; i++) {
515 unregister_hdlc_device(card->ports[i].dev);
516 free_netdev(card->ports[i].dev);
519 /* unregister and free all host resources */
521 free_irq(card->irq, card);
525 for (i = 0; i < RX_QUEUE_LENGTH; i++)
526 if (card->rx_skbs[i]) {
527 pci_unmap_single(card->pdev,
528 card->status->rx_descs[i].address,
529 BUFFER_LENGTH, PCI_DMA_FROMDEVICE);
530 dev_kfree_skb(card->rx_skbs[i]);
537 pci_free_consistent(pdev, sizeof(struct card_status),
538 card->status, card->status_address);
540 pci_release_regions(pdev);
541 pci_disable_device(pdev);
546 #include "wanxlfw.inc"
548 static const struct net_device_ops wanxl_ops = {
549 .ndo_open = wanxl_open,
550 .ndo_stop = wanxl_close,
551 .ndo_start_xmit = hdlc_start_xmit,
552 .ndo_do_ioctl = wanxl_ioctl,
553 .ndo_get_stats = wanxl_get_stats,
556 static int wanxl_pci_init_one(struct pci_dev *pdev,
557 const struct pci_device_id *ent)
561 unsigned long timeout;
562 u32 plx_phy; /* PLX PCI base address */
563 u32 mem_phy; /* memory PCI base addr */
564 u8 __iomem *mem; /* memory virtual base addr */
568 pr_info_once("%s\n", version);
571 i = pci_enable_device(pdev);
575 /* QUICC can only access first 256 MB of host RAM directly,
576 but PLX9060 DMA does 32-bits for actual packet data transfers */
578 /* FIXME when PCI/DMA subsystems are fixed.
579 We set both dma_mask and consistent_dma_mask to 28 bits
580 and pray pci_alloc_consistent() will use this info. It should
581 work on most platforms */
582 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(28)) ||
583 pci_set_dma_mask(pdev, DMA_BIT_MASK(28))) {
584 pr_err("No usable DMA configuration\n");
585 pci_disable_device(pdev);
589 i = pci_request_regions(pdev, "wanXL");
591 pci_disable_device(pdev);
595 switch (pdev->device) {
596 case PCI_DEVICE_ID_SBE_WANXL100: ports = 1; break;
597 case PCI_DEVICE_ID_SBE_WANXL200: ports = 2; break;
601 card = kzalloc(struct_size(card, ports, ports), GFP_KERNEL);
603 pci_release_regions(pdev);
604 pci_disable_device(pdev);
608 pci_set_drvdata(pdev, card);
611 card->status = pci_alloc_consistent(pdev,
612 sizeof(struct card_status),
613 &card->status_address);
614 if (card->status == NULL) {
615 wanxl_pci_remove_one(pdev);
620 printk(KERN_DEBUG "wanXL %s: pci_alloc_consistent() returned memory"
621 " at 0x%LX\n", pci_name(pdev),
622 (unsigned long long)card->status_address);
625 /* FIXME when PCI/DMA subsystems are fixed.
626 We set both dma_mask and consistent_dma_mask back to 32 bits
627 to indicate the card can do 32-bit DMA addressing */
628 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) ||
629 pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
630 pr_err("No usable DMA configuration\n");
631 wanxl_pci_remove_one(pdev);
635 /* set up PLX mapping */
636 plx_phy = pci_resource_start(pdev, 0);
638 card->plx = ioremap_nocache(plx_phy, 0x70);
640 pr_err("ioremap() failed\n");
641 wanxl_pci_remove_one(pdev);
645 #if RESET_WHILE_LOADING
649 timeout = jiffies + 20 * HZ;
650 while ((stat = readl(card->plx + PLX_MAILBOX_0)) != 0) {
651 if (time_before(timeout, jiffies)) {
652 pr_warn("%s: timeout waiting for PUTS to complete\n",
654 wanxl_pci_remove_one(pdev);
658 switch(stat & 0xC0) {
659 case 0x00: /* hmm - PUTS completed with non-zero code? */
660 case 0x80: /* PUTS still testing the hardware */
664 pr_warn("%s: PUTS test 0x%X failed\n",
665 pci_name(pdev), stat & 0x30);
666 wanxl_pci_remove_one(pdev);
673 /* get on-board memory size (PUTS detects no more than 4 MB) */
674 ramsize = readl(card->plx + PLX_MAILBOX_2) & MBX2_MEMSZ_MASK;
676 /* set up on-board RAM mapping */
677 mem_phy = pci_resource_start(pdev, 2);
680 /* sanity check the board's reported memory size */
681 if (ramsize < BUFFERS_ADDR +
682 (TX_BUFFERS + RX_BUFFERS) * BUFFER_LENGTH * ports) {
683 pr_warn("%s: no enough on-board RAM (%u bytes detected, %u bytes required)\n",
684 pci_name(pdev), ramsize,
686 (TX_BUFFERS + RX_BUFFERS) * BUFFER_LENGTH * ports);
687 wanxl_pci_remove_one(pdev);
691 if (wanxl_puts_command(card, MBX1_CMD_BSWAP)) {
692 pr_warn("%s: unable to Set Byte Swap Mode\n", pci_name(pdev));
693 wanxl_pci_remove_one(pdev);
697 for (i = 0; i < RX_QUEUE_LENGTH; i++) {
698 struct sk_buff *skb = dev_alloc_skb(BUFFER_LENGTH);
699 card->rx_skbs[i] = skb;
701 card->status->rx_descs[i].address =
702 pci_map_single(card->pdev, skb->data,
707 mem = ioremap_nocache(mem_phy, PDM_OFFSET + sizeof(firmware));
709 pr_err("ioremap() failed\n");
710 wanxl_pci_remove_one(pdev);
714 for (i = 0; i < sizeof(firmware); i += 4)
715 writel(ntohl(*(__be32*)(firmware + i)), mem + PDM_OFFSET + i);
717 for (i = 0; i < ports; i++)
718 writel(card->status_address +
719 (void *)&card->status->port_status[i] -
720 (void *)card->status, mem + PDM_OFFSET + 4 + i * 4);
721 writel(card->status_address, mem + PDM_OFFSET + 20);
722 writel(PDM_OFFSET, mem);
725 writel(0, card->plx + PLX_MAILBOX_5);
727 if (wanxl_puts_command(card, MBX1_CMD_ABORTJ)) {
728 pr_warn("%s: unable to Abort and Jump\n", pci_name(pdev));
729 wanxl_pci_remove_one(pdev);
733 timeout = jiffies + 5 * HZ;
735 if ((stat = readl(card->plx + PLX_MAILBOX_5)) != 0)
738 }while (time_after(timeout, jiffies));
741 pr_warn("%s: timeout while initializing card firmware\n",
743 wanxl_pci_remove_one(pdev);
751 pr_info("%s: at 0x%X, %u KB of RAM at 0x%X, irq %u\n",
752 pci_name(pdev), plx_phy, ramsize / 1024, mem_phy, pdev->irq);
755 if (request_irq(pdev->irq, wanxl_intr, IRQF_SHARED, "wanXL", card)) {
756 pr_warn("%s: could not allocate IRQ%i\n",
757 pci_name(pdev), pdev->irq);
758 wanxl_pci_remove_one(pdev);
761 card->irq = pdev->irq;
763 for (i = 0; i < ports; i++) {
765 struct port *port = &card->ports[i];
766 struct net_device *dev = alloc_hdlcdev(port);
768 pr_err("%s: unable to allocate memory\n",
770 wanxl_pci_remove_one(pdev);
775 hdlc = dev_to_hdlc(dev);
776 spin_lock_init(&port->lock);
777 dev->tx_queue_len = 50;
778 dev->netdev_ops = &wanxl_ops;
779 hdlc->attach = wanxl_attach;
780 hdlc->xmit = wanxl_xmit;
783 get_status(port)->clocking = CLOCK_EXT;
784 if (register_hdlc_device(dev)) {
785 pr_err("%s: unable to register hdlc device\n",
788 wanxl_pci_remove_one(pdev);
794 pr_info("%s: port", pci_name(pdev));
795 for (i = 0; i < ports; i++)
796 pr_cont("%s #%i: %s",
797 i ? "," : "", i, card->ports[i].dev->name);
800 for (i = 0; i < ports; i++)
801 wanxl_cable_intr(&card->ports[i]); /* get carrier status etc.*/
806 static const struct pci_device_id wanxl_pci_tbl[] = {
807 { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL100, PCI_ANY_ID,
808 PCI_ANY_ID, 0, 0, 0 },
809 { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL200, PCI_ANY_ID,
810 PCI_ANY_ID, 0, 0, 0 },
811 { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL400, PCI_ANY_ID,
812 PCI_ANY_ID, 0, 0, 0 },
817 static struct pci_driver wanxl_pci_driver = {
819 .id_table = wanxl_pci_tbl,
820 .probe = wanxl_pci_init_one,
821 .remove = wanxl_pci_remove_one,
825 static int __init wanxl_init_module(void)
828 pr_info("%s\n", version);
830 return pci_register_driver(&wanxl_pci_driver);
833 static void __exit wanxl_cleanup_module(void)
835 pci_unregister_driver(&wanxl_pci_driver);
839 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
840 MODULE_DESCRIPTION("SBE Inc. wanXL serial port driver");
841 MODULE_LICENSE("GPL v2");
842 MODULE_DEVICE_TABLE(pci, wanxl_pci_tbl);
844 module_init(wanxl_init_module);
845 module_exit(wanxl_cleanup_module);