drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static void ath9k_set_assoc_state(struct ath_softc *sc,
  23                                   struct ieee80211_vif *vif);
  24
  25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  26 {
  27         /*
  28          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  29          *   0 for no restriction
  30          *   1 for 1/4 us
  31          *   2 for 1/2 us
  32          *   3 for 1 us
  33          *   4 for 2 us
  34          *   5 for 4 us
  35          *   6 for 8 us
  36          *   7 for 16 us
  37          */
  38         switch (mpdudensity) {
  39         case 0:
  40                 return 0;
  41         case 1:
  42         case 2:
  43         case 3:
  44                 /* Our lower layer calculations limit our precision to
  45                    1 microsecond */
  46                 return 1;
  47         case 4:
  48                 return 2;
  49         case 5:
  50                 return 4;
  51         case 6:
  52                 return 8;
  53         case 7:
  54                 return 16;
  55         default:
  56                 return 0;
  57         }
  58 }
  59
  60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  61 {
  62         bool pending = false;
  63
  64         spin_lock_bh(&txq->axq_lock);
  65
  66         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  67                 pending = true;
  68
  69         spin_unlock_bh(&txq->axq_lock);
  70         return pending;
  71 }
  72
  73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74 {
  75         unsigned long flags;
  76         bool ret;
  77
  78         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  79         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  80         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  81
  82         return ret;
  83 }
  84
  85 void ath_ps_full_sleep(unsigned long data)
  86 {
  87         struct ath_softc *sc = (struct ath_softc *) data;
  88         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  89         bool reset;
  90
  91         spin_lock(&common->cc_lock);
  92         ath_hw_cycle_counters_update(common);
  93         spin_unlock(&common->cc_lock);
  94
  95         ath9k_hw_setrxabort(sc->sc_ah, 1);
  96         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
  97
  98         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  99 }
 100
 101 void ath9k_ps_wakeup(struct ath_softc *sc)
 102 {
 103         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 104         unsigned long flags;
 105         enum ath9k_power_mode power_mode;
 106
 107         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 108         if (++sc->ps_usecount != 1)
 109                 goto unlock;
 110
 111         del_timer_sync(&sc->sleep_timer);
 112         power_mode = sc->sc_ah->power_mode;
 113         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 114
 115         /*
 116          * While the hardware is asleep, the cycle counters contain no
 117          * useful data. Better clear them now so that they don't mess up
 118          * survey data results.
 119          */
 120         if (power_mode != ATH9K_PM_AWAKE) {
 121                 spin_lock(&common->cc_lock);
 122                 ath_hw_cycle_counters_update(common);
 123                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 124                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 125                 spin_unlock(&common->cc_lock);
 126         }
 127
 128  unlock:
 129         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 130 }
 131
 132 void ath9k_ps_restore(struct ath_softc *sc)
 133 {
 134         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 135         enum ath9k_power_mode mode;
 136         unsigned long flags;
 137
 138         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 139         if (--sc->ps_usecount != 0)
 140                 goto unlock;
 141
 142         if (sc->ps_idle) {
 143                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 144                 goto unlock;
 145         }
 146
 147         if (sc->ps_enabled &&
 148                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 149                                      PS_WAIT_FOR_CAB |
 150                                      PS_WAIT_FOR_PSPOLL_DATA |
 151                                      PS_WAIT_FOR_TX_ACK |
 152                                      PS_WAIT_FOR_ANI))) {
 153                 mode = ATH9K_PM_NETWORK_SLEEP;
 154                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 155                         ath9k_btcoex_stop_gen_timer(sc);
 156         } else {
 157                 goto unlock;
 158         }
 159
 160         spin_lock(&common->cc_lock);
 161         ath_hw_cycle_counters_update(common);
 162         spin_unlock(&common->cc_lock);
 163
 164         ath9k_hw_setpower(sc->sc_ah, mode);
 165
 166  unlock:
 167         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 168 }
 169
 170 static void __ath_cancel_work(struct ath_softc *sc)
 171 {
 172         cancel_work_sync(&sc->paprd_work);
 173         cancel_delayed_work_sync(&sc->tx_complete_work);
 174         cancel_delayed_work_sync(&sc->hw_pll_work);
 175
 176 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 177         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 178                 cancel_work_sync(&sc->mci_work);
 179 #endif
 180 }
 181
 182 void ath_cancel_work(struct ath_softc *sc)
 183 {
 184         __ath_cancel_work(sc);
 185         cancel_work_sync(&sc->hw_reset_work);
 186 }
 187
 188 void ath_restart_work(struct ath_softc *sc)
 189 {
 190         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 191
 192         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 193                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 194                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 195
 196         ath_start_ani(sc);
 197 }
 198
 199 static bool ath_prepare_reset(struct ath_softc *sc)
 200 {
 201         struct ath_hw *ah = sc->sc_ah;
 202         bool ret = true;
 203
 204         ieee80211_stop_queues(sc->hw);
 205         ath_stop_ani(sc);
 206         ath9k_hw_disable_interrupts(ah);
 207
 208         if (!ath_drain_all_txq(sc))
 209                 ret = false;
 210
 211         if (!ath_stoprecv(sc))
 212                 ret = false;
 213
 214         return ret;
 215 }
 216
 217 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 218 {
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         unsigned long flags;
 222         int i;
 223
 224         if (ath_startrecv(sc) != 0) {
 225                 ath_err(common, "Unable to restart recv logic\n");
 226                 return false;
 227         }
 228
 229         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 230                                sc->cur_chan->txpower, &sc->curtxpow);
 231
 232         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 233         ath9k_hw_set_interrupts(ah);
 234         ath9k_hw_enable_interrupts(ah);
 235
 236         if (!sc->cur_chan->offchannel && start) {
 237                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 238                         goto work;
 239
 240                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 241                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 242                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 243                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 244                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 245                 } else {
 246                         ath9k_set_beacon(sc);
 247                 }
 248         work:
 249                 ath_restart_work(sc);
 250
 251                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 252                         if (!ATH_TXQ_SETUP(sc, i))
 253                                 continue;
 254
 255                         spin_lock_bh(&sc->tx.txq[i].axq_lock);
 256                         ath_txq_schedule(sc, &sc->tx.txq[i]);
 257                         spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 258                 }
 259         }
 260
 261         sc->gtt_cnt = 0;
 262         ieee80211_wake_queues(sc->hw);
 263
 264         ath9k_p2p_ps_timer(sc);
 265
 266         return true;
 267 }
 268
 269 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 270 {
 271         struct ath_hw *ah = sc->sc_ah;
 272         struct ath_common *common = ath9k_hw_common(ah);
 273         struct ath9k_hw_cal_data *caldata = NULL;
 274         bool fastcc = true;
 275         int r;
 276
 277         __ath_cancel_work(sc);
 278
 279         tasklet_disable(&sc->intr_tq);
 280         spin_lock_bh(&sc->sc_pcu_lock);
 281
 282         if (!sc->cur_chan->offchannel) {
 283                 fastcc = false;
 284                 caldata = &sc->caldata;
 285         }
 286
 287         if (!hchan) {
 288                 fastcc = false;
 289                 hchan = ah->curchan;
 290         }
 291
 292         if (!ath_prepare_reset(sc))
 293                 fastcc = false;
 294
 295         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 296                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 297
 298         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 299         if (r) {
 300                 ath_err(common,
 301                         "Unable to reset channel, reset status %d\n", r);
 302
 303                 ath9k_hw_enable_interrupts(ah);
 304                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 305
 306                 goto out;
 307         }
 308
 309         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 310             sc->cur_chan->offchannel)
 311                 ath9k_mci_set_txpower(sc, true, false);
 312
 313         if (!ath_complete_reset(sc, true))
 314                 r = -EIO;
 315
 316 out:
 317         spin_unlock_bh(&sc->sc_pcu_lock);
 318         tasklet_enable(&sc->intr_tq);
 319
 320         return r;
 321 }
 322
 323 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 324                             struct ieee80211_vif *vif)
 325 {
 326         struct ath_node *an;
 327         an = (struct ath_node *)sta->drv_priv;
 328
 329         an->sc = sc;
 330         an->sta = sta;
 331         an->vif = vif;
 332         memset(&an->key_idx, 0, sizeof(an->key_idx));
 333
 334         ath_tx_node_init(sc, an);
 335 }
 336
 337 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 338 {
 339         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 340         ath_tx_node_cleanup(sc, an);
 341 }
 342
 343 void ath9k_tasklet(unsigned long data)
 344 {
 345         struct ath_softc *sc = (struct ath_softc *)data;
 346         struct ath_hw *ah = sc->sc_ah;
 347         struct ath_common *common = ath9k_hw_common(ah);
 348         enum ath_reset_type type;
 349         unsigned long flags;
 350         u32 status = sc->intrstatus;
 351         u32 rxmask;
 352
 353         ath9k_ps_wakeup(sc);
 354         spin_lock(&sc->sc_pcu_lock);
 355
 356         if (status & ATH9K_INT_FATAL) {
 357                 type = RESET_TYPE_FATAL_INT;
 358                 ath9k_queue_reset(sc, type);
 359
 360                 /*
 361                  * Increment the ref. counter here so that
 362                  * interrupts are enabled in the reset routine.
 363                  */
 364                 atomic_inc(&ah->intr_ref_cnt);
 365                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 366                 goto out;
 367         }
 368
 369         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 370             (status & ATH9K_INT_BB_WATCHDOG)) {
 371                 spin_lock(&common->cc_lock);
 372                 ath_hw_cycle_counters_update(common);
 373                 ar9003_hw_bb_watchdog_dbg_info(ah);
 374                 spin_unlock(&common->cc_lock);
 375
 376                 if (ar9003_hw_bb_watchdog_check(ah)) {
 377                         type = RESET_TYPE_BB_WATCHDOG;
 378                         ath9k_queue_reset(sc, type);
 379
 380                         /*
 381                          * Increment the ref. counter here so that
 382                          * interrupts are enabled in the reset routine.
 383                          */
 384                         atomic_inc(&ah->intr_ref_cnt);
 385                         ath_dbg(common, RESET,
 386                                 "BB_WATCHDOG: Skipping interrupts\n");
 387                         goto out;
 388                 }
 389         }
 390
 391         if (status & ATH9K_INT_GTT) {
 392                 sc->gtt_cnt++;
 393
 394                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 395                         type = RESET_TYPE_TX_GTT;
 396                         ath9k_queue_reset(sc, type);
 397                         atomic_inc(&ah->intr_ref_cnt);
 398                         ath_dbg(common, RESET,
 399                                 "GTT: Skipping interrupts\n");
 400                         goto out;
 401                 }
 402         }
 403
 404         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 405         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 406                 /*
 407                  * TSF sync does not look correct; remain awake to sync with
 408                  * the next Beacon.
 409                  */
 410                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 411                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 412         }
 413         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 414
 415         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 416                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 417                           ATH9K_INT_RXORN);
 418         else
 419                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 420
 421         if (status & rxmask) {
 422                 /* Check for high priority Rx first */
 423                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 424                     (status & ATH9K_INT_RXHP))
 425                         ath_rx_tasklet(sc, 0, true);
 426
 427                 ath_rx_tasklet(sc, 0, false);
 428         }
 429
 430         if (status & ATH9K_INT_TX) {
 431                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 432                         /*
 433                          * For EDMA chips, TX completion is enabled for the
 434                          * beacon queue, so if a beacon has been transmitted
 435                          * successfully after a GTT interrupt, the GTT counter
 436                          * gets reset to zero here.
 437                          */
 438                         sc->gtt_cnt = 0;
 439
 440                         ath_tx_edma_tasklet(sc);
 441                 } else {
 442                         ath_tx_tasklet(sc);
 443                 }
 444
 445                 wake_up(&sc->tx_wait);
 446         }
 447
 448         if (status & ATH9K_INT_GENTIMER)
 449                 ath_gen_timer_isr(sc->sc_ah);
 450
 451         ath9k_btcoex_handle_interrupt(sc, status);
 452
 453         /* re-enable hardware interrupt */
 454         ath9k_hw_enable_interrupts(ah);
 455 out:
 456         spin_unlock(&sc->sc_pcu_lock);
 457         ath9k_ps_restore(sc);
 458 }
 459
 460 irqreturn_t ath_isr(int irq, void *dev)
 461 {
 462 #define SCHED_INTR (                            \
 463                 ATH9K_INT_FATAL |               \
 464                 ATH9K_INT_BB_WATCHDOG |         \
 465                 ATH9K_INT_RXORN |               \
 466                 ATH9K_INT_RXEOL |               \
 467                 ATH9K_INT_RX |                  \
 468                 ATH9K_INT_RXLP |                \
 469                 ATH9K_INT_RXHP |                \
 470                 ATH9K_INT_TX |                  \
 471                 ATH9K_INT_BMISS |               \
 472                 ATH9K_INT_CST |                 \
 473                 ATH9K_INT_GTT |                 \
 474                 ATH9K_INT_TSFOOR |              \
 475                 ATH9K_INT_GENTIMER |            \
 476                 ATH9K_INT_MCI)
 477
 478         struct ath_softc *sc = dev;
 479         struct ath_hw *ah = sc->sc_ah;
 480         struct ath_common *common = ath9k_hw_common(ah);
 481         enum ath9k_int status;
 482         u32 sync_cause = 0;
 483         bool sched = false;
 484
 485         /*
 486          * The hardware is not ready/present, don't
 487          * touch anything. Note this can happen early
 488          * on if the IRQ is shared.
 489          */
 490         if (test_bit(ATH_OP_INVALID, &common->op_flags))
 491                 return IRQ_NONE;
 492
 493         /* shared irq, not for us */
 494
 495         if (!ath9k_hw_intrpend(ah))
 496                 return IRQ_NONE;
 497
 498         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 499                 ath9k_hw_kill_interrupts(ah);
 500                 return IRQ_HANDLED;
 501         }
 502
 503         /*
 504          * Figure out the reason(s) for the interrupt.  Note
 505          * that the hal returns a pseudo-ISR that may include
 506          * bits we haven't explicitly enabled so we mask the
 507          * value to insure we only process bits we requested.
 508          */
 509         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 510         ath9k_debug_sync_cause(sc, sync_cause);
 511         status &= ah->imask;    /* discard unasked-for bits */
 512
 513         /*
 514          * If there are no status bits set, then this interrupt was not
 515          * for me (should have been caught above).
 516          */
 517         if (!status)
 518                 return IRQ_NONE;
 519
 520         /* Cache the status */
 521         sc->intrstatus = status;
 522
 523         if (status & SCHED_INTR)
 524                 sched = true;
 525
 526         /*
 527          * If a FATAL or RXORN interrupt is received, we have to reset the
 528          * chip immediately.
 529          */
 530         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 531             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 532                 goto chip_reset;
 533
 534         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 535             (status & ATH9K_INT_BB_WATCHDOG))
 536                 goto chip_reset;
 537
 538 #ifdef CONFIG_ATH9K_WOW
 539         if (status & ATH9K_INT_BMISS) {
 540                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
 541                         atomic_inc(&sc->wow_got_bmiss_intr);
 542                         atomic_dec(&sc->wow_sleep_proc_intr);
 543                 }
 544         }
 545 #endif
 546
 547         if (status & ATH9K_INT_SWBA)
 548                 tasklet_schedule(&sc->bcon_tasklet);
 549
 550         if (status & ATH9K_INT_TXURN)
 551                 ath9k_hw_updatetxtriglevel(ah, true);
 552
 553         if (status & ATH9K_INT_RXEOL) {
 554                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 555                 ath9k_hw_set_interrupts(ah);
 556         }
 557
 558         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 559                 if (status & ATH9K_INT_TIM_TIMER) {
 560                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 561                                 goto chip_reset;
 562                         /* Clear RxAbort bit so that we can
 563                          * receive frames */
 564                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 565                         spin_lock(&sc->sc_pm_lock);
 566                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 567                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 568                         spin_unlock(&sc->sc_pm_lock);
 569                 }
 570
 571 chip_reset:
 572
 573         ath_debug_stat_interrupt(sc, status);
 574
 575         if (sched) {
 576                 /* turn off every interrupt */
 577                 ath9k_hw_disable_interrupts(ah);
 578                 tasklet_schedule(&sc->intr_tq);
 579         }
 580
 581         return IRQ_HANDLED;
 582
 583 #undef SCHED_INTR
 584 }
 585
 586 int ath_reset(struct ath_softc *sc)
 587 {
 588         int r;
 589
 590         ath9k_ps_wakeup(sc);
 591         r = ath_reset_internal(sc, NULL);
 592         ath9k_ps_restore(sc);
 593
 594         return r;
 595 }
 596
 597 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 598 {
 599         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 600 #ifdef CONFIG_ATH9K_DEBUGFS
 601         RESET_STAT_INC(sc, type);
 602 #endif
 603         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 604         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 605 }
 606
 607 void ath_reset_work(struct work_struct *work)
 608 {
 609         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 610
 611         ath_reset(sc);
 612 }
 613
 614 /**********************/
 615 /* mac80211 callbacks */
 616 /**********************/
 617
 618 static int ath9k_start(struct ieee80211_hw *hw)
 619 {
 620         struct ath_softc *sc = hw->priv;
 621         struct ath_hw *ah = sc->sc_ah;
 622         struct ath_common *common = ath9k_hw_common(ah);
 623         struct ieee80211_channel *curchan = hw->conf.chandef.chan;
 624         struct ath_chanctx *ctx = sc->cur_chan;
 625         struct ath9k_channel *init_channel;
 626         int r;
 627
 628         ath_dbg(common, CONFIG,
 629                 "Starting driver with initial channel: %d MHz\n",
 630                 curchan->center_freq);
 631
 632         ath9k_ps_wakeup(sc);
 633         mutex_lock(&sc->mutex);
 634
 635         memcpy(&ctx->chandef, &hw->conf.chandef, sizeof(ctx->chandef));
 636         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 637
 638         /* Reset SERDES registers */
 639         ath9k_hw_configpcipowersave(ah, false);
 640
 641         /*
 642          * The basic interface to setting the hardware in a good
 643          * state is ``reset''.  On return the hardware is known to
 644          * be powered up and with interrupts disabled.  This must
 645          * be followed by initialization of the appropriate bits
 646          * and then setup of the interrupt mask.
 647          */
 648         spin_lock_bh(&sc->sc_pcu_lock);
 649
 650         atomic_set(&ah->intr_ref_cnt, -1);
 651
 652         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 653         if (r) {
 654                 ath_err(common,
 655                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 656                         r, curchan->center_freq);
 657                 ah->reset_power_on = false;
 658         }
 659
 660         /* Setup our intr mask. */
 661         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 662                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 663                     ATH9K_INT_GLOBAL;
 664
 665         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 666                 ah->imask |= ATH9K_INT_RXHP |
 667                              ATH9K_INT_RXLP;
 668         else
 669                 ah->imask |= ATH9K_INT_RX;
 670
 671         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 672                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 673
 674         /*
 675          * Enable GTT interrupts only for AR9003/AR9004 chips
 676          * for now.
 677          */
 678         if (AR_SREV_9300_20_OR_LATER(ah))
 679                 ah->imask |= ATH9K_INT_GTT;
 680
 681         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 682                 ah->imask |= ATH9K_INT_CST;
 683
 684         ath_mci_enable(sc);
 685
 686         clear_bit(ATH_OP_INVALID, &common->op_flags);
 687         sc->sc_ah->is_monitoring = false;
 688
 689         if (!ath_complete_reset(sc, false))
 690                 ah->reset_power_on = false;
 691
 692         if (ah->led_pin >= 0) {
 693                 ath9k_hw_cfg_output(ah, ah->led_pin,
 694                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 695                 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 696         }
 697
 698         /*
 699          * Reset key cache to sane defaults (all entries cleared) instead of
 700          * semi-random values after suspend/resume.
 701          */
 702         ath9k_cmn_init_crypto(sc->sc_ah);
 703
 704         ath9k_hw_reset_tsf(ah);
 705
 706         spin_unlock_bh(&sc->sc_pcu_lock);
 707
 708         mutex_unlock(&sc->mutex);
 709
 710         ath9k_ps_restore(sc);
 711
 712         return 0;
 713 }
 714
 715 static void ath9k_tx(struct ieee80211_hw *hw,
 716                      struct ieee80211_tx_control *control,
 717                      struct sk_buff *skb)
 718 {
 719         struct ath_softc *sc = hw->priv;
 720         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 721         struct ath_tx_control txctl;
 722         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 723         unsigned long flags;
 724
 725         if (sc->ps_enabled) {
 726                 /*
 727                  * mac80211 does not set PM field for normal data frames, so we
 728                  * need to update that based on the current PS mode.
 729                  */
 730                 if (ieee80211_is_data(hdr->frame_control) &&
 731                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 732                     !ieee80211_has_pm(hdr->frame_control)) {
 733                         ath_dbg(common, PS,
 734                                 "Add PM=1 for a TX frame while in PS mode\n");
 735                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 736                 }
 737         }
 738
 739         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 740                 /*
 741                  * We are using PS-Poll and mac80211 can request TX while in
 742                  * power save mode. Need to wake up hardware for the TX to be
 743                  * completed and if needed, also for RX of buffered frames.
 744                  */
 745                 ath9k_ps_wakeup(sc);
 746                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 747                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 748                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 749                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 750                         ath_dbg(common, PS,
 751                                 "Sending PS-Poll to pick a buffered frame\n");
 752                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 753                 } else {
 754                         ath_dbg(common, PS, "Wake up to complete TX\n");
 755                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 756                 }
 757                 /*
 758                  * The actual restore operation will happen only after
 759                  * the ps_flags bit is cleared. We are just dropping
 760                  * the ps_usecount here.
 761                  */
 762                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 763                 ath9k_ps_restore(sc);
 764         }
 765
 766         /*
 767          * Cannot tx while the hardware is in full sleep, it first needs a full
 768          * chip reset to recover from that
 769          */
 770         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 771                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 772                 goto exit;
 773         }
 774
 775         memset(&txctl, 0, sizeof(struct ath_tx_control));
 776         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 777         txctl.sta = control->sta;
 778
 779         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 780
 781         if (ath_tx_start(hw, skb, &txctl) != 0) {
 782                 ath_dbg(common, XMIT, "TX failed\n");
 783                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 784                 goto exit;
 785         }
 786
 787         return;
 788 exit:
 789         ieee80211_free_txskb(hw, skb);
 790 }
 791
 792 static void ath9k_stop(struct ieee80211_hw *hw)
 793 {
 794         struct ath_softc *sc = hw->priv;
 795         struct ath_hw *ah = sc->sc_ah;
 796         struct ath_common *common = ath9k_hw_common(ah);
 797         bool prev_idle;
 798
 799         mutex_lock(&sc->mutex);
 800
 801         ath_cancel_work(sc);
 802
 803         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 804                 ath_dbg(common, ANY, "Device not present\n");
 805                 mutex_unlock(&sc->mutex);
 806                 return;
 807         }
 808
 809         /* Ensure HW is awake when we try to shut it down. */
 810         ath9k_ps_wakeup(sc);
 811
 812         spin_lock_bh(&sc->sc_pcu_lock);
 813
 814         /* prevent tasklets to enable interrupts once we disable them */
 815         ah->imask &= ~ATH9K_INT_GLOBAL;
 816
 817         /* make sure h/w will not generate any interrupt
 818          * before setting the invalid flag. */
 819         ath9k_hw_disable_interrupts(ah);
 820
 821         spin_unlock_bh(&sc->sc_pcu_lock);
 822
 823         /* we can now sync irq and kill any running tasklets, since we already
 824          * disabled interrupts and not holding a spin lock */
 825         synchronize_irq(sc->irq);
 826         tasklet_kill(&sc->intr_tq);
 827         tasklet_kill(&sc->bcon_tasklet);
 828
 829         prev_idle = sc->ps_idle;
 830         sc->ps_idle = true;
 831
 832         spin_lock_bh(&sc->sc_pcu_lock);
 833
 834         if (ah->led_pin >= 0) {
 835                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 836                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 837         }
 838
 839         ath_prepare_reset(sc);
 840
 841         if (sc->rx.frag) {
 842                 dev_kfree_skb_any(sc->rx.frag);
 843                 sc->rx.frag = NULL;
 844         }
 845
 846         if (!ah->curchan)
 847                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 848                                                     &sc->cur_chan->chandef);
 849
 850         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 851         ath9k_hw_phy_disable(ah);
 852
 853         ath9k_hw_configpcipowersave(ah, true);
 854
 855         spin_unlock_bh(&sc->sc_pcu_lock);
 856
 857         ath9k_ps_restore(sc);
 858
 859         set_bit(ATH_OP_INVALID, &common->op_flags);
 860         sc->ps_idle = prev_idle;
 861
 862         mutex_unlock(&sc->mutex);
 863
 864         ath_dbg(common, CONFIG, "Driver halt\n");
 865 }
 866
 867 static bool ath9k_uses_beacons(int type)
 868 {
 869         switch (type) {
 870         case NL80211_IFTYPE_AP:
 871         case NL80211_IFTYPE_ADHOC:
 872         case NL80211_IFTYPE_MESH_POINT:
 873                 return true;
 874         default:
 875                 return false;
 876         }
 877 }
 878
 879 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
 880 {
 881         struct ath9k_vif_iter_data *iter_data = data;
 882         int i;
 883
 884         if (iter_data->has_hw_macaddr) {
 885                 for (i = 0; i < ETH_ALEN; i++)
 886                         iter_data->mask[i] &=
 887                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 888         } else {
 889                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 890                 iter_data->has_hw_macaddr = true;
 891         }
 892
 893         switch (vif->type) {
 894         case NL80211_IFTYPE_AP:
 895                 iter_data->naps++;
 896                 break;
 897         case NL80211_IFTYPE_STATION:
 898                 iter_data->nstations++;
 899                 break;
 900         case NL80211_IFTYPE_ADHOC:
 901                 iter_data->nadhocs++;
 902                 break;
 903         case NL80211_IFTYPE_MESH_POINT:
 904                 iter_data->nmeshes++;
 905                 break;
 906         case NL80211_IFTYPE_WDS:
 907                 iter_data->nwds++;
 908                 break;
 909         default:
 910                 break;
 911         }
 912 }
 913
 914 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
 915 {
 916         struct ath_softc *sc = data;
 917         struct ath_vif *avp = (void *)vif->drv_priv;
 918
 919         if (vif->type != NL80211_IFTYPE_STATION)
 920                 return;
 921
 922         if (avp->primary_sta_vif)
 923                 ath9k_set_assoc_state(sc, vif);
 924 }
 925
 926 /* Called with sc->mutex held. */
 927 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
 928                                struct ieee80211_vif *vif,
 929                                struct ath9k_vif_iter_data *iter_data)
 930 {
 931         struct ath_softc *sc = hw->priv;
 932         struct ath_hw *ah = sc->sc_ah;
 933         struct ath_common *common = ath9k_hw_common(ah);
 934
 935         /*
 936          * Pick the MAC address of the first interface as the new hardware
 937          * MAC address. The hardware will use it together with the BSSID mask
 938          * when matching addresses.
 939          */
 940         memset(iter_data, 0, sizeof(*iter_data));
 941         memset(&iter_data->mask, 0xff, ETH_ALEN);
 942
 943         if (vif)
 944                 ath9k_vif_iter(iter_data, vif->addr, vif);
 945
 946         /* Get list of all active MAC addresses */
 947         ieee80211_iterate_active_interfaces_atomic(
 948                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
 949                 ath9k_vif_iter, iter_data);
 950
 951         memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
 952 }
 953
 954 /* Called with sc->mutex held. */
 955 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
 956                                           struct ieee80211_vif *vif)
 957 {
 958         struct ath_softc *sc = hw->priv;
 959         struct ath_hw *ah = sc->sc_ah;
 960         struct ath_common *common = ath9k_hw_common(ah);
 961         struct ath9k_vif_iter_data iter_data;
 962         enum nl80211_iftype old_opmode = ah->opmode;
 963
 964         ath9k_calculate_iter_data(hw, vif, &iter_data);
 965
 966         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
 967         ath_hw_setbssidmask(common);
 968
 969         if (iter_data.naps > 0) {
 970                 ath9k_hw_set_tsfadjust(ah, true);
 971                 ah->opmode = NL80211_IFTYPE_AP;
 972         } else {
 973                 ath9k_hw_set_tsfadjust(ah, false);
 974
 975                 if (iter_data.nmeshes)
 976                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
 977                 else if (iter_data.nwds)
 978                         ah->opmode = NL80211_IFTYPE_AP;
 979                 else if (iter_data.nadhocs)
 980                         ah->opmode = NL80211_IFTYPE_ADHOC;
 981                 else
 982                         ah->opmode = NL80211_IFTYPE_STATION;
 983         }
 984
 985         ath9k_hw_setopmode(ah);
 986
 987         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
 988                 ah->imask |= ATH9K_INT_TSFOOR;
 989         else
 990                 ah->imask &= ~ATH9K_INT_TSFOOR;
 991
 992         ath9k_hw_set_interrupts(ah);
 993
 994         /*
 995          * If we are changing the opmode to STATION,
 996          * a beacon sync needs to be done.
 997          */
 998         if (ah->opmode == NL80211_IFTYPE_STATION &&
 999             old_opmode == NL80211_IFTYPE_AP &&
1000             test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
1001                 ieee80211_iterate_active_interfaces_atomic(
1002                         sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1003                         ath9k_sta_vif_iter, sc);
1004         }
1005 }
1006
1007 static int ath9k_add_interface(struct ieee80211_hw *hw,
1008                                struct ieee80211_vif *vif)
1009 {
1010         struct ath_softc *sc = hw->priv;
1011         struct ath_hw *ah = sc->sc_ah;
1012         struct ath_common *common = ath9k_hw_common(ah);
1013         struct ath_vif *avp = (void *)vif->drv_priv;
1014         struct ath_node *an = &avp->mcast_node;
1015
1016         mutex_lock(&sc->mutex);
1017
1018         if (config_enabled(CONFIG_ATH9K_TX99)) {
1019                 if (sc->nvifs >= 1) {
1020                         mutex_unlock(&sc->mutex);
1021                         return -EOPNOTSUPP;
1022                 }
1023                 sc->tx99_vif = vif;
1024         }
1025
1026         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1027         sc->nvifs++;
1028
1029         ath9k_ps_wakeup(sc);
1030         ath9k_calculate_summary_state(hw, vif);
1031         ath9k_ps_restore(sc);
1032
1033         if (ath9k_uses_beacons(vif->type))
1034                 ath9k_beacon_assign_slot(sc, vif);
1035
1036         avp->vif = vif;
1037
1038         an->sc = sc;
1039         an->sta = NULL;
1040         an->vif = vif;
1041         an->no_ps_filter = true;
1042         ath_tx_node_init(sc, an);
1043
1044         mutex_unlock(&sc->mutex);
1045         return 0;
1046 }
1047
1048 static int ath9k_change_interface(struct ieee80211_hw *hw,
1049                                   struct ieee80211_vif *vif,
1050                                   enum nl80211_iftype new_type,
1051                                   bool p2p)
1052 {
1053         struct ath_softc *sc = hw->priv;
1054         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1055
1056         mutex_lock(&sc->mutex);
1057
1058         if (config_enabled(CONFIG_ATH9K_TX99)) {
1059                 mutex_unlock(&sc->mutex);
1060                 return -EOPNOTSUPP;
1061         }
1062
1063         ath_dbg(common, CONFIG, "Change Interface\n");
1064
1065         if (ath9k_uses_beacons(vif->type))
1066                 ath9k_beacon_remove_slot(sc, vif);
1067
1068         vif->type = new_type;
1069         vif->p2p = p2p;
1070
1071         ath9k_ps_wakeup(sc);
1072         ath9k_calculate_summary_state(hw, vif);
1073         ath9k_ps_restore(sc);
1074
1075         if (ath9k_uses_beacons(vif->type))
1076                 ath9k_beacon_assign_slot(sc, vif);
1077
1078         mutex_unlock(&sc->mutex);
1079         return 0;
1080 }
1081
1082 static void
1083 ath9k_update_p2p_ps_timer(struct ath_softc *sc, struct ath_vif *avp)
1084 {
1085         struct ath_hw *ah = sc->sc_ah;
1086         s32 tsf, target_tsf;
1087
1088         if (!avp || !avp->noa.has_next_tsf)
1089                 return;
1090
1091         ath9k_hw_gen_timer_stop(ah, sc->p2p_ps_timer);
1092
1093         tsf = ath9k_hw_gettsf32(sc->sc_ah);
1094
1095         target_tsf = avp->noa.next_tsf;
1096         if (!avp->noa.absent)
1097                 target_tsf -= ATH_P2P_PS_STOP_TIME;
1098
1099         if (target_tsf - tsf < ATH_P2P_PS_STOP_TIME)
1100                 target_tsf = tsf + ATH_P2P_PS_STOP_TIME;
1101
1102         ath9k_hw_gen_timer_start(ah, sc->p2p_ps_timer, (u32) target_tsf, 1000000);
1103 }
1104
1105 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1106                                    struct ieee80211_vif *vif)
1107 {
1108         struct ath_softc *sc = hw->priv;
1109         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1110         struct ath_vif *avp = (void *)vif->drv_priv;
1111
1112         ath_dbg(common, CONFIG, "Detach Interface\n");
1113
1114         mutex_lock(&sc->mutex);
1115
1116         spin_lock_bh(&sc->sc_pcu_lock);
1117         if (avp == sc->p2p_ps_vif) {
1118                 sc->p2p_ps_vif = NULL;
1119                 ath9k_update_p2p_ps_timer(sc, NULL);
1120         }
1121         spin_unlock_bh(&sc->sc_pcu_lock);
1122
1123         sc->nvifs--;
1124         sc->tx99_vif = NULL;
1125
1126         if (ath9k_uses_beacons(vif->type))
1127                 ath9k_beacon_remove_slot(sc, vif);
1128
1129         ath9k_ps_wakeup(sc);
1130         ath9k_calculate_summary_state(hw, NULL);
1131         ath9k_ps_restore(sc);
1132
1133         ath_tx_node_cleanup(sc, &avp->mcast_node);
1134
1135         mutex_unlock(&sc->mutex);
1136 }
1137
1138 static void ath9k_enable_ps(struct ath_softc *sc)
1139 {
1140         struct ath_hw *ah = sc->sc_ah;
1141         struct ath_common *common = ath9k_hw_common(ah);
1142
1143         if (config_enabled(CONFIG_ATH9K_TX99))
1144                 return;
1145
1146         sc->ps_enabled = true;
1147         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1148                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1149                         ah->imask |= ATH9K_INT_TIM_TIMER;
1150                         ath9k_hw_set_interrupts(ah);
1151                 }
1152                 ath9k_hw_setrxabort(ah, 1);
1153         }
1154         ath_dbg(common, PS, "PowerSave enabled\n");
1155 }
1156
1157 static void ath9k_disable_ps(struct ath_softc *sc)
1158 {
1159         struct ath_hw *ah = sc->sc_ah;
1160         struct ath_common *common = ath9k_hw_common(ah);
1161
1162         if (config_enabled(CONFIG_ATH9K_TX99))
1163                 return;
1164
1165         sc->ps_enabled = false;
1166         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1167         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1168                 ath9k_hw_setrxabort(ah, 0);
1169                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1170                                   PS_WAIT_FOR_CAB |
1171                                   PS_WAIT_FOR_PSPOLL_DATA |
1172                                   PS_WAIT_FOR_TX_ACK);
1173                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1174                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1175                         ath9k_hw_set_interrupts(ah);
1176                 }
1177         }
1178         ath_dbg(common, PS, "PowerSave disabled\n");
1179 }
1180
1181 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1182 {
1183         struct ath_softc *sc = hw->priv;
1184         struct ath_hw *ah = sc->sc_ah;
1185         struct ath_common *common = ath9k_hw_common(ah);
1186         u32 rxfilter;
1187
1188         if (config_enabled(CONFIG_ATH9K_TX99))
1189                 return;
1190
1191         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1192                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1193                 return;
1194         }
1195
1196         ath9k_ps_wakeup(sc);
1197         rxfilter = ath9k_hw_getrxfilter(ah);
1198         ath9k_hw_setrxfilter(ah, rxfilter |
1199                                  ATH9K_RX_FILTER_PHYRADAR |
1200                                  ATH9K_RX_FILTER_PHYERR);
1201
1202         /* TODO: usually this should not be neccesary, but for some reason
1203          * (or in some mode?) the trigger must be called after the
1204          * configuration, otherwise the register will have its values reset
1205          * (on my ar9220 to value 0x01002310)
1206          */
1207         ath9k_spectral_scan_config(hw, sc->spectral_mode);
1208         ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1209         ath9k_ps_restore(sc);
1210 }
1211
1212 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1213                                enum spectral_mode spectral_mode)
1214 {
1215         struct ath_softc *sc = hw->priv;
1216         struct ath_hw *ah = sc->sc_ah;
1217         struct ath_common *common = ath9k_hw_common(ah);
1218
1219         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1220                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1221                 return -1;
1222         }
1223
1224         switch (spectral_mode) {
1225         case SPECTRAL_DISABLED:
1226                 sc->spec_config.enabled = 0;
1227                 break;
1228         case SPECTRAL_BACKGROUND:
1229                 /* send endless samples.
1230                  * TODO: is this really useful for "background"?
1231                  */
1232                 sc->spec_config.endless = 1;
1233                 sc->spec_config.enabled = 1;
1234                 break;
1235         case SPECTRAL_CHANSCAN:
1236         case SPECTRAL_MANUAL:
1237                 sc->spec_config.endless = 0;
1238                 sc->spec_config.enabled = 1;
1239                 break;
1240         default:
1241                 return -1;
1242         }
1243
1244         ath9k_ps_wakeup(sc);
1245         ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1246         ath9k_ps_restore(sc);
1247
1248         sc->spectral_mode = spectral_mode;
1249
1250         return 0;
1251 }
1252
1253 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1254 {
1255         struct ath_softc *sc = hw->priv;
1256         struct ath_hw *ah = sc->sc_ah;
1257         struct ath_common *common = ath9k_hw_common(ah);
1258         struct ieee80211_conf *conf = &hw->conf;
1259         struct ath_chanctx *ctx = sc->cur_chan;
1260         bool reset_channel = false;
1261
1262         ath9k_ps_wakeup(sc);
1263         mutex_lock(&sc->mutex);
1264
1265         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1266                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1267                 if (sc->ps_idle) {
1268                         ath_cancel_work(sc);
1269                         ath9k_stop_btcoex(sc);
1270                 } else {
1271                         ath9k_start_btcoex(sc);
1272                         /*
1273                          * The chip needs a reset to properly wake up from
1274                          * full sleep
1275                          */
1276                         reset_channel = ah->chip_fullsleep;
1277                 }
1278         }
1279
1280         /*
1281          * We just prepare to enable PS. We have to wait until our AP has
1282          * ACK'd our null data frame to disable RX otherwise we'll ignore
1283          * those ACKs and end up retransmitting the same null data frames.
1284          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1285          */
1286         if (changed & IEEE80211_CONF_CHANGE_PS) {
1287                 unsigned long flags;
1288                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1289                 if (conf->flags & IEEE80211_CONF_PS)
1290                         ath9k_enable_ps(sc);
1291                 else
1292                         ath9k_disable_ps(sc);
1293                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1294         }
1295
1296         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1297                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1298                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1299                         sc->sc_ah->is_monitoring = true;
1300                 } else {
1301                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1302                         sc->sc_ah->is_monitoring = false;
1303                 }
1304         }
1305
1306         if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1307                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1308                 if (ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef) < 0) {
1309                         ath_err(common, "Unable to set channel\n");
1310                         mutex_unlock(&sc->mutex);
1311                         ath9k_ps_restore(sc);
1312                         return -EINVAL;
1313                 }
1314         }
1315
1316         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1317                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1318                 sc->cur_chan->txpower = 2 * conf->power_level;
1319                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1320                                        sc->cur_chan->txpower, &sc->curtxpow);
1321         }
1322
1323         mutex_unlock(&sc->mutex);
1324         ath9k_ps_restore(sc);
1325
1326         return 0;
1327 }
1328
1329 #define SUPPORTED_FILTERS                       \
1330         (FIF_PROMISC_IN_BSS |                   \
1331         FIF_ALLMULTI |                          \
1332         FIF_CONTROL |                           \
1333         FIF_PSPOLL |                            \
1334         FIF_OTHER_BSS |                         \
1335         FIF_BCN_PRBRESP_PROMISC |               \
1336         FIF_PROBE_REQ |                         \
1337         FIF_FCSFAIL)
1338
1339 /* FIXME: sc->sc_full_reset ? */
1340 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1341                                    unsigned int changed_flags,
1342                                    unsigned int *total_flags,
1343                                    u64 multicast)
1344 {
1345         struct ath_softc *sc = hw->priv;
1346         u32 rfilt;
1347
1348         changed_flags &= SUPPORTED_FILTERS;
1349         *total_flags &= SUPPORTED_FILTERS;
1350
1351         sc->rx.rxfilter = *total_flags;
1352         ath9k_ps_wakeup(sc);
1353         rfilt = ath_calcrxfilter(sc);
1354         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1355         ath9k_ps_restore(sc);
1356
1357         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1358                 rfilt);
1359 }
1360
1361 static int ath9k_sta_add(struct ieee80211_hw *hw,
1362                          struct ieee80211_vif *vif,
1363                          struct ieee80211_sta *sta)
1364 {
1365         struct ath_softc *sc = hw->priv;
1366         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1367         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1368         struct ieee80211_key_conf ps_key = { };
1369         int key;
1370
1371         ath_node_attach(sc, sta, vif);
1372
1373         if (vif->type != NL80211_IFTYPE_AP &&
1374             vif->type != NL80211_IFTYPE_AP_VLAN)
1375                 return 0;
1376
1377         key = ath_key_config(common, vif, sta, &ps_key);
1378         if (key > 0) {
1379                 an->ps_key = key;
1380                 an->key_idx[0] = key;
1381         }
1382
1383         return 0;
1384 }
1385
1386 static void ath9k_del_ps_key(struct ath_softc *sc,
1387                              struct ieee80211_vif *vif,
1388                              struct ieee80211_sta *sta)
1389 {
1390         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1391         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1392         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1393
1394         if (!an->ps_key)
1395             return;
1396
1397         ath_key_delete(common, &ps_key);
1398         an->ps_key = 0;
1399         an->key_idx[0] = 0;
1400 }
1401
1402 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1403                             struct ieee80211_vif *vif,
1404                             struct ieee80211_sta *sta)
1405 {
1406         struct ath_softc *sc = hw->priv;
1407
1408         ath9k_del_ps_key(sc, vif, sta);
1409         ath_node_detach(sc, sta);
1410
1411         return 0;
1412 }
1413
1414 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1415                                     struct ath_node *an,
1416                                     bool set)
1417 {
1418         int i;
1419
1420         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1421                 if (!an->key_idx[i])
1422                         continue;
1423                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1424         }
1425 }
1426
1427 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1428                          struct ieee80211_vif *vif,
1429                          enum sta_notify_cmd cmd,
1430                          struct ieee80211_sta *sta)
1431 {
1432         struct ath_softc *sc = hw->priv;
1433         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1434
1435         switch (cmd) {
1436         case STA_NOTIFY_SLEEP:
1437                 an->sleeping = true;
1438                 ath_tx_aggr_sleep(sta, sc, an);
1439                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1440                 break;
1441         case STA_NOTIFY_AWAKE:
1442                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1443                 an->sleeping = false;
1444                 ath_tx_aggr_wakeup(sc, an);
1445                 break;
1446         }
1447 }
1448
1449 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1450                          struct ieee80211_vif *vif, u16 queue,
1451                          const struct ieee80211_tx_queue_params *params)
1452 {
1453         struct ath_softc *sc = hw->priv;
1454         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1455         struct ath_txq *txq;
1456         struct ath9k_tx_queue_info qi;
1457         int ret = 0;
1458
1459         if (queue >= IEEE80211_NUM_ACS)
1460                 return 0;
1461
1462         txq = sc->tx.txq_map[queue];
1463
1464         ath9k_ps_wakeup(sc);
1465         mutex_lock(&sc->mutex);
1466
1467         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1468
1469         qi.tqi_aifs = params->aifs;
1470         qi.tqi_cwmin = params->cw_min;
1471         qi.tqi_cwmax = params->cw_max;
1472         qi.tqi_burstTime = params->txop * 32;
1473
1474         ath_dbg(common, CONFIG,
1475                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1476                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1477                 params->cw_max, params->txop);
1478
1479         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1480         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1481         if (ret)
1482                 ath_err(common, "TXQ Update failed\n");
1483
1484         mutex_unlock(&sc->mutex);
1485         ath9k_ps_restore(sc);
1486
1487         return ret;
1488 }
1489
1490 static int ath9k_set_key(struct ieee80211_hw *hw,
1491                          enum set_key_cmd cmd,
1492                          struct ieee80211_vif *vif,
1493                          struct ieee80211_sta *sta,
1494                          struct ieee80211_key_conf *key)
1495 {
1496         struct ath_softc *sc = hw->priv;
1497         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1498         struct ath_node *an = NULL;
1499         int ret = 0, i;
1500
1501         if (ath9k_modparam_nohwcrypt)
1502                 return -ENOSPC;
1503
1504         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1505              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1506             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1507              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1508             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1509                 /*
1510                  * For now, disable hw crypto for the RSN IBSS group keys. This
1511                  * could be optimized in the future to use a modified key cache
1512                  * design to support per-STA RX GTK, but until that gets
1513                  * implemented, use of software crypto for group addressed
1514                  * frames is a acceptable to allow RSN IBSS to be used.
1515                  */
1516                 return -EOPNOTSUPP;
1517         }
1518
1519         mutex_lock(&sc->mutex);
1520         ath9k_ps_wakeup(sc);
1521         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1522         if (sta)
1523                 an = (struct ath_node *)sta->drv_priv;
1524
1525         switch (cmd) {
1526         case SET_KEY:
1527                 if (sta)
1528                         ath9k_del_ps_key(sc, vif, sta);
1529
1530                 key->hw_key_idx = 0;
1531                 ret = ath_key_config(common, vif, sta, key);
1532                 if (ret >= 0) {
1533                         key->hw_key_idx = ret;
1534                         /* push IV and Michael MIC generation to stack */
1535                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1536                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1537                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1538                         if (sc->sc_ah->sw_mgmt_crypto &&
1539                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1540                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1541                         ret = 0;
1542                 }
1543                 if (an && key->hw_key_idx) {
1544                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1545                                 if (an->key_idx[i])
1546                                         continue;
1547                                 an->key_idx[i] = key->hw_key_idx;
1548                                 break;
1549                         }
1550                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1551                 }
1552                 break;
1553         case DISABLE_KEY:
1554                 ath_key_delete(common, key);
1555                 if (an) {
1556                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1557                                 if (an->key_idx[i] != key->hw_key_idx)
1558                                         continue;
1559                                 an->key_idx[i] = 0;
1560                                 break;
1561                         }
1562                 }
1563                 key->hw_key_idx = 0;
1564                 break;
1565         default:
1566                 ret = -EINVAL;
1567         }
1568
1569         ath9k_ps_restore(sc);
1570         mutex_unlock(&sc->mutex);
1571
1572         return ret;
1573 }
1574
1575 static void ath9k_set_assoc_state(struct ath_softc *sc,
1576                                   struct ieee80211_vif *vif)
1577 {
1578         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1579         struct ath_vif *avp = (void *)vif->drv_priv;
1580         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1581         unsigned long flags;
1582
1583         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1584         avp->primary_sta_vif = true;
1585
1586         /*
1587          * Set the AID, BSSID and do beacon-sync only when
1588          * the HW opmode is STATION.
1589          *
1590          * But the primary bit is set above in any case.
1591          */
1592         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1593                 return;
1594
1595         memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1596         common->curaid = bss_conf->aid;
1597         ath9k_hw_write_associd(sc->sc_ah);
1598
1599         common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1600         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1601
1602         spin_lock_irqsave(&sc->sc_pm_lock, flags);
1603         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1604         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1605
1606         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1607                 ath9k_mci_update_wlan_channels(sc, false);
1608
1609         ath_dbg(common, CONFIG,
1610                 "Primary Station interface: %pM, BSSID: %pM\n",
1611                 vif->addr, common->curbssid);
1612 }
1613
1614 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1615 {
1616         struct ath_softc *sc = data;
1617         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1618         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1619
1620         if (test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags))
1621                 return;
1622
1623         if (bss_conf->assoc)
1624                 ath9k_set_assoc_state(sc, vif);
1625 }
1626
1627 void ath9k_p2p_ps_timer(void *priv)
1628 {
1629         struct ath_softc *sc = priv;
1630         struct ath_vif *avp = sc->p2p_ps_vif;
1631         struct ieee80211_vif *vif;
1632         struct ieee80211_sta *sta;
1633         struct ath_node *an;
1634         u32 tsf;
1635
1636         if (!avp)
1637                 return;
1638
1639         tsf = ath9k_hw_gettsf32(sc->sc_ah);
1640         if (!avp->noa.absent)
1641                 tsf += ATH_P2P_PS_STOP_TIME;
1642
1643         if (!avp->noa.has_next_tsf ||
1644             avp->noa.next_tsf - tsf > BIT(31))
1645                 ieee80211_update_p2p_noa(&avp->noa, tsf);
1646
1647         ath9k_update_p2p_ps_timer(sc, avp);
1648
1649         rcu_read_lock();
1650
1651         vif = avp->vif;
1652         sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
1653         if (!sta)
1654                 goto out;
1655
1656         an = (void *) sta->drv_priv;
1657         if (an->sleeping == !!avp->noa.absent)
1658                 goto out;
1659
1660         an->sleeping = avp->noa.absent;
1661         if (an->sleeping)
1662                 ath_tx_aggr_sleep(sta, sc, an);
1663         else
1664                 ath_tx_aggr_wakeup(sc, an);
1665
1666 out:
1667         rcu_read_unlock();
1668 }
1669
1670 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif)
1671 {
1672         struct ath_vif *avp = (void *)vif->drv_priv;
1673         u32 tsf;
1674
1675         if (!sc->p2p_ps_timer)
1676                 return;
1677
1678         if (vif->type != NL80211_IFTYPE_STATION || !vif->p2p)
1679                 return;
1680
1681         sc->p2p_ps_vif = avp;
1682         tsf = ath9k_hw_gettsf32(sc->sc_ah);
1683         ieee80211_parse_p2p_noa(&vif->bss_conf.p2p_noa_attr, &avp->noa, tsf);
1684         ath9k_update_p2p_ps_timer(sc, avp);
1685 }
1686
1687 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1688                                    struct ieee80211_vif *vif,
1689                                    struct ieee80211_bss_conf *bss_conf,
1690                                    u32 changed)
1691 {
1692 #define CHECK_ANI                               \
1693         (BSS_CHANGED_ASSOC |                    \
1694          BSS_CHANGED_IBSS |                     \
1695          BSS_CHANGED_BEACON_ENABLED)
1696
1697         struct ath_softc *sc = hw->priv;
1698         struct ath_hw *ah = sc->sc_ah;
1699         struct ath_common *common = ath9k_hw_common(ah);
1700         struct ath_vif *avp = (void *)vif->drv_priv;
1701         unsigned long flags;
1702         int slottime;
1703
1704         ath9k_ps_wakeup(sc);
1705         mutex_lock(&sc->mutex);
1706
1707         if (changed & BSS_CHANGED_ASSOC) {
1708                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1709                         bss_conf->bssid, bss_conf->assoc);
1710
1711                 if (avp->primary_sta_vif && !bss_conf->assoc) {
1712                         clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1713                         avp->primary_sta_vif = false;
1714
1715                         if (ah->opmode == NL80211_IFTYPE_STATION)
1716                                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1717                 }
1718
1719                 ieee80211_iterate_active_interfaces_atomic(
1720                         sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1721                         ath9k_bss_assoc_iter, sc);
1722
1723                 if (!test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags) &&
1724                     ah->opmode == NL80211_IFTYPE_STATION) {
1725                         memset(common->curbssid, 0, ETH_ALEN);
1726                         common->curaid = 0;
1727                         ath9k_hw_write_associd(sc->sc_ah);
1728                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1729                                 ath9k_mci_update_wlan_channels(sc, true);
1730                 }
1731         }
1732
1733         if (changed & BSS_CHANGED_IBSS) {
1734                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1735                 common->curaid = bss_conf->aid;
1736                 ath9k_hw_write_associd(sc->sc_ah);
1737         }
1738
1739         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1740             (changed & BSS_CHANGED_BEACON_INT))
1741                 ath9k_beacon_config(sc, vif, changed);
1742
1743         if (changed & BSS_CHANGED_ERP_SLOT) {
1744                 if (bss_conf->use_short_slot)
1745                         slottime = 9;
1746                 else
1747                         slottime = 20;
1748                 if (vif->type == NL80211_IFTYPE_AP) {
1749                         /*
1750                          * Defer update, so that connected stations can adjust
1751                          * their settings at the same time.
1752                          * See beacon.c for more details
1753                          */
1754                         sc->beacon.slottime = slottime;
1755                         sc->beacon.updateslot = UPDATE;
1756                 } else {
1757                         ah->slottime = slottime;
1758                         ath9k_hw_init_global_settings(ah);
1759                 }
1760         }
1761
1762         if (changed & BSS_CHANGED_P2P_PS) {
1763                 spin_lock_bh(&sc->sc_pcu_lock);
1764                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1765                 if (!(sc->ps_flags & PS_BEACON_SYNC))
1766                         ath9k_update_p2p_ps(sc, vif);
1767                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1768                 spin_unlock_bh(&sc->sc_pcu_lock);
1769         }
1770
1771         if (changed & CHECK_ANI)
1772                 ath_check_ani(sc);
1773
1774         mutex_unlock(&sc->mutex);
1775         ath9k_ps_restore(sc);
1776
1777 #undef CHECK_ANI
1778 }
1779
1780 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1781 {
1782         struct ath_softc *sc = hw->priv;
1783         u64 tsf;
1784
1785         mutex_lock(&sc->mutex);
1786         ath9k_ps_wakeup(sc);
1787         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1788         ath9k_ps_restore(sc);
1789         mutex_unlock(&sc->mutex);
1790
1791         return tsf;
1792 }
1793
1794 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1795                           struct ieee80211_vif *vif,
1796                           u64 tsf)
1797 {
1798         struct ath_softc *sc = hw->priv;
1799
1800         mutex_lock(&sc->mutex);
1801         ath9k_ps_wakeup(sc);
1802         ath9k_hw_settsf64(sc->sc_ah, tsf);
1803         ath9k_ps_restore(sc);
1804         mutex_unlock(&sc->mutex);
1805 }
1806
1807 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1808 {
1809         struct ath_softc *sc = hw->priv;
1810
1811         mutex_lock(&sc->mutex);
1812
1813         ath9k_ps_wakeup(sc);
1814         ath9k_hw_reset_tsf(sc->sc_ah);
1815         ath9k_ps_restore(sc);
1816
1817         mutex_unlock(&sc->mutex);
1818 }
1819
1820 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1821                               struct ieee80211_vif *vif,
1822                               enum ieee80211_ampdu_mlme_action action,
1823                               struct ieee80211_sta *sta,
1824                               u16 tid, u16 *ssn, u8 buf_size)
1825 {
1826         struct ath_softc *sc = hw->priv;
1827         bool flush = false;
1828         int ret = 0;
1829
1830         mutex_lock(&sc->mutex);
1831
1832         switch (action) {
1833         case IEEE80211_AMPDU_RX_START:
1834                 break;
1835         case IEEE80211_AMPDU_RX_STOP:
1836                 break;
1837         case IEEE80211_AMPDU_TX_START:
1838                 ath9k_ps_wakeup(sc);
1839                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1840                 if (!ret)
1841                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1842                 ath9k_ps_restore(sc);
1843                 break;
1844         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1845         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1846                 flush = true;
1847         case IEEE80211_AMPDU_TX_STOP_CONT:
1848                 ath9k_ps_wakeup(sc);
1849                 ath_tx_aggr_stop(sc, sta, tid);
1850                 if (!flush)
1851                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1852                 ath9k_ps_restore(sc);
1853                 break;
1854         case IEEE80211_AMPDU_TX_OPERATIONAL:
1855                 ath9k_ps_wakeup(sc);
1856                 ath_tx_aggr_resume(sc, sta, tid);
1857                 ath9k_ps_restore(sc);
1858                 break;
1859         default:
1860                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1861         }
1862
1863         mutex_unlock(&sc->mutex);
1864
1865         return ret;
1866 }
1867
1868 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1869                              struct survey_info *survey)
1870 {
1871         struct ath_softc *sc = hw->priv;
1872         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1873         struct ieee80211_supported_band *sband;
1874         struct ieee80211_channel *chan;
1875         int pos;
1876
1877         if (config_enabled(CONFIG_ATH9K_TX99))
1878                 return -EOPNOTSUPP;
1879
1880         spin_lock_bh(&common->cc_lock);
1881         if (idx == 0)
1882                 ath_update_survey_stats(sc);
1883
1884         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1885         if (sband && idx >= sband->n_channels) {
1886                 idx -= sband->n_channels;
1887                 sband = NULL;
1888         }
1889
1890         if (!sband)
1891                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1892
1893         if (!sband || idx >= sband->n_channels) {
1894                 spin_unlock_bh(&common->cc_lock);
1895                 return -ENOENT;
1896         }
1897
1898         chan = &sband->channels[idx];
1899         pos = chan->hw_value;
1900         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1901         survey->channel = chan;
1902         spin_unlock_bh(&common->cc_lock);
1903
1904         return 0;
1905 }
1906
1907 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1908 {
1909         struct ath_softc *sc = hw->priv;
1910         struct ath_hw *ah = sc->sc_ah;
1911
1912         if (config_enabled(CONFIG_ATH9K_TX99))
1913                 return;
1914
1915         mutex_lock(&sc->mutex);
1916         ah->coverage_class = coverage_class;
1917
1918         ath9k_ps_wakeup(sc);
1919         ath9k_hw_init_global_settings(ah);
1920         ath9k_ps_restore(sc);
1921
1922         mutex_unlock(&sc->mutex);
1923 }
1924
1925 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1926 {
1927         int i, npend = 0;
1928
1929         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1930                 if (!ATH_TXQ_SETUP(sc, i))
1931                         continue;
1932
1933                 if (!sc->tx.txq[i].axq_depth)
1934                         continue;
1935
1936                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1937                 if (npend)
1938                         break;
1939         }
1940
1941         return !!npend;
1942 }
1943
1944 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1945                         u32 queues, bool drop)
1946 {
1947         struct ath_softc *sc = hw->priv;
1948         struct ath_hw *ah = sc->sc_ah;
1949         struct ath_common *common = ath9k_hw_common(ah);
1950         int timeout = HZ / 5; /* 200 ms */
1951         bool drain_txq;
1952
1953         mutex_lock(&sc->mutex);
1954         cancel_delayed_work_sync(&sc->tx_complete_work);
1955
1956         if (ah->ah_flags & AH_UNPLUGGED) {
1957                 ath_dbg(common, ANY, "Device has been unplugged!\n");
1958                 mutex_unlock(&sc->mutex);
1959                 return;
1960         }
1961
1962         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
1963                 ath_dbg(common, ANY, "Device not present\n");
1964                 mutex_unlock(&sc->mutex);
1965                 return;
1966         }
1967
1968         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1969                                timeout) > 0)
1970                 drop = false;
1971
1972         if (drop) {
1973                 ath9k_ps_wakeup(sc);
1974                 spin_lock_bh(&sc->sc_pcu_lock);
1975                 drain_txq = ath_drain_all_txq(sc);
1976                 spin_unlock_bh(&sc->sc_pcu_lock);
1977
1978                 if (!drain_txq)
1979                         ath_reset(sc);
1980
1981                 ath9k_ps_restore(sc);
1982                 ieee80211_wake_queues(hw);
1983         }
1984
1985         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1986         mutex_unlock(&sc->mutex);
1987 }
1988
1989 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1990 {
1991         struct ath_softc *sc = hw->priv;
1992         int i;
1993
1994         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1995                 if (!ATH_TXQ_SETUP(sc, i))
1996                         continue;
1997
1998                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1999                         return true;
2000         }
2001         return false;
2002 }
2003
2004 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2005 {
2006         struct ath_softc *sc = hw->priv;
2007         struct ath_hw *ah = sc->sc_ah;
2008         struct ieee80211_vif *vif;
2009         struct ath_vif *avp;
2010         struct ath_buf *bf;
2011         struct ath_tx_status ts;
2012         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2013         int status;
2014
2015         vif = sc->beacon.bslot[0];
2016         if (!vif)
2017                 return 0;
2018
2019         if (!vif->bss_conf.enable_beacon)
2020                 return 0;
2021
2022         avp = (void *)vif->drv_priv;
2023
2024         if (!sc->beacon.tx_processed && !edma) {
2025                 tasklet_disable(&sc->bcon_tasklet);
2026
2027                 bf = avp->av_bcbuf;
2028                 if (!bf || !bf->bf_mpdu)
2029                         goto skip;
2030
2031                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2032                 if (status == -EINPROGRESS)
2033                         goto skip;
2034
2035                 sc->beacon.tx_processed = true;
2036                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2037
2038 skip:
2039                 tasklet_enable(&sc->bcon_tasklet);
2040         }
2041
2042         return sc->beacon.tx_last;
2043 }
2044
2045 static int ath9k_get_stats(struct ieee80211_hw *hw,
2046                            struct ieee80211_low_level_stats *stats)
2047 {
2048         struct ath_softc *sc = hw->priv;
2049         struct ath_hw *ah = sc->sc_ah;
2050         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2051
2052         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2053         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2054         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2055         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2056         return 0;
2057 }
2058
2059 static u32 fill_chainmask(u32 cap, u32 new)
2060 {
2061         u32 filled = 0;
2062         int i;
2063
2064         for (i = 0; cap && new; i++, cap >>= 1) {
2065                 if (!(cap & BIT(0)))
2066                         continue;
2067
2068                 if (new & BIT(0))
2069                         filled |= BIT(i);
2070
2071                 new >>= 1;
2072         }
2073
2074         return filled;
2075 }
2076
2077 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2078 {
2079         if (AR_SREV_9300_20_OR_LATER(ah))
2080                 return true;
2081
2082         switch (val & 0x7) {
2083         case 0x1:
2084         case 0x3:
2085         case 0x7:
2086                 return true;
2087         case 0x2:
2088                 return (ah->caps.rx_chainmask == 1);
2089         default:
2090                 return false;
2091         }
2092 }
2093
2094 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2095 {
2096         struct ath_softc *sc = hw->priv;
2097         struct ath_hw *ah = sc->sc_ah;
2098
2099         if (ah->caps.rx_chainmask != 1)
2100                 rx_ant |= tx_ant;
2101
2102         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2103                 return -EINVAL;
2104
2105         sc->ant_rx = rx_ant;
2106         sc->ant_tx = tx_ant;
2107
2108         if (ah->caps.rx_chainmask == 1)
2109                 return 0;
2110
2111         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2112         if (AR_SREV_9100(ah))
2113                 ah->rxchainmask = 0x7;
2114         else
2115                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2116
2117         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2118         ath9k_cmn_reload_chainmask(ah);
2119
2120         return 0;
2121 }
2122
2123 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2124 {
2125         struct ath_softc *sc = hw->priv;
2126
2127         *tx_ant = sc->ant_tx;
2128         *rx_ant = sc->ant_rx;
2129         return 0;
2130 }
2131
2132 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2133 {
2134         struct ath_softc *sc = hw->priv;
2135         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2136         set_bit(ATH_OP_SCANNING, &common->op_flags);
2137 }
2138
2139 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2140 {
2141         struct ath_softc *sc = hw->priv;
2142         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2143         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2144 }
2145
2146 struct ieee80211_ops ath9k_ops = {
2147         .tx                 = ath9k_tx,
2148         .start              = ath9k_start,
2149         .stop               = ath9k_stop,
2150         .add_interface      = ath9k_add_interface,
2151         .change_interface   = ath9k_change_interface,
2152         .remove_interface   = ath9k_remove_interface,
2153         .config             = ath9k_config,
2154         .configure_filter   = ath9k_configure_filter,
2155         .sta_add            = ath9k_sta_add,
2156         .sta_remove         = ath9k_sta_remove,
2157         .sta_notify         = ath9k_sta_notify,
2158         .conf_tx            = ath9k_conf_tx,
2159         .bss_info_changed   = ath9k_bss_info_changed,
2160         .set_key            = ath9k_set_key,
2161         .get_tsf            = ath9k_get_tsf,
2162         .set_tsf            = ath9k_set_tsf,
2163         .reset_tsf          = ath9k_reset_tsf,
2164         .ampdu_action       = ath9k_ampdu_action,
2165         .get_survey         = ath9k_get_survey,
2166         .rfkill_poll        = ath9k_rfkill_poll_state,
2167         .set_coverage_class = ath9k_set_coverage_class,
2168         .flush              = ath9k_flush,
2169         .tx_frames_pending  = ath9k_tx_frames_pending,
2170         .tx_last_beacon     = ath9k_tx_last_beacon,
2171         .release_buffered_frames = ath9k_release_buffered_frames,
2172         .get_stats          = ath9k_get_stats,
2173         .set_antenna        = ath9k_set_antenna,
2174         .get_antenna        = ath9k_get_antenna,
2175
2176 #ifdef CONFIG_ATH9K_WOW
2177         .suspend            = ath9k_suspend,
2178         .resume             = ath9k_resume,
2179         .set_wakeup         = ath9k_set_wakeup,
2180 #endif
2181
2182 #ifdef CONFIG_ATH9K_DEBUGFS
2183         .get_et_sset_count  = ath9k_get_et_sset_count,
2184         .get_et_stats       = ath9k_get_et_stats,
2185         .get_et_strings     = ath9k_get_et_strings,
2186 #endif
2187
2188 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2189         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2190 #endif
2191         .sw_scan_start      = ath9k_sw_scan_start,
2192         .sw_scan_complete   = ath9k_sw_scan_complete,
2193 };