drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth)
  64                 pending = true;
  65
  66         if (txq->mac80211_qnum >= 0) {
  67                 struct list_head *list;
  68
  69                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  70                 if (!list_empty(list))
  71                         pending = true;
  72         }
  73         spin_unlock_bh(&txq->axq_lock);
  74         return pending;
  75 }
  76
  77 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  78 {
  79         unsigned long flags;
  80         bool ret;
  81
  82         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  83         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  84         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  85
  86         return ret;
  87 }
  88
  89 void ath_ps_full_sleep(unsigned long data)
  90 {
  91         struct ath_softc *sc = (struct ath_softc *) data;
  92         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  93         bool reset;
  94
  95         spin_lock(&common->cc_lock);
  96         ath_hw_cycle_counters_update(common);
  97         spin_unlock(&common->cc_lock);
  98
  99         ath9k_hw_setrxabort(sc->sc_ah, 1);
 100         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 101
 102         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 103 }
 104
 105 void ath9k_ps_wakeup(struct ath_softc *sc)
 106 {
 107         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 108         unsigned long flags;
 109         enum ath9k_power_mode power_mode;
 110
 111         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 112         if (++sc->ps_usecount != 1)
 113                 goto unlock;
 114
 115         del_timer_sync(&sc->sleep_timer);
 116         power_mode = sc->sc_ah->power_mode;
 117         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 118
 119         /*
 120          * While the hardware is asleep, the cycle counters contain no
 121          * useful data. Better clear them now so that they don't mess up
 122          * survey data results.
 123          */
 124         if (power_mode != ATH9K_PM_AWAKE) {
 125                 spin_lock(&common->cc_lock);
 126                 ath_hw_cycle_counters_update(common);
 127                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 128                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 129                 spin_unlock(&common->cc_lock);
 130         }
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 139         enum ath9k_power_mode mode;
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle) {
 147                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 148                 goto unlock;
 149         }
 150
 151         if (sc->ps_enabled &&
 152                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 153                                      PS_WAIT_FOR_CAB |
 154                                      PS_WAIT_FOR_PSPOLL_DATA |
 155                                      PS_WAIT_FOR_TX_ACK |
 156                                      PS_WAIT_FOR_ANI))) {
 157                 mode = ATH9K_PM_NETWORK_SLEEP;
 158                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 159                         ath9k_btcoex_stop_gen_timer(sc);
 160         } else {
 161                 goto unlock;
 162         }
 163
 164         spin_lock(&common->cc_lock);
 165         ath_hw_cycle_counters_update(common);
 166         spin_unlock(&common->cc_lock);
 167
 168         ath9k_hw_setpower(sc->sc_ah, mode);
 169
 170  unlock:
 171         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 172 }
 173
 174 static void __ath_cancel_work(struct ath_softc *sc)
 175 {
 176         cancel_work_sync(&sc->paprd_work);
 177         cancel_delayed_work_sync(&sc->tx_complete_work);
 178         cancel_delayed_work_sync(&sc->hw_pll_work);
 179
 180 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 181         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 182                 cancel_work_sync(&sc->mci_work);
 183 #endif
 184 }
 185
 186 void ath_cancel_work(struct ath_softc *sc)
 187 {
 188         __ath_cancel_work(sc);
 189         cancel_work_sync(&sc->hw_reset_work);
 190 }
 191
 192 void ath_restart_work(struct ath_softc *sc)
 193 {
 194         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 195
 196         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 197                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 198                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 199
 200         ath_start_ani(sc);
 201 }
 202
 203 static bool ath_prepare_reset(struct ath_softc *sc)
 204 {
 205         struct ath_hw *ah = sc->sc_ah;
 206         bool ret = true;
 207
 208         ieee80211_stop_queues(sc->hw);
 209         ath_stop_ani(sc);
 210         ath9k_hw_disable_interrupts(ah);
 211
 212         if (!ath_drain_all_txq(sc))
 213                 ret = false;
 214
 215         if (!ath_stoprecv(sc))
 216                 ret = false;
 217
 218         return ret;
 219 }
 220
 221 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 222 {
 223         struct ath_hw *ah = sc->sc_ah;
 224         struct ath_common *common = ath9k_hw_common(ah);
 225         unsigned long flags;
 226
 227         if (ath_startrecv(sc) != 0) {
 228                 ath_err(common, "Unable to restart recv logic\n");
 229                 return false;
 230         }
 231
 232         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 233                                sc->cur_chan->txpower, &sc->curtxpow);
 234
 235         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 236         ath9k_calculate_summary_state(sc, sc->cur_chan);
 237
 238         if (!sc->cur_chan->offchannel && start) {
 239                 /* restore per chanctx TSF timer */
 240                 if (sc->cur_chan->tsf_val) {
 241                         u32 offset;
 242
 243                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 244                                                          NULL);
 245                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 246                 }
 247
 248
 249                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 250                         goto work;
 251
 252                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 253                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 254                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 255                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 256                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 257                 } else {
 258                         ath9k_set_beacon(sc);
 259                 }
 260         work:
 261                 ath_restart_work(sc);
 262                 ath_txq_schedule_all(sc);
 263         }
 264
 265         sc->gtt_cnt = 0;
 266
 267         ath9k_hw_set_interrupts(ah);
 268         ath9k_hw_enable_interrupts(ah);
 269
 270         ieee80211_wake_queues(sc->hw);
 271
 272         ath9k_p2p_ps_timer(sc);
 273
 274         return true;
 275 }
 276
 277 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 278 {
 279         struct ath_hw *ah = sc->sc_ah;
 280         struct ath_common *common = ath9k_hw_common(ah);
 281         struct ath9k_hw_cal_data *caldata = NULL;
 282         bool fastcc = true;
 283         int r;
 284
 285         __ath_cancel_work(sc);
 286
 287         tasklet_disable(&sc->intr_tq);
 288         spin_lock_bh(&sc->sc_pcu_lock);
 289
 290         if (!sc->cur_chan->offchannel) {
 291                 fastcc = false;
 292                 caldata = &sc->cur_chan->caldata;
 293         }
 294
 295         if (!hchan) {
 296                 fastcc = false;
 297                 hchan = ah->curchan;
 298         }
 299
 300         if (!ath_prepare_reset(sc))
 301                 fastcc = false;
 302
 303         if (hchan) {
 304                 spin_lock_bh(&sc->chan_lock);
 305                 sc->cur_chandef = sc->cur_chan->chandef;
 306                 spin_unlock_bh(&sc->chan_lock);
 307         }
 308
 309         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 310                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 311
 312         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 313         if (r) {
 314                 ath_err(common,
 315                         "Unable to reset channel, reset status %d\n", r);
 316
 317                 ath9k_hw_enable_interrupts(ah);
 318                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 319
 320                 goto out;
 321         }
 322
 323         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 324             sc->cur_chan->offchannel)
 325                 ath9k_mci_set_txpower(sc, true, false);
 326
 327         if (!ath_complete_reset(sc, true))
 328                 r = -EIO;
 329
 330 out:
 331         spin_unlock_bh(&sc->sc_pcu_lock);
 332         tasklet_enable(&sc->intr_tq);
 333
 334         return r;
 335 }
 336
 337 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 338                             struct ieee80211_vif *vif)
 339 {
 340         struct ath_node *an;
 341         an = (struct ath_node *)sta->drv_priv;
 342
 343         an->sc = sc;
 344         an->sta = sta;
 345         an->vif = vif;
 346         memset(&an->key_idx, 0, sizeof(an->key_idx));
 347
 348         ath_tx_node_init(sc, an);
 349 }
 350
 351 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 352 {
 353         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 354         ath_tx_node_cleanup(sc, an);
 355 }
 356
 357 void ath9k_tasklet(unsigned long data)
 358 {
 359         struct ath_softc *sc = (struct ath_softc *)data;
 360         struct ath_hw *ah = sc->sc_ah;
 361         struct ath_common *common = ath9k_hw_common(ah);
 362         enum ath_reset_type type;
 363         unsigned long flags;
 364         u32 status = sc->intrstatus;
 365         u32 rxmask;
 366
 367         ath9k_ps_wakeup(sc);
 368         spin_lock(&sc->sc_pcu_lock);
 369
 370         if (status & ATH9K_INT_FATAL) {
 371                 type = RESET_TYPE_FATAL_INT;
 372                 ath9k_queue_reset(sc, type);
 373
 374                 /*
 375                  * Increment the ref. counter here so that
 376                  * interrupts are enabled in the reset routine.
 377                  */
 378                 atomic_inc(&ah->intr_ref_cnt);
 379                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 380                 goto out;
 381         }
 382
 383         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 384             (status & ATH9K_INT_BB_WATCHDOG)) {
 385                 spin_lock(&common->cc_lock);
 386                 ath_hw_cycle_counters_update(common);
 387                 ar9003_hw_bb_watchdog_dbg_info(ah);
 388                 spin_unlock(&common->cc_lock);
 389
 390                 if (ar9003_hw_bb_watchdog_check(ah)) {
 391                         type = RESET_TYPE_BB_WATCHDOG;
 392                         ath9k_queue_reset(sc, type);
 393
 394                         /*
 395                          * Increment the ref. counter here so that
 396                          * interrupts are enabled in the reset routine.
 397                          */
 398                         atomic_inc(&ah->intr_ref_cnt);
 399                         ath_dbg(common, RESET,
 400                                 "BB_WATCHDOG: Skipping interrupts\n");
 401                         goto out;
 402                 }
 403         }
 404
 405         if (status & ATH9K_INT_GTT) {
 406                 sc->gtt_cnt++;
 407
 408                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 409                         type = RESET_TYPE_TX_GTT;
 410                         ath9k_queue_reset(sc, type);
 411                         atomic_inc(&ah->intr_ref_cnt);
 412                         ath_dbg(common, RESET,
 413                                 "GTT: Skipping interrupts\n");
 414                         goto out;
 415                 }
 416         }
 417
 418         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 419         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 420                 /*
 421                  * TSF sync does not look correct; remain awake to sync with
 422                  * the next Beacon.
 423                  */
 424                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 425                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 426         }
 427         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 428
 429         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 430                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 431                           ATH9K_INT_RXORN);
 432         else
 433                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 434
 435         if (status & rxmask) {
 436                 /* Check for high priority Rx first */
 437                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 438                     (status & ATH9K_INT_RXHP))
 439                         ath_rx_tasklet(sc, 0, true);
 440
 441                 ath_rx_tasklet(sc, 0, false);
 442         }
 443
 444         if (status & ATH9K_INT_TX) {
 445                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 446                         /*
 447                          * For EDMA chips, TX completion is enabled for the
 448                          * beacon queue, so if a beacon has been transmitted
 449                          * successfully after a GTT interrupt, the GTT counter
 450                          * gets reset to zero here.
 451                          */
 452                         sc->gtt_cnt = 0;
 453
 454                         ath_tx_edma_tasklet(sc);
 455                 } else {
 456                         ath_tx_tasklet(sc);
 457                 }
 458
 459                 wake_up(&sc->tx_wait);
 460         }
 461
 462         if (status & ATH9K_INT_GENTIMER)
 463                 ath_gen_timer_isr(sc->sc_ah);
 464
 465         ath9k_btcoex_handle_interrupt(sc, status);
 466
 467         /* re-enable hardware interrupt */
 468         ath9k_hw_enable_interrupts(ah);
 469 out:
 470         spin_unlock(&sc->sc_pcu_lock);
 471         ath9k_ps_restore(sc);
 472 }
 473
 474 irqreturn_t ath_isr(int irq, void *dev)
 475 {
 476 #define SCHED_INTR (                            \
 477                 ATH9K_INT_FATAL |               \
 478                 ATH9K_INT_BB_WATCHDOG |         \
 479                 ATH9K_INT_RXORN |               \
 480                 ATH9K_INT_RXEOL |               \
 481                 ATH9K_INT_RX |                  \
 482                 ATH9K_INT_RXLP |                \
 483                 ATH9K_INT_RXHP |                \
 484                 ATH9K_INT_TX |                  \
 485                 ATH9K_INT_BMISS |               \
 486                 ATH9K_INT_CST |                 \
 487                 ATH9K_INT_GTT |                 \
 488                 ATH9K_INT_TSFOOR |              \
 489                 ATH9K_INT_GENTIMER |            \
 490                 ATH9K_INT_MCI)
 491
 492         struct ath_softc *sc = dev;
 493         struct ath_hw *ah = sc->sc_ah;
 494         struct ath_common *common = ath9k_hw_common(ah);
 495         enum ath9k_int status;
 496         u32 sync_cause = 0;
 497         bool sched = false;
 498
 499         /*
 500          * The hardware is not ready/present, don't
 501          * touch anything. Note this can happen early
 502          * on if the IRQ is shared.
 503          */
 504         if (test_bit(ATH_OP_INVALID, &common->op_flags))
 505                 return IRQ_NONE;
 506
 507         /* shared irq, not for us */
 508
 509         if (!ath9k_hw_intrpend(ah))
 510                 return IRQ_NONE;
 511
 512         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 513                 ath9k_hw_kill_interrupts(ah);
 514                 return IRQ_HANDLED;
 515         }
 516
 517         /*
 518          * Figure out the reason(s) for the interrupt.  Note
 519          * that the hal returns a pseudo-ISR that may include
 520          * bits we haven't explicitly enabled so we mask the
 521          * value to insure we only process bits we requested.
 522          */
 523         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 524         ath9k_debug_sync_cause(sc, sync_cause);
 525         status &= ah->imask;    /* discard unasked-for bits */
 526
 527         /*
 528          * If there are no status bits set, then this interrupt was not
 529          * for me (should have been caught above).
 530          */
 531         if (!status)
 532                 return IRQ_NONE;
 533
 534         /* Cache the status */
 535         sc->intrstatus = status;
 536
 537         if (status & SCHED_INTR)
 538                 sched = true;
 539
 540         /*
 541          * If a FATAL or RXORN interrupt is received, we have to reset the
 542          * chip immediately.
 543          */
 544         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 545             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 546                 goto chip_reset;
 547
 548         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 549             (status & ATH9K_INT_BB_WATCHDOG))
 550                 goto chip_reset;
 551
 552 #ifdef CONFIG_ATH9K_WOW
 553         if (status & ATH9K_INT_BMISS) {
 554                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
 555                         atomic_inc(&sc->wow_got_bmiss_intr);
 556                         atomic_dec(&sc->wow_sleep_proc_intr);
 557                 }
 558         }
 559 #endif
 560
 561         if (status & ATH9K_INT_SWBA)
 562                 tasklet_schedule(&sc->bcon_tasklet);
 563
 564         if (status & ATH9K_INT_TXURN)
 565                 ath9k_hw_updatetxtriglevel(ah, true);
 566
 567         if (status & ATH9K_INT_RXEOL) {
 568                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 569                 ath9k_hw_set_interrupts(ah);
 570         }
 571
 572         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 573                 if (status & ATH9K_INT_TIM_TIMER) {
 574                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 575                                 goto chip_reset;
 576                         /* Clear RxAbort bit so that we can
 577                          * receive frames */
 578                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 579                         spin_lock(&sc->sc_pm_lock);
 580                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 581                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 582                         spin_unlock(&sc->sc_pm_lock);
 583                 }
 584
 585 chip_reset:
 586
 587         ath_debug_stat_interrupt(sc, status);
 588
 589         if (sched) {
 590                 /* turn off every interrupt */
 591                 ath9k_hw_disable_interrupts(ah);
 592                 tasklet_schedule(&sc->intr_tq);
 593         }
 594
 595         return IRQ_HANDLED;
 596
 597 #undef SCHED_INTR
 598 }
 599
 600 int ath_reset(struct ath_softc *sc)
 601 {
 602         int r;
 603
 604         ath9k_ps_wakeup(sc);
 605         r = ath_reset_internal(sc, NULL);
 606         ath9k_ps_restore(sc);
 607
 608         return r;
 609 }
 610
 611 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 612 {
 613         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 614 #ifdef CONFIG_ATH9K_DEBUGFS
 615         RESET_STAT_INC(sc, type);
 616 #endif
 617         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 618         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 619 }
 620
 621 void ath_reset_work(struct work_struct *work)
 622 {
 623         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 624
 625         ath_reset(sc);
 626 }
 627
 628 /**********************/
 629 /* mac80211 callbacks */
 630 /**********************/
 631
 632 static int ath9k_start(struct ieee80211_hw *hw)
 633 {
 634         struct ath_softc *sc = hw->priv;
 635         struct ath_hw *ah = sc->sc_ah;
 636         struct ath_common *common = ath9k_hw_common(ah);
 637         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 638         struct ath_chanctx *ctx = sc->cur_chan;
 639         struct ath9k_channel *init_channel;
 640         int r;
 641
 642         ath_dbg(common, CONFIG,
 643                 "Starting driver with initial channel: %d MHz\n",
 644                 curchan->center_freq);
 645
 646         ath9k_ps_wakeup(sc);
 647         mutex_lock(&sc->mutex);
 648
 649         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 650         sc->cur_chandef = hw->conf.chandef;
 651
 652         /* Reset SERDES registers */
 653         ath9k_hw_configpcipowersave(ah, false);
 654
 655         /*
 656          * The basic interface to setting the hardware in a good
 657          * state is ``reset''.  On return the hardware is known to
 658          * be powered up and with interrupts disabled.  This must
 659          * be followed by initialization of the appropriate bits
 660          * and then setup of the interrupt mask.
 661          */
 662         spin_lock_bh(&sc->sc_pcu_lock);
 663
 664         atomic_set(&ah->intr_ref_cnt, -1);
 665
 666         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 667         if (r) {
 668                 ath_err(common,
 669                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 670                         r, curchan->center_freq);
 671                 ah->reset_power_on = false;
 672         }
 673
 674         /* Setup our intr mask. */
 675         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 676                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 677                     ATH9K_INT_GLOBAL;
 678
 679         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 680                 ah->imask |= ATH9K_INT_RXHP |
 681                              ATH9K_INT_RXLP;
 682         else
 683                 ah->imask |= ATH9K_INT_RX;
 684
 685         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 686                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 687
 688         /*
 689          * Enable GTT interrupts only for AR9003/AR9004 chips
 690          * for now.
 691          */
 692         if (AR_SREV_9300_20_OR_LATER(ah))
 693                 ah->imask |= ATH9K_INT_GTT;
 694
 695         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 696                 ah->imask |= ATH9K_INT_CST;
 697
 698         ath_mci_enable(sc);
 699
 700         clear_bit(ATH_OP_INVALID, &common->op_flags);
 701         sc->sc_ah->is_monitoring = false;
 702
 703         if (!ath_complete_reset(sc, false))
 704                 ah->reset_power_on = false;
 705
 706         if (ah->led_pin >= 0) {
 707                 ath9k_hw_cfg_output(ah, ah->led_pin,
 708                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 709                 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 710         }
 711
 712         /*
 713          * Reset key cache to sane defaults (all entries cleared) instead of
 714          * semi-random values after suspend/resume.
 715          */
 716         ath9k_cmn_init_crypto(sc->sc_ah);
 717
 718         ath9k_hw_reset_tsf(ah);
 719
 720         spin_unlock_bh(&sc->sc_pcu_lock);
 721
 722         mutex_unlock(&sc->mutex);
 723
 724         ath9k_ps_restore(sc);
 725
 726         return 0;
 727 }
 728
 729 static void ath9k_tx(struct ieee80211_hw *hw,
 730                      struct ieee80211_tx_control *control,
 731                      struct sk_buff *skb)
 732 {
 733         struct ath_softc *sc = hw->priv;
 734         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 735         struct ath_tx_control txctl;
 736         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 737         unsigned long flags;
 738
 739         if (sc->ps_enabled) {
 740                 /*
 741                  * mac80211 does not set PM field for normal data frames, so we
 742                  * need to update that based on the current PS mode.
 743                  */
 744                 if (ieee80211_is_data(hdr->frame_control) &&
 745                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 746                     !ieee80211_has_pm(hdr->frame_control)) {
 747                         ath_dbg(common, PS,
 748                                 "Add PM=1 for a TX frame while in PS mode\n");
 749                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 750                 }
 751         }
 752
 753         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 754                 /*
 755                  * We are using PS-Poll and mac80211 can request TX while in
 756                  * power save mode. Need to wake up hardware for the TX to be
 757                  * completed and if needed, also for RX of buffered frames.
 758                  */
 759                 ath9k_ps_wakeup(sc);
 760                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 761                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 762                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 763                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 764                         ath_dbg(common, PS,
 765                                 "Sending PS-Poll to pick a buffered frame\n");
 766                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 767                 } else {
 768                         ath_dbg(common, PS, "Wake up to complete TX\n");
 769                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 770                 }
 771                 /*
 772                  * The actual restore operation will happen only after
 773                  * the ps_flags bit is cleared. We are just dropping
 774                  * the ps_usecount here.
 775                  */
 776                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 777                 ath9k_ps_restore(sc);
 778         }
 779
 780         /*
 781          * Cannot tx while the hardware is in full sleep, it first needs a full
 782          * chip reset to recover from that
 783          */
 784         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 785                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 786                 goto exit;
 787         }
 788
 789         memset(&txctl, 0, sizeof(struct ath_tx_control));
 790         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 791         txctl.sta = control->sta;
 792
 793         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 794
 795         if (ath_tx_start(hw, skb, &txctl) != 0) {
 796                 ath_dbg(common, XMIT, "TX failed\n");
 797                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 798                 goto exit;
 799         }
 800
 801         return;
 802 exit:
 803         ieee80211_free_txskb(hw, skb);
 804 }
 805
 806 static void ath9k_stop(struct ieee80211_hw *hw)
 807 {
 808         struct ath_softc *sc = hw->priv;
 809         struct ath_hw *ah = sc->sc_ah;
 810         struct ath_common *common = ath9k_hw_common(ah);
 811         bool prev_idle;
 812
 813         cancel_work_sync(&sc->chanctx_work);
 814         mutex_lock(&sc->mutex);
 815
 816         ath_cancel_work(sc);
 817
 818         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 819                 ath_dbg(common, ANY, "Device not present\n");
 820                 mutex_unlock(&sc->mutex);
 821                 return;
 822         }
 823
 824         /* Ensure HW is awake when we try to shut it down. */
 825         ath9k_ps_wakeup(sc);
 826
 827         spin_lock_bh(&sc->sc_pcu_lock);
 828
 829         /* prevent tasklets to enable interrupts once we disable them */
 830         ah->imask &= ~ATH9K_INT_GLOBAL;
 831
 832         /* make sure h/w will not generate any interrupt
 833          * before setting the invalid flag. */
 834         ath9k_hw_disable_interrupts(ah);
 835
 836         spin_unlock_bh(&sc->sc_pcu_lock);
 837
 838         /* we can now sync irq and kill any running tasklets, since we already
 839          * disabled interrupts and not holding a spin lock */
 840         synchronize_irq(sc->irq);
 841         tasklet_kill(&sc->intr_tq);
 842         tasklet_kill(&sc->bcon_tasklet);
 843
 844         prev_idle = sc->ps_idle;
 845         sc->ps_idle = true;
 846
 847         spin_lock_bh(&sc->sc_pcu_lock);
 848
 849         if (ah->led_pin >= 0) {
 850                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 851                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 852         }
 853
 854         ath_prepare_reset(sc);
 855
 856         if (sc->rx.frag) {
 857                 dev_kfree_skb_any(sc->rx.frag);
 858                 sc->rx.frag = NULL;
 859         }
 860
 861         if (!ah->curchan)
 862                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 863                                                     &sc->cur_chan->chandef);
 864
 865         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 866         ath9k_hw_phy_disable(ah);
 867
 868         ath9k_hw_configpcipowersave(ah, true);
 869
 870         spin_unlock_bh(&sc->sc_pcu_lock);
 871
 872         ath9k_ps_restore(sc);
 873
 874         set_bit(ATH_OP_INVALID, &common->op_flags);
 875         sc->ps_idle = prev_idle;
 876
 877         mutex_unlock(&sc->mutex);
 878
 879         ath_dbg(common, CONFIG, "Driver halt\n");
 880 }
 881
 882 static bool ath9k_uses_beacons(int type)
 883 {
 884         switch (type) {
 885         case NL80211_IFTYPE_AP:
 886         case NL80211_IFTYPE_ADHOC:
 887         case NL80211_IFTYPE_MESH_POINT:
 888                 return true;
 889         default:
 890                 return false;
 891         }
 892 }
 893
 894 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
 895 {
 896         struct ath9k_vif_iter_data *iter_data = data;
 897         int i;
 898
 899         if (iter_data->has_hw_macaddr) {
 900                 for (i = 0; i < ETH_ALEN; i++)
 901                         iter_data->mask[i] &=
 902                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 903         } else {
 904                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 905                 iter_data->has_hw_macaddr = true;
 906         }
 907
 908         if (!vif->bss_conf.use_short_slot)
 909                 iter_data->slottime = ATH9K_SLOT_TIME_20;
 910
 911         switch (vif->type) {
 912         case NL80211_IFTYPE_AP:
 913                 iter_data->naps++;
 914                 if (vif->bss_conf.enable_beacon)
 915                         iter_data->beacons = true;
 916                 break;
 917         case NL80211_IFTYPE_STATION:
 918                 iter_data->nstations++;
 919                 if (vif->bss_conf.assoc && !iter_data->primary_sta)
 920                         iter_data->primary_sta = vif;
 921                 break;
 922         case NL80211_IFTYPE_ADHOC:
 923                 iter_data->nadhocs++;
 924                 if (vif->bss_conf.enable_beacon)
 925                         iter_data->beacons = true;
 926                 break;
 927         case NL80211_IFTYPE_MESH_POINT:
 928                 iter_data->nmeshes++;
 929                 if (vif->bss_conf.enable_beacon)
 930                         iter_data->beacons = true;
 931                 break;
 932         case NL80211_IFTYPE_WDS:
 933                 iter_data->nwds++;
 934                 break;
 935         default:
 936                 break;
 937         }
 938 }
 939
 940 /* Called with sc->mutex held. */
 941 void ath9k_calculate_iter_data(struct ath_softc *sc,
 942                                struct ath_chanctx *ctx,
 943                                struct ath9k_vif_iter_data *iter_data)
 944 {
 945         struct ath_vif *avp;
 946
 947         /*
 948          * Pick the MAC address of the first interface as the new hardware
 949          * MAC address. The hardware will use it together with the BSSID mask
 950          * when matching addresses.
 951          */
 952         memset(iter_data, 0, sizeof(*iter_data));
 953         memset(&iter_data->mask, 0xff, ETH_ALEN);
 954         iter_data->slottime = ATH9K_SLOT_TIME_9;
 955
 956         list_for_each_entry(avp, &ctx->vifs, list)
 957                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
 958
 959         if (ctx == &sc->offchannel.chan) {
 960                 struct ieee80211_vif *vif;
 961
 962                 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
 963                         vif = sc->offchannel.scan_vif;
 964                 else
 965                         vif = sc->offchannel.roc_vif;
 966
 967                 if (vif)
 968                         ath9k_vif_iter(iter_data, vif->addr, vif);
 969                 iter_data->beacons = false;
 970         }
 971 }
 972
 973 static void ath9k_set_assoc_state(struct ath_softc *sc,
 974                                   struct ieee80211_vif *vif, bool changed)
 975 {
 976         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 977         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
 978         unsigned long flags;
 979
 980         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
 981         /* Set the AID, BSSID and do beacon-sync only when
 982          * the HW opmode is STATION.
 983          *
 984          * But the primary bit is set above in any case.
 985          */
 986         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
 987                 return;
 988
 989         ether_addr_copy(common->curbssid, bss_conf->bssid);
 990         common->curaid = bss_conf->aid;
 991         ath9k_hw_write_associd(sc->sc_ah);
 992
 993         if (changed) {
 994                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
 995                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 996
 997                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 998                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 999                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1000         }
1001
1002         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1003                 ath9k_mci_update_wlan_channels(sc, false);
1004
1005         ath_dbg(common, CONFIG,
1006                 "Primary Station interface: %pM, BSSID: %pM\n",
1007                 vif->addr, common->curbssid);
1008 }
1009
1010 /* Called with sc->mutex held. */
1011 void ath9k_calculate_summary_state(struct ath_softc *sc,
1012                                    struct ath_chanctx *ctx)
1013 {
1014         struct ath_hw *ah = sc->sc_ah;
1015         struct ath_common *common = ath9k_hw_common(ah);
1016         struct ath9k_vif_iter_data iter_data;
1017
1018         ath_chanctx_check_active(sc, ctx);
1019
1020         if (ctx != sc->cur_chan)
1021                 return;
1022
1023         ath9k_ps_wakeup(sc);
1024         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1025
1026         if (iter_data.has_hw_macaddr)
1027                 ether_addr_copy(common->macaddr, iter_data.hw_macaddr);
1028
1029         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1030         ath_hw_setbssidmask(common);
1031
1032         if (iter_data.naps > 0) {
1033                 ath9k_hw_set_tsfadjust(ah, true);
1034                 ah->opmode = NL80211_IFTYPE_AP;
1035         } else {
1036                 ath9k_hw_set_tsfadjust(ah, false);
1037
1038                 if (iter_data.nmeshes)
1039                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1040                 else if (iter_data.nwds)
1041                         ah->opmode = NL80211_IFTYPE_AP;
1042                 else if (iter_data.nadhocs)
1043                         ah->opmode = NL80211_IFTYPE_ADHOC;
1044                 else
1045                         ah->opmode = NL80211_IFTYPE_STATION;
1046         }
1047
1048         ath9k_hw_setopmode(ah);
1049
1050         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1051                 ah->imask |= ATH9K_INT_TSFOOR;
1052         else
1053                 ah->imask &= ~ATH9K_INT_TSFOOR;
1054
1055         ah->imask &= ~ATH9K_INT_SWBA;
1056         if (ah->opmode == NL80211_IFTYPE_STATION) {
1057                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1058
1059                 iter_data.beacons = true;
1060                 if (iter_data.primary_sta) {
1061                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1062                                               changed);
1063                         if (!ctx->primary_sta ||
1064                             !ctx->primary_sta->bss_conf.assoc)
1065                                 ctx->primary_sta = iter_data.primary_sta;
1066                 } else {
1067                         ctx->primary_sta = NULL;
1068                         memset(common->curbssid, 0, ETH_ALEN);
1069                         common->curaid = 0;
1070                         ath9k_hw_write_associd(sc->sc_ah);
1071                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1072                                 ath9k_mci_update_wlan_channels(sc, true);
1073                 }
1074         } else if (iter_data.beacons) {
1075                 ah->imask |= ATH9K_INT_SWBA;
1076         }
1077         ath9k_hw_set_interrupts(ah);
1078
1079         if (iter_data.beacons)
1080                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1081         else
1082                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1083
1084         if (ah->slottime != iter_data.slottime) {
1085                 ah->slottime = iter_data.slottime;
1086                 ath9k_hw_init_global_settings(ah);
1087         }
1088
1089         if (iter_data.primary_sta)
1090                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1091         else
1092                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1093
1094         ctx->primary_sta = iter_data.primary_sta;
1095
1096         ath9k_ps_restore(sc);
1097 }
1098
1099 static int ath9k_add_interface(struct ieee80211_hw *hw,
1100                                struct ieee80211_vif *vif)
1101 {
1102         struct ath_softc *sc = hw->priv;
1103         struct ath_hw *ah = sc->sc_ah;
1104         struct ath_common *common = ath9k_hw_common(ah);
1105         struct ath_vif *avp = (void *)vif->drv_priv;
1106         struct ath_node *an = &avp->mcast_node;
1107
1108         mutex_lock(&sc->mutex);
1109
1110         if (config_enabled(CONFIG_ATH9K_TX99)) {
1111                 if (sc->nvifs >= 1) {
1112                         mutex_unlock(&sc->mutex);
1113                         return -EOPNOTSUPP;
1114                 }
1115                 sc->tx99_vif = vif;
1116         }
1117
1118         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1119         sc->nvifs++;
1120
1121         if (ath9k_uses_beacons(vif->type))
1122                 ath9k_beacon_assign_slot(sc, vif);
1123
1124         avp->vif = vif;
1125         if (!ath9k_use_chanctx) {
1126                 avp->chanctx = sc->cur_chan;
1127                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1128         }
1129
1130         an->sc = sc;
1131         an->sta = NULL;
1132         an->vif = vif;
1133         an->no_ps_filter = true;
1134         ath_tx_node_init(sc, an);
1135
1136         mutex_unlock(&sc->mutex);
1137         return 0;
1138 }
1139
1140 static int ath9k_change_interface(struct ieee80211_hw *hw,
1141                                   struct ieee80211_vif *vif,
1142                                   enum nl80211_iftype new_type,
1143                                   bool p2p)
1144 {
1145         struct ath_softc *sc = hw->priv;
1146         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1147         struct ath_vif *avp = (void *)vif->drv_priv;
1148
1149         mutex_lock(&sc->mutex);
1150
1151         if (config_enabled(CONFIG_ATH9K_TX99)) {
1152                 mutex_unlock(&sc->mutex);
1153                 return -EOPNOTSUPP;
1154         }
1155
1156         ath_dbg(common, CONFIG, "Change Interface\n");
1157
1158         if (ath9k_uses_beacons(vif->type))
1159                 ath9k_beacon_remove_slot(sc, vif);
1160
1161         vif->type = new_type;
1162         vif->p2p = p2p;
1163
1164         if (ath9k_uses_beacons(vif->type))
1165                 ath9k_beacon_assign_slot(sc, vif);
1166
1167         ath9k_calculate_summary_state(sc, avp->chanctx);
1168
1169         mutex_unlock(&sc->mutex);
1170         return 0;
1171 }
1172
1173 static void
1174 ath9k_update_p2p_ps_timer(struct ath_softc *sc, struct ath_vif *avp)
1175 {
1176         struct ath_hw *ah = sc->sc_ah;
1177         s32 tsf, target_tsf;
1178
1179         if (!avp || !avp->noa.has_next_tsf)
1180                 return;
1181
1182         ath9k_hw_gen_timer_stop(ah, sc->p2p_ps_timer);
1183
1184         tsf = ath9k_hw_gettsf32(sc->sc_ah);
1185
1186         target_tsf = avp->noa.next_tsf;
1187         if (!avp->noa.absent)
1188                 target_tsf -= ATH_P2P_PS_STOP_TIME;
1189
1190         if (target_tsf - tsf < ATH_P2P_PS_STOP_TIME)
1191                 target_tsf = tsf + ATH_P2P_PS_STOP_TIME;
1192
1193         ath9k_hw_gen_timer_start(ah, sc->p2p_ps_timer, (u32) target_tsf, 1000000);
1194 }
1195
1196 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1197                                    struct ieee80211_vif *vif)
1198 {
1199         struct ath_softc *sc = hw->priv;
1200         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1201         struct ath_vif *avp = (void *)vif->drv_priv;
1202
1203         ath_dbg(common, CONFIG, "Detach Interface\n");
1204
1205         mutex_lock(&sc->mutex);
1206
1207         spin_lock_bh(&sc->sc_pcu_lock);
1208         if (avp == sc->p2p_ps_vif) {
1209                 sc->p2p_ps_vif = NULL;
1210                 ath9k_update_p2p_ps_timer(sc, NULL);
1211         }
1212         spin_unlock_bh(&sc->sc_pcu_lock);
1213
1214         sc->nvifs--;
1215         sc->tx99_vif = NULL;
1216         if (!ath9k_use_chanctx)
1217                 list_del(&avp->list);
1218
1219         if (ath9k_uses_beacons(vif->type))
1220                 ath9k_beacon_remove_slot(sc, vif);
1221
1222         ath_tx_node_cleanup(sc, &avp->mcast_node);
1223
1224         mutex_unlock(&sc->mutex);
1225 }
1226
1227 static void ath9k_enable_ps(struct ath_softc *sc)
1228 {
1229         struct ath_hw *ah = sc->sc_ah;
1230         struct ath_common *common = ath9k_hw_common(ah);
1231
1232         if (config_enabled(CONFIG_ATH9K_TX99))
1233                 return;
1234
1235         sc->ps_enabled = true;
1236         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1237                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1238                         ah->imask |= ATH9K_INT_TIM_TIMER;
1239                         ath9k_hw_set_interrupts(ah);
1240                 }
1241                 ath9k_hw_setrxabort(ah, 1);
1242         }
1243         ath_dbg(common, PS, "PowerSave enabled\n");
1244 }
1245
1246 static void ath9k_disable_ps(struct ath_softc *sc)
1247 {
1248         struct ath_hw *ah = sc->sc_ah;
1249         struct ath_common *common = ath9k_hw_common(ah);
1250
1251         if (config_enabled(CONFIG_ATH9K_TX99))
1252                 return;
1253
1254         sc->ps_enabled = false;
1255         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1256         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1257                 ath9k_hw_setrxabort(ah, 0);
1258                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1259                                   PS_WAIT_FOR_CAB |
1260                                   PS_WAIT_FOR_PSPOLL_DATA |
1261                                   PS_WAIT_FOR_TX_ACK);
1262                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1263                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1264                         ath9k_hw_set_interrupts(ah);
1265                 }
1266         }
1267         ath_dbg(common, PS, "PowerSave disabled\n");
1268 }
1269
1270 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1271 {
1272         struct ath_softc *sc = hw->priv;
1273         struct ath_hw *ah = sc->sc_ah;
1274         struct ath_common *common = ath9k_hw_common(ah);
1275         u32 rxfilter;
1276
1277         if (config_enabled(CONFIG_ATH9K_TX99))
1278                 return;
1279
1280         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1281                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1282                 return;
1283         }
1284
1285         ath9k_ps_wakeup(sc);
1286         rxfilter = ath9k_hw_getrxfilter(ah);
1287         ath9k_hw_setrxfilter(ah, rxfilter |
1288                                  ATH9K_RX_FILTER_PHYRADAR |
1289                                  ATH9K_RX_FILTER_PHYERR);
1290
1291         /* TODO: usually this should not be neccesary, but for some reason
1292          * (or in some mode?) the trigger must be called after the
1293          * configuration, otherwise the register will have its values reset
1294          * (on my ar9220 to value 0x01002310)
1295          */
1296         ath9k_spectral_scan_config(hw, sc->spectral_mode);
1297         ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1298         ath9k_ps_restore(sc);
1299 }
1300
1301 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1302                                enum spectral_mode spectral_mode)
1303 {
1304         struct ath_softc *sc = hw->priv;
1305         struct ath_hw *ah = sc->sc_ah;
1306         struct ath_common *common = ath9k_hw_common(ah);
1307
1308         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1309                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1310                 return -1;
1311         }
1312
1313         switch (spectral_mode) {
1314         case SPECTRAL_DISABLED:
1315                 sc->spec_config.enabled = 0;
1316                 break;
1317         case SPECTRAL_BACKGROUND:
1318                 /* send endless samples.
1319                  * TODO: is this really useful for "background"?
1320                  */
1321                 sc->spec_config.endless = 1;
1322                 sc->spec_config.enabled = 1;
1323                 break;
1324         case SPECTRAL_CHANSCAN:
1325         case SPECTRAL_MANUAL:
1326                 sc->spec_config.endless = 0;
1327                 sc->spec_config.enabled = 1;
1328                 break;
1329         default:
1330                 return -1;
1331         }
1332
1333         ath9k_ps_wakeup(sc);
1334         ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1335         ath9k_ps_restore(sc);
1336
1337         sc->spectral_mode = spectral_mode;
1338
1339         return 0;
1340 }
1341
1342 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1343 {
1344         struct ath_softc *sc = hw->priv;
1345         struct ath_hw *ah = sc->sc_ah;
1346         struct ath_common *common = ath9k_hw_common(ah);
1347         struct ieee80211_conf *conf = &hw->conf;
1348         struct ath_chanctx *ctx = sc->cur_chan;
1349
1350         ath9k_ps_wakeup(sc);
1351         mutex_lock(&sc->mutex);
1352
1353         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1354                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1355                 if (sc->ps_idle) {
1356                         ath_cancel_work(sc);
1357                         ath9k_stop_btcoex(sc);
1358                 } else {
1359                         ath9k_start_btcoex(sc);
1360                         /*
1361                          * The chip needs a reset to properly wake up from
1362                          * full sleep
1363                          */
1364                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1365                 }
1366         }
1367
1368         /*
1369          * We just prepare to enable PS. We have to wait until our AP has
1370          * ACK'd our null data frame to disable RX otherwise we'll ignore
1371          * those ACKs and end up retransmitting the same null data frames.
1372          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1373          */
1374         if (changed & IEEE80211_CONF_CHANGE_PS) {
1375                 unsigned long flags;
1376                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1377                 if (conf->flags & IEEE80211_CONF_PS)
1378                         ath9k_enable_ps(sc);
1379                 else
1380                         ath9k_disable_ps(sc);
1381                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1382         }
1383
1384         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1385                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1386                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1387                         sc->sc_ah->is_monitoring = true;
1388                 } else {
1389                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1390                         sc->sc_ah->is_monitoring = false;
1391                 }
1392         }
1393
1394         if (!ath9k_use_chanctx && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1395                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1396                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1397         }
1398
1399         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1400                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1401                 sc->cur_chan->txpower = 2 * conf->power_level;
1402                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1403                                        sc->cur_chan->txpower, &sc->curtxpow);
1404         }
1405
1406         mutex_unlock(&sc->mutex);
1407         ath9k_ps_restore(sc);
1408
1409         return 0;
1410 }
1411
1412 #define SUPPORTED_FILTERS                       \
1413         (FIF_PROMISC_IN_BSS |                   \
1414         FIF_ALLMULTI |                          \
1415         FIF_CONTROL |                           \
1416         FIF_PSPOLL |                            \
1417         FIF_OTHER_BSS |                         \
1418         FIF_BCN_PRBRESP_PROMISC |               \
1419         FIF_PROBE_REQ |                         \
1420         FIF_FCSFAIL)
1421
1422 /* FIXME: sc->sc_full_reset ? */
1423 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1424                                    unsigned int changed_flags,
1425                                    unsigned int *total_flags,
1426                                    u64 multicast)
1427 {
1428         struct ath_softc *sc = hw->priv;
1429         u32 rfilt;
1430
1431         changed_flags &= SUPPORTED_FILTERS;
1432         *total_flags &= SUPPORTED_FILTERS;
1433
1434         sc->rx.rxfilter = *total_flags;
1435         ath9k_ps_wakeup(sc);
1436         rfilt = ath_calcrxfilter(sc);
1437         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1438         ath9k_ps_restore(sc);
1439
1440         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1441                 rfilt);
1442 }
1443
1444 static int ath9k_sta_add(struct ieee80211_hw *hw,
1445                          struct ieee80211_vif *vif,
1446                          struct ieee80211_sta *sta)
1447 {
1448         struct ath_softc *sc = hw->priv;
1449         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1450         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1451         struct ieee80211_key_conf ps_key = { };
1452         int key;
1453
1454         ath_node_attach(sc, sta, vif);
1455
1456         if (vif->type != NL80211_IFTYPE_AP &&
1457             vif->type != NL80211_IFTYPE_AP_VLAN)
1458                 return 0;
1459
1460         key = ath_key_config(common, vif, sta, &ps_key);
1461         if (key > 0) {
1462                 an->ps_key = key;
1463                 an->key_idx[0] = key;
1464         }
1465
1466         return 0;
1467 }
1468
1469 static void ath9k_del_ps_key(struct ath_softc *sc,
1470                              struct ieee80211_vif *vif,
1471                              struct ieee80211_sta *sta)
1472 {
1473         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1474         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1475         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1476
1477         if (!an->ps_key)
1478             return;
1479
1480         ath_key_delete(common, &ps_key);
1481         an->ps_key = 0;
1482         an->key_idx[0] = 0;
1483 }
1484
1485 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1486                             struct ieee80211_vif *vif,
1487                             struct ieee80211_sta *sta)
1488 {
1489         struct ath_softc *sc = hw->priv;
1490
1491         ath9k_del_ps_key(sc, vif, sta);
1492         ath_node_detach(sc, sta);
1493
1494         return 0;
1495 }
1496
1497 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1498                                     struct ath_node *an,
1499                                     bool set)
1500 {
1501         int i;
1502
1503         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1504                 if (!an->key_idx[i])
1505                         continue;
1506                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1507         }
1508 }
1509
1510 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1511                          struct ieee80211_vif *vif,
1512                          enum sta_notify_cmd cmd,
1513                          struct ieee80211_sta *sta)
1514 {
1515         struct ath_softc *sc = hw->priv;
1516         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1517
1518         switch (cmd) {
1519         case STA_NOTIFY_SLEEP:
1520                 an->sleeping = true;
1521                 ath_tx_aggr_sleep(sta, sc, an);
1522                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1523                 break;
1524         case STA_NOTIFY_AWAKE:
1525                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1526                 an->sleeping = false;
1527                 ath_tx_aggr_wakeup(sc, an);
1528                 break;
1529         }
1530 }
1531
1532 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1533                          struct ieee80211_vif *vif, u16 queue,
1534                          const struct ieee80211_tx_queue_params *params)
1535 {
1536         struct ath_softc *sc = hw->priv;
1537         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1538         struct ath_txq *txq;
1539         struct ath9k_tx_queue_info qi;
1540         int ret = 0;
1541
1542         if (queue >= IEEE80211_NUM_ACS)
1543                 return 0;
1544
1545         txq = sc->tx.txq_map[queue];
1546
1547         ath9k_ps_wakeup(sc);
1548         mutex_lock(&sc->mutex);
1549
1550         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1551
1552         qi.tqi_aifs = params->aifs;
1553         qi.tqi_cwmin = params->cw_min;
1554         qi.tqi_cwmax = params->cw_max;
1555         qi.tqi_burstTime = params->txop * 32;
1556
1557         ath_dbg(common, CONFIG,
1558                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1559                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1560                 params->cw_max, params->txop);
1561
1562         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1563         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1564         if (ret)
1565                 ath_err(common, "TXQ Update failed\n");
1566
1567         mutex_unlock(&sc->mutex);
1568         ath9k_ps_restore(sc);
1569
1570         return ret;
1571 }
1572
1573 static int ath9k_set_key(struct ieee80211_hw *hw,
1574                          enum set_key_cmd cmd,
1575                          struct ieee80211_vif *vif,
1576                          struct ieee80211_sta *sta,
1577                          struct ieee80211_key_conf *key)
1578 {
1579         struct ath_softc *sc = hw->priv;
1580         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1581         struct ath_node *an = NULL;
1582         int ret = 0, i;
1583
1584         if (ath9k_modparam_nohwcrypt)
1585                 return -ENOSPC;
1586
1587         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1588              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1589             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1590              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1591             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1592                 /*
1593                  * For now, disable hw crypto for the RSN IBSS group keys. This
1594                  * could be optimized in the future to use a modified key cache
1595                  * design to support per-STA RX GTK, but until that gets
1596                  * implemented, use of software crypto for group addressed
1597                  * frames is a acceptable to allow RSN IBSS to be used.
1598                  */
1599                 return -EOPNOTSUPP;
1600         }
1601
1602         mutex_lock(&sc->mutex);
1603         ath9k_ps_wakeup(sc);
1604         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1605         if (sta)
1606                 an = (struct ath_node *)sta->drv_priv;
1607
1608         switch (cmd) {
1609         case SET_KEY:
1610                 if (sta)
1611                         ath9k_del_ps_key(sc, vif, sta);
1612
1613                 key->hw_key_idx = 0;
1614                 ret = ath_key_config(common, vif, sta, key);
1615                 if (ret >= 0) {
1616                         key->hw_key_idx = ret;
1617                         /* push IV and Michael MIC generation to stack */
1618                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1619                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1620                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1621                         if (sc->sc_ah->sw_mgmt_crypto &&
1622                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1623                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1624                         ret = 0;
1625                 }
1626                 if (an && key->hw_key_idx) {
1627                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1628                                 if (an->key_idx[i])
1629                                         continue;
1630                                 an->key_idx[i] = key->hw_key_idx;
1631                                 break;
1632                         }
1633                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1634                 }
1635                 break;
1636         case DISABLE_KEY:
1637                 ath_key_delete(common, key);
1638                 if (an) {
1639                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1640                                 if (an->key_idx[i] != key->hw_key_idx)
1641                                         continue;
1642                                 an->key_idx[i] = 0;
1643                                 break;
1644                         }
1645                 }
1646                 key->hw_key_idx = 0;
1647                 break;
1648         default:
1649                 ret = -EINVAL;
1650         }
1651
1652         ath9k_ps_restore(sc);
1653         mutex_unlock(&sc->mutex);
1654
1655         return ret;
1656 }
1657
1658 void ath9k_p2p_ps_timer(void *priv)
1659 {
1660         struct ath_softc *sc = priv;
1661         struct ath_vif *avp = sc->p2p_ps_vif;
1662         struct ieee80211_vif *vif;
1663         struct ieee80211_sta *sta;
1664         struct ath_node *an;
1665         u32 tsf;
1666
1667         if (!avp || avp->chanctx != sc->cur_chan)
1668                 return;
1669
1670         tsf = ath9k_hw_gettsf32(sc->sc_ah);
1671         if (!avp->noa.absent)
1672                 tsf += ATH_P2P_PS_STOP_TIME;
1673
1674         if (!avp->noa.has_next_tsf ||
1675             avp->noa.next_tsf - tsf > BIT(31))
1676                 ieee80211_update_p2p_noa(&avp->noa, tsf);
1677
1678         ath9k_update_p2p_ps_timer(sc, avp);
1679
1680         rcu_read_lock();
1681
1682         vif = avp->vif;
1683         sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
1684         if (!sta)
1685                 goto out;
1686
1687         an = (void *) sta->drv_priv;
1688         if (an->sleeping == !!avp->noa.absent)
1689                 goto out;
1690
1691         an->sleeping = avp->noa.absent;
1692         if (an->sleeping)
1693                 ath_tx_aggr_sleep(sta, sc, an);
1694         else
1695                 ath_tx_aggr_wakeup(sc, an);
1696
1697 out:
1698         rcu_read_unlock();
1699 }
1700
1701 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif)
1702 {
1703         struct ath_vif *avp = (void *)vif->drv_priv;
1704         u32 tsf;
1705
1706         if (!sc->p2p_ps_timer)
1707                 return;
1708
1709         if (vif->type != NL80211_IFTYPE_STATION || !vif->p2p)
1710                 return;
1711
1712         sc->p2p_ps_vif = avp;
1713         tsf = ath9k_hw_gettsf32(sc->sc_ah);
1714         ieee80211_parse_p2p_noa(&vif->bss_conf.p2p_noa_attr, &avp->noa, tsf);
1715         ath9k_update_p2p_ps_timer(sc, avp);
1716 }
1717
1718 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1719                                    struct ieee80211_vif *vif,
1720                                    struct ieee80211_bss_conf *bss_conf,
1721                                    u32 changed)
1722 {
1723 #define CHECK_ANI                               \
1724         (BSS_CHANGED_ASSOC |                    \
1725          BSS_CHANGED_IBSS |                     \
1726          BSS_CHANGED_BEACON_ENABLED)
1727
1728         struct ath_softc *sc = hw->priv;
1729         struct ath_hw *ah = sc->sc_ah;
1730         struct ath_common *common = ath9k_hw_common(ah);
1731         struct ath_vif *avp = (void *)vif->drv_priv;
1732         unsigned long flags;
1733         int slottime;
1734
1735         ath9k_ps_wakeup(sc);
1736         mutex_lock(&sc->mutex);
1737
1738         if (changed & BSS_CHANGED_ASSOC) {
1739                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1740                         bss_conf->bssid, bss_conf->assoc);
1741
1742                 ath9k_calculate_summary_state(sc, avp->chanctx);
1743         }
1744
1745         if (changed & BSS_CHANGED_IBSS) {
1746                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1747                 common->curaid = bss_conf->aid;
1748                 ath9k_hw_write_associd(sc->sc_ah);
1749         }
1750
1751         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1752             (changed & BSS_CHANGED_BEACON_INT)) {
1753                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1754                         ath9k_calculate_summary_state(sc, avp->chanctx);
1755                 ath9k_beacon_config(sc, vif, changed);
1756         }
1757
1758         if ((avp->chanctx == sc->cur_chan) &&
1759             (changed & BSS_CHANGED_ERP_SLOT)) {
1760                 if (bss_conf->use_short_slot)
1761                         slottime = 9;
1762                 else
1763                         slottime = 20;
1764                 if (vif->type == NL80211_IFTYPE_AP) {
1765                         /*
1766                          * Defer update, so that connected stations can adjust
1767                          * their settings at the same time.
1768                          * See beacon.c for more details
1769                          */
1770                         sc->beacon.slottime = slottime;
1771                         sc->beacon.updateslot = UPDATE;
1772                 } else {
1773                         ah->slottime = slottime;
1774                         ath9k_hw_init_global_settings(ah);
1775                 }
1776         }
1777
1778         if (changed & BSS_CHANGED_P2P_PS) {
1779                 spin_lock_bh(&sc->sc_pcu_lock);
1780                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1781                 if (!(sc->ps_flags & PS_BEACON_SYNC))
1782                         ath9k_update_p2p_ps(sc, vif);
1783                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1784                 spin_unlock_bh(&sc->sc_pcu_lock);
1785         }
1786
1787         if (changed & CHECK_ANI)
1788                 ath_check_ani(sc);
1789
1790         mutex_unlock(&sc->mutex);
1791         ath9k_ps_restore(sc);
1792
1793 #undef CHECK_ANI
1794 }
1795
1796 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1797 {
1798         struct ath_softc *sc = hw->priv;
1799         u64 tsf;
1800
1801         mutex_lock(&sc->mutex);
1802         ath9k_ps_wakeup(sc);
1803         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1804         ath9k_ps_restore(sc);
1805         mutex_unlock(&sc->mutex);
1806
1807         return tsf;
1808 }
1809
1810 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1811                           struct ieee80211_vif *vif,
1812                           u64 tsf)
1813 {
1814         struct ath_softc *sc = hw->priv;
1815
1816         mutex_lock(&sc->mutex);
1817         ath9k_ps_wakeup(sc);
1818         ath9k_hw_settsf64(sc->sc_ah, tsf);
1819         ath9k_ps_restore(sc);
1820         mutex_unlock(&sc->mutex);
1821 }
1822
1823 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1824 {
1825         struct ath_softc *sc = hw->priv;
1826
1827         mutex_lock(&sc->mutex);
1828
1829         ath9k_ps_wakeup(sc);
1830         ath9k_hw_reset_tsf(sc->sc_ah);
1831         ath9k_ps_restore(sc);
1832
1833         mutex_unlock(&sc->mutex);
1834 }
1835
1836 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1837                               struct ieee80211_vif *vif,
1838                               enum ieee80211_ampdu_mlme_action action,
1839                               struct ieee80211_sta *sta,
1840                               u16 tid, u16 *ssn, u8 buf_size)
1841 {
1842         struct ath_softc *sc = hw->priv;
1843         bool flush = false;
1844         int ret = 0;
1845
1846         mutex_lock(&sc->mutex);
1847
1848         switch (action) {
1849         case IEEE80211_AMPDU_RX_START:
1850                 break;
1851         case IEEE80211_AMPDU_RX_STOP:
1852                 break;
1853         case IEEE80211_AMPDU_TX_START:
1854                 ath9k_ps_wakeup(sc);
1855                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1856                 if (!ret)
1857                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1858                 ath9k_ps_restore(sc);
1859                 break;
1860         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1861         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1862                 flush = true;
1863         case IEEE80211_AMPDU_TX_STOP_CONT:
1864                 ath9k_ps_wakeup(sc);
1865                 ath_tx_aggr_stop(sc, sta, tid);
1866                 if (!flush)
1867                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1868                 ath9k_ps_restore(sc);
1869                 break;
1870         case IEEE80211_AMPDU_TX_OPERATIONAL:
1871                 ath9k_ps_wakeup(sc);
1872                 ath_tx_aggr_resume(sc, sta, tid);
1873                 ath9k_ps_restore(sc);
1874                 break;
1875         default:
1876                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1877         }
1878
1879         mutex_unlock(&sc->mutex);
1880
1881         return ret;
1882 }
1883
1884 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1885                              struct survey_info *survey)
1886 {
1887         struct ath_softc *sc = hw->priv;
1888         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1889         struct ieee80211_supported_band *sband;
1890         struct ieee80211_channel *chan;
1891         int pos;
1892
1893         if (config_enabled(CONFIG_ATH9K_TX99))
1894                 return -EOPNOTSUPP;
1895
1896         spin_lock_bh(&common->cc_lock);
1897         if (idx == 0)
1898                 ath_update_survey_stats(sc);
1899
1900         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1901         if (sband && idx >= sband->n_channels) {
1902                 idx -= sband->n_channels;
1903                 sband = NULL;
1904         }
1905
1906         if (!sband)
1907                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1908
1909         if (!sband || idx >= sband->n_channels) {
1910                 spin_unlock_bh(&common->cc_lock);
1911                 return -ENOENT;
1912         }
1913
1914         chan = &sband->channels[idx];
1915         pos = chan->hw_value;
1916         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1917         survey->channel = chan;
1918         spin_unlock_bh(&common->cc_lock);
1919
1920         return 0;
1921 }
1922
1923 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1924 {
1925         struct ath_softc *sc = hw->priv;
1926         struct ath_hw *ah = sc->sc_ah;
1927
1928         if (config_enabled(CONFIG_ATH9K_TX99))
1929                 return;
1930
1931         mutex_lock(&sc->mutex);
1932         ah->coverage_class = coverage_class;
1933
1934         ath9k_ps_wakeup(sc);
1935         ath9k_hw_init_global_settings(ah);
1936         ath9k_ps_restore(sc);
1937
1938         mutex_unlock(&sc->mutex);
1939 }
1940
1941 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1942 {
1943         int i, npend = 0;
1944
1945         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1946                 if (!ATH_TXQ_SETUP(sc, i))
1947                         continue;
1948
1949                 if (!sc->tx.txq[i].axq_depth)
1950                         continue;
1951
1952                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1953                 if (npend)
1954                         break;
1955         }
1956
1957         return !!npend;
1958 }
1959
1960 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1961                         u32 queues, bool drop)
1962 {
1963         struct ath_softc *sc = hw->priv;
1964
1965         mutex_lock(&sc->mutex);
1966         __ath9k_flush(hw, queues, drop);
1967         mutex_unlock(&sc->mutex);
1968 }
1969
1970 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1971 {
1972         struct ath_softc *sc = hw->priv;
1973         struct ath_hw *ah = sc->sc_ah;
1974         struct ath_common *common = ath9k_hw_common(ah);
1975         int timeout = HZ / 5; /* 200 ms */
1976         bool drain_txq;
1977
1978         cancel_delayed_work_sync(&sc->tx_complete_work);
1979
1980         if (ah->ah_flags & AH_UNPLUGGED) {
1981                 ath_dbg(common, ANY, "Device has been unplugged!\n");
1982                 return;
1983         }
1984
1985         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
1986                 ath_dbg(common, ANY, "Device not present\n");
1987                 return;
1988         }
1989
1990         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1991                                timeout) > 0)
1992                 drop = false;
1993
1994         if (drop) {
1995                 ath9k_ps_wakeup(sc);
1996                 spin_lock_bh(&sc->sc_pcu_lock);
1997                 drain_txq = ath_drain_all_txq(sc);
1998                 spin_unlock_bh(&sc->sc_pcu_lock);
1999
2000                 if (!drain_txq)
2001                         ath_reset(sc);
2002
2003                 ath9k_ps_restore(sc);
2004                 ieee80211_wake_queues(hw);
2005         }
2006
2007         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2008 }
2009
2010 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2011 {
2012         struct ath_softc *sc = hw->priv;
2013         int i;
2014
2015         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2016                 if (!ATH_TXQ_SETUP(sc, i))
2017                         continue;
2018
2019                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2020                         return true;
2021         }
2022         return false;
2023 }
2024
2025 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2026 {
2027         struct ath_softc *sc = hw->priv;
2028         struct ath_hw *ah = sc->sc_ah;
2029         struct ieee80211_vif *vif;
2030         struct ath_vif *avp;
2031         struct ath_buf *bf;
2032         struct ath_tx_status ts;
2033         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2034         int status;
2035
2036         vif = sc->beacon.bslot[0];
2037         if (!vif)
2038                 return 0;
2039
2040         if (!vif->bss_conf.enable_beacon)
2041                 return 0;
2042
2043         avp = (void *)vif->drv_priv;
2044
2045         if (!sc->beacon.tx_processed && !edma) {
2046                 tasklet_disable(&sc->bcon_tasklet);
2047
2048                 bf = avp->av_bcbuf;
2049                 if (!bf || !bf->bf_mpdu)
2050                         goto skip;
2051
2052                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2053                 if (status == -EINPROGRESS)
2054                         goto skip;
2055
2056                 sc->beacon.tx_processed = true;
2057                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2058
2059 skip:
2060                 tasklet_enable(&sc->bcon_tasklet);
2061         }
2062
2063         return sc->beacon.tx_last;
2064 }
2065
2066 static int ath9k_get_stats(struct ieee80211_hw *hw,
2067                            struct ieee80211_low_level_stats *stats)
2068 {
2069         struct ath_softc *sc = hw->priv;
2070         struct ath_hw *ah = sc->sc_ah;
2071         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2072
2073         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2074         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2075         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2076         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2077         return 0;
2078 }
2079
2080 static u32 fill_chainmask(u32 cap, u32 new)
2081 {
2082         u32 filled = 0;
2083         int i;
2084
2085         for (i = 0; cap && new; i++, cap >>= 1) {
2086                 if (!(cap & BIT(0)))
2087                         continue;
2088
2089                 if (new & BIT(0))
2090                         filled |= BIT(i);
2091
2092                 new >>= 1;
2093         }
2094
2095         return filled;
2096 }
2097
2098 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2099 {
2100         if (AR_SREV_9300_20_OR_LATER(ah))
2101                 return true;
2102
2103         switch (val & 0x7) {
2104         case 0x1:
2105         case 0x3:
2106         case 0x7:
2107                 return true;
2108         case 0x2:
2109                 return (ah->caps.rx_chainmask == 1);
2110         default:
2111                 return false;
2112         }
2113 }
2114
2115 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2116 {
2117         struct ath_softc *sc = hw->priv;
2118         struct ath_hw *ah = sc->sc_ah;
2119
2120         if (ah->caps.rx_chainmask != 1)
2121                 rx_ant |= tx_ant;
2122
2123         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2124                 return -EINVAL;
2125
2126         sc->ant_rx = rx_ant;
2127         sc->ant_tx = tx_ant;
2128
2129         if (ah->caps.rx_chainmask == 1)
2130                 return 0;
2131
2132         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2133         if (AR_SREV_9100(ah))
2134                 ah->rxchainmask = 0x7;
2135         else
2136                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2137
2138         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2139         ath9k_cmn_reload_chainmask(ah);
2140
2141         return 0;
2142 }
2143
2144 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2145 {
2146         struct ath_softc *sc = hw->priv;
2147
2148         *tx_ant = sc->ant_tx;
2149         *rx_ant = sc->ant_rx;
2150         return 0;
2151 }
2152
2153 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2154 {
2155         struct ath_softc *sc = hw->priv;
2156         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2157         set_bit(ATH_OP_SCANNING, &common->op_flags);
2158 }
2159
2160 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2161 {
2162         struct ath_softc *sc = hw->priv;
2163         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2164         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2165 }
2166
2167 static void
2168 ath_scan_next_channel(struct ath_softc *sc)
2169 {
2170         struct cfg80211_scan_request *req = sc->offchannel.scan_req;
2171         struct ieee80211_channel *chan;
2172
2173         if (sc->offchannel.scan_idx >= req->n_channels) {
2174                 sc->offchannel.state = ATH_OFFCHANNEL_IDLE;
2175                 ath_chanctx_switch(sc, ath_chanctx_get_oper_chan(sc, false),
2176                                    NULL);
2177                 return;
2178         }
2179
2180         chan = req->channels[sc->offchannel.scan_idx++];
2181         sc->offchannel.state = ATH_OFFCHANNEL_PROBE_SEND;
2182         ath_chanctx_offchan_switch(sc, chan);
2183 }
2184
2185 static void ath_offchannel_next(struct ath_softc *sc)
2186 {
2187         struct ieee80211_vif *vif;
2188
2189         if (sc->offchannel.scan_req) {
2190                 vif = sc->offchannel.scan_vif;
2191                 sc->offchannel.chan.txpower = vif->bss_conf.txpower;
2192                 ath_scan_next_channel(sc);
2193         } else if (sc->offchannel.roc_vif) {
2194                 vif = sc->offchannel.roc_vif;
2195                 sc->offchannel.chan.txpower = vif->bss_conf.txpower;
2196                 sc->offchannel.state = ATH_OFFCHANNEL_ROC_START;
2197                 ath_chanctx_offchan_switch(sc, sc->offchannel.roc_chan);
2198         } else {
2199                 ath_chanctx_switch(sc, ath_chanctx_get_oper_chan(sc, false),
2200                                    NULL);
2201                 sc->offchannel.state = ATH_OFFCHANNEL_IDLE;
2202                 if (sc->ps_idle)
2203                         ath_cancel_work(sc);
2204         }
2205 }
2206
2207 static void ath_roc_complete(struct ath_softc *sc, bool abort)
2208 {
2209         sc->offchannel.roc_vif = NULL;
2210         sc->offchannel.roc_chan = NULL;
2211         if (!abort)
2212                 ieee80211_remain_on_channel_expired(sc->hw);
2213         ath_offchannel_next(sc);
2214         ath9k_ps_restore(sc);
2215 }
2216
2217 static void ath_scan_complete(struct ath_softc *sc, bool abort)
2218 {
2219         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2220
2221         sc->offchannel.scan_req = NULL;
2222         sc->offchannel.scan_vif = NULL;
2223         sc->offchannel.state = ATH_OFFCHANNEL_IDLE;
2224         ieee80211_scan_completed(sc->hw, abort);
2225         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2226         ath_offchannel_next(sc);
2227         ath9k_ps_restore(sc);
2228 }
2229
2230 static void ath_scan_send_probe(struct ath_softc *sc,
2231                                 struct cfg80211_ssid *ssid)
2232 {
2233         struct cfg80211_scan_request *req = sc->offchannel.scan_req;
2234         struct ieee80211_vif *vif = sc->offchannel.scan_vif;
2235         struct ath_tx_control txctl = {};
2236         struct sk_buff *skb;
2237         struct ieee80211_tx_info *info;
2238         int band = sc->offchannel.chan.chandef.chan->band;
2239
2240         skb = ieee80211_probereq_get(sc->hw, vif,
2241                         ssid->ssid, ssid->ssid_len, req->ie_len);
2242         if (!skb)
2243                 return;
2244
2245         info = IEEE80211_SKB_CB(skb);
2246         if (req->no_cck)
2247                 info->flags |= IEEE80211_TX_CTL_NO_CCK_RATE;
2248
2249         if (req->ie_len)
2250                 memcpy(skb_put(skb, req->ie_len), req->ie, req->ie_len);
2251
2252         skb_set_queue_mapping(skb, IEEE80211_AC_VO);
2253
2254         if (!ieee80211_tx_prepare_skb(sc->hw, vif, skb, band, NULL))
2255                 goto error;
2256
2257         txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
2258         txctl.force_channel = true;
2259         if (ath_tx_start(sc->hw, skb, &txctl))
2260                 goto error;
2261
2262         return;
2263
2264 error:
2265         ieee80211_free_txskb(sc->hw, skb);
2266 }
2267
2268 static void ath_scan_channel_start(struct ath_softc *sc)
2269 {
2270         struct cfg80211_scan_request *req = sc->offchannel.scan_req;
2271         int i, dwell;
2272
2273         if ((sc->cur_chan->chandef.chan->flags & IEEE80211_CHAN_NO_IR) ||
2274                         !req->n_ssids) {
2275                 dwell = HZ / 9; /* ~110 ms */
2276         } else {
2277                 dwell = HZ / 16; /* ~60 ms */
2278
2279                 for (i = 0; i < req->n_ssids; i++)
2280                         ath_scan_send_probe(sc, &req->ssids[i]);
2281         }
2282
2283         sc->offchannel.state = ATH_OFFCHANNEL_PROBE_WAIT;
2284         mod_timer(&sc->offchannel.timer, jiffies + dwell);
2285 }
2286
2287 void ath_offchannel_channel_change(struct ath_softc *sc)
2288 {
2289         switch (sc->offchannel.state) {
2290         case ATH_OFFCHANNEL_PROBE_SEND:
2291                 if (!sc->offchannel.scan_req)
2292                         return;
2293
2294                 if (sc->cur_chan->chandef.chan !=
2295                     sc->offchannel.chan.chandef.chan)
2296                         return;
2297
2298                 ath_scan_channel_start(sc);
2299                 break;
2300         case ATH_OFFCHANNEL_IDLE:
2301                 if (!sc->offchannel.scan_req)
2302                         return;
2303
2304                 ath_scan_complete(sc, false);
2305                 break;
2306         case ATH_OFFCHANNEL_ROC_START:
2307                 if (sc->cur_chan != &sc->offchannel.chan)
2308                         break;
2309
2310                 sc->offchannel.state = ATH_OFFCHANNEL_ROC_WAIT;
2311                 mod_timer(&sc->offchannel.timer, jiffies +
2312                           msecs_to_jiffies(sc->offchannel.roc_duration));
2313                 ieee80211_ready_on_channel(sc->hw);
2314                 break;
2315         case ATH_OFFCHANNEL_ROC_DONE:
2316                 ath_roc_complete(sc, false);
2317                 break;
2318         default:
2319                 break;
2320         }
2321 }
2322
2323 void ath_offchannel_timer(unsigned long data)
2324 {
2325         struct ath_softc *sc = (struct ath_softc *)data;
2326         struct ath_chanctx *ctx;
2327
2328         switch (sc->offchannel.state) {
2329         case ATH_OFFCHANNEL_PROBE_WAIT:
2330                 if (!sc->offchannel.scan_req)
2331                         return;
2332
2333                 /* get first active channel context */
2334                 ctx = ath_chanctx_get_oper_chan(sc, true);
2335                 if (ctx->active) {
2336                         sc->offchannel.state = ATH_OFFCHANNEL_SUSPEND;
2337                         ath_chanctx_switch(sc, ctx, NULL);
2338                         mod_timer(&sc->offchannel.timer, jiffies + HZ / 10);
2339                         break;
2340                 }
2341                 /* fall through */
2342         case ATH_OFFCHANNEL_SUSPEND:
2343                 if (!sc->offchannel.scan_req)
2344                         return;
2345
2346                 ath_scan_next_channel(sc);
2347                 break;
2348         case ATH_OFFCHANNEL_ROC_START:
2349         case ATH_OFFCHANNEL_ROC_WAIT:
2350                 ctx = ath_chanctx_get_oper_chan(sc, false);
2351                 sc->offchannel.state = ATH_OFFCHANNEL_ROC_DONE;
2352                 ath_chanctx_switch(sc, ctx, NULL);
2353                 break;
2354         default:
2355                 break;
2356         }
2357 }
2358
2359 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2360                          struct cfg80211_scan_request *req)
2361 {
2362         struct ath_softc *sc = hw->priv;
2363         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2364         int ret = 0;
2365
2366         mutex_lock(&sc->mutex);
2367
2368         if (WARN_ON(sc->offchannel.scan_req)) {
2369                 ret = -EBUSY;
2370                 goto out;
2371         }
2372
2373         ath9k_ps_wakeup(sc);
2374         set_bit(ATH_OP_SCANNING, &common->op_flags);
2375         sc->offchannel.scan_vif = vif;
2376         sc->offchannel.scan_req = req;
2377         sc->offchannel.scan_idx = 0;
2378
2379         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE)
2380                 ath_offchannel_next(sc);
2381
2382 out:
2383         mutex_unlock(&sc->mutex);
2384
2385         return ret;
2386 }
2387
2388 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2389                                  struct ieee80211_vif *vif)
2390 {
2391         struct ath_softc *sc = hw->priv;
2392
2393         mutex_lock(&sc->mutex);
2394         del_timer_sync(&sc->offchannel.timer);
2395         ath_scan_complete(sc, true);
2396         mutex_unlock(&sc->mutex);
2397 }
2398
2399 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2400                                    struct ieee80211_vif *vif,
2401                                    struct ieee80211_channel *chan, int duration,
2402                                    enum ieee80211_roc_type type)
2403 {
2404         struct ath_softc *sc = hw->priv;
2405         int ret = 0;
2406
2407         mutex_lock(&sc->mutex);
2408
2409         if (WARN_ON(sc->offchannel.roc_vif)) {
2410                 ret = -EBUSY;
2411                 goto out;
2412         }
2413
2414         ath9k_ps_wakeup(sc);
2415         sc->offchannel.roc_vif = vif;
2416         sc->offchannel.roc_chan = chan;
2417         sc->offchannel.roc_duration = duration;
2418
2419         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE)
2420                 ath_offchannel_next(sc);
2421
2422 out:
2423         mutex_unlock(&sc->mutex);
2424
2425         return ret;
2426 }
2427
2428 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2429 {
2430         struct ath_softc *sc = hw->priv;
2431
2432         mutex_lock(&sc->mutex);
2433
2434         del_timer_sync(&sc->offchannel.timer);
2435
2436         if (sc->offchannel.roc_vif) {
2437                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2438                         ath_roc_complete(sc, true);
2439         }
2440
2441         mutex_unlock(&sc->mutex);
2442
2443         return 0;
2444 }
2445
2446 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2447                              struct ieee80211_chanctx_conf *conf)
2448 {
2449         struct ath_softc *sc = hw->priv;
2450         struct ath_chanctx *ctx, **ptr;
2451
2452         mutex_lock(&sc->mutex);
2453
2454         ath_for_each_chanctx(sc, ctx) {
2455                 if (ctx->assigned)
2456                         continue;
2457
2458                 ptr = (void *) conf->drv_priv;
2459                 *ptr = ctx;
2460                 ctx->assigned = true;
2461                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2462                 mutex_unlock(&sc->mutex);
2463                 return 0;
2464         }
2465         mutex_unlock(&sc->mutex);
2466         return -ENOSPC;
2467 }
2468
2469
2470 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2471                                  struct ieee80211_chanctx_conf *conf)
2472 {
2473         struct ath_softc *sc = hw->priv;
2474         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2475
2476         mutex_lock(&sc->mutex);
2477         ctx->assigned = false;
2478         mutex_unlock(&sc->mutex);
2479 }
2480
2481 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2482                                  struct ieee80211_chanctx_conf *conf,
2483                                  u32 changed)
2484 {
2485         struct ath_softc *sc = hw->priv;
2486         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2487
2488         mutex_lock(&sc->mutex);
2489         ath_chanctx_set_channel(sc, ctx, &conf->def);
2490         mutex_unlock(&sc->mutex);
2491 }
2492
2493 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2494                                     struct ieee80211_vif *vif,
2495                                     struct ieee80211_chanctx_conf *conf)
2496 {
2497         struct ath_softc *sc = hw->priv;
2498         struct ath_vif *avp = (void *)vif->drv_priv;
2499         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2500
2501         mutex_lock(&sc->mutex);
2502         avp->chanctx = ctx;
2503         list_add_tail(&avp->list, &ctx->vifs);
2504         ath9k_calculate_summary_state(sc, ctx);
2505         mutex_unlock(&sc->mutex);
2506
2507         return 0;
2508 }
2509
2510 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2511                                        struct ieee80211_vif *vif,
2512                                        struct ieee80211_chanctx_conf *conf)
2513 {
2514         struct ath_softc *sc = hw->priv;
2515         struct ath_vif *avp = (void *)vif->drv_priv;
2516         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2517
2518         mutex_lock(&sc->mutex);
2519         avp->chanctx = NULL;
2520         list_del(&avp->list);
2521         ath9k_calculate_summary_state(sc, ctx);
2522         mutex_unlock(&sc->mutex);
2523 }
2524
2525 void ath9k_fill_chanctx_ops(void)
2526 {
2527         if (!ath9k_use_chanctx)
2528                 return;
2529
2530         ath9k_ops.hw_scan = ath9k_hw_scan;
2531         ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2532         ath9k_ops.remain_on_channel  = ath9k_remain_on_channel;
2533         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2534         ath9k_ops.add_chanctx        = ath9k_add_chanctx;
2535         ath9k_ops.remove_chanctx     = ath9k_remove_chanctx;
2536         ath9k_ops.change_chanctx     = ath9k_change_chanctx;
2537         ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2538         ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2539 }
2540
2541 struct ieee80211_ops ath9k_ops = {
2542         .tx                 = ath9k_tx,
2543         .start              = ath9k_start,
2544         .stop               = ath9k_stop,
2545         .add_interface      = ath9k_add_interface,
2546         .change_interface   = ath9k_change_interface,
2547         .remove_interface   = ath9k_remove_interface,
2548         .config             = ath9k_config,
2549         .configure_filter   = ath9k_configure_filter,
2550         .sta_add            = ath9k_sta_add,
2551         .sta_remove         = ath9k_sta_remove,
2552         .sta_notify         = ath9k_sta_notify,
2553         .conf_tx            = ath9k_conf_tx,
2554         .bss_info_changed   = ath9k_bss_info_changed,
2555         .set_key            = ath9k_set_key,
2556         .get_tsf            = ath9k_get_tsf,
2557         .set_tsf            = ath9k_set_tsf,
2558         .reset_tsf          = ath9k_reset_tsf,
2559         .ampdu_action       = ath9k_ampdu_action,
2560         .get_survey         = ath9k_get_survey,
2561         .rfkill_poll        = ath9k_rfkill_poll_state,
2562         .set_coverage_class = ath9k_set_coverage_class,
2563         .flush              = ath9k_flush,
2564         .tx_frames_pending  = ath9k_tx_frames_pending,
2565         .tx_last_beacon     = ath9k_tx_last_beacon,
2566         .release_buffered_frames = ath9k_release_buffered_frames,
2567         .get_stats          = ath9k_get_stats,
2568         .set_antenna        = ath9k_set_antenna,
2569         .get_antenna        = ath9k_get_antenna,
2570
2571 #ifdef CONFIG_ATH9K_WOW
2572         .suspend            = ath9k_suspend,
2573         .resume             = ath9k_resume,
2574         .set_wakeup         = ath9k_set_wakeup,
2575 #endif
2576
2577 #ifdef CONFIG_ATH9K_DEBUGFS
2578         .get_et_sset_count  = ath9k_get_et_sset_count,
2579         .get_et_stats       = ath9k_get_et_stats,
2580         .get_et_strings     = ath9k_get_et_strings,
2581 #endif
2582
2583 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2584         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2585 #endif
2586         .sw_scan_start      = ath9k_sw_scan_start,
2587         .sw_scan_complete   = ath9k_sw_scan_complete,
2588 };