drivers/net/wireless/broadcom/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/module.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/sched/signal.h>
  40 #include <linux/skbuff.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/slab.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 MODULE_FIRMWARE("b43legacy/ucode2.fw");
  64 MODULE_FIRMWARE("b43legacy/ucode4.fw");
  65
  66 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  67 static int modparam_pio;
  68 module_param_named(pio, modparam_pio, int, 0444);
  69 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  70 #elif defined(CONFIG_B43LEGACY_DMA)
  71 # define modparam_pio   0
  72 #elif defined(CONFIG_B43LEGACY_PIO)
  73 # define modparam_pio   1
  74 #endif
  75
  76 static int modparam_bad_frames_preempt;
  77 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  78 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  79                  " Preemption");
  80
  81 static char modparam_fwpostfix[16];
  82 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  83 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  84
  85 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  86 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  87         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  88         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  89         {},
  90 };
  91 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  92
  93
  94 /* Channel and ratetables are shared for all devices.
  95  * They can't be const, because ieee80211 puts some precalculated
  96  * data in there. This data is the same for all devices, so we don't
  97  * get concurrency issues */
  98 #define RATETAB_ENT(_rateid, _flags) \
  99         {                                                               \
 100                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
 101                 .hw_value       = (_rateid),                            \
 102                 .flags          = (_flags),                             \
 103         }
 104 /*
 105  * NOTE: When changing this, sync with xmit.c's
 106  *       b43legacy_plcp_get_bitrate_idx_* functions!
 107  */
 108 static struct ieee80211_rate __b43legacy_ratetable[] = {
 109         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
 110         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
 111         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
 112         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 119         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 120         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 121 };
 122 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 123 #define b43legacy_b_ratetable_size      4
 124 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 125 #define b43legacy_g_ratetable_size      12
 126
 127 #define CHANTAB_ENT(_chanid, _freq) \
 128         {                                                       \
 129                 .center_freq    = (_freq),                      \
 130                 .hw_value       = (_chanid),                    \
 131         }
 132 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 133         CHANTAB_ENT(1, 2412),
 134         CHANTAB_ENT(2, 2417),
 135         CHANTAB_ENT(3, 2422),
 136         CHANTAB_ENT(4, 2427),
 137         CHANTAB_ENT(5, 2432),
 138         CHANTAB_ENT(6, 2437),
 139         CHANTAB_ENT(7, 2442),
 140         CHANTAB_ENT(8, 2447),
 141         CHANTAB_ENT(9, 2452),
 142         CHANTAB_ENT(10, 2457),
 143         CHANTAB_ENT(11, 2462),
 144         CHANTAB_ENT(12, 2467),
 145         CHANTAB_ENT(13, 2472),
 146         CHANTAB_ENT(14, 2484),
 147 };
 148
 149 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 150         .channels = b43legacy_bg_chantable,
 151         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 152         .bitrates = b43legacy_b_ratetable,
 153         .n_bitrates = b43legacy_b_ratetable_size,
 154 };
 155
 156 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 157         .channels = b43legacy_bg_chantable,
 158         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 159         .bitrates = b43legacy_g_ratetable,
 160         .n_bitrates = b43legacy_g_ratetable_size,
 161 };
 162
 163 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 164 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 165 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 166 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 167
 168
 169 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 170 {
 171         if (!wl || !wl->current_dev)
 172                 return 1;
 173         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 174                 return 1;
 175         /* We are up and running.
 176          * Ratelimit the messages to avoid DoS over the net. */
 177         return net_ratelimit();
 178 }
 179
 180 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 181 {
 182         struct va_format vaf;
 183         va_list args;
 184
 185         if (!b43legacy_ratelimit(wl))
 186                 return;
 187
 188         va_start(args, fmt);
 189
 190         vaf.fmt = fmt;
 191         vaf.va = &args;
 192
 193         printk(KERN_INFO "b43legacy-%s: %pV",
 194                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 195
 196         va_end(args);
 197 }
 198
 199 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 200 {
 201         struct va_format vaf;
 202         va_list args;
 203
 204         if (!b43legacy_ratelimit(wl))
 205                 return;
 206
 207         va_start(args, fmt);
 208
 209         vaf.fmt = fmt;
 210         vaf.va = &args;
 211
 212         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 213                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 214
 215         va_end(args);
 216 }
 217
 218 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 219 {
 220         struct va_format vaf;
 221         va_list args;
 222
 223         if (!b43legacy_ratelimit(wl))
 224                 return;
 225
 226         va_start(args, fmt);
 227
 228         vaf.fmt = fmt;
 229         vaf.va = &args;
 230
 231         printk(KERN_WARNING "b43legacy-%s warning: %pV",
 232                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 233
 234         va_end(args);
 235 }
 236
 237 #if B43legacy_DEBUG
 238 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 239 {
 240         struct va_format vaf;
 241         va_list args;
 242
 243         va_start(args, fmt);
 244
 245         vaf.fmt = fmt;
 246         vaf.va = &args;
 247
 248         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 249                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 250
 251         va_end(args);
 252 }
 253 #endif /* DEBUG */
 254
 255 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 256                                 u32 val)
 257 {
 258         u32 status;
 259
 260         B43legacy_WARN_ON(offset % 4 != 0);
 261
 262         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 263         if (status & B43legacy_MACCTL_BE)
 264                 val = swab32(val);
 265
 266         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 267         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 268 }
 269
 270 static inline
 271 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 272                                 u16 routing, u16 offset)
 273 {
 274         u32 control;
 275
 276         /* "offset" is the WORD offset. */
 277
 278         control = routing;
 279         control <<= 16;
 280         control |= offset;
 281         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 282 }
 283
 284 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 285                        u16 routing, u16 offset)
 286 {
 287         u32 ret;
 288
 289         if (routing == B43legacy_SHM_SHARED) {
 290                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 291                 if (offset & 0x0003) {
 292                         /* Unaligned access */
 293                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 294                         ret = b43legacy_read16(dev,
 295                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 296                         ret <<= 16;
 297                         b43legacy_shm_control_word(dev, routing,
 298                                                      (offset >> 2) + 1);
 299                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 300
 301                         return ret;
 302                 }
 303                 offset >>= 2;
 304         }
 305         b43legacy_shm_control_word(dev, routing, offset);
 306         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 307
 308         return ret;
 309 }
 310
 311 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 312                            u16 routing, u16 offset)
 313 {
 314         u16 ret;
 315
 316         if (routing == B43legacy_SHM_SHARED) {
 317                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 318                 if (offset & 0x0003) {
 319                         /* Unaligned access */
 320                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 321                         ret = b43legacy_read16(dev,
 322                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 323
 324                         return ret;
 325                 }
 326                 offset >>= 2;
 327         }
 328         b43legacy_shm_control_word(dev, routing, offset);
 329         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 330
 331         return ret;
 332 }
 333
 334 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 335                            u16 routing, u16 offset,
 336                            u32 value)
 337 {
 338         if (routing == B43legacy_SHM_SHARED) {
 339                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 340                 if (offset & 0x0003) {
 341                         /* Unaligned access */
 342                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 343                         b43legacy_write16(dev,
 344                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 345                                           (value >> 16) & 0xffff);
 346                         b43legacy_shm_control_word(dev, routing,
 347                                                    (offset >> 2) + 1);
 348                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 349                                           value & 0xffff);
 350                         return;
 351                 }
 352                 offset >>= 2;
 353         }
 354         b43legacy_shm_control_word(dev, routing, offset);
 355         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 356 }
 357
 358 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 359                            u16 value)
 360 {
 361         if (routing == B43legacy_SHM_SHARED) {
 362                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 363                 if (offset & 0x0003) {
 364                         /* Unaligned access */
 365                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 366                         b43legacy_write16(dev,
 367                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 368                                           value);
 369                         return;
 370                 }
 371                 offset >>= 2;
 372         }
 373         b43legacy_shm_control_word(dev, routing, offset);
 374         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 375 }
 376
 377 /* Read HostFlags */
 378 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 379 {
 380         u32 ret;
 381
 382         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 383                                    B43legacy_SHM_SH_HOSTFHI);
 384         ret <<= 16;
 385         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 386                                     B43legacy_SHM_SH_HOSTFLO);
 387
 388         return ret;
 389 }
 390
 391 /* Write HostFlags */
 392 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 393 {
 394         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 395                               B43legacy_SHM_SH_HOSTFLO,
 396                               (value & 0x0000FFFF));
 397         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 398                               B43legacy_SHM_SH_HOSTFHI,
 399                               ((value & 0xFFFF0000) >> 16));
 400 }
 401
 402 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 403 {
 404         /* We need to be careful. As we read the TSF from multiple
 405          * registers, we should take care of register overflows.
 406          * In theory, the whole tsf read process should be atomic.
 407          * We try to be atomic here, by restaring the read process,
 408          * if any of the high registers changed (overflew).
 409          */
 410         if (dev->dev->id.revision >= 3) {
 411                 u32 low;
 412                 u32 high;
 413                 u32 high2;
 414
 415                 do {
 416                         high = b43legacy_read32(dev,
 417                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 418                         low = b43legacy_read32(dev,
 419                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 420                         high2 = b43legacy_read32(dev,
 421                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 422                 } while (unlikely(high != high2));
 423
 424                 *tsf = high;
 425                 *tsf <<= 32;
 426                 *tsf |= low;
 427         } else {
 428                 u64 tmp;
 429                 u16 v0;
 430                 u16 v1;
 431                 u16 v2;
 432                 u16 v3;
 433                 u16 test1;
 434                 u16 test2;
 435                 u16 test3;
 436
 437                 do {
 438                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 439                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 440                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 441                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 442
 443                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 444                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 445                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 446                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 447
 448                 *tsf = v3;
 449                 *tsf <<= 48;
 450                 tmp = v2;
 451                 tmp <<= 32;
 452                 *tsf |= tmp;
 453                 tmp = v1;
 454                 tmp <<= 16;
 455                 *tsf |= tmp;
 456                 *tsf |= v0;
 457         }
 458 }
 459
 460 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 461 {
 462         u32 status;
 463
 464         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 465         status |= B43legacy_MACCTL_TBTTHOLD;
 466         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 467 }
 468
 469 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 470 {
 471         u32 status;
 472
 473         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 474         status &= ~B43legacy_MACCTL_TBTTHOLD;
 475         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 476 }
 477
 478 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 479 {
 480         /* Be careful with the in-progress timer.
 481          * First zero out the low register, so we have a full
 482          * register-overflow duration to complete the operation.
 483          */
 484         if (dev->dev->id.revision >= 3) {
 485                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 486                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 487
 488                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 489                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 490                                     hi);
 491                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 492                                     lo);
 493         } else {
 494                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 495                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 496                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 497                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 498
 499                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 500                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 501                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 502                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 503                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 504         }
 505 }
 506
 507 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 508 {
 509         b43legacy_time_lock(dev);
 510         b43legacy_tsf_write_locked(dev, tsf);
 511         b43legacy_time_unlock(dev);
 512 }
 513
 514 static
 515 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 516                              u16 offset, const u8 *mac)
 517 {
 518         static const u8 zero_addr[ETH_ALEN] = { 0 };
 519         u16 data;
 520
 521         if (!mac)
 522                 mac = zero_addr;
 523
 524         offset |= 0x0020;
 525         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 526
 527         data = mac[0];
 528         data |= mac[1] << 8;
 529         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 530         data = mac[2];
 531         data |= mac[3] << 8;
 532         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 533         data = mac[4];
 534         data |= mac[5] << 8;
 535         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 536 }
 537
 538 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 539 {
 540         static const u8 zero_addr[ETH_ALEN] = { 0 };
 541         const u8 *mac = dev->wl->mac_addr;
 542         const u8 *bssid = dev->wl->bssid;
 543         u8 mac_bssid[ETH_ALEN * 2];
 544         int i;
 545         u32 tmp;
 546
 547         if (!bssid)
 548                 bssid = zero_addr;
 549         if (!mac)
 550                 mac = zero_addr;
 551
 552         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 553
 554         memcpy(mac_bssid, mac, ETH_ALEN);
 555         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 556
 557         /* Write our MAC address and BSSID to template ram */
 558         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 559                 tmp =  (u32)(mac_bssid[i + 0]);
 560                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 561                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 562                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 563                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 564                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 565                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 566         }
 567 }
 568
 569 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 570 {
 571         b43legacy_write_mac_bssid_templates(dev);
 572         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 573                                 dev->wl->mac_addr);
 574 }
 575
 576 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 577                                     u16 slot_time)
 578 {
 579         /* slot_time is in usec. */
 580         if (dev->phy.type != B43legacy_PHYTYPE_G)
 581                 return;
 582         b43legacy_write16(dev, 0x684, 510 + slot_time);
 583         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 584                               slot_time);
 585 }
 586
 587 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 588 {
 589         b43legacy_set_slot_time(dev, 9);
 590 }
 591
 592 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 593 {
 594         b43legacy_set_slot_time(dev, 20);
 595 }
 596
 597 /* Synchronize IRQ top- and bottom-half.
 598  * IRQs must be masked before calling this.
 599  * This must not be called with the irq_lock held.
 600  */
 601 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 602 {
 603         synchronize_irq(dev->dev->irq);
 604         tasklet_kill(&dev->isr_tasklet);
 605 }
 606
 607 /* DummyTransmission function, as documented on
 608  * http://bcm-specs.sipsolutions.net/DummyTransmission
 609  */
 610 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 611 {
 612         struct b43legacy_phy *phy = &dev->phy;
 613         unsigned int i;
 614         unsigned int max_loop;
 615         u16 value;
 616         u32 buffer[5] = {
 617                 0x00000000,
 618                 0x00D40000,
 619                 0x00000000,
 620                 0x01000000,
 621                 0x00000000,
 622         };
 623
 624         switch (phy->type) {
 625         case B43legacy_PHYTYPE_B:
 626         case B43legacy_PHYTYPE_G:
 627                 max_loop = 0xFA;
 628                 buffer[0] = 0x000B846E;
 629                 break;
 630         default:
 631                 B43legacy_BUG_ON(1);
 632                 return;
 633         }
 634
 635         for (i = 0; i < 5; i++)
 636                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 637
 638         /* dummy read follows */
 639         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 640
 641         b43legacy_write16(dev, 0x0568, 0x0000);
 642         b43legacy_write16(dev, 0x07C0, 0x0000);
 643         b43legacy_write16(dev, 0x050C, 0x0000);
 644         b43legacy_write16(dev, 0x0508, 0x0000);
 645         b43legacy_write16(dev, 0x050A, 0x0000);
 646         b43legacy_write16(dev, 0x054C, 0x0000);
 647         b43legacy_write16(dev, 0x056A, 0x0014);
 648         b43legacy_write16(dev, 0x0568, 0x0826);
 649         b43legacy_write16(dev, 0x0500, 0x0000);
 650         b43legacy_write16(dev, 0x0502, 0x0030);
 651
 652         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 653                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 654         for (i = 0x00; i < max_loop; i++) {
 655                 value = b43legacy_read16(dev, 0x050E);
 656                 if (value & 0x0080)
 657                         break;
 658                 udelay(10);
 659         }
 660         for (i = 0x00; i < 0x0A; i++) {
 661                 value = b43legacy_read16(dev, 0x050E);
 662                 if (value & 0x0400)
 663                         break;
 664                 udelay(10);
 665         }
 666         for (i = 0x00; i < 0x0A; i++) {
 667                 value = b43legacy_read16(dev, 0x0690);
 668                 if (!(value & 0x0100))
 669                         break;
 670                 udelay(10);
 671         }
 672         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 673                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 674 }
 675
 676 /* Turn the Analog ON/OFF */
 677 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 678 {
 679         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 680 }
 681
 682 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 683 {
 684         u32 tmslow;
 685         u32 macctl;
 686
 687         flags |= B43legacy_TMSLOW_PHYCLKEN;
 688         flags |= B43legacy_TMSLOW_PHYRESET;
 689         ssb_device_enable(dev->dev, flags);
 690         msleep(2); /* Wait for the PLL to turn on. */
 691
 692         /* Now take the PHY out of Reset again */
 693         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 694         tmslow |= SSB_TMSLOW_FGC;
 695         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 696         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 697         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 698         msleep(1);
 699         tmslow &= ~SSB_TMSLOW_FGC;
 700         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 701         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 702         msleep(1);
 703
 704         /* Turn Analog ON */
 705         b43legacy_switch_analog(dev, 1);
 706
 707         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 708         macctl &= ~B43legacy_MACCTL_GMODE;
 709         if (flags & B43legacy_TMSLOW_GMODE) {
 710                 macctl |= B43legacy_MACCTL_GMODE;
 711                 dev->phy.gmode = true;
 712         } else
 713                 dev->phy.gmode = false;
 714         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 715         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 716 }
 717
 718 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 719 {
 720         u32 v0;
 721         u32 v1;
 722         u16 tmp;
 723         struct b43legacy_txstatus stat;
 724
 725         while (1) {
 726                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 727                 if (!(v0 & 0x00000001))
 728                         break;
 729                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 730
 731                 stat.cookie = (v0 >> 16);
 732                 stat.seq = (v1 & 0x0000FFFF);
 733                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 734                 tmp = (v0 & 0x0000FFFF);
 735                 stat.frame_count = ((tmp & 0xF000) >> 12);
 736                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 737                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 738                 stat.pm_indicated = !!(tmp & 0x0080);
 739                 stat.intermediate = !!(tmp & 0x0040);
 740                 stat.for_ampdu = !!(tmp & 0x0020);
 741                 stat.acked = !!(tmp & 0x0002);
 742
 743                 b43legacy_handle_txstatus(dev, &stat);
 744         }
 745 }
 746
 747 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 748 {
 749         u32 dummy;
 750
 751         if (dev->dev->id.revision < 5)
 752                 return;
 753         /* Read all entries from the microcode TXstatus FIFO
 754          * and throw them away.
 755          */
 756         while (1) {
 757                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 758                 if (!(dummy & 0x00000001))
 759                         break;
 760                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 761         }
 762 }
 763
 764 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 765 {
 766         u32 val = 0;
 767
 768         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 769         val <<= 16;
 770         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 771
 772         return val;
 773 }
 774
 775 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 776 {
 777         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 778                               (jssi & 0x0000FFFF));
 779         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 780                               (jssi & 0xFFFF0000) >> 16);
 781 }
 782
 783 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 784 {
 785         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 786         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 787                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 788                           | B43legacy_MACCMD_BGNOISE);
 789         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 790                             dev->phy.channel);
 791 }
 792
 793 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 794 {
 795         /* Top half of Link Quality calculation. */
 796
 797         if (dev->noisecalc.calculation_running)
 798                 return;
 799         dev->noisecalc.channel_at_start = dev->phy.channel;
 800         dev->noisecalc.calculation_running = true;
 801         dev->noisecalc.nr_samples = 0;
 802
 803         b43legacy_generate_noise_sample(dev);
 804 }
 805
 806 static void handle_irq_noise(struct b43legacy_wldev *dev)
 807 {
 808         struct b43legacy_phy *phy = &dev->phy;
 809         u16 tmp;
 810         u8 noise[4];
 811         u8 i;
 812         u8 j;
 813         s32 average;
 814
 815         /* Bottom half of Link Quality calculation. */
 816
 817         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 818         if (dev->noisecalc.channel_at_start != phy->channel)
 819                 goto drop_calculation;
 820         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 821         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 822             noise[2] == 0x7F || noise[3] == 0x7F)
 823                 goto generate_new;
 824
 825         /* Get the noise samples. */
 826         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 827         i = dev->noisecalc.nr_samples;
 828         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 829         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 830         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 831         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 832         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 833         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 834         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 835         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 836         dev->noisecalc.nr_samples++;
 837         if (dev->noisecalc.nr_samples == 8) {
 838                 /* Calculate the Link Quality by the noise samples. */
 839                 average = 0;
 840                 for (i = 0; i < 8; i++) {
 841                         for (j = 0; j < 4; j++)
 842                                 average += dev->noisecalc.samples[i][j];
 843                 }
 844                 average /= (8 * 4);
 845                 average *= 125;
 846                 average += 64;
 847                 average /= 128;
 848                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 849                                              0x40C);
 850                 tmp = (tmp / 128) & 0x1F;
 851                 if (tmp >= 8)
 852                         average += 2;
 853                 else
 854                         average -= 25;
 855                 if (tmp == 8)
 856                         average -= 72;
 857                 else
 858                         average -= 48;
 859
 860                 dev->stats.link_noise = average;
 861 drop_calculation:
 862                 dev->noisecalc.calculation_running = false;
 863                 return;
 864         }
 865 generate_new:
 866         b43legacy_generate_noise_sample(dev);
 867 }
 868
 869 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 870 {
 871         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 872                 /* TODO: PS TBTT */
 873         } else {
 874                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 875                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 876         }
 877         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 878                 dev->dfq_valid = true;
 879 }
 880
 881 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 882 {
 883         if (dev->dfq_valid) {
 884                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 885                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 886                                   | B43legacy_MACCMD_DFQ_VALID);
 887                 dev->dfq_valid = false;
 888         }
 889 }
 890
 891 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 892 {
 893         u32 tmp;
 894
 895         /* TODO: AP mode. */
 896
 897         while (1) {
 898                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 899                 if (!(tmp & 0x00000008))
 900                         break;
 901         }
 902         /* 16bit write is odd, but correct. */
 903         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 904 }
 905
 906 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 907                                             const u8 *data, u16 size,
 908                                             u16 ram_offset,
 909                                             u16 shm_size_offset, u8 rate)
 910 {
 911         u32 i;
 912         u32 tmp;
 913         struct b43legacy_plcp_hdr4 plcp;
 914
 915         plcp.data = 0;
 916         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 917         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 918         ram_offset += sizeof(u32);
 919         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 920          * So leave the first two bytes of the next write blank.
 921          */
 922         tmp = (u32)(data[0]) << 16;
 923         tmp |= (u32)(data[1]) << 24;
 924         b43legacy_ram_write(dev, ram_offset, tmp);
 925         ram_offset += sizeof(u32);
 926         for (i = 2; i < size; i += sizeof(u32)) {
 927                 tmp = (u32)(data[i + 0]);
 928                 if (i + 1 < size)
 929                         tmp |= (u32)(data[i + 1]) << 8;
 930                 if (i + 2 < size)
 931                         tmp |= (u32)(data[i + 2]) << 16;
 932                 if (i + 3 < size)
 933                         tmp |= (u32)(data[i + 3]) << 24;
 934                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 935         }
 936         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 937                               size + sizeof(struct b43legacy_plcp_hdr6));
 938 }
 939
 940 /* Convert a b43legacy antenna number value to the PHY TX control value. */
 941 static u16 b43legacy_antenna_to_phyctl(int antenna)
 942 {
 943         switch (antenna) {
 944         case B43legacy_ANTENNA0:
 945                 return B43legacy_TX4_PHY_ANT0;
 946         case B43legacy_ANTENNA1:
 947                 return B43legacy_TX4_PHY_ANT1;
 948         }
 949         return B43legacy_TX4_PHY_ANTLAST;
 950 }
 951
 952 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 953                                             u16 ram_offset,
 954                                             u16 shm_size_offset)
 955 {
 956
 957         unsigned int i, len, variable_len;
 958         const struct ieee80211_mgmt *bcn;
 959         const u8 *ie;
 960         bool tim_found = false;
 961         unsigned int rate;
 962         u16 ctl;
 963         int antenna;
 964         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 965
 966         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 967         len = min_t(size_t, dev->wl->current_beacon->len,
 968                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 969         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 970
 971         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 972                                         shm_size_offset, rate);
 973
 974         /* Write the PHY TX control parameters. */
 975         antenna = B43legacy_ANTENNA_DEFAULT;
 976         antenna = b43legacy_antenna_to_phyctl(antenna);
 977         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 978                                    B43legacy_SHM_SH_BEACPHYCTL);
 979         /* We can't send beacons with short preamble. Would get PHY errors. */
 980         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 981         ctl &= ~B43legacy_TX4_PHY_ANT;
 982         ctl &= ~B43legacy_TX4_PHY_ENC;
 983         ctl |= antenna;
 984         ctl |= B43legacy_TX4_PHY_ENC_CCK;
 985         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 986                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
 987
 988         /* Find the position of the TIM and the DTIM_period value
 989          * and write them to SHM. */
 990         ie = bcn->u.beacon.variable;
 991         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 992         for (i = 0; i < variable_len - 2; ) {
 993                 uint8_t ie_id, ie_len;
 994
 995                 ie_id = ie[i];
 996                 ie_len = ie[i + 1];
 997                 if (ie_id == 5) {
 998                         u16 tim_position;
 999                         u16 dtim_period;
1000                         /* This is the TIM Information Element */
1001
1002                         /* Check whether the ie_len is in the beacon data range. */
1003                         if (variable_len < ie_len + 2 + i)
1004                                 break;
1005                         /* A valid TIM is at least 4 bytes long. */
1006                         if (ie_len < 4)
1007                                 break;
1008                         tim_found = true;
1009
1010                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1011                         tim_position += offsetof(struct ieee80211_mgmt,
1012                                                  u.beacon.variable);
1013                         tim_position += i;
1014
1015                         dtim_period = ie[i + 3];
1016
1017                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1018                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1019                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1020                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1021                         break;
1022                 }
1023                 i += ie_len + 2;
1024         }
1025         if (!tim_found) {
1026                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1027                               "beacon template packet. AP or IBSS operation "
1028                               "may be broken.\n");
1029         } else
1030                 b43legacydbg(dev->wl, "Updated beacon template\n");
1031 }
1032
1033 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1034                                             u16 shm_offset, u16 size,
1035                                             struct ieee80211_rate *rate)
1036 {
1037         struct b43legacy_plcp_hdr4 plcp;
1038         u32 tmp;
1039         __le16 dur;
1040
1041         plcp.data = 0;
1042         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1043         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1044                                                dev->wl->vif,
1045                                                NL80211_BAND_2GHZ,
1046                                                size,
1047                                                rate);
1048         /* Write PLCP in two parts and timing for packet transfer */
1049         tmp = le32_to_cpu(plcp.data);
1050         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1051                               tmp & 0xFFFF);
1052         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1053                               tmp >> 16);
1054         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1055                               le16_to_cpu(dur));
1056 }
1057
1058 /* Instead of using custom probe response template, this function
1059  * just patches custom beacon template by:
1060  * 1) Changing packet type
1061  * 2) Patching duration field
1062  * 3) Stripping TIM
1063  */
1064 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1065                                                u16 *dest_size,
1066                                                struct ieee80211_rate *rate)
1067 {
1068         const u8 *src_data;
1069         u8 *dest_data;
1070         u16 src_size, elem_size, src_pos, dest_pos;
1071         __le16 dur;
1072         struct ieee80211_hdr *hdr;
1073         size_t ie_start;
1074
1075         src_size = dev->wl->current_beacon->len;
1076         src_data = (const u8 *)dev->wl->current_beacon->data;
1077
1078         /* Get the start offset of the variable IEs in the packet. */
1079         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1080         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1081                                                u.beacon.variable));
1082
1083         if (B43legacy_WARN_ON(src_size < ie_start))
1084                 return NULL;
1085
1086         dest_data = kmalloc(src_size, GFP_ATOMIC);
1087         if (unlikely(!dest_data))
1088                 return NULL;
1089
1090         /* Copy the static data and all Information Elements, except the TIM. */
1091         memcpy(dest_data, src_data, ie_start);
1092         src_pos = ie_start;
1093         dest_pos = ie_start;
1094         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1095                 elem_size = src_data[src_pos + 1] + 2;
1096                 if (src_data[src_pos] == 5) {
1097                         /* This is the TIM. */
1098                         continue;
1099                 }
1100                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1101                 dest_pos += elem_size;
1102         }
1103         *dest_size = dest_pos;
1104         hdr = (struct ieee80211_hdr *)dest_data;
1105
1106         /* Set the frame control. */
1107         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1108                                          IEEE80211_STYPE_PROBE_RESP);
1109         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1110                                                dev->wl->vif,
1111                                                NL80211_BAND_2GHZ,
1112                                                *dest_size,
1113                                                rate);
1114         hdr->duration_id = dur;
1115
1116         return dest_data;
1117 }
1118
1119 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1120                                                 u16 ram_offset,
1121                                                 u16 shm_size_offset,
1122                                                 struct ieee80211_rate *rate)
1123 {
1124         const u8 *probe_resp_data;
1125         u16 size;
1126
1127         size = dev->wl->current_beacon->len;
1128         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1129         if (unlikely(!probe_resp_data))
1130                 return;
1131
1132         /* Looks like PLCP headers plus packet timings are stored for
1133          * all possible basic rates
1134          */
1135         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1136                                         &b43legacy_b_ratetable[0]);
1137         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1138                                         &b43legacy_b_ratetable[1]);
1139         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1140                                         &b43legacy_b_ratetable[2]);
1141         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1142                                         &b43legacy_b_ratetable[3]);
1143
1144         size = min_t(size_t, size,
1145                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1146         b43legacy_write_template_common(dev, probe_resp_data,
1147                                         size, ram_offset,
1148                                         shm_size_offset, rate->hw_value);
1149         kfree(probe_resp_data);
1150 }
1151
1152 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1153 {
1154         struct b43legacy_wl *wl = dev->wl;
1155
1156         if (wl->beacon0_uploaded)
1157                 return;
1158         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1159         /* FIXME: Probe resp upload doesn't really belong here,
1160          *        but we don't use that feature anyway. */
1161         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1162                                       &__b43legacy_ratetable[3]);
1163         wl->beacon0_uploaded = true;
1164 }
1165
1166 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1167 {
1168         struct b43legacy_wl *wl = dev->wl;
1169
1170         if (wl->beacon1_uploaded)
1171                 return;
1172         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1173         wl->beacon1_uploaded = true;
1174 }
1175
1176 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1177 {
1178         struct b43legacy_wl *wl = dev->wl;
1179         u32 cmd, beacon0_valid, beacon1_valid;
1180
1181         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1182                 return;
1183
1184         /* This is the bottom half of the asynchronous beacon update. */
1185
1186         /* Ignore interrupt in the future. */
1187         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1188
1189         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1190         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1191         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1192
1193         /* Schedule interrupt manually, if busy. */
1194         if (beacon0_valid && beacon1_valid) {
1195                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1196                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1197                 return;
1198         }
1199
1200         if (unlikely(wl->beacon_templates_virgin)) {
1201                 /* We never uploaded a beacon before.
1202                  * Upload both templates now, but only mark one valid. */
1203                 wl->beacon_templates_virgin = false;
1204                 b43legacy_upload_beacon0(dev);
1205                 b43legacy_upload_beacon1(dev);
1206                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1207                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1208                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1209         } else {
1210                 if (!beacon0_valid) {
1211                         b43legacy_upload_beacon0(dev);
1212                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1213                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1214                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1215                 } else if (!beacon1_valid) {
1216                         b43legacy_upload_beacon1(dev);
1217                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1218                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1219                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1220                 }
1221         }
1222 }
1223
1224 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1225 {
1226         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1227                                          beacon_update_trigger);
1228         struct b43legacy_wldev *dev;
1229
1230         mutex_lock(&wl->mutex);
1231         dev = wl->current_dev;
1232         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1233                 spin_lock_irq(&wl->irq_lock);
1234                 /* Update beacon right away or defer to IRQ. */
1235                 handle_irq_beacon(dev);
1236                 /* The handler might have updated the IRQ mask. */
1237                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1238                                   dev->irq_mask);
1239                 spin_unlock_irq(&wl->irq_lock);
1240         }
1241         mutex_unlock(&wl->mutex);
1242 }
1243
1244 /* Asynchronously update the packet templates in template RAM.
1245  * Locking: Requires wl->irq_lock to be locked. */
1246 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1247 {
1248         struct sk_buff *beacon;
1249         /* This is the top half of the ansynchronous beacon update. The bottom
1250          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1251          * sending an invalid beacon. This can happen for example, if the
1252          * firmware transmits a beacon while we are updating it. */
1253
1254         /* We could modify the existing beacon and set the aid bit in the TIM
1255          * field, but that would probably require resizing and moving of data
1256          * within the beacon template. Simply request a new beacon and let
1257          * mac80211 do the hard work. */
1258         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1259         if (unlikely(!beacon))
1260                 return;
1261
1262         if (wl->current_beacon)
1263                 dev_kfree_skb_any(wl->current_beacon);
1264         wl->current_beacon = beacon;
1265         wl->beacon0_uploaded = false;
1266         wl->beacon1_uploaded = false;
1267         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1268 }
1269
1270 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1271                                      u16 beacon_int)
1272 {
1273         b43legacy_time_lock(dev);
1274         if (dev->dev->id.revision >= 3) {
1275                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1276                                  (beacon_int << 16));
1277                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1278                                  (beacon_int << 10));
1279         } else {
1280                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1281                 b43legacy_write16(dev, 0x610, beacon_int);
1282         }
1283         b43legacy_time_unlock(dev);
1284         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1285 }
1286
1287 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1288 {
1289 }
1290
1291 /* Interrupt handler bottom-half */
1292 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1293 {
1294         u32 reason;
1295         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1296         u32 merged_dma_reason = 0;
1297         int i;
1298         unsigned long flags;
1299
1300         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1301
1302         B43legacy_WARN_ON(b43legacy_status(dev) <
1303                           B43legacy_STAT_INITIALIZED);
1304
1305         reason = dev->irq_reason;
1306         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1307                 dma_reason[i] = dev->dma_reason[i];
1308                 merged_dma_reason |= dma_reason[i];
1309         }
1310
1311         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1312                 b43legacyerr(dev->wl, "MAC transmission error\n");
1313
1314         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1315                 b43legacyerr(dev->wl, "PHY transmission error\n");
1316                 rmb();
1317                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1318                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1319                                               "restarting the controller\n");
1320                         b43legacy_controller_restart(dev, "PHY TX errors");
1321                 }
1322         }
1323
1324         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1325                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1326                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1327                         b43legacyerr(dev->wl, "Fatal DMA error: "
1328                                "0x%08X, 0x%08X, 0x%08X, "
1329                                "0x%08X, 0x%08X, 0x%08X\n",
1330                                dma_reason[0], dma_reason[1],
1331                                dma_reason[2], dma_reason[3],
1332                                dma_reason[4], dma_reason[5]);
1333                         b43legacy_controller_restart(dev, "DMA error");
1334                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1335                         return;
1336                 }
1337                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1338                         b43legacyerr(dev->wl, "DMA error: "
1339                                "0x%08X, 0x%08X, 0x%08X, "
1340                                "0x%08X, 0x%08X, 0x%08X\n",
1341                                dma_reason[0], dma_reason[1],
1342                                dma_reason[2], dma_reason[3],
1343                                dma_reason[4], dma_reason[5]);
1344         }
1345
1346         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1347                 handle_irq_ucode_debug(dev);
1348         if (reason & B43legacy_IRQ_TBTT_INDI)
1349                 handle_irq_tbtt_indication(dev);
1350         if (reason & B43legacy_IRQ_ATIM_END)
1351                 handle_irq_atim_end(dev);
1352         if (reason & B43legacy_IRQ_BEACON)
1353                 handle_irq_beacon(dev);
1354         if (reason & B43legacy_IRQ_PMQ)
1355                 handle_irq_pmq(dev);
1356         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1357                 ;/*TODO*/
1358         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1359                 handle_irq_noise(dev);
1360
1361         /* Check the DMA reason registers for received data. */
1362         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1363                 if (b43legacy_using_pio(dev))
1364                         b43legacy_pio_rx(dev->pio.queue0);
1365                 else
1366                         b43legacy_dma_rx(dev->dma.rx_ring0);
1367         }
1368         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1369         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1370         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1371                 if (b43legacy_using_pio(dev))
1372                         b43legacy_pio_rx(dev->pio.queue3);
1373                 else
1374                         b43legacy_dma_rx(dev->dma.rx_ring3);
1375         }
1376         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1377         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1378
1379         if (reason & B43legacy_IRQ_TX_OK)
1380                 handle_irq_transmit_status(dev);
1381
1382         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1383         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1384 }
1385
1386 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1387                                u16 base, int queueidx)
1388 {
1389         u16 rxctl;
1390
1391         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1392         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1393                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1394         else
1395                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1396 }
1397
1398 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1399 {
1400         if (b43legacy_using_pio(dev) &&
1401             (dev->dev->id.revision < 3) &&
1402             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1403                 /* Apply a PIO specific workaround to the dma_reasons */
1404                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1405                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1406                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1407                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1408         }
1409
1410         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1411
1412         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1413                           dev->dma_reason[0]);
1414         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1415                           dev->dma_reason[1]);
1416         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1417                           dev->dma_reason[2]);
1418         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1419                           dev->dma_reason[3]);
1420         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1421                           dev->dma_reason[4]);
1422         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1423                           dev->dma_reason[5]);
1424 }
1425
1426 /* Interrupt handler top-half */
1427 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1428 {
1429         irqreturn_t ret = IRQ_NONE;
1430         struct b43legacy_wldev *dev = dev_id;
1431         u32 reason;
1432
1433         B43legacy_WARN_ON(!dev);
1434
1435         spin_lock(&dev->wl->irq_lock);
1436
1437         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1438                 /* This can only happen on shared IRQ lines. */
1439                 goto out;
1440         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1441         if (reason == 0xffffffff) /* shared IRQ */
1442                 goto out;
1443         ret = IRQ_HANDLED;
1444         reason &= dev->irq_mask;
1445         if (!reason)
1446                 goto out;
1447
1448         dev->dma_reason[0] = b43legacy_read32(dev,
1449                                               B43legacy_MMIO_DMA0_REASON)
1450                                               & 0x0001DC00;
1451         dev->dma_reason[1] = b43legacy_read32(dev,
1452                                               B43legacy_MMIO_DMA1_REASON)
1453                                               & 0x0000DC00;
1454         dev->dma_reason[2] = b43legacy_read32(dev,
1455                                               B43legacy_MMIO_DMA2_REASON)
1456                                               & 0x0000DC00;
1457         dev->dma_reason[3] = b43legacy_read32(dev,
1458                                               B43legacy_MMIO_DMA3_REASON)
1459                                               & 0x0001DC00;
1460         dev->dma_reason[4] = b43legacy_read32(dev,
1461                                               B43legacy_MMIO_DMA4_REASON)
1462                                               & 0x0000DC00;
1463         dev->dma_reason[5] = b43legacy_read32(dev,
1464                                               B43legacy_MMIO_DMA5_REASON)
1465                                               & 0x0000DC00;
1466
1467         b43legacy_interrupt_ack(dev, reason);
1468         /* Disable all IRQs. They are enabled again in the bottom half. */
1469         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1470         /* Save the reason code and call our bottom half. */
1471         dev->irq_reason = reason;
1472         tasklet_schedule(&dev->isr_tasklet);
1473 out:
1474         spin_unlock(&dev->wl->irq_lock);
1475
1476         return ret;
1477 }
1478
1479 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1480 {
1481         release_firmware(dev->fw.ucode);
1482         dev->fw.ucode = NULL;
1483         release_firmware(dev->fw.pcm);
1484         dev->fw.pcm = NULL;
1485         release_firmware(dev->fw.initvals);
1486         dev->fw.initvals = NULL;
1487         release_firmware(dev->fw.initvals_band);
1488         dev->fw.initvals_band = NULL;
1489 }
1490
1491 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1492 {
1493         b43legacyerr(wl, "You must go to http://wireless.kernel.org/en/users/"
1494                      "Drivers/b43#devicefirmware "
1495                      "and download the correct firmware (version 3).\n");
1496 }
1497
1498 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1499 {
1500         struct b43legacy_wldev *dev = context;
1501
1502         dev->fwp = firmware;
1503         complete(&dev->fw_load_complete);
1504 }
1505
1506 static int do_request_fw(struct b43legacy_wldev *dev,
1507                          const char *name,
1508                          const struct firmware **fw, bool async)
1509 {
1510         char path[sizeof(modparam_fwpostfix) + 32];
1511         struct b43legacy_fw_header *hdr;
1512         u32 size;
1513         int err;
1514
1515         if (!name)
1516                 return 0;
1517
1518         snprintf(path, ARRAY_SIZE(path),
1519                  "b43legacy%s/%s.fw",
1520                  modparam_fwpostfix, name);
1521         b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1522         if (async) {
1523                 init_completion(&dev->fw_load_complete);
1524                 err = request_firmware_nowait(THIS_MODULE, 1, path,
1525                                               dev->dev->dev, GFP_KERNEL,
1526                                               dev, b43legacy_fw_cb);
1527                 if (err) {
1528                         b43legacyerr(dev->wl, "Unable to load firmware\n");
1529                         return err;
1530                 }
1531                 /* stall here until fw ready */
1532                 wait_for_completion(&dev->fw_load_complete);
1533                 if (!dev->fwp)
1534                         err = -EINVAL;
1535                 *fw = dev->fwp;
1536         } else {
1537                 err = request_firmware(fw, path, dev->dev->dev);
1538         }
1539         if (err) {
1540                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1541                        "or load failed.\n", path);
1542                 return err;
1543         }
1544         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1545                 goto err_format;
1546         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1547         switch (hdr->type) {
1548         case B43legacy_FW_TYPE_UCODE:
1549         case B43legacy_FW_TYPE_PCM:
1550                 size = be32_to_cpu(hdr->size);
1551                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1552                         goto err_format;
1553                 /* fallthrough */
1554         case B43legacy_FW_TYPE_IV:
1555                 if (hdr->ver != 1)
1556                         goto err_format;
1557                 break;
1558         default:
1559                 goto err_format;
1560         }
1561
1562         return err;
1563
1564 err_format:
1565         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1566         return -EPROTO;
1567 }
1568
1569 static int b43legacy_one_core_attach(struct ssb_device *dev,
1570                                      struct b43legacy_wl *wl);
1571 static void b43legacy_one_core_detach(struct ssb_device *dev);
1572
1573 static void b43legacy_request_firmware(struct work_struct *work)
1574 {
1575         struct b43legacy_wl *wl = container_of(work,
1576                                   struct b43legacy_wl, firmware_load);
1577         struct b43legacy_wldev *dev = wl->current_dev;
1578         struct b43legacy_firmware *fw = &dev->fw;
1579         const u8 rev = dev->dev->id.revision;
1580         const char *filename;
1581         int err;
1582
1583         if (!fw->ucode) {
1584                 if (rev == 2)
1585                         filename = "ucode2";
1586                 else if (rev == 4)
1587                         filename = "ucode4";
1588                 else
1589                         filename = "ucode5";
1590                 err = do_request_fw(dev, filename, &fw->ucode, true);
1591                 if (err)
1592                         goto err_load;
1593         }
1594         if (!fw->pcm) {
1595                 if (rev < 5)
1596                         filename = "pcm4";
1597                 else
1598                         filename = "pcm5";
1599                 err = do_request_fw(dev, filename, &fw->pcm, false);
1600                 if (err)
1601                         goto err_load;
1602         }
1603         if (!fw->initvals) {
1604                 switch (dev->phy.type) {
1605                 case B43legacy_PHYTYPE_B:
1606                 case B43legacy_PHYTYPE_G:
1607                         if ((rev >= 5) && (rev <= 10))
1608                                 filename = "b0g0initvals5";
1609                         else if (rev == 2 || rev == 4)
1610                                 filename = "b0g0initvals2";
1611                         else
1612                                 goto err_no_initvals;
1613                         break;
1614                 default:
1615                         goto err_no_initvals;
1616                 }
1617                 err = do_request_fw(dev, filename, &fw->initvals, false);
1618                 if (err)
1619                         goto err_load;
1620         }
1621         if (!fw->initvals_band) {
1622                 switch (dev->phy.type) {
1623                 case B43legacy_PHYTYPE_B:
1624                 case B43legacy_PHYTYPE_G:
1625                         if ((rev >= 5) && (rev <= 10))
1626                                 filename = "b0g0bsinitvals5";
1627                         else if (rev >= 11)
1628                                 filename = NULL;
1629                         else if (rev == 2 || rev == 4)
1630                                 filename = NULL;
1631                         else
1632                                 goto err_no_initvals;
1633                         break;
1634                 default:
1635                         goto err_no_initvals;
1636                 }
1637                 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1638                 if (err)
1639                         goto err_load;
1640         }
1641         err = ieee80211_register_hw(wl->hw);
1642         if (err)
1643                 goto err_one_core_detach;
1644         return;
1645
1646 err_one_core_detach:
1647         b43legacy_one_core_detach(dev->dev);
1648         goto error;
1649
1650 err_load:
1651         b43legacy_print_fw_helptext(dev->wl);
1652         goto error;
1653
1654 err_no_initvals:
1655         err = -ENODEV;
1656         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1657                "core rev %u\n", dev->phy.type, rev);
1658         goto error;
1659
1660 error:
1661         b43legacy_release_firmware(dev);
1662         return;
1663 }
1664
1665 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1666 {
1667         struct wiphy *wiphy = dev->wl->hw->wiphy;
1668         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1669         const __be32 *data;
1670         unsigned int i;
1671         unsigned int len;
1672         u16 fwrev;
1673         u16 fwpatch;
1674         u16 fwdate;
1675         u16 fwtime;
1676         u32 tmp, macctl;
1677         int err = 0;
1678
1679         /* Jump the microcode PSM to offset 0 */
1680         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1681         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1682         macctl |= B43legacy_MACCTL_PSM_JMP0;
1683         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1684         /* Zero out all microcode PSM registers and shared memory. */
1685         for (i = 0; i < 64; i++)
1686                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1687         for (i = 0; i < 4096; i += 2)
1688                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1689
1690         /* Upload Microcode. */
1691         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1692         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1693         b43legacy_shm_control_word(dev,
1694                                    B43legacy_SHM_UCODE |
1695                                    B43legacy_SHM_AUTOINC_W,
1696                                    0x0000);
1697         for (i = 0; i < len; i++) {
1698                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1699                                     be32_to_cpu(data[i]));
1700                 udelay(10);
1701         }
1702
1703         if (dev->fw.pcm) {
1704                 /* Upload PCM data. */
1705                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1706                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1707                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1708                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1709                 /* No need for autoinc bit in SHM_HW */
1710                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1711                 for (i = 0; i < len; i++) {
1712                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1713                                           be32_to_cpu(data[i]));
1714                         udelay(10);
1715                 }
1716         }
1717
1718         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1719                           B43legacy_IRQ_ALL);
1720
1721         /* Start the microcode PSM */
1722         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1723         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1724         macctl |= B43legacy_MACCTL_PSM_RUN;
1725         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1726
1727         /* Wait for the microcode to load and respond */
1728         i = 0;
1729         while (1) {
1730                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1731                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1732                         break;
1733                 i++;
1734                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1735                         b43legacyerr(dev->wl, "Microcode not responding\n");
1736                         b43legacy_print_fw_helptext(dev->wl);
1737                         err = -ENODEV;
1738                         goto error;
1739                 }
1740                 msleep_interruptible(50);
1741                 if (signal_pending(current)) {
1742                         err = -EINTR;
1743                         goto error;
1744                 }
1745         }
1746         /* dummy read follows */
1747         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1748
1749         /* Get and check the revisions. */
1750         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1751                                      B43legacy_SHM_SH_UCODEREV);
1752         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1753                                        B43legacy_SHM_SH_UCODEPATCH);
1754         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1755                                       B43legacy_SHM_SH_UCODEDATE);
1756         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1757                                       B43legacy_SHM_SH_UCODETIME);
1758
1759         if (fwrev > 0x128) {
1760                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1761                              " Only firmware from binary drivers version 3.x"
1762                              " is supported. You must change your firmware"
1763                              " files.\n");
1764                 b43legacy_print_fw_helptext(dev->wl);
1765                 err = -EOPNOTSUPP;
1766                 goto error;
1767         }
1768         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1769                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1770                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1771                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1772                       fwtime & 0x1F);
1773
1774         dev->fw.rev = fwrev;
1775         dev->fw.patch = fwpatch;
1776
1777         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1778                         dev->fw.rev, dev->fw.patch);
1779         wiphy->hw_version = dev->dev->id.coreid;
1780
1781         return 0;
1782
1783 error:
1784         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1785         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1786         macctl |= B43legacy_MACCTL_PSM_JMP0;
1787         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1788
1789         return err;
1790 }
1791
1792 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1793                                     const struct b43legacy_iv *ivals,
1794                                     size_t count,
1795                                     size_t array_size)
1796 {
1797         const struct b43legacy_iv *iv;
1798         u16 offset;
1799         size_t i;
1800         bool bit32;
1801
1802         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1803         iv = ivals;
1804         for (i = 0; i < count; i++) {
1805                 if (array_size < sizeof(iv->offset_size))
1806                         goto err_format;
1807                 array_size -= sizeof(iv->offset_size);
1808                 offset = be16_to_cpu(iv->offset_size);
1809                 bit32 = !!(offset & B43legacy_IV_32BIT);
1810                 offset &= B43legacy_IV_OFFSET_MASK;
1811                 if (offset >= 0x1000)
1812                         goto err_format;
1813                 if (bit32) {
1814                         u32 value;
1815
1816                         if (array_size < sizeof(iv->data.d32))
1817                                 goto err_format;
1818                         array_size -= sizeof(iv->data.d32);
1819
1820                         value = get_unaligned_be32(&iv->data.d32);
1821                         b43legacy_write32(dev, offset, value);
1822
1823                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1824                                                         sizeof(__be16) +
1825                                                         sizeof(__be32));
1826                 } else {
1827                         u16 value;
1828
1829                         if (array_size < sizeof(iv->data.d16))
1830                                 goto err_format;
1831                         array_size -= sizeof(iv->data.d16);
1832
1833                         value = be16_to_cpu(iv->data.d16);
1834                         b43legacy_write16(dev, offset, value);
1835
1836                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1837                                                         sizeof(__be16) +
1838                                                         sizeof(__be16));
1839                 }
1840         }
1841         if (array_size)
1842                 goto err_format;
1843
1844         return 0;
1845
1846 err_format:
1847         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1848         b43legacy_print_fw_helptext(dev->wl);
1849
1850         return -EPROTO;
1851 }
1852
1853 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1854 {
1855         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1856         const struct b43legacy_fw_header *hdr;
1857         struct b43legacy_firmware *fw = &dev->fw;
1858         const struct b43legacy_iv *ivals;
1859         size_t count;
1860         int err;
1861
1862         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1863         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1864         count = be32_to_cpu(hdr->size);
1865         err = b43legacy_write_initvals(dev, ivals, count,
1866                                  fw->initvals->size - hdr_len);
1867         if (err)
1868                 goto out;
1869         if (fw->initvals_band) {
1870                 hdr = (const struct b43legacy_fw_header *)
1871                       (fw->initvals_band->data);
1872                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1873                         + hdr_len);
1874                 count = be32_to_cpu(hdr->size);
1875                 err = b43legacy_write_initvals(dev, ivals, count,
1876                                          fw->initvals_band->size - hdr_len);
1877                 if (err)
1878                         goto out;
1879         }
1880 out:
1881
1882         return err;
1883 }
1884
1885 /* Initialize the GPIOs
1886  * http://bcm-specs.sipsolutions.net/GPIO
1887  */
1888 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1889 {
1890         struct ssb_bus *bus = dev->dev->bus;
1891         struct ssb_device *gpiodev, *pcidev = NULL;
1892         u32 mask;
1893         u32 set;
1894
1895         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1896                           b43legacy_read32(dev,
1897                           B43legacy_MMIO_MACCTL)
1898                           & 0xFFFF3FFF);
1899
1900         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1901                           b43legacy_read16(dev,
1902                           B43legacy_MMIO_GPIO_MASK)
1903                           | 0x000F);
1904
1905         mask = 0x0000001F;
1906         set = 0x0000000F;
1907         if (dev->dev->bus->chip_id == 0x4301) {
1908                 mask |= 0x0060;
1909                 set |= 0x0060;
1910         }
1911         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1912                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1913                                   b43legacy_read16(dev,
1914                                   B43legacy_MMIO_GPIO_MASK)
1915                                   | 0x0200);
1916                 mask |= 0x0200;
1917                 set |= 0x0200;
1918         }
1919         if (dev->dev->id.revision >= 2)
1920                 mask  |= 0x0010; /* FIXME: This is redundant. */
1921
1922 #ifdef CONFIG_SSB_DRIVER_PCICORE
1923         pcidev = bus->pcicore.dev;
1924 #endif
1925         gpiodev = bus->chipco.dev ? : pcidev;
1926         if (!gpiodev)
1927                 return 0;
1928         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1929                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1930                      & ~mask) | set);
1931
1932         return 0;
1933 }
1934
1935 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1936 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1937 {
1938         struct ssb_bus *bus = dev->dev->bus;
1939         struct ssb_device *gpiodev, *pcidev = NULL;
1940
1941 #ifdef CONFIG_SSB_DRIVER_PCICORE
1942         pcidev = bus->pcicore.dev;
1943 #endif
1944         gpiodev = bus->chipco.dev ? : pcidev;
1945         if (!gpiodev)
1946                 return;
1947         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1948 }
1949
1950 /* http://bcm-specs.sipsolutions.net/EnableMac */
1951 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1952 {
1953         dev->mac_suspended--;
1954         B43legacy_WARN_ON(dev->mac_suspended < 0);
1955         B43legacy_WARN_ON(irqs_disabled());
1956         if (dev->mac_suspended == 0) {
1957                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1958                                   b43legacy_read32(dev,
1959                                   B43legacy_MMIO_MACCTL)
1960                                   | B43legacy_MACCTL_ENABLED);
1961                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1962                                   B43legacy_IRQ_MAC_SUSPENDED);
1963                 /* the next two are dummy reads */
1964                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1965                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1966                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1967
1968                 /* Re-enable IRQs. */
1969                 spin_lock_irq(&dev->wl->irq_lock);
1970                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1971                                   dev->irq_mask);
1972                 spin_unlock_irq(&dev->wl->irq_lock);
1973         }
1974 }
1975
1976 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1977 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1978 {
1979         int i;
1980         u32 tmp;
1981
1982         might_sleep();
1983         B43legacy_WARN_ON(irqs_disabled());
1984         B43legacy_WARN_ON(dev->mac_suspended < 0);
1985
1986         if (dev->mac_suspended == 0) {
1987                 /* Mask IRQs before suspending MAC. Otherwise
1988                  * the MAC stays busy and won't suspend. */
1989                 spin_lock_irq(&dev->wl->irq_lock);
1990                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1991                 spin_unlock_irq(&dev->wl->irq_lock);
1992                 b43legacy_synchronize_irq(dev);
1993
1994                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1995                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1996                                   b43legacy_read32(dev,
1997                                   B43legacy_MMIO_MACCTL)
1998                                   & ~B43legacy_MACCTL_ENABLED);
1999                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2000                 for (i = 40; i; i--) {
2001                         tmp = b43legacy_read32(dev,
2002                                                B43legacy_MMIO_GEN_IRQ_REASON);
2003                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
2004                                 goto out;
2005                         msleep(1);
2006                 }
2007                 b43legacyerr(dev->wl, "MAC suspend failed\n");
2008         }
2009 out:
2010         dev->mac_suspended++;
2011 }
2012
2013 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2014 {
2015         struct b43legacy_wl *wl = dev->wl;
2016         u32 ctl;
2017         u16 cfp_pretbtt;
2018
2019         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2020         /* Reset status to STA infrastructure mode. */
2021         ctl &= ~B43legacy_MACCTL_AP;
2022         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2023         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2024         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2025         ctl &= ~B43legacy_MACCTL_PROMISC;
2026         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2027         ctl |= B43legacy_MACCTL_INFRA;
2028
2029         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2030                 ctl |= B43legacy_MACCTL_AP;
2031         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2032                 ctl &= ~B43legacy_MACCTL_INFRA;
2033
2034         if (wl->filter_flags & FIF_CONTROL)
2035                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2036         if (wl->filter_flags & FIF_FCSFAIL)
2037                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2038         if (wl->filter_flags & FIF_PLCPFAIL)
2039                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2040         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2041                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2042
2043         /* Workaround: On old hardware the HW-MAC-address-filter
2044          * doesn't work properly, so always run promisc in filter
2045          * it in software. */
2046         if (dev->dev->id.revision <= 4)
2047                 ctl |= B43legacy_MACCTL_PROMISC;
2048
2049         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2050
2051         cfp_pretbtt = 2;
2052         if ((ctl & B43legacy_MACCTL_INFRA) &&
2053             !(ctl & B43legacy_MACCTL_AP)) {
2054                 if (dev->dev->bus->chip_id == 0x4306 &&
2055                     dev->dev->bus->chip_rev == 3)
2056                         cfp_pretbtt = 100;
2057                 else
2058                         cfp_pretbtt = 50;
2059         }
2060         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2061 }
2062
2063 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2064                                         u16 rate,
2065                                         int is_ofdm)
2066 {
2067         u16 offset;
2068
2069         if (is_ofdm) {
2070                 offset = 0x480;
2071                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2072         } else {
2073                 offset = 0x4C0;
2074                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2075         }
2076         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2077                               b43legacy_shm_read16(dev,
2078                               B43legacy_SHM_SHARED, offset));
2079 }
2080
2081 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2082 {
2083         switch (dev->phy.type) {
2084         case B43legacy_PHYTYPE_G:
2085                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2086                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2087                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2088                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2089                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2090                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2091                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2092                 /* fallthrough */
2093         case B43legacy_PHYTYPE_B:
2094                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2095                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2096                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2097                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2098                 break;
2099         default:
2100                 B43legacy_BUG_ON(1);
2101         }
2102 }
2103
2104 /* Set the TX-Antenna for management frames sent by firmware. */
2105 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2106                                           int antenna)
2107 {
2108         u16 ant = 0;
2109         u16 tmp;
2110
2111         switch (antenna) {
2112         case B43legacy_ANTENNA0:
2113                 ant |= B43legacy_TX4_PHY_ANT0;
2114                 break;
2115         case B43legacy_ANTENNA1:
2116                 ant |= B43legacy_TX4_PHY_ANT1;
2117                 break;
2118         case B43legacy_ANTENNA_AUTO:
2119                 ant |= B43legacy_TX4_PHY_ANTLAST;
2120                 break;
2121         default:
2122                 B43legacy_BUG_ON(1);
2123         }
2124
2125         /* FIXME We also need to set the other flags of the PHY control
2126          * field somewhere. */
2127
2128         /* For Beacons */
2129         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2130                                    B43legacy_SHM_SH_BEACPHYCTL);
2131         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2132         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2133                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2134         /* For ACK/CTS */
2135         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2136                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2137         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2138         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2139                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2140         /* For Probe Resposes */
2141         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2142                                    B43legacy_SHM_SH_PRPHYCTL);
2143         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2144         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2145                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2146 }
2147
2148 /* This is the opposite of b43legacy_chip_init() */
2149 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2150 {
2151         b43legacy_radio_turn_off(dev, 1);
2152         b43legacy_gpio_cleanup(dev);
2153         /* firmware is released later */
2154 }
2155
2156 /* Initialize the chip
2157  * http://bcm-specs.sipsolutions.net/ChipInit
2158  */
2159 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2160 {
2161         struct b43legacy_phy *phy = &dev->phy;
2162         int err;
2163         int tmp;
2164         u32 value32, macctl;
2165         u16 value16;
2166
2167         /* Initialize the MAC control */
2168         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2169         if (dev->phy.gmode)
2170                 macctl |= B43legacy_MACCTL_GMODE;
2171         macctl |= B43legacy_MACCTL_INFRA;
2172         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2173
2174         err = b43legacy_upload_microcode(dev);
2175         if (err)
2176                 goto out; /* firmware is released later */
2177
2178         err = b43legacy_gpio_init(dev);
2179         if (err)
2180                 goto out; /* firmware is released later */
2181
2182         err = b43legacy_upload_initvals(dev);
2183         if (err)
2184                 goto err_gpio_clean;
2185         b43legacy_radio_turn_on(dev);
2186
2187         b43legacy_write16(dev, 0x03E6, 0x0000);
2188         err = b43legacy_phy_init(dev);
2189         if (err)
2190                 goto err_radio_off;
2191
2192         /* Select initial Interference Mitigation. */
2193         tmp = phy->interfmode;
2194         phy->interfmode = B43legacy_INTERFMODE_NONE;
2195         b43legacy_radio_set_interference_mitigation(dev, tmp);
2196
2197         b43legacy_phy_set_antenna_diversity(dev);
2198         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2199
2200         if (phy->type == B43legacy_PHYTYPE_B) {
2201                 value16 = b43legacy_read16(dev, 0x005E);
2202                 value16 |= 0x0004;
2203                 b43legacy_write16(dev, 0x005E, value16);
2204         }
2205         b43legacy_write32(dev, 0x0100, 0x01000000);
2206         if (dev->dev->id.revision < 5)
2207                 b43legacy_write32(dev, 0x010C, 0x01000000);
2208
2209         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2210         value32 &= ~B43legacy_MACCTL_INFRA;
2211         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2212         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2213         value32 |= B43legacy_MACCTL_INFRA;
2214         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2215
2216         if (b43legacy_using_pio(dev)) {
2217                 b43legacy_write32(dev, 0x0210, 0x00000100);
2218                 b43legacy_write32(dev, 0x0230, 0x00000100);
2219                 b43legacy_write32(dev, 0x0250, 0x00000100);
2220                 b43legacy_write32(dev, 0x0270, 0x00000100);
2221                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2222                                       0x0000);
2223         }
2224
2225         /* Probe Response Timeout value */
2226         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2227         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2228
2229         /* Initially set the wireless operation mode. */
2230         b43legacy_adjust_opmode(dev);
2231
2232         if (dev->dev->id.revision < 3) {
2233                 b43legacy_write16(dev, 0x060E, 0x0000);
2234                 b43legacy_write16(dev, 0x0610, 0x8000);
2235                 b43legacy_write16(dev, 0x0604, 0x0000);
2236                 b43legacy_write16(dev, 0x0606, 0x0200);
2237         } else {
2238                 b43legacy_write32(dev, 0x0188, 0x80000000);
2239                 b43legacy_write32(dev, 0x018C, 0x02000000);
2240         }
2241         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2242         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2243         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2244         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2245         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2246         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2247         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2248
2249         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2250         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2251         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2252
2253         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2254                           dev->dev->bus->chipco.fast_pwrup_delay);
2255
2256         /* PHY TX errors counter. */
2257         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2258
2259         B43legacy_WARN_ON(err != 0);
2260         b43legacydbg(dev->wl, "Chip initialized\n");
2261 out:
2262         return err;
2263
2264 err_radio_off:
2265         b43legacy_radio_turn_off(dev, 1);
2266 err_gpio_clean:
2267         b43legacy_gpio_cleanup(dev);
2268         goto out;
2269 }
2270
2271 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2272 {
2273         struct b43legacy_phy *phy = &dev->phy;
2274
2275         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2276                 return;
2277
2278         b43legacy_mac_suspend(dev);
2279         b43legacy_phy_lo_g_measure(dev);
2280         b43legacy_mac_enable(dev);
2281 }
2282
2283 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2284 {
2285         b43legacy_phy_lo_mark_all_unused(dev);
2286         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2287                 b43legacy_mac_suspend(dev);
2288                 b43legacy_calc_nrssi_slope(dev);
2289                 b43legacy_mac_enable(dev);
2290         }
2291 }
2292
2293 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2294 {
2295         /* Update device statistics. */
2296         b43legacy_calculate_link_quality(dev);
2297 }
2298
2299 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2300 {
2301         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2302
2303         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2304         wmb();
2305 }
2306
2307 static void do_periodic_work(struct b43legacy_wldev *dev)
2308 {
2309         unsigned int state;
2310
2311         state = dev->periodic_state;
2312         if (state % 8 == 0)
2313                 b43legacy_periodic_every120sec(dev);
2314         if (state % 4 == 0)
2315                 b43legacy_periodic_every60sec(dev);
2316         if (state % 2 == 0)
2317                 b43legacy_periodic_every30sec(dev);
2318         b43legacy_periodic_every15sec(dev);
2319 }
2320
2321 /* Periodic work locking policy:
2322  *      The whole periodic work handler is protected by
2323  *      wl->mutex. If another lock is needed somewhere in the
2324  *      pwork callchain, it's acquired in-place, where it's needed.
2325  */
2326 static void b43legacy_periodic_work_handler(struct work_struct *work)
2327 {
2328         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2329                                              periodic_work.work);
2330         struct b43legacy_wl *wl = dev->wl;
2331         unsigned long delay;
2332
2333         mutex_lock(&wl->mutex);
2334
2335         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2336                 goto out;
2337         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2338                 goto out_requeue;
2339
2340         do_periodic_work(dev);
2341
2342         dev->periodic_state++;
2343 out_requeue:
2344         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2345                 delay = msecs_to_jiffies(50);
2346         else
2347                 delay = round_jiffies_relative(HZ * 15);
2348         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2349 out:
2350         mutex_unlock(&wl->mutex);
2351 }
2352
2353 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2354 {
2355         struct delayed_work *work = &dev->periodic_work;
2356
2357         dev->periodic_state = 0;
2358         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2359         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2360 }
2361
2362 /* Validate access to the chip (SHM) */
2363 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2364 {
2365         u32 value;
2366         u32 shm_backup;
2367
2368         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2369         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2370         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2371                                  0xAA5555AA)
2372                 goto error;
2373         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2374         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2375                                  0x55AAAA55)
2376                 goto error;
2377         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2378
2379         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2380         if ((value | B43legacy_MACCTL_GMODE) !=
2381             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2382                 goto error;
2383
2384         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2385         if (value)
2386                 goto error;
2387
2388         return 0;
2389 error:
2390         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2391         return -ENODEV;
2392 }
2393
2394 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2395 {
2396         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2397         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2398         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2399                                         0x0056);
2400         /* KTP is a word address, but we address SHM bytewise.
2401          * So multiply by two.
2402          */
2403         dev->ktp *= 2;
2404         if (dev->dev->id.revision >= 5)
2405                 /* Number of RCMTA address slots */
2406                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2407                                   dev->max_nr_keys - 8);
2408 }
2409
2410 #ifdef CONFIG_B43LEGACY_HWRNG
2411 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2412 {
2413         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2414         unsigned long flags;
2415
2416         /* Don't take wl->mutex here, as it could deadlock with
2417          * hwrng internal locking. It's not needed to take
2418          * wl->mutex here, anyway. */
2419
2420         spin_lock_irqsave(&wl->irq_lock, flags);
2421         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2422         spin_unlock_irqrestore(&wl->irq_lock, flags);
2423
2424         return (sizeof(u16));
2425 }
2426 #endif
2427
2428 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2429 {
2430 #ifdef CONFIG_B43LEGACY_HWRNG
2431         if (wl->rng_initialized)
2432                 hwrng_unregister(&wl->rng);
2433 #endif
2434 }
2435
2436 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2437 {
2438         int err = 0;
2439
2440 #ifdef CONFIG_B43LEGACY_HWRNG
2441         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2442                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2443         wl->rng.name = wl->rng_name;
2444         wl->rng.data_read = b43legacy_rng_read;
2445         wl->rng.priv = (unsigned long)wl;
2446         wl->rng_initialized = 1;
2447         err = hwrng_register(&wl->rng);
2448         if (err) {
2449                 wl->rng_initialized = 0;
2450                 b43legacyerr(wl, "Failed to register the random "
2451                        "number generator (%d)\n", err);
2452         }
2453
2454 #endif
2455         return err;
2456 }
2457
2458 static void b43legacy_tx_work(struct work_struct *work)
2459 {
2460         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2461                                   tx_work);
2462         struct b43legacy_wldev *dev;
2463         struct sk_buff *skb;
2464         int queue_num;
2465         int err = 0;
2466
2467         mutex_lock(&wl->mutex);
2468         dev = wl->current_dev;
2469         if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2470                 mutex_unlock(&wl->mutex);
2471                 return;
2472         }
2473
2474         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2475                 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2476                         skb = skb_dequeue(&wl->tx_queue[queue_num]);
2477                         if (b43legacy_using_pio(dev))
2478                                 err = b43legacy_pio_tx(dev, skb);
2479                         else
2480                                 err = b43legacy_dma_tx(dev, skb);
2481                         if (err == -ENOSPC) {
2482                                 wl->tx_queue_stopped[queue_num] = 1;
2483                                 ieee80211_stop_queue(wl->hw, queue_num);
2484                                 skb_queue_head(&wl->tx_queue[queue_num], skb);
2485                                 break;
2486                         }
2487                         if (unlikely(err))
2488                                 dev_kfree_skb(skb); /* Drop it */
2489                         err = 0;
2490                 }
2491
2492                 if (!err)
2493                         wl->tx_queue_stopped[queue_num] = 0;
2494         }
2495
2496         mutex_unlock(&wl->mutex);
2497 }
2498
2499 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2500                             struct ieee80211_tx_control *control,
2501                             struct sk_buff *skb)
2502 {
2503         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2504
2505         if (unlikely(skb->len < 2 + 2 + 6)) {
2506                 /* Too short, this can't be a valid frame. */
2507                 dev_kfree_skb_any(skb);
2508                 return;
2509         }
2510         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2511
2512         skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2513         if (!wl->tx_queue_stopped[skb->queue_mapping])
2514                 ieee80211_queue_work(wl->hw, &wl->tx_work);
2515         else
2516                 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2517 }
2518
2519 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2520                                 struct ieee80211_vif *vif, u16 queue,
2521                                 const struct ieee80211_tx_queue_params *params)
2522 {
2523         return 0;
2524 }
2525
2526 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2527                                   struct ieee80211_low_level_stats *stats)
2528 {
2529         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2530         unsigned long flags;
2531
2532         spin_lock_irqsave(&wl->irq_lock, flags);
2533         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2534         spin_unlock_irqrestore(&wl->irq_lock, flags);
2535
2536         return 0;
2537 }
2538
2539 static const char *phymode_to_string(unsigned int phymode)
2540 {
2541         switch (phymode) {
2542         case B43legacy_PHYMODE_B:
2543                 return "B";
2544         case B43legacy_PHYMODE_G:
2545                 return "G";
2546         default:
2547                 B43legacy_BUG_ON(1);
2548         }
2549         return "";
2550 }
2551
2552 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2553                                   unsigned int phymode,
2554                                   struct b43legacy_wldev **dev,
2555                                   bool *gmode)
2556 {
2557         struct b43legacy_wldev *d;
2558
2559         list_for_each_entry(d, &wl->devlist, list) {
2560                 if (d->phy.possible_phymodes & phymode) {
2561                         /* Ok, this device supports the PHY-mode.
2562                          * Set the gmode bit. */
2563                         *gmode = true;
2564                         *dev = d;
2565
2566                         return 0;
2567                 }
2568         }
2569
2570         return -ESRCH;
2571 }
2572
2573 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2574 {
2575         struct ssb_device *sdev = dev->dev;
2576         u32 tmslow;
2577
2578         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2579         tmslow &= ~B43legacy_TMSLOW_GMODE;
2580         tmslow |= B43legacy_TMSLOW_PHYRESET;
2581         tmslow |= SSB_TMSLOW_FGC;
2582         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2583         msleep(1);
2584
2585         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2586         tmslow &= ~SSB_TMSLOW_FGC;
2587         tmslow |= B43legacy_TMSLOW_PHYRESET;
2588         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2589         msleep(1);
2590 }
2591
2592 /* Expects wl->mutex locked */
2593 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2594                                       unsigned int new_mode)
2595 {
2596         struct b43legacy_wldev *uninitialized_var(up_dev);
2597         struct b43legacy_wldev *down_dev;
2598         int err;
2599         bool gmode = false;
2600         int prev_status;
2601
2602         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2603         if (err) {
2604                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2605                        phymode_to_string(new_mode));
2606                 return err;
2607         }
2608         if ((up_dev == wl->current_dev) &&
2609             (!!wl->current_dev->phy.gmode == !!gmode))
2610                 /* This device is already running. */
2611                 return 0;
2612         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2613                phymode_to_string(new_mode));
2614         down_dev = wl->current_dev;
2615
2616         prev_status = b43legacy_status(down_dev);
2617         /* Shutdown the currently running core. */
2618         if (prev_status >= B43legacy_STAT_STARTED)
2619                 b43legacy_wireless_core_stop(down_dev);
2620         if (prev_status >= B43legacy_STAT_INITIALIZED)
2621                 b43legacy_wireless_core_exit(down_dev);
2622
2623         if (down_dev != up_dev)
2624                 /* We switch to a different core, so we put PHY into
2625                  * RESET on the old core. */
2626                 b43legacy_put_phy_into_reset(down_dev);
2627
2628         /* Now start the new core. */
2629         up_dev->phy.gmode = gmode;
2630         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2631                 err = b43legacy_wireless_core_init(up_dev);
2632                 if (err) {
2633                         b43legacyerr(wl, "Fatal: Could not initialize device"
2634                                      " for newly selected %s-PHY mode\n",
2635                                      phymode_to_string(new_mode));
2636                         goto init_failure;
2637                 }
2638         }
2639         if (prev_status >= B43legacy_STAT_STARTED) {
2640                 err = b43legacy_wireless_core_start(up_dev);
2641                 if (err) {
2642                         b43legacyerr(wl, "Fatal: Could not start device for "
2643                                "newly selected %s-PHY mode\n",
2644                                phymode_to_string(new_mode));
2645                         b43legacy_wireless_core_exit(up_dev);
2646                         goto init_failure;
2647                 }
2648         }
2649         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2650
2651         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2652
2653         wl->current_dev = up_dev;
2654
2655         return 0;
2656 init_failure:
2657         /* Whoops, failed to init the new core. No core is operating now. */
2658         wl->current_dev = NULL;
2659         return err;
2660 }
2661
2662 /* Write the short and long frame retry limit values. */
2663 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2664                                        unsigned int short_retry,
2665                                        unsigned int long_retry)
2666 {
2667         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2668          * the chip-internal counter. */
2669         short_retry = min(short_retry, (unsigned int)0xF);
2670         long_retry = min(long_retry, (unsigned int)0xF);
2671
2672         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2673         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2674 }
2675
2676 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2677                                    u32 changed)
2678 {
2679         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2680         struct b43legacy_wldev *dev;
2681         struct b43legacy_phy *phy;
2682         struct ieee80211_conf *conf = &hw->conf;
2683         unsigned long flags;
2684         unsigned int new_phymode = 0xFFFF;
2685         int antenna_tx;
2686         int err = 0;
2687
2688         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2689
2690         mutex_lock(&wl->mutex);
2691         dev = wl->current_dev;
2692         phy = &dev->phy;
2693
2694         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2695                 b43legacy_set_retry_limits(dev,
2696                                            conf->short_frame_max_tx_count,
2697                                            conf->long_frame_max_tx_count);
2698         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2699         if (!changed)
2700                 goto out_unlock_mutex;
2701
2702         /* Switch the PHY mode (if necessary). */
2703         switch (conf->chandef.chan->band) {
2704         case NL80211_BAND_2GHZ:
2705                 if (phy->type == B43legacy_PHYTYPE_B)
2706                         new_phymode = B43legacy_PHYMODE_B;
2707                 else
2708                         new_phymode = B43legacy_PHYMODE_G;
2709                 break;
2710         default:
2711                 B43legacy_WARN_ON(1);
2712         }
2713         err = b43legacy_switch_phymode(wl, new_phymode);
2714         if (err)
2715                 goto out_unlock_mutex;
2716
2717         /* Disable IRQs while reconfiguring the device.
2718          * This makes it possible to drop the spinlock throughout
2719          * the reconfiguration process. */
2720         spin_lock_irqsave(&wl->irq_lock, flags);
2721         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2722                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2723                 goto out_unlock_mutex;
2724         }
2725         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2726         spin_unlock_irqrestore(&wl->irq_lock, flags);
2727         b43legacy_synchronize_irq(dev);
2728
2729         /* Switch to the requested channel.
2730          * The firmware takes care of races with the TX handler. */
2731         if (conf->chandef.chan->hw_value != phy->channel)
2732                 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2733                                               0);
2734
2735         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2736
2737         /* Adjust the desired TX power level. */
2738         if (conf->power_level != 0) {
2739                 if (conf->power_level != phy->power_level) {
2740                         phy->power_level = conf->power_level;
2741                         b43legacy_phy_xmitpower(dev);
2742                 }
2743         }
2744
2745         /* Antennas for RX and management frame TX. */
2746         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2747
2748         if (wl->radio_enabled != phy->radio_on) {
2749                 if (wl->radio_enabled) {
2750                         b43legacy_radio_turn_on(dev);
2751                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2752                         if (!dev->radio_hw_enable)
2753                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2754                                               " button still turns the radio"
2755                                               " physically off. Press the"
2756                                               " button to turn it on.\n");
2757                 } else {
2758                         b43legacy_radio_turn_off(dev, 0);
2759                         b43legacyinfo(dev->wl, "Radio turned off by"
2760                                       " software\n");
2761                 }
2762         }
2763
2764         spin_lock_irqsave(&wl->irq_lock, flags);
2765         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2766         spin_unlock_irqrestore(&wl->irq_lock, flags);
2767 out_unlock_mutex:
2768         mutex_unlock(&wl->mutex);
2769
2770         return err;
2771 }
2772
2773 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2774 {
2775         struct ieee80211_supported_band *sband =
2776                 dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2777         struct ieee80211_rate *rate;
2778         int i;
2779         u16 basic, direct, offset, basic_offset, rateptr;
2780
2781         for (i = 0; i < sband->n_bitrates; i++) {
2782                 rate = &sband->bitrates[i];
2783
2784                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2785                         direct = B43legacy_SHM_SH_CCKDIRECT;
2786                         basic = B43legacy_SHM_SH_CCKBASIC;
2787                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2788                         offset &= 0xF;
2789                 } else {
2790                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2791                         basic = B43legacy_SHM_SH_OFDMBASIC;
2792                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2793                         offset &= 0xF;
2794                 }
2795
2796                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2797
2798                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2799                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2800                         basic_offset &= 0xF;
2801                 } else {
2802                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2803                         basic_offset &= 0xF;
2804                 }
2805
2806                 /*
2807                  * Get the pointer that we need to point to
2808                  * from the direct map
2809                  */
2810                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2811                                                direct + 2 * basic_offset);
2812                 /* and write it to the basic map */
2813                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2814                                       basic + 2 * offset, rateptr);
2815         }
2816 }
2817
2818 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2819                                     struct ieee80211_vif *vif,
2820                                     struct ieee80211_bss_conf *conf,
2821                                     u32 changed)
2822 {
2823         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2824         struct b43legacy_wldev *dev;
2825         unsigned long flags;
2826
2827         mutex_lock(&wl->mutex);
2828         B43legacy_WARN_ON(wl->vif != vif);
2829
2830         dev = wl->current_dev;
2831
2832         /* Disable IRQs while reconfiguring the device.
2833          * This makes it possible to drop the spinlock throughout
2834          * the reconfiguration process. */
2835         spin_lock_irqsave(&wl->irq_lock, flags);
2836         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2837                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2838                 goto out_unlock_mutex;
2839         }
2840         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2841
2842         if (changed & BSS_CHANGED_BSSID) {
2843                 b43legacy_synchronize_irq(dev);
2844
2845                 if (conf->bssid)
2846                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2847                 else
2848                         eth_zero_addr(wl->bssid);
2849         }
2850
2851         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2852                 if (changed & BSS_CHANGED_BEACON &&
2853                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2854                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2855                         b43legacy_update_templates(wl);
2856
2857                 if (changed & BSS_CHANGED_BSSID)
2858                         b43legacy_write_mac_bssid_templates(dev);
2859         }
2860         spin_unlock_irqrestore(&wl->irq_lock, flags);
2861
2862         b43legacy_mac_suspend(dev);
2863
2864         if (changed & BSS_CHANGED_BEACON_INT &&
2865             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2866              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2867                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2868
2869         if (changed & BSS_CHANGED_BASIC_RATES)
2870                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2871
2872         if (changed & BSS_CHANGED_ERP_SLOT) {
2873                 if (conf->use_short_slot)
2874                         b43legacy_short_slot_timing_enable(dev);
2875                 else
2876                         b43legacy_short_slot_timing_disable(dev);
2877         }
2878
2879         b43legacy_mac_enable(dev);
2880
2881         spin_lock_irqsave(&wl->irq_lock, flags);
2882         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2883         /* XXX: why? */
2884         spin_unlock_irqrestore(&wl->irq_lock, flags);
2885  out_unlock_mutex:
2886         mutex_unlock(&wl->mutex);
2887 }
2888
2889 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2890                                           unsigned int changed,
2891                                           unsigned int *fflags,u64 multicast)
2892 {
2893         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2894         struct b43legacy_wldev *dev = wl->current_dev;
2895         unsigned long flags;
2896
2897         if (!dev) {
2898                 *fflags = 0;
2899                 return;
2900         }
2901
2902         spin_lock_irqsave(&wl->irq_lock, flags);
2903         *fflags &= FIF_ALLMULTI |
2904                   FIF_FCSFAIL |
2905                   FIF_PLCPFAIL |
2906                   FIF_CONTROL |
2907                   FIF_OTHER_BSS |
2908                   FIF_BCN_PRBRESP_PROMISC;
2909
2910         changed &= FIF_ALLMULTI |
2911                    FIF_FCSFAIL |
2912                    FIF_PLCPFAIL |
2913                    FIF_CONTROL |
2914                    FIF_OTHER_BSS |
2915                    FIF_BCN_PRBRESP_PROMISC;
2916
2917         wl->filter_flags = *fflags;
2918
2919         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2920                 b43legacy_adjust_opmode(dev);
2921         spin_unlock_irqrestore(&wl->irq_lock, flags);
2922 }
2923
2924 /* Locking: wl->mutex */
2925 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2926 {
2927         struct b43legacy_wl *wl = dev->wl;
2928         unsigned long flags;
2929         int queue_num;
2930
2931         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2932                 return;
2933
2934         /* Disable and sync interrupts. We must do this before than
2935          * setting the status to INITIALIZED, as the interrupt handler
2936          * won't care about IRQs then. */
2937         spin_lock_irqsave(&wl->irq_lock, flags);
2938         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2939         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2940         spin_unlock_irqrestore(&wl->irq_lock, flags);
2941         b43legacy_synchronize_irq(dev);
2942
2943         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2944
2945         mutex_unlock(&wl->mutex);
2946         /* Must unlock as it would otherwise deadlock. No races here.
2947          * Cancel the possibly running self-rearming periodic work. */
2948         cancel_delayed_work_sync(&dev->periodic_work);
2949         cancel_work_sync(&wl->tx_work);
2950         mutex_lock(&wl->mutex);
2951
2952         /* Drain all TX queues. */
2953         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2954                 while (skb_queue_len(&wl->tx_queue[queue_num]))
2955                         dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2956         }
2957
2958 b43legacy_mac_suspend(dev);
2959         free_irq(dev->dev->irq, dev);
2960         b43legacydbg(wl, "Wireless interface stopped\n");
2961 }
2962
2963 /* Locking: wl->mutex */
2964 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2965 {
2966         int err;
2967
2968         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2969
2970         drain_txstatus_queue(dev);
2971         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2972                           IRQF_SHARED, KBUILD_MODNAME, dev);
2973         if (err) {
2974                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2975                        dev->dev->irq);
2976                 goto out;
2977         }
2978         /* We are ready to run. */
2979         ieee80211_wake_queues(dev->wl->hw);
2980         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2981
2982         /* Start data flow (TX/RX) */
2983         b43legacy_mac_enable(dev);
2984         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2985
2986         /* Start maintenance work */
2987         b43legacy_periodic_tasks_setup(dev);
2988
2989         b43legacydbg(dev->wl, "Wireless interface started\n");
2990 out:
2991         return err;
2992 }
2993
2994 /* Get PHY and RADIO versioning numbers */
2995 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2996 {
2997         struct b43legacy_phy *phy = &dev->phy;
2998         u32 tmp;
2999         u8 analog_type;
3000         u8 phy_type;
3001         u8 phy_rev;
3002         u16 radio_manuf;
3003         u16 radio_ver;
3004         u16 radio_rev;
3005         int unsupported = 0;
3006
3007         /* Get PHY versioning */
3008         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
3009         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
3010                       >> B43legacy_PHYVER_ANALOG_SHIFT;
3011         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3012         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3013         switch (phy_type) {
3014         case B43legacy_PHYTYPE_B:
3015                 if (phy_rev != 2 && phy_rev != 4
3016                     && phy_rev != 6 && phy_rev != 7)
3017                         unsupported = 1;
3018                 break;
3019         case B43legacy_PHYTYPE_G:
3020                 if (phy_rev > 8)
3021                         unsupported = 1;
3022                 break;
3023         default:
3024                 unsupported = 1;
3025         }
3026         if (unsupported) {
3027                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3028                        "(Analog %u, Type %u, Revision %u)\n",
3029                        analog_type, phy_type, phy_rev);
3030                 return -EOPNOTSUPP;
3031         }
3032         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3033                analog_type, phy_type, phy_rev);
3034
3035
3036         /* Get RADIO versioning */
3037         if (dev->dev->bus->chip_id == 0x4317) {
3038                 if (dev->dev->bus->chip_rev == 0)
3039                         tmp = 0x3205017F;
3040                 else if (dev->dev->bus->chip_rev == 1)
3041                         tmp = 0x4205017F;
3042                 else
3043                         tmp = 0x5205017F;
3044         } else {
3045                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3046                                   B43legacy_RADIOCTL_ID);
3047                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3048                 tmp <<= 16;
3049                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3050                                   B43legacy_RADIOCTL_ID);
3051                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3052         }
3053         radio_manuf = (tmp & 0x00000FFF);
3054         radio_ver = (tmp & 0x0FFFF000) >> 12;
3055         radio_rev = (tmp & 0xF0000000) >> 28;
3056         switch (phy_type) {
3057         case B43legacy_PHYTYPE_B:
3058                 if ((radio_ver & 0xFFF0) != 0x2050)
3059                         unsupported = 1;
3060                 break;
3061         case B43legacy_PHYTYPE_G:
3062                 if (radio_ver != 0x2050)
3063                         unsupported = 1;
3064                 break;
3065         default:
3066                 B43legacy_BUG_ON(1);
3067         }
3068         if (unsupported) {
3069                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3070                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3071                        radio_manuf, radio_ver, radio_rev);
3072                 return -EOPNOTSUPP;
3073         }
3074         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3075                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3076
3077
3078         phy->radio_manuf = radio_manuf;
3079         phy->radio_ver = radio_ver;
3080         phy->radio_rev = radio_rev;
3081
3082         phy->analog = analog_type;
3083         phy->type = phy_type;
3084         phy->rev = phy_rev;
3085
3086         return 0;
3087 }
3088
3089 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3090                                       struct b43legacy_phy *phy)
3091 {
3092         struct b43legacy_lopair *lo;
3093         int i;
3094
3095         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3096         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3097
3098         /* Assume the radio is enabled. If it's not enabled, the state will
3099          * immediately get fixed on the first periodic work run. */
3100         dev->radio_hw_enable = true;
3101
3102         phy->savedpctlreg = 0xFFFF;
3103         phy->aci_enable = false;
3104         phy->aci_wlan_automatic = false;
3105         phy->aci_hw_rssi = false;
3106
3107         lo = phy->_lo_pairs;
3108         if (lo)
3109                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3110                                      B43legacy_LO_COUNT);
3111         phy->max_lb_gain = 0;
3112         phy->trsw_rx_gain = 0;
3113
3114         /* Set default attenuation values. */
3115         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3116         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3117         phy->txctl1 = b43legacy_default_txctl1(dev);
3118         phy->txpwr_offset = 0;
3119
3120         /* NRSSI */
3121         phy->nrssislope = 0;
3122         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3123                 phy->nrssi[i] = -1000;
3124         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3125                 phy->nrssi_lt[i] = i;
3126
3127         phy->lofcal = 0xFFFF;
3128         phy->initval = 0xFFFF;
3129
3130         phy->interfmode = B43legacy_INTERFMODE_NONE;
3131         phy->channel = 0xFF;
3132 }
3133
3134 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3135 {
3136         /* Flags */
3137         dev->dfq_valid = false;
3138
3139         /* Stats */
3140         memset(&dev->stats, 0, sizeof(dev->stats));
3141
3142         setup_struct_phy_for_init(dev, &dev->phy);
3143
3144         /* IRQ related flags */
3145         dev->irq_reason = 0;
3146         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3147         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3148
3149         dev->mac_suspended = 1;
3150
3151         /* Noise calculation context */
3152         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3153 }
3154
3155 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3156                                           bool idle) {
3157         u16 pu_delay = 1050;
3158
3159         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3160                 pu_delay = 500;
3161         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3162                 pu_delay = max(pu_delay, (u16)2400);
3163
3164         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3165                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3166 }
3167
3168 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3169 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3170 {
3171         u16 pretbtt;
3172
3173         /* The time value is in microseconds. */
3174         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3175                 pretbtt = 2;
3176         else
3177                 pretbtt = 250;
3178         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3179                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3180         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3181 }
3182
3183 /* Shutdown a wireless core */
3184 /* Locking: wl->mutex */
3185 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3186 {
3187         struct b43legacy_phy *phy = &dev->phy;
3188         u32 macctl;
3189
3190         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3191         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3192                 return;
3193         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3194
3195         /* Stop the microcode PSM. */
3196         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3197         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3198         macctl |= B43legacy_MACCTL_PSM_JMP0;
3199         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3200
3201         b43legacy_leds_exit(dev);
3202         b43legacy_rng_exit(dev->wl);
3203         b43legacy_pio_free(dev);
3204         b43legacy_dma_free(dev);
3205         b43legacy_chip_exit(dev);
3206         b43legacy_radio_turn_off(dev, 1);
3207         b43legacy_switch_analog(dev, 0);
3208         if (phy->dyn_tssi_tbl)
3209                 kfree(phy->tssi2dbm);
3210         kfree(phy->lo_control);
3211         phy->lo_control = NULL;
3212         if (dev->wl->current_beacon) {
3213                 dev_kfree_skb_any(dev->wl->current_beacon);
3214                 dev->wl->current_beacon = NULL;
3215         }
3216
3217         ssb_device_disable(dev->dev, 0);
3218         ssb_bus_may_powerdown(dev->dev->bus);
3219 }
3220
3221 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3222 {
3223         struct b43legacy_phy *phy = &dev->phy;
3224         int i;
3225
3226         /* Set default attenuation values. */
3227         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3228         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3229         phy->txctl1 = b43legacy_default_txctl1(dev);
3230         phy->txctl2 = 0xFFFF;
3231         phy->txpwr_offset = 0;
3232
3233         /* NRSSI */
3234         phy->nrssislope = 0;
3235         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3236                 phy->nrssi[i] = -1000;
3237         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3238                 phy->nrssi_lt[i] = i;
3239
3240         phy->lofcal = 0xFFFF;
3241         phy->initval = 0xFFFF;
3242
3243         phy->aci_enable = false;
3244         phy->aci_wlan_automatic = false;
3245         phy->aci_hw_rssi = false;
3246
3247         phy->antenna_diversity = 0xFFFF;
3248         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3249         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3250
3251         /* Flags */
3252         phy->calibrated = 0;
3253
3254         if (phy->_lo_pairs)
3255                 memset(phy->_lo_pairs, 0,
3256                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3257         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3258 }
3259
3260 /* Initialize a wireless core */
3261 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3262 {
3263         struct b43legacy_wl *wl = dev->wl;
3264         struct ssb_bus *bus = dev->dev->bus;
3265         struct b43legacy_phy *phy = &dev->phy;
3266         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3267         int err;
3268         u32 hf;
3269         u32 tmp;
3270
3271         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3272
3273         err = ssb_bus_powerup(bus, 0);
3274         if (err)
3275                 goto out;
3276         if (!ssb_device_is_enabled(dev->dev)) {
3277                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3278                 b43legacy_wireless_core_reset(dev, tmp);
3279         }
3280
3281         if ((phy->type == B43legacy_PHYTYPE_B) ||
3282             (phy->type == B43legacy_PHYTYPE_G)) {
3283                 phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
3284                                          sizeof(struct b43legacy_lopair),
3285                                          GFP_KERNEL);
3286                 if (!phy->_lo_pairs)
3287                         return -ENOMEM;
3288         }
3289         setup_struct_wldev_for_init(dev);
3290
3291         err = b43legacy_phy_init_tssi2dbm_table(dev);
3292         if (err)
3293                 goto err_kfree_lo_control;
3294
3295         /* Enable IRQ routing to this device. */
3296         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3297
3298         prepare_phy_data_for_init(dev);
3299         b43legacy_phy_calibrate(dev);
3300         err = b43legacy_chip_init(dev);
3301         if (err)
3302                 goto err_kfree_tssitbl;
3303         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3304                               B43legacy_SHM_SH_WLCOREREV,
3305                               dev->dev->id.revision);
3306         hf = b43legacy_hf_read(dev);
3307         if (phy->type == B43legacy_PHYTYPE_G) {
3308                 hf |= B43legacy_HF_SYMW;
3309                 if (phy->rev == 1)
3310                         hf |= B43legacy_HF_GDCW;
3311                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3312                         hf |= B43legacy_HF_OFDMPABOOST;
3313         } else if (phy->type == B43legacy_PHYTYPE_B) {
3314                 hf |= B43legacy_HF_SYMW;
3315                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3316                         hf &= ~B43legacy_HF_GDCW;
3317         }
3318         b43legacy_hf_write(dev, hf);
3319
3320         b43legacy_set_retry_limits(dev,
3321                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3322                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3323
3324         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3325                               0x0044, 3);
3326         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3327                               0x0046, 2);
3328
3329         /* Disable sending probe responses from firmware.
3330          * Setting the MaxTime to one usec will always trigger
3331          * a timeout, so we never send any probe resp.
3332          * A timeout of zero is infinite. */
3333         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3334                               B43legacy_SHM_SH_PRMAXTIME, 1);
3335
3336         b43legacy_rate_memory_init(dev);
3337
3338         /* Minimum Contention Window */
3339         if (phy->type == B43legacy_PHYTYPE_B)
3340                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3341                                       0x0003, 31);
3342         else
3343                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3344                                       0x0003, 15);
3345         /* Maximum Contention Window */
3346         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3347                               0x0004, 1023);
3348
3349         do {
3350                 if (b43legacy_using_pio(dev))
3351                         err = b43legacy_pio_init(dev);
3352                 else {
3353                         err = b43legacy_dma_init(dev);
3354                         if (!err)
3355                                 b43legacy_qos_init(dev);
3356                 }
3357         } while (err == -EAGAIN);
3358         if (err)
3359                 goto err_chip_exit;
3360
3361         b43legacy_set_synth_pu_delay(dev, 1);
3362
3363         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3364         b43legacy_upload_card_macaddress(dev);
3365         b43legacy_security_init(dev);
3366         b43legacy_rng_init(wl);
3367
3368         ieee80211_wake_queues(dev->wl->hw);
3369         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3370
3371         b43legacy_leds_init(dev);
3372 out:
3373         return err;
3374
3375 err_chip_exit:
3376         b43legacy_chip_exit(dev);
3377 err_kfree_tssitbl:
3378         if (phy->dyn_tssi_tbl)
3379                 kfree(phy->tssi2dbm);
3380 err_kfree_lo_control:
3381         kfree(phy->lo_control);
3382         phy->lo_control = NULL;
3383         ssb_bus_may_powerdown(bus);
3384         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3385         return err;
3386 }
3387
3388 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3389                                       struct ieee80211_vif *vif)
3390 {
3391         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3392         struct b43legacy_wldev *dev;
3393         unsigned long flags;
3394         int err = -EOPNOTSUPP;
3395
3396         /* TODO: allow WDS/AP devices to coexist */
3397
3398         if (vif->type != NL80211_IFTYPE_AP &&
3399             vif->type != NL80211_IFTYPE_STATION &&
3400             vif->type != NL80211_IFTYPE_WDS &&
3401             vif->type != NL80211_IFTYPE_ADHOC)
3402                 return -EOPNOTSUPP;
3403
3404         mutex_lock(&wl->mutex);
3405         if (wl->operating)
3406                 goto out_mutex_unlock;
3407
3408         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3409
3410         dev = wl->current_dev;
3411         wl->operating = true;
3412         wl->vif = vif;
3413         wl->if_type = vif->type;
3414         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3415
3416         spin_lock_irqsave(&wl->irq_lock, flags);
3417         b43legacy_adjust_opmode(dev);
3418         b43legacy_set_pretbtt(dev);
3419         b43legacy_set_synth_pu_delay(dev, 0);
3420         b43legacy_upload_card_macaddress(dev);
3421         spin_unlock_irqrestore(&wl->irq_lock, flags);
3422
3423         err = 0;
3424  out_mutex_unlock:
3425         mutex_unlock(&wl->mutex);
3426
3427         return err;
3428 }
3429
3430 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3431                                           struct ieee80211_vif *vif)
3432 {
3433         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3434         struct b43legacy_wldev *dev = wl->current_dev;
3435         unsigned long flags;
3436
3437         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3438
3439         mutex_lock(&wl->mutex);
3440
3441         B43legacy_WARN_ON(!wl->operating);
3442         B43legacy_WARN_ON(wl->vif != vif);
3443         wl->vif = NULL;
3444
3445         wl->operating = false;
3446
3447         spin_lock_irqsave(&wl->irq_lock, flags);
3448         b43legacy_adjust_opmode(dev);
3449         eth_zero_addr(wl->mac_addr);
3450         b43legacy_upload_card_macaddress(dev);
3451         spin_unlock_irqrestore(&wl->irq_lock, flags);
3452
3453         mutex_unlock(&wl->mutex);
3454 }
3455
3456 static int b43legacy_op_start(struct ieee80211_hw *hw)
3457 {
3458         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3459         struct b43legacy_wldev *dev = wl->current_dev;
3460         int did_init = 0;
3461         int err = 0;
3462
3463         /* Kill all old instance specific information to make sure
3464          * the card won't use it in the short timeframe between start
3465          * and mac80211 reconfiguring it. */
3466         eth_zero_addr(wl->bssid);
3467         eth_zero_addr(wl->mac_addr);
3468         wl->filter_flags = 0;
3469         wl->beacon0_uploaded = false;
3470         wl->beacon1_uploaded = false;
3471         wl->beacon_templates_virgin = true;
3472         wl->radio_enabled = true;
3473
3474         mutex_lock(&wl->mutex);
3475
3476         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3477                 err = b43legacy_wireless_core_init(dev);
3478                 if (err)
3479                         goto out_mutex_unlock;
3480                 did_init = 1;
3481         }
3482
3483         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3484                 err = b43legacy_wireless_core_start(dev);
3485                 if (err) {
3486                         if (did_init)
3487                                 b43legacy_wireless_core_exit(dev);
3488                         goto out_mutex_unlock;
3489                 }
3490         }
3491
3492         wiphy_rfkill_start_polling(hw->wiphy);
3493
3494 out_mutex_unlock:
3495         mutex_unlock(&wl->mutex);
3496
3497         return err;
3498 }
3499
3500 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3501 {
3502         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3503         struct b43legacy_wldev *dev = wl->current_dev;
3504
3505         cancel_work_sync(&(wl->beacon_update_trigger));
3506
3507         mutex_lock(&wl->mutex);
3508         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3509                 b43legacy_wireless_core_stop(dev);
3510         b43legacy_wireless_core_exit(dev);
3511         wl->radio_enabled = false;
3512         mutex_unlock(&wl->mutex);
3513 }
3514
3515 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3516                                        struct ieee80211_sta *sta, bool set)
3517 {
3518         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3519         unsigned long flags;
3520
3521         spin_lock_irqsave(&wl->irq_lock, flags);
3522         b43legacy_update_templates(wl);
3523         spin_unlock_irqrestore(&wl->irq_lock, flags);
3524
3525         return 0;
3526 }
3527
3528 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3529                                    struct survey_info *survey)
3530 {
3531         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3532         struct b43legacy_wldev *dev = wl->current_dev;
3533         struct ieee80211_conf *conf = &hw->conf;
3534
3535         if (idx != 0)
3536                 return -ENOENT;
3537
3538         survey->channel = conf->chandef.chan;
3539         survey->filled = SURVEY_INFO_NOISE_DBM;
3540         survey->noise = dev->stats.link_noise;
3541
3542         return 0;
3543 }
3544
3545 static const struct ieee80211_ops b43legacy_hw_ops = {
3546         .tx                     = b43legacy_op_tx,
3547         .conf_tx                = b43legacy_op_conf_tx,
3548         .add_interface          = b43legacy_op_add_interface,
3549         .remove_interface       = b43legacy_op_remove_interface,
3550         .config                 = b43legacy_op_dev_config,
3551         .bss_info_changed       = b43legacy_op_bss_info_changed,
3552         .configure_filter       = b43legacy_op_configure_filter,
3553         .get_stats              = b43legacy_op_get_stats,
3554         .start                  = b43legacy_op_start,
3555         .stop                   = b43legacy_op_stop,
3556         .set_tim                = b43legacy_op_beacon_set_tim,
3557         .get_survey             = b43legacy_op_get_survey,
3558         .rfkill_poll            = b43legacy_rfkill_poll,
3559 };
3560
3561 /* Hard-reset the chip. Do not call this directly.
3562  * Use b43legacy_controller_restart()
3563  */
3564 static void b43legacy_chip_reset(struct work_struct *work)
3565 {
3566         struct b43legacy_wldev *dev =
3567                 container_of(work, struct b43legacy_wldev, restart_work);
3568         struct b43legacy_wl *wl = dev->wl;
3569         int err = 0;
3570         int prev_status;
3571
3572         mutex_lock(&wl->mutex);
3573
3574         prev_status = b43legacy_status(dev);
3575         /* Bring the device down... */
3576         if (prev_status >= B43legacy_STAT_STARTED)
3577                 b43legacy_wireless_core_stop(dev);
3578         if (prev_status >= B43legacy_STAT_INITIALIZED)
3579                 b43legacy_wireless_core_exit(dev);
3580
3581         /* ...and up again. */
3582         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3583                 err = b43legacy_wireless_core_init(dev);
3584                 if (err)
3585                         goto out;
3586         }
3587         if (prev_status >= B43legacy_STAT_STARTED) {
3588                 err = b43legacy_wireless_core_start(dev);
3589                 if (err) {
3590                         b43legacy_wireless_core_exit(dev);
3591                         goto out;
3592                 }
3593         }
3594 out:
3595         if (err)
3596                 wl->current_dev = NULL; /* Failed to init the dev. */
3597         mutex_unlock(&wl->mutex);
3598         if (err)
3599                 b43legacyerr(wl, "Controller restart FAILED\n");
3600         else
3601                 b43legacyinfo(wl, "Controller restarted\n");
3602 }
3603
3604 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3605                                  int have_bphy,
3606                                  int have_gphy)
3607 {
3608         struct ieee80211_hw *hw = dev->wl->hw;
3609         struct b43legacy_phy *phy = &dev->phy;
3610
3611         phy->possible_phymodes = 0;
3612         if (have_bphy) {
3613                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3614                         &b43legacy_band_2GHz_BPHY;
3615                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3616         }
3617
3618         if (have_gphy) {
3619                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3620                         &b43legacy_band_2GHz_GPHY;
3621                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3622         }
3623
3624         return 0;
3625 }
3626
3627 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3628 {
3629         /* We release firmware that late to not be required to re-request
3630          * is all the time when we reinit the core. */
3631         b43legacy_release_firmware(dev);
3632 }
3633
3634 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3635 {
3636         struct b43legacy_wl *wl = dev->wl;
3637         struct ssb_bus *bus = dev->dev->bus;
3638         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3639         int err;
3640         int have_bphy = 0;
3641         int have_gphy = 0;
3642         u32 tmp;
3643
3644         /* Do NOT do any device initialization here.
3645          * Do it in wireless_core_init() instead.
3646          * This function is for gathering basic information about the HW, only.
3647          * Also some structs may be set up here. But most likely you want to
3648          * have that in core_init(), too.
3649          */
3650
3651         err = ssb_bus_powerup(bus, 0);
3652         if (err) {
3653                 b43legacyerr(wl, "Bus powerup failed\n");
3654                 goto out;
3655         }
3656         /* Get the PHY type. */
3657         if (dev->dev->id.revision >= 5) {
3658                 u32 tmshigh;
3659
3660                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3661                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3662                 if (!have_gphy)
3663                         have_bphy = 1;
3664         } else if (dev->dev->id.revision == 4)
3665                 have_gphy = 1;
3666         else
3667                 have_bphy = 1;
3668
3669         dev->phy.gmode = (have_gphy || have_bphy);
3670         dev->phy.radio_on = true;
3671         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3672         b43legacy_wireless_core_reset(dev, tmp);
3673
3674         err = b43legacy_phy_versioning(dev);
3675         if (err)
3676                 goto err_powerdown;
3677         /* Check if this device supports multiband. */
3678         if (!pdev ||
3679             (pdev->device != 0x4312 &&
3680              pdev->device != 0x4319 &&
3681              pdev->device != 0x4324)) {
3682                 /* No multiband support. */
3683                 have_bphy = 0;
3684                 have_gphy = 0;
3685                 switch (dev->phy.type) {
3686                 case B43legacy_PHYTYPE_B:
3687                         have_bphy = 1;
3688                         break;
3689                 case B43legacy_PHYTYPE_G:
3690                         have_gphy = 1;
3691                         break;
3692                 default:
3693                         B43legacy_BUG_ON(1);
3694                 }
3695         }
3696         dev->phy.gmode = (have_gphy || have_bphy);
3697         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3698         b43legacy_wireless_core_reset(dev, tmp);
3699
3700         err = b43legacy_validate_chipaccess(dev);
3701         if (err)
3702                 goto err_powerdown;
3703         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3704         if (err)
3705                 goto err_powerdown;
3706
3707         /* Now set some default "current_dev" */
3708         if (!wl->current_dev)
3709                 wl->current_dev = dev;
3710         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3711
3712         b43legacy_radio_turn_off(dev, 1);
3713         b43legacy_switch_analog(dev, 0);
3714         ssb_device_disable(dev->dev, 0);
3715         ssb_bus_may_powerdown(bus);
3716
3717 out:
3718         return err;
3719
3720 err_powerdown:
3721         ssb_bus_may_powerdown(bus);
3722         return err;
3723 }
3724
3725 static void b43legacy_one_core_detach(struct ssb_device *dev)
3726 {
3727         struct b43legacy_wldev *wldev;
3728         struct b43legacy_wl *wl;
3729
3730         /* Do not cancel ieee80211-workqueue based work here.
3731          * See comment in b43legacy_remove(). */
3732
3733         wldev = ssb_get_drvdata(dev);
3734         wl = wldev->wl;
3735         b43legacy_debugfs_remove_device(wldev);
3736         b43legacy_wireless_core_detach(wldev);
3737         list_del(&wldev->list);
3738         wl->nr_devs--;
3739         ssb_set_drvdata(dev, NULL);
3740         kfree(wldev);
3741 }
3742
3743 static int b43legacy_one_core_attach(struct ssb_device *dev,
3744                                      struct b43legacy_wl *wl)
3745 {
3746         struct b43legacy_wldev *wldev;
3747         int err = -ENOMEM;
3748
3749         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3750         if (!wldev)
3751                 goto out;
3752
3753         wldev->dev = dev;
3754         wldev->wl = wl;
3755         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3756         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3757         tasklet_init(&wldev->isr_tasklet,
3758                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3759                      (unsigned long)wldev);
3760         if (modparam_pio)
3761                 wldev->__using_pio = true;
3762         INIT_LIST_HEAD(&wldev->list);
3763
3764         err = b43legacy_wireless_core_attach(wldev);
3765         if (err)
3766                 goto err_kfree_wldev;
3767
3768         list_add(&wldev->list, &wl->devlist);
3769         wl->nr_devs++;
3770         ssb_set_drvdata(dev, wldev);
3771         b43legacy_debugfs_add_device(wldev);
3772 out:
3773         return err;
3774
3775 err_kfree_wldev:
3776         kfree(wldev);
3777         return err;
3778 }
3779
3780 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3781 {
3782         /* boardflags workarounds */
3783         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3784             bus->boardinfo.type == 0x4E &&
3785             bus->sprom.board_rev > 0x40)
3786                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3787 }
3788
3789 static void b43legacy_wireless_exit(struct ssb_device *dev,
3790                                   struct b43legacy_wl *wl)
3791 {
3792         struct ieee80211_hw *hw = wl->hw;
3793
3794         ssb_set_devtypedata(dev, NULL);
3795         ieee80211_free_hw(hw);
3796 }
3797
3798 static int b43legacy_wireless_init(struct ssb_device *dev)
3799 {
3800         struct ssb_sprom *sprom = &dev->bus->sprom;
3801         struct ieee80211_hw *hw;
3802         struct b43legacy_wl *wl;
3803         int err = -ENOMEM;
3804         int queue_num;
3805
3806         b43legacy_sprom_fixup(dev->bus);
3807
3808         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3809         if (!hw) {
3810                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3811                 goto out;
3812         }
3813
3814         /* fill hw info */
3815         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3816         ieee80211_hw_set(hw, SIGNAL_DBM);
3817
3818         hw->wiphy->interface_modes =
3819                 BIT(NL80211_IFTYPE_AP) |
3820                 BIT(NL80211_IFTYPE_STATION) |
3821 #ifdef CONFIG_WIRELESS_WDS
3822                 BIT(NL80211_IFTYPE_WDS) |
3823 #endif
3824                 BIT(NL80211_IFTYPE_ADHOC);
3825         hw->queues = 1; /* FIXME: hardware has more queues */
3826         hw->max_rates = 2;
3827         SET_IEEE80211_DEV(hw, dev->dev);
3828         if (is_valid_ether_addr(sprom->et1mac))
3829                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3830         else
3831                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3832
3833         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3834
3835         /* Get and initialize struct b43legacy_wl */
3836         wl = hw_to_b43legacy_wl(hw);
3837         memset(wl, 0, sizeof(*wl));
3838         wl->hw = hw;
3839         spin_lock_init(&wl->irq_lock);
3840         spin_lock_init(&wl->leds_lock);
3841         mutex_init(&wl->mutex);
3842         INIT_LIST_HEAD(&wl->devlist);
3843         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3844         INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3845
3846         /* Initialize queues and flags. */
3847         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3848                 skb_queue_head_init(&wl->tx_queue[queue_num]);
3849                 wl->tx_queue_stopped[queue_num] = 0;
3850         }
3851
3852         ssb_set_devtypedata(dev, wl);
3853         b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3854                       dev->bus->chip_id, dev->id.revision);
3855         err = 0;
3856 out:
3857         return err;
3858 }
3859
3860 static int b43legacy_probe(struct ssb_device *dev,
3861                          const struct ssb_device_id *id)
3862 {
3863         struct b43legacy_wl *wl;
3864         int err;
3865         int first = 0;
3866
3867         wl = ssb_get_devtypedata(dev);
3868         if (!wl) {
3869                 /* Probing the first core - setup common struct b43legacy_wl */
3870                 first = 1;
3871                 err = b43legacy_wireless_init(dev);
3872                 if (err)
3873                         goto out;
3874                 wl = ssb_get_devtypedata(dev);
3875                 B43legacy_WARN_ON(!wl);
3876         }
3877         err = b43legacy_one_core_attach(dev, wl);
3878         if (err)
3879                 goto err_wireless_exit;
3880
3881         /* setup and start work to load firmware */
3882         INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3883         schedule_work(&wl->firmware_load);
3884
3885 out:
3886         return err;
3887
3888 err_wireless_exit:
3889         if (first)
3890                 b43legacy_wireless_exit(dev, wl);
3891         return err;
3892 }
3893
3894 static void b43legacy_remove(struct ssb_device *dev)
3895 {
3896         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3897         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3898
3899         /* We must cancel any work here before unregistering from ieee80211,
3900          * as the ieee80211 unreg will destroy the workqueue. */
3901         cancel_work_sync(&wldev->restart_work);
3902         cancel_work_sync(&wl->firmware_load);
3903         complete(&wldev->fw_load_complete);
3904
3905         B43legacy_WARN_ON(!wl);
3906         if (!wldev->fw.ucode)
3907                 return;                 /* NULL if fw never loaded */
3908         if (wl->current_dev == wldev)
3909                 ieee80211_unregister_hw(wl->hw);
3910
3911         b43legacy_one_core_detach(dev);
3912
3913         if (list_empty(&wl->devlist))
3914                 /* Last core on the chip unregistered.
3915                  * We can destroy common struct b43legacy_wl.
3916                  */
3917                 b43legacy_wireless_exit(dev, wl);
3918 }
3919
3920 /* Perform a hardware reset. This can be called from any context. */
3921 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3922                                   const char *reason)
3923 {
3924         /* Must avoid requeueing, if we are in shutdown. */
3925         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3926                 return;
3927         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3928         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3929 }
3930
3931 #ifdef CONFIG_PM
3932
3933 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3934 {
3935         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3936         struct b43legacy_wl *wl = wldev->wl;
3937
3938         b43legacydbg(wl, "Suspending...\n");
3939
3940         mutex_lock(&wl->mutex);
3941         wldev->suspend_init_status = b43legacy_status(wldev);
3942         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3943                 b43legacy_wireless_core_stop(wldev);
3944         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3945                 b43legacy_wireless_core_exit(wldev);
3946         mutex_unlock(&wl->mutex);
3947
3948         b43legacydbg(wl, "Device suspended.\n");
3949
3950         return 0;
3951 }
3952
3953 static int b43legacy_resume(struct ssb_device *dev)
3954 {
3955         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3956         struct b43legacy_wl *wl = wldev->wl;
3957         int err = 0;
3958
3959         b43legacydbg(wl, "Resuming...\n");
3960
3961         mutex_lock(&wl->mutex);
3962         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3963                 err = b43legacy_wireless_core_init(wldev);
3964                 if (err) {
3965                         b43legacyerr(wl, "Resume failed at core init\n");
3966                         goto out;
3967                 }
3968         }
3969         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3970                 err = b43legacy_wireless_core_start(wldev);
3971                 if (err) {
3972                         b43legacy_wireless_core_exit(wldev);
3973                         b43legacyerr(wl, "Resume failed at core start\n");
3974                         goto out;
3975                 }
3976         }
3977
3978         b43legacydbg(wl, "Device resumed.\n");
3979 out:
3980         mutex_unlock(&wl->mutex);
3981         return err;
3982 }
3983
3984 #else   /* CONFIG_PM */
3985 # define b43legacy_suspend      NULL
3986 # define b43legacy_resume               NULL
3987 #endif  /* CONFIG_PM */
3988
3989 static struct ssb_driver b43legacy_ssb_driver = {
3990         .name           = KBUILD_MODNAME,
3991         .id_table       = b43legacy_ssb_tbl,
3992         .probe          = b43legacy_probe,
3993         .remove         = b43legacy_remove,
3994         .suspend        = b43legacy_suspend,
3995         .resume         = b43legacy_resume,
3996 };
3997
3998 static void b43legacy_print_driverinfo(void)
3999 {
4000         const char *feat_pci = "", *feat_leds = "",
4001                    *feat_pio = "", *feat_dma = "";
4002
4003 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
4004         feat_pci = "P";
4005 #endif
4006 #ifdef CONFIG_B43LEGACY_LEDS
4007         feat_leds = "L";
4008 #endif
4009 #ifdef CONFIG_B43LEGACY_PIO
4010         feat_pio = "I";
4011 #endif
4012 #ifdef CONFIG_B43LEGACY_DMA
4013         feat_dma = "D";
4014 #endif
4015         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4016                "[ Features: %s%s%s%s ]\n",
4017                feat_pci, feat_leds, feat_pio, feat_dma);
4018 }
4019
4020 static int __init b43legacy_init(void)
4021 {
4022         int err;
4023
4024         b43legacy_debugfs_init();
4025
4026         err = ssb_driver_register(&b43legacy_ssb_driver);
4027         if (err)
4028                 goto err_dfs_exit;
4029
4030         b43legacy_print_driverinfo();
4031
4032         return err;
4033
4034 err_dfs_exit:
4035         b43legacy_debugfs_exit();
4036         return err;
4037 }
4038
4039 static void __exit b43legacy_exit(void)
4040 {
4041         ssb_driver_unregister(&b43legacy_ssb_driver);
4042         b43legacy_debugfs_exit();
4043 }
4044
4045 module_init(b43legacy_init)
4046 module_exit(b43legacy_exit)