drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio.h"
  43 #include "chip.h"
  44 #include "firmware.h"
  45 #include "core.h"
  46 #include "common.h"
  47 #include "bcdc.h"
  48
  49 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  50 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  51
  52 #ifdef DEBUG
  53
  54 #define BRCMF_TRAP_INFO_SIZE    80
  55
  56 #define CBUF_LEN        (128)
  57
  58 /* Device console log buffer state */
  59 #define CONSOLE_BUFFER_MAX      2024
  60
  61 struct rte_log_le {
  62         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  63         __le32 buf_size;
  64         __le32 idx;
  65         char *_buf_compat;      /* Redundant pointer for backward compat. */
  66 };
  67
  68 struct rte_console {
  69         /* Virtual UART
  70          * When there is no UART (e.g. Quickturn),
  71          * the host should write a complete
  72          * input line directly into cbuf and then write
  73          * the length into vcons_in.
  74          * This may also be used when there is a real UART
  75          * (at risk of conflicting with
  76          * the real UART).  vcons_out is currently unused.
  77          */
  78         uint vcons_in;
  79         uint vcons_out;
  80
  81         /* Output (logging) buffer
  82          * Console output is written to a ring buffer log_buf at index log_idx.
  83          * The host may read the output when it sees log_idx advance.
  84          * Output will be lost if the output wraps around faster than the host
  85          * polls.
  86          */
  87         struct rte_log_le log_le;
  88
  89         /* Console input line buffer
  90          * Characters are read one at a time into cbuf
  91          * until <CR> is received, then
  92          * the buffer is processed as a command line.
  93          * Also used for virtual UART.
  94          */
  95         uint cbuf_idx;
  96         char cbuf[CBUF_LEN];
  97 };
  98
  99 #endif                          /* DEBUG */
 100 #include <chipcommon.h>
 101
 102 #include "bus.h"
 103 #include "debug.h"
 104 #include "tracepoint.h"
 105
 106 #define TXQLEN          2048    /* bulk tx queue length */
 107 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 108 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 109 #define PRIOMASK        7
 110
 111 #define TXRETRIES       2       /* # of retries for tx frames */
 112
 113 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 114                                  one scheduling */
 115
 116 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 117                                  one scheduling */
 118
 119 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 120
 121 #define MEMBLOCK        2048    /* Block size used for downloading
 122                                  of dongle image */
 123 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 124                                  biggest possible glom */
 125
 126 #define BRCMF_FIRSTREAD (1 << 6)
 127
 128 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 129
 130 /* SBSDIO_DEVICE_CTL */
 131
 132 /* 1: device will assert busy signal when receiving CMD53 */
 133 #define SBSDIO_DEVCTL_SETBUSY           0x01
 134 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 135 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 136 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 137 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 138 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 139  * sdio bus power cycle to clear (rev 9) */
 140 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 141 /* Force SD->SB reset mapping (rev 11) */
 142 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 143 /*   Determined by CoreControl bit */
 144 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 145 /*   Force backplane reset */
 146 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 147 /*   Force no backplane reset */
 148 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 149
 150 /* direct(mapped) cis space */
 151
 152 /* MAPPED common CIS address */
 153 #define SBSDIO_CIS_BASE_COMMON          0x1000
 154 /* maximum bytes in one CIS */
 155 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 156 /* cis offset addr is < 17 bits */
 157 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 158
 159 /* manfid tuple length, include tuple, link bytes */
 160 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 161
 162 #define SD_REG(field) \
 163                 (offsetof(struct sdpcmd_regs, field))
 164
 165 /* SDIO function 1 register CHIPCLKCSR */
 166 /* Force ALP request to backplane */
 167 #define SBSDIO_FORCE_ALP                0x01
 168 /* Force HT request to backplane */
 169 #define SBSDIO_FORCE_HT                 0x02
 170 /* Force ILP request to backplane */
 171 #define SBSDIO_FORCE_ILP                0x04
 172 /* Make ALP ready (power up xtal) */
 173 #define SBSDIO_ALP_AVAIL_REQ            0x08
 174 /* Make HT ready (power up PLL) */
 175 #define SBSDIO_HT_AVAIL_REQ             0x10
 176 /* Squelch clock requests from HW */
 177 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 178 /* Status: ALP is ready */
 179 #define SBSDIO_ALP_AVAIL                0x40
 180 /* Status: HT is ready */
 181 #define SBSDIO_HT_AVAIL                 0x80
 182 #define SBSDIO_CSR_MASK                 0x1F
 183 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 184 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 185 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 186 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 187 #define SBSDIO_CLKAV(regval, alponly) \
 188         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 189
 190 /* intstatus */
 191 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 192 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 193 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 194 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 195 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 196 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 197 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 198 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 199 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 200 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 201 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 202 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 203 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 204 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 205 #define I_PC            (1 << 10)       /* descriptor error */
 206 #define I_PD            (1 << 11)       /* data error */
 207 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 208 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 209 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 210 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 211 #define I_RI            (1 << 16)       /* Receive Interrupt */
 212 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 213 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 214 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 215 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 216 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 217 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 218 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 219 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 220 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 221 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 222 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 223 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 224
 225 /* corecontrol */
 226 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 227 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 228 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 229 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 230 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 231 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 232
 233 /* SDA_FRAMECTRL */
 234 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 235 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 236 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 237 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 238
 239 /*
 240  * Software allocation of To SB Mailbox resources
 241  */
 242
 243 /* tosbmailbox bits corresponding to intstatus bits */
 244 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 245 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 246 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 247 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 248
 249 /* tosbmailboxdata */
 250 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 251
 252 /*
 253  * Software allocation of To Host Mailbox resources
 254  */
 255
 256 /* intstatus bits */
 257 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 258 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 259 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 260 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 261
 262 /* tohostmailboxdata */
 263 #define HMB_DATA_NAKHANDLED     0x0001  /* retransmit NAK'd frame */
 264 #define HMB_DATA_DEVREADY       0x0002  /* talk to host after enable */
 265 #define HMB_DATA_FC             0x0004  /* per prio flowcontrol update flag */
 266 #define HMB_DATA_FWREADY        0x0008  /* fw ready for protocol activity */
 267 #define HMB_DATA_FWHALT         0x0010  /* firmware halted */
 268
 269 #define HMB_DATA_FCDATA_MASK    0xff000000
 270 #define HMB_DATA_FCDATA_SHIFT   24
 271
 272 #define HMB_DATA_VERSION_MASK   0x00ff0000
 273 #define HMB_DATA_VERSION_SHIFT  16
 274
 275 /*
 276  * Software-defined protocol header
 277  */
 278
 279 /* Current protocol version */
 280 #define SDPCM_PROT_VERSION      4
 281
 282 /*
 283  * Shared structure between dongle and the host.
 284  * The structure contains pointers to trap or assert information.
 285  */
 286 #define SDPCM_SHARED_VERSION       0x0003
 287 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 288 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 289 #define SDPCM_SHARED_ASSERT        0x0200
 290 #define SDPCM_SHARED_TRAP          0x0400
 291
 292 /* Space for header read, limit for data packets */
 293 #define MAX_HDR_READ    (1 << 6)
 294 #define MAX_RX_DATASZ   2048
 295
 296 /* Bump up limit on waiting for HT to account for first startup;
 297  * if the image is doing a CRC calculation before programming the PMU
 298  * for HT availability, it could take a couple hundred ms more, so
 299  * max out at a 1 second (1000000us).
 300  */
 301 #undef PMU_MAX_TRANSITION_DLY
 302 #define PMU_MAX_TRANSITION_DLY 1000000
 303
 304 /* Value for ChipClockCSR during initial setup */
 305 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 306                                         SBSDIO_ALP_AVAIL_REQ)
 307
 308 /* Flags for SDH calls */
 309 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 310
 311 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 312                                          * when idle
 313                                          */
 314 #define BRCMF_IDLE_INTERVAL     1
 315
 316 #define KSO_WAIT_US 50
 317 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 318 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 319
 320 /*
 321  * Conversion of 802.1D priority to precedence level
 322  */
 323 static uint prio2prec(u32 prio)
 324 {
 325         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 326                (prio^2) : prio;
 327 }
 328
 329 #ifdef DEBUG
 330 /* Device console log buffer state */
 331 struct brcmf_console {
 332         uint count;             /* Poll interval msec counter */
 333         uint log_addr;          /* Log struct address (fixed) */
 334         struct rte_log_le log_le;       /* Log struct (host copy) */
 335         uint bufsize;           /* Size of log buffer */
 336         u8 *buf;                /* Log buffer (host copy) */
 337         uint last;              /* Last buffer read index */
 338 };
 339
 340 struct brcmf_trap_info {
 341         __le32          type;
 342         __le32          epc;
 343         __le32          cpsr;
 344         __le32          spsr;
 345         __le32          r0;     /* a1 */
 346         __le32          r1;     /* a2 */
 347         __le32          r2;     /* a3 */
 348         __le32          r3;     /* a4 */
 349         __le32          r4;     /* v1 */
 350         __le32          r5;     /* v2 */
 351         __le32          r6;     /* v3 */
 352         __le32          r7;     /* v4 */
 353         __le32          r8;     /* v5 */
 354         __le32          r9;     /* sb/v6 */
 355         __le32          r10;    /* sl/v7 */
 356         __le32          r11;    /* fp/v8 */
 357         __le32          r12;    /* ip */
 358         __le32          r13;    /* sp */
 359         __le32          r14;    /* lr */
 360         __le32          pc;     /* r15 */
 361 };
 362 #endif                          /* DEBUG */
 363
 364 struct sdpcm_shared {
 365         u32 flags;
 366         u32 trap_addr;
 367         u32 assert_exp_addr;
 368         u32 assert_file_addr;
 369         u32 assert_line;
 370         u32 console_addr;       /* Address of struct rte_console */
 371         u32 msgtrace_addr;
 372         u8 tag[32];
 373         u32 brpt_addr;
 374 };
 375
 376 struct sdpcm_shared_le {
 377         __le32 flags;
 378         __le32 trap_addr;
 379         __le32 assert_exp_addr;
 380         __le32 assert_file_addr;
 381         __le32 assert_line;
 382         __le32 console_addr;    /* Address of struct rte_console */
 383         __le32 msgtrace_addr;
 384         u8 tag[32];
 385         __le32 brpt_addr;
 386 };
 387
 388 /* dongle SDIO bus specific header info */
 389 struct brcmf_sdio_hdrinfo {
 390         u8 seq_num;
 391         u8 channel;
 392         u16 len;
 393         u16 len_left;
 394         u16 len_nxtfrm;
 395         u8 dat_offset;
 396         bool lastfrm;
 397         u16 tail_pad;
 398 };
 399
 400 /*
 401  * hold counter variables
 402  */
 403 struct brcmf_sdio_count {
 404         uint intrcount;         /* Count of device interrupt callbacks */
 405         uint lastintrs;         /* Count as of last watchdog timer */
 406         uint pollcnt;           /* Count of active polls */
 407         uint regfails;          /* Count of R_REG failures */
 408         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 409         uint fcqueued;          /* Tx packets that got queued */
 410         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 411         uint rx_toolong;        /* Receive frames too long to receive */
 412         uint rxc_errors;        /* SDIO errors when reading control frames */
 413         uint rx_hdrfail;        /* SDIO errors on header reads */
 414         uint rx_badhdr;         /* Bad received headers (roosync?) */
 415         uint rx_badseq;         /* Mismatched rx sequence number */
 416         uint fc_rcvd;           /* Number of flow-control events received */
 417         uint fc_xoff;           /* Number which turned on flow-control */
 418         uint fc_xon;            /* Number which turned off flow-control */
 419         uint rxglomfail;        /* Failed deglom attempts */
 420         uint rxglomframes;      /* Number of glom frames (superframes) */
 421         uint rxglompkts;        /* Number of packets from glom frames */
 422         uint f2rxhdrs;          /* Number of header reads */
 423         uint f2rxdata;          /* Number of frame data reads */
 424         uint f2txdata;          /* Number of f2 frame writes */
 425         uint f1regdata;         /* Number of f1 register accesses */
 426         uint tickcnt;           /* Number of watchdog been schedule */
 427         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 428         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 429         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 430         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 431         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 432 };
 433
 434 /* misc chip info needed by some of the routines */
 435 /* Private data for SDIO bus interaction */
 436 struct brcmf_sdio {
 437         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 438         struct brcmf_chip *ci;  /* Chip info struct */
 439         struct brcmf_core *sdio_core; /* sdio core info struct */
 440
 441         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 442         atomic_t intstatus;     /* Intstatus bits (events) pending */
 443         atomic_t fcstate;       /* State of dongle flow-control */
 444
 445         uint blocksize;         /* Block size of SDIO transfers */
 446         uint roundup;           /* Max roundup limit */
 447
 448         struct pktq txq;        /* Queue length used for flow-control */
 449         u8 flowcontrol; /* per prio flow control bitmask */
 450         u8 tx_seq;              /* Transmit sequence number (next) */
 451         u8 tx_max;              /* Maximum transmit sequence allowed */
 452
 453         u8 *hdrbuf;             /* buffer for handling rx frame */
 454         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 455         u8 rx_seq;              /* Receive sequence number (expected) */
 456         struct brcmf_sdio_hdrinfo cur_read;
 457                                 /* info of current read frame */
 458         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 459         bool rxpending;         /* Data frame pending in dongle */
 460
 461         uint rxbound;           /* Rx frames to read before resched */
 462         uint txbound;           /* Tx frames to send before resched */
 463         uint txminmax;
 464
 465         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 466         struct sk_buff_head glom; /* Packet list for glommed superframe */
 467
 468         u8 *rxbuf;              /* Buffer for receiving control packets */
 469         uint rxblen;            /* Allocated length of rxbuf */
 470         u8 *rxctl;              /* Aligned pointer into rxbuf */
 471         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 472         uint rxlen;             /* Length of valid data in buffer */
 473         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 474
 475         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 476
 477         bool intr;              /* Use interrupts */
 478         bool poll;              /* Use polling */
 479         atomic_t ipend;         /* Device interrupt is pending */
 480         uint spurious;          /* Count of spurious interrupts */
 481         uint pollrate;          /* Ticks between device polls */
 482         uint polltick;          /* Tick counter */
 483
 484 #ifdef DEBUG
 485         uint console_interval;
 486         struct brcmf_console console;   /* Console output polling support */
 487         uint console_addr;      /* Console address from shared struct */
 488 #endif                          /* DEBUG */
 489
 490         uint clkstate;          /* State of sd and backplane clock(s) */
 491         s32 idletime;           /* Control for activity timeout */
 492         s32 idlecount;          /* Activity timeout counter */
 493         s32 idleclock;          /* How to set bus driver when idle */
 494         bool rxflow_mode;       /* Rx flow control mode */
 495         bool rxflow;            /* Is rx flow control on */
 496         bool alp_only;          /* Don't use HT clock (ALP only) */
 497
 498         u8 *ctrl_frame_buf;
 499         u16 ctrl_frame_len;
 500         bool ctrl_frame_stat;
 501         int ctrl_frame_err;
 502
 503         spinlock_t txq_lock;            /* protect bus->txq */
 504         wait_queue_head_t ctrl_wait;
 505         wait_queue_head_t dcmd_resp_wait;
 506
 507         struct timer_list timer;
 508         struct completion watchdog_wait;
 509         struct task_struct *watchdog_tsk;
 510         bool wd_active;
 511
 512         struct workqueue_struct *brcmf_wq;
 513         struct work_struct datawork;
 514         bool dpc_triggered;
 515         bool dpc_running;
 516
 517         bool txoff;             /* Transmit flow-controlled */
 518         struct brcmf_sdio_count sdcnt;
 519         bool sr_enabled; /* SaveRestore enabled */
 520         bool sleeping;
 521
 522         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 523         bool txglom;            /* host tx glomming enable flag */
 524         u16 head_align;         /* buffer pointer alignment */
 525         u16 sgentry_align;      /* scatter-gather buffer alignment */
 526 };
 527
 528 /* clkstate */
 529 #define CLK_NONE        0
 530 #define CLK_SDONLY      1
 531 #define CLK_PENDING     2
 532 #define CLK_AVAIL       3
 533
 534 #ifdef DEBUG
 535 static int qcount[NUMPRIO];
 536 #endif                          /* DEBUG */
 537
 538 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 539
 540 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 541
 542 /* Limit on rounding up frames */
 543 static const uint max_roundup = 512;
 544
 545 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 546 #define ALIGNMENT  8
 547 #else
 548 #define ALIGNMENT  4
 549 #endif
 550
 551 enum brcmf_sdio_frmtype {
 552         BRCMF_SDIO_FT_NORMAL,
 553         BRCMF_SDIO_FT_SUPER,
 554         BRCMF_SDIO_FT_SUB,
 555 };
 556
 557 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 558
 559 /* SDIO Pad drive strength to select value mappings */
 560 struct sdiod_drive_str {
 561         u8 strength;    /* Pad Drive Strength in mA */
 562         u8 sel;         /* Chip-specific select value */
 563 };
 564
 565 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 566 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 567         {32, 0x6},
 568         {26, 0x7},
 569         {22, 0x4},
 570         {16, 0x5},
 571         {12, 0x2},
 572         {8, 0x3},
 573         {4, 0x0},
 574         {0, 0x1}
 575 };
 576
 577 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 578 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 579         {6, 0x7},
 580         {5, 0x6},
 581         {4, 0x5},
 582         {3, 0x4},
 583         {2, 0x2},
 584         {1, 0x1},
 585         {0, 0x0}
 586 };
 587
 588 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 589 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 590         {3, 0x3},
 591         {2, 0x2},
 592         {1, 0x1},
 593         {0, 0x0} };
 594
 595 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 596 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 597         {16, 0x7},
 598         {12, 0x5},
 599         {8,  0x3},
 600         {4,  0x1}
 601 };
 602
 603 BRCMF_FW_DEF(43143, "brcmfmac43143-sdio");
 604 BRCMF_FW_DEF(43241B0, "brcmfmac43241b0-sdio");
 605 BRCMF_FW_DEF(43241B4, "brcmfmac43241b4-sdio");
 606 BRCMF_FW_DEF(43241B5, "brcmfmac43241b5-sdio");
 607 BRCMF_FW_DEF(4329, "brcmfmac4329-sdio");
 608 BRCMF_FW_DEF(4330, "brcmfmac4330-sdio");
 609 BRCMF_FW_DEF(4334, "brcmfmac4334-sdio");
 610 BRCMF_FW_DEF(43340, "brcmfmac43340-sdio");
 611 BRCMF_FW_DEF(4335, "brcmfmac4335-sdio");
 612 BRCMF_FW_DEF(43362, "brcmfmac43362-sdio");
 613 BRCMF_FW_DEF(4339, "brcmfmac4339-sdio");
 614 BRCMF_FW_DEF(43430A0, "brcmfmac43430a0-sdio");
 615 /* Note the names are not postfixed with a1 for backward compatibility */
 616 BRCMF_FW_DEF(43430A1, "brcmfmac43430-sdio");
 617 BRCMF_FW_DEF(43455, "brcmfmac43455-sdio");
 618 BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
 619 BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
 620 BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
 621
 622 static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 623         BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 624         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 625         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 626         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 627         BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 628         BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 629         BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 630         BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 631         BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 632         BRCMF_FW_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 633         BRCMF_FW_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 634         BRCMF_FW_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 635         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0x00000001, 43430A0),
 636         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFE, 43430A1),
 637         BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, 43455),
 638         BRCMF_FW_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 639         BRCMF_FW_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356),
 640         BRCMF_FW_ENTRY(CY_CC_4373_CHIP_ID, 0xFFFFFFFF, 4373)
 641 };
 642
 643 static void pkt_align(struct sk_buff *p, int len, int align)
 644 {
 645         uint datalign;
 646         datalign = (unsigned long)(p->data);
 647         datalign = roundup(datalign, (align)) - datalign;
 648         if (datalign)
 649                 skb_pull(p, datalign);
 650         __skb_trim(p, len);
 651 }
 652
 653 /* To check if there's window offered */
 654 static bool data_ok(struct brcmf_sdio *bus)
 655 {
 656         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 657                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 658 }
 659
 660 static int
 661 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 662 {
 663         u8 wr_val = 0, rd_val, cmp_val, bmask;
 664         int err = 0;
 665         int err_cnt = 0;
 666         int try_cnt = 0;
 667
 668         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 669
 670         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 671         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 672         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
 673
 674         if (on) {
 675                 /* device WAKEUP through KSO:
 676                  * write bit 0 & read back until
 677                  * both bits 0 (kso bit) & 1 (dev on status) are set
 678                  */
 679                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 680                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 681                 bmask = cmp_val;
 682                 usleep_range(2000, 3000);
 683         } else {
 684                 /* Put device to sleep, turn off KSO */
 685                 cmp_val = 0;
 686                 /* only check for bit0, bit1(dev on status) may not
 687                  * get cleared right away
 688                  */
 689                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 690         }
 691
 692         do {
 693                 /* reliable KSO bit set/clr:
 694                  * the sdiod sleep write access is synced to PMU 32khz clk
 695                  * just one write attempt may fail,
 696                  * read it back until it matches written value
 697                  */
 698                 rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 699                                            &err);
 700                 if (!err) {
 701                         if ((rd_val & bmask) == cmp_val)
 702                                 break;
 703                         err_cnt = 0;
 704                 }
 705                 /* bail out upon subsequent access errors */
 706                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 707                         break;
 708
 709                 udelay(KSO_WAIT_US);
 710                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
 711                                    &err);
 712
 713         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 714
 715         if (try_cnt > 2)
 716                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 717                           rd_val, err);
 718
 719         if (try_cnt > MAX_KSO_ATTEMPTS)
 720                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 721
 722         return err;
 723 }
 724
 725 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 726
 727 /* Turn backplane clock on or off */
 728 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 729 {
 730         int err;
 731         u8 clkctl, clkreq, devctl;
 732         unsigned long timeout;
 733
 734         brcmf_dbg(SDIO, "Enter\n");
 735
 736         clkctl = 0;
 737
 738         if (bus->sr_enabled) {
 739                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 740                 return 0;
 741         }
 742
 743         if (on) {
 744                 /* Request HT Avail */
 745                 clkreq =
 746                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 747
 748                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 749                                    clkreq, &err);
 750                 if (err) {
 751                         brcmf_err("HT Avail request error: %d\n", err);
 752                         return -EBADE;
 753                 }
 754
 755                 /* Check current status */
 756                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
 757                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 758                 if (err) {
 759                         brcmf_err("HT Avail read error: %d\n", err);
 760                         return -EBADE;
 761                 }
 762
 763                 /* Go to pending and await interrupt if appropriate */
 764                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 765                         /* Allow only clock-available interrupt */
 766                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 767                                                    SBSDIO_DEVICE_CTL, &err);
 768                         if (err) {
 769                                 brcmf_err("Devctl error setting CA: %d\n", err);
 770                                 return -EBADE;
 771                         }
 772
 773                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 774                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 775                                            devctl, &err);
 776                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 777                         bus->clkstate = CLK_PENDING;
 778
 779                         return 0;
 780                 } else if (bus->clkstate == CLK_PENDING) {
 781                         /* Cancel CA-only interrupt filter */
 782                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 783                                                    SBSDIO_DEVICE_CTL, &err);
 784                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 785                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 786                                            devctl, &err);
 787                 }
 788
 789                 /* Otherwise, wait here (polling) for HT Avail */
 790                 timeout = jiffies +
 791                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 792                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 793                         clkctl = brcmf_sdiod_readb(bus->sdiodev,
 794                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 795                                                    &err);
 796                         if (time_after(jiffies, timeout))
 797                                 break;
 798                         else
 799                                 usleep_range(5000, 10000);
 800                 }
 801                 if (err) {
 802                         brcmf_err("HT Avail request error: %d\n", err);
 803                         return -EBADE;
 804                 }
 805                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 806                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 807                                   PMU_MAX_TRANSITION_DLY, clkctl);
 808                         return -EBADE;
 809                 }
 810
 811                 /* Mark clock available */
 812                 bus->clkstate = CLK_AVAIL;
 813                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 814
 815 #if defined(DEBUG)
 816                 if (!bus->alp_only) {
 817                         if (SBSDIO_ALPONLY(clkctl))
 818                                 brcmf_err("HT Clock should be on\n");
 819                 }
 820 #endif                          /* defined (DEBUG) */
 821
 822         } else {
 823                 clkreq = 0;
 824
 825                 if (bus->clkstate == CLK_PENDING) {
 826                         /* Cancel CA-only interrupt filter */
 827                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 828                                                    SBSDIO_DEVICE_CTL, &err);
 829                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 830                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 831                                            devctl, &err);
 832                 }
 833
 834                 bus->clkstate = CLK_SDONLY;
 835                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 836                                    clkreq, &err);
 837                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 838                 if (err) {
 839                         brcmf_err("Failed access turning clock off: %d\n",
 840                                   err);
 841                         return -EBADE;
 842                 }
 843         }
 844         return 0;
 845 }
 846
 847 /* Change idle/active SD state */
 848 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 849 {
 850         brcmf_dbg(SDIO, "Enter\n");
 851
 852         if (on)
 853                 bus->clkstate = CLK_SDONLY;
 854         else
 855                 bus->clkstate = CLK_NONE;
 856
 857         return 0;
 858 }
 859
 860 /* Transition SD and backplane clock readiness */
 861 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 862 {
 863 #ifdef DEBUG
 864         uint oldstate = bus->clkstate;
 865 #endif                          /* DEBUG */
 866
 867         brcmf_dbg(SDIO, "Enter\n");
 868
 869         /* Early exit if we're already there */
 870         if (bus->clkstate == target)
 871                 return 0;
 872
 873         switch (target) {
 874         case CLK_AVAIL:
 875                 /* Make sure SD clock is available */
 876                 if (bus->clkstate == CLK_NONE)
 877                         brcmf_sdio_sdclk(bus, true);
 878                 /* Now request HT Avail on the backplane */
 879                 brcmf_sdio_htclk(bus, true, pendok);
 880                 break;
 881
 882         case CLK_SDONLY:
 883                 /* Remove HT request, or bring up SD clock */
 884                 if (bus->clkstate == CLK_NONE)
 885                         brcmf_sdio_sdclk(bus, true);
 886                 else if (bus->clkstate == CLK_AVAIL)
 887                         brcmf_sdio_htclk(bus, false, false);
 888                 else
 889                         brcmf_err("request for %d -> %d\n",
 890                                   bus->clkstate, target);
 891                 break;
 892
 893         case CLK_NONE:
 894                 /* Make sure to remove HT request */
 895                 if (bus->clkstate == CLK_AVAIL)
 896                         brcmf_sdio_htclk(bus, false, false);
 897                 /* Now remove the SD clock */
 898                 brcmf_sdio_sdclk(bus, false);
 899                 break;
 900         }
 901 #ifdef DEBUG
 902         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 903 #endif                          /* DEBUG */
 904
 905         return 0;
 906 }
 907
 908 static int
 909 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 910 {
 911         int err = 0;
 912         u8 clkcsr;
 913
 914         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 915                   (sleep ? "SLEEP" : "WAKE"),
 916                   (bus->sleeping ? "SLEEP" : "WAKE"));
 917
 918         /* If SR is enabled control bus state with KSO */
 919         if (bus->sr_enabled) {
 920                 /* Done if we're already in the requested state */
 921                 if (sleep == bus->sleeping)
 922                         goto end;
 923
 924                 /* Going to sleep */
 925                 if (sleep) {
 926                         clkcsr = brcmf_sdiod_readb(bus->sdiodev,
 927                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 928                                                    &err);
 929                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 930                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 931                                 brcmf_sdiod_writeb(bus->sdiodev,
 932                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 933                                                    SBSDIO_ALP_AVAIL_REQ, &err);
 934                         }
 935                         err = brcmf_sdio_kso_control(bus, false);
 936                 } else {
 937                         err = brcmf_sdio_kso_control(bus, true);
 938                 }
 939                 if (err) {
 940                         brcmf_err("error while changing bus sleep state %d\n",
 941                                   err);
 942                         goto done;
 943                 }
 944         }
 945
 946 end:
 947         /* control clocks */
 948         if (sleep) {
 949                 if (!bus->sr_enabled)
 950                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 951         } else {
 952                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 953                 brcmf_sdio_wd_timer(bus, true);
 954         }
 955         bus->sleeping = sleep;
 956         brcmf_dbg(SDIO, "new state %s\n",
 957                   (sleep ? "SLEEP" : "WAKE"));
 958 done:
 959         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 960         return err;
 961
 962 }
 963
 964 #ifdef DEBUG
 965 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 966 {
 967         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 968 }
 969
 970 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 971                                  struct sdpcm_shared *sh)
 972 {
 973         u32 addr = 0;
 974         int rv;
 975         u32 shaddr = 0;
 976         struct sdpcm_shared_le sh_le;
 977         __le32 addr_le;
 978
 979         sdio_claim_host(bus->sdiodev->func1);
 980         brcmf_sdio_bus_sleep(bus, false, false);
 981
 982         /*
 983          * Read last word in socram to determine
 984          * address of sdpcm_shared structure
 985          */
 986         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
 987         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
 988                 shaddr -= bus->ci->srsize;
 989         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
 990                                (u8 *)&addr_le, 4);
 991         if (rv < 0)
 992                 goto fail;
 993
 994         /*
 995          * Check if addr is valid.
 996          * NVRAM length at the end of memory should have been overwritten.
 997          */
 998         addr = le32_to_cpu(addr_le);
 999         if (!brcmf_sdio_valid_shared_address(addr)) {
1000                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1001                 rv = -EINVAL;
1002                 goto fail;
1003         }
1004
1005         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1006
1007         /* Read hndrte_shared structure */
1008         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1009                                sizeof(struct sdpcm_shared_le));
1010         if (rv < 0)
1011                 goto fail;
1012
1013         sdio_release_host(bus->sdiodev->func1);
1014
1015         /* Endianness */
1016         sh->flags = le32_to_cpu(sh_le.flags);
1017         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1018         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1019         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1020         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1021         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1022         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1023
1024         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1025                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1026                           SDPCM_SHARED_VERSION,
1027                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1028                 return -EPROTO;
1029         }
1030         return 0;
1031
1032 fail:
1033         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1034                   rv, addr);
1035         sdio_release_host(bus->sdiodev->func1);
1036         return rv;
1037 }
1038
1039 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1040 {
1041         struct sdpcm_shared sh;
1042
1043         if (brcmf_sdio_readshared(bus, &sh) == 0)
1044                 bus->console_addr = sh.console_addr;
1045 }
1046 #else
1047 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1048 {
1049 }
1050 #endif /* DEBUG */
1051
1052 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1053 {
1054         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1055         struct brcmf_core *core = bus->sdio_core;
1056         u32 intstatus = 0;
1057         u32 hmb_data;
1058         u8 fcbits;
1059         int ret;
1060
1061         brcmf_dbg(SDIO, "Enter\n");
1062
1063         /* Read mailbox data and ack that we did so */
1064         hmb_data = brcmf_sdiod_readl(sdiod,
1065                                      core->base + SD_REG(tohostmailboxdata),
1066                                      &ret);
1067
1068         if (!ret)
1069                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1070                                    SMB_INT_ACK, &ret);
1071
1072         bus->sdcnt.f1regdata += 2;
1073
1074         /* dongle indicates the firmware has halted/crashed */
1075         if (hmb_data & HMB_DATA_FWHALT)
1076                 brcmf_err("mailbox indicates firmware halted\n");
1077
1078         /* Dongle recomposed rx frames, accept them again */
1079         if (hmb_data & HMB_DATA_NAKHANDLED) {
1080                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1081                           bus->rx_seq);
1082                 if (!bus->rxskip)
1083                         brcmf_err("unexpected NAKHANDLED!\n");
1084
1085                 bus->rxskip = false;
1086                 intstatus |= I_HMB_FRAME_IND;
1087         }
1088
1089         /*
1090          * DEVREADY does not occur with gSPI.
1091          */
1092         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1093                 bus->sdpcm_ver =
1094                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1095                     HMB_DATA_VERSION_SHIFT;
1096                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1097                         brcmf_err("Version mismatch, dongle reports %d, "
1098                                   "expecting %d\n",
1099                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1100                 else
1101                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1102                                   bus->sdpcm_ver);
1103
1104                 /*
1105                  * Retrieve console state address now that firmware should have
1106                  * updated it.
1107                  */
1108                 brcmf_sdio_get_console_addr(bus);
1109         }
1110
1111         /*
1112          * Flow Control has been moved into the RX headers and this out of band
1113          * method isn't used any more.
1114          * remaining backward compatible with older dongles.
1115          */
1116         if (hmb_data & HMB_DATA_FC) {
1117                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1118                                                         HMB_DATA_FCDATA_SHIFT;
1119
1120                 if (fcbits & ~bus->flowcontrol)
1121                         bus->sdcnt.fc_xoff++;
1122
1123                 if (bus->flowcontrol & ~fcbits)
1124                         bus->sdcnt.fc_xon++;
1125
1126                 bus->sdcnt.fc_rcvd++;
1127                 bus->flowcontrol = fcbits;
1128         }
1129
1130         /* Shouldn't be any others */
1131         if (hmb_data & ~(HMB_DATA_DEVREADY |
1132                          HMB_DATA_NAKHANDLED |
1133                          HMB_DATA_FC |
1134                          HMB_DATA_FWREADY |
1135                          HMB_DATA_FWHALT |
1136                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1137                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1138                           hmb_data);
1139
1140         return intstatus;
1141 }
1142
1143 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1144 {
1145         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1146         struct brcmf_core *core = bus->sdio_core;
1147         uint retries = 0;
1148         u16 lastrbc;
1149         u8 hi, lo;
1150         int err;
1151
1152         brcmf_err("%sterminate frame%s\n",
1153                   abort ? "abort command, " : "",
1154                   rtx ? ", send NAK" : "");
1155
1156         if (abort)
1157                 brcmf_sdiod_abort(bus->sdiodev, bus->sdiodev->func2);
1158
1159         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
1160                            &err);
1161         bus->sdcnt.f1regdata++;
1162
1163         /* Wait until the packet has been flushed (device/FIFO stable) */
1164         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1165                 hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
1166                                        &err);
1167                 lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
1168                                        &err);
1169                 bus->sdcnt.f1regdata += 2;
1170
1171                 if ((hi == 0) && (lo == 0))
1172                         break;
1173
1174                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1175                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1176                                   lastrbc, (hi << 8) + lo);
1177                 }
1178                 lastrbc = (hi << 8) + lo;
1179         }
1180
1181         if (!retries)
1182                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1183         else
1184                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1185
1186         if (rtx) {
1187                 bus->sdcnt.rxrtx++;
1188                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1189                                    SMB_NAK, &err);
1190
1191                 bus->sdcnt.f1regdata++;
1192                 if (err == 0)
1193                         bus->rxskip = true;
1194         }
1195
1196         /* Clear partial in any case */
1197         bus->cur_read.len = 0;
1198 }
1199
1200 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1201 {
1202         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1203         u8 i, hi, lo;
1204
1205         /* On failure, abort the command and terminate the frame */
1206         brcmf_err("sdio error, abort command and terminate frame\n");
1207         bus->sdcnt.tx_sderrs++;
1208
1209         brcmf_sdiod_abort(sdiodev, sdiodev->func2);
1210         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1211         bus->sdcnt.f1regdata++;
1212
1213         for (i = 0; i < 3; i++) {
1214                 hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1215                 lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1216                 bus->sdcnt.f1regdata += 2;
1217                 if ((hi == 0) && (lo == 0))
1218                         break;
1219         }
1220 }
1221
1222 /* return total length of buffer chain */
1223 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1224 {
1225         struct sk_buff *p;
1226         uint total;
1227
1228         total = 0;
1229         skb_queue_walk(&bus->glom, p)
1230                 total += p->len;
1231         return total;
1232 }
1233
1234 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1235 {
1236         struct sk_buff *cur, *next;
1237
1238         skb_queue_walk_safe(&bus->glom, cur, next) {
1239                 skb_unlink(cur, &bus->glom);
1240                 brcmu_pkt_buf_free_skb(cur);
1241         }
1242 }
1243
1244 /**
1245  * brcmfmac sdio bus specific header
1246  * This is the lowest layer header wrapped on the packets transmitted between
1247  * host and WiFi dongle which contains information needed for SDIO core and
1248  * firmware
1249  *
1250  * It consists of 3 parts: hardware header, hardware extension header and
1251  * software header
1252  * hardware header (frame tag) - 4 bytes
1253  * Byte 0~1: Frame length
1254  * Byte 2~3: Checksum, bit-wise inverse of frame length
1255  * hardware extension header - 8 bytes
1256  * Tx glom mode only, N/A for Rx or normal Tx
1257  * Byte 0~1: Packet length excluding hw frame tag
1258  * Byte 2: Reserved
1259  * Byte 3: Frame flags, bit 0: last frame indication
1260  * Byte 4~5: Reserved
1261  * Byte 6~7: Tail padding length
1262  * software header - 8 bytes
1263  * Byte 0: Rx/Tx sequence number
1264  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1265  * Byte 2: Length of next data frame, reserved for Tx
1266  * Byte 3: Data offset
1267  * Byte 4: Flow control bits, reserved for Tx
1268  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1269  * Byte 6~7: Reserved
1270  */
1271 #define SDPCM_HWHDR_LEN                 4
1272 #define SDPCM_HWEXT_LEN                 8
1273 #define SDPCM_SWHDR_LEN                 8
1274 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1275 /* software header */
1276 #define SDPCM_SEQ_MASK                  0x000000ff
1277 #define SDPCM_SEQ_WRAP                  256
1278 #define SDPCM_CHANNEL_MASK              0x00000f00
1279 #define SDPCM_CHANNEL_SHIFT             8
1280 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1281 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1282 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1283 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1284 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1285 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1286 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1287 #define SDPCM_NEXTLEN_SHIFT             16
1288 #define SDPCM_DOFFSET_MASK              0xff000000
1289 #define SDPCM_DOFFSET_SHIFT             24
1290 #define SDPCM_FCMASK_MASK               0x000000ff
1291 #define SDPCM_WINDOW_MASK               0x0000ff00
1292 #define SDPCM_WINDOW_SHIFT              8
1293
1294 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1295 {
1296         u32 hdrvalue;
1297         hdrvalue = *(u32 *)swheader;
1298         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1299 }
1300
1301 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1302 {
1303         u32 hdrvalue;
1304         u8 ret;
1305
1306         hdrvalue = *(u32 *)swheader;
1307         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1308
1309         return (ret == SDPCM_EVENT_CHANNEL);
1310 }
1311
1312 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1313                               struct brcmf_sdio_hdrinfo *rd,
1314                               enum brcmf_sdio_frmtype type)
1315 {
1316         u16 len, checksum;
1317         u8 rx_seq, fc, tx_seq_max;
1318         u32 swheader;
1319
1320         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1321
1322         /* hw header */
1323         len = get_unaligned_le16(header);
1324         checksum = get_unaligned_le16(header + sizeof(u16));
1325         /* All zero means no more to read */
1326         if (!(len | checksum)) {
1327                 bus->rxpending = false;
1328                 return -ENODATA;
1329         }
1330         if ((u16)(~(len ^ checksum))) {
1331                 brcmf_err("HW header checksum error\n");
1332                 bus->sdcnt.rx_badhdr++;
1333                 brcmf_sdio_rxfail(bus, false, false);
1334                 return -EIO;
1335         }
1336         if (len < SDPCM_HDRLEN) {
1337                 brcmf_err("HW header length error\n");
1338                 return -EPROTO;
1339         }
1340         if (type == BRCMF_SDIO_FT_SUPER &&
1341             (roundup(len, bus->blocksize) != rd->len)) {
1342                 brcmf_err("HW superframe header length error\n");
1343                 return -EPROTO;
1344         }
1345         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1346                 brcmf_err("HW subframe header length error\n");
1347                 return -EPROTO;
1348         }
1349         rd->len = len;
1350
1351         /* software header */
1352         header += SDPCM_HWHDR_LEN;
1353         swheader = le32_to_cpu(*(__le32 *)header);
1354         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1355                 brcmf_err("Glom descriptor found in superframe head\n");
1356                 rd->len = 0;
1357                 return -EINVAL;
1358         }
1359         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1360         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1361         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1362             type != BRCMF_SDIO_FT_SUPER) {
1363                 brcmf_err("HW header length too long\n");
1364                 bus->sdcnt.rx_toolong++;
1365                 brcmf_sdio_rxfail(bus, false, false);
1366                 rd->len = 0;
1367                 return -EPROTO;
1368         }
1369         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1370                 brcmf_err("Wrong channel for superframe\n");
1371                 rd->len = 0;
1372                 return -EINVAL;
1373         }
1374         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1375             rd->channel != SDPCM_EVENT_CHANNEL) {
1376                 brcmf_err("Wrong channel for subframe\n");
1377                 rd->len = 0;
1378                 return -EINVAL;
1379         }
1380         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1381         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1382                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1383                 bus->sdcnt.rx_badhdr++;
1384                 brcmf_sdio_rxfail(bus, false, false);
1385                 rd->len = 0;
1386                 return -ENXIO;
1387         }
1388         if (rd->seq_num != rx_seq) {
1389                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1390                 bus->sdcnt.rx_badseq++;
1391                 rd->seq_num = rx_seq;
1392         }
1393         /* no need to check the reset for subframe */
1394         if (type == BRCMF_SDIO_FT_SUB)
1395                 return 0;
1396         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1397         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1398                 /* only warm for NON glom packet */
1399                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1400                         brcmf_err("seq %d: next length error\n", rx_seq);
1401                 rd->len_nxtfrm = 0;
1402         }
1403         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1404         fc = swheader & SDPCM_FCMASK_MASK;
1405         if (bus->flowcontrol != fc) {
1406                 if (~bus->flowcontrol & fc)
1407                         bus->sdcnt.fc_xoff++;
1408                 if (bus->flowcontrol & ~fc)
1409                         bus->sdcnt.fc_xon++;
1410                 bus->sdcnt.fc_rcvd++;
1411                 bus->flowcontrol = fc;
1412         }
1413         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1414         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1415                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1416                 tx_seq_max = bus->tx_seq + 2;
1417         }
1418         bus->tx_max = tx_seq_max;
1419
1420         return 0;
1421 }
1422
1423 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1424 {
1425         *(__le16 *)header = cpu_to_le16(frm_length);
1426         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1427 }
1428
1429 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1430                               struct brcmf_sdio_hdrinfo *hd_info)
1431 {
1432         u32 hdrval;
1433         u8 hdr_offset;
1434
1435         brcmf_sdio_update_hwhdr(header, hd_info->len);
1436         hdr_offset = SDPCM_HWHDR_LEN;
1437
1438         if (bus->txglom) {
1439                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1440                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1441                 hdrval = (u16)hd_info->tail_pad << 16;
1442                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1443                 hdr_offset += SDPCM_HWEXT_LEN;
1444         }
1445
1446         hdrval = hd_info->seq_num;
1447         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1448                   SDPCM_CHANNEL_MASK;
1449         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1450                   SDPCM_DOFFSET_MASK;
1451         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1452         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1453         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1454 }
1455
1456 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1457 {
1458         u16 dlen, totlen;
1459         u8 *dptr, num = 0;
1460         u16 sublen;
1461         struct sk_buff *pfirst, *pnext;
1462
1463         int errcode;
1464         u8 doff, sfdoff;
1465
1466         struct brcmf_sdio_hdrinfo rd_new;
1467
1468         /* If packets, issue read(s) and send up packet chain */
1469         /* Return sequence numbers consumed? */
1470
1471         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1472                   bus->glomd, skb_peek(&bus->glom));
1473
1474         /* If there's a descriptor, generate the packet chain */
1475         if (bus->glomd) {
1476                 pfirst = pnext = NULL;
1477                 dlen = (u16) (bus->glomd->len);
1478                 dptr = bus->glomd->data;
1479                 if (!dlen || (dlen & 1)) {
1480                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1481                                   dlen);
1482                         dlen = 0;
1483                 }
1484
1485                 for (totlen = num = 0; dlen; num++) {
1486                         /* Get (and move past) next length */
1487                         sublen = get_unaligned_le16(dptr);
1488                         dlen -= sizeof(u16);
1489                         dptr += sizeof(u16);
1490                         if ((sublen < SDPCM_HDRLEN) ||
1491                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1492                                 brcmf_err("descriptor len %d bad: %d\n",
1493                                           num, sublen);
1494                                 pnext = NULL;
1495                                 break;
1496                         }
1497                         if (sublen % bus->sgentry_align) {
1498                                 brcmf_err("sublen %d not multiple of %d\n",
1499                                           sublen, bus->sgentry_align);
1500                         }
1501                         totlen += sublen;
1502
1503                         /* For last frame, adjust read len so total
1504                                  is a block multiple */
1505                         if (!dlen) {
1506                                 sublen +=
1507                                     (roundup(totlen, bus->blocksize) - totlen);
1508                                 totlen = roundup(totlen, bus->blocksize);
1509                         }
1510
1511                         /* Allocate/chain packet for next subframe */
1512                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1513                         if (pnext == NULL) {
1514                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1515                                           num, sublen);
1516                                 break;
1517                         }
1518                         skb_queue_tail(&bus->glom, pnext);
1519
1520                         /* Adhere to start alignment requirements */
1521                         pkt_align(pnext, sublen, bus->sgentry_align);
1522                 }
1523
1524                 /* If all allocations succeeded, save packet chain
1525                          in bus structure */
1526                 if (pnext) {
1527                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1528                                   totlen, num);
1529                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1530                             totlen != bus->cur_read.len) {
1531                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1532                                           bus->cur_read.len, totlen, rxseq);
1533                         }
1534                         pfirst = pnext = NULL;
1535                 } else {
1536                         brcmf_sdio_free_glom(bus);
1537                         num = 0;
1538                 }
1539
1540                 /* Done with descriptor packet */
1541                 brcmu_pkt_buf_free_skb(bus->glomd);
1542                 bus->glomd = NULL;
1543                 bus->cur_read.len = 0;
1544         }
1545
1546         /* Ok -- either we just generated a packet chain,
1547                  or had one from before */
1548         if (!skb_queue_empty(&bus->glom)) {
1549                 if (BRCMF_GLOM_ON()) {
1550                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1551                         skb_queue_walk(&bus->glom, pnext) {
1552                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1553                                           pnext, (u8 *) (pnext->data),
1554                                           pnext->len, pnext->len);
1555                         }
1556                 }
1557
1558                 pfirst = skb_peek(&bus->glom);
1559                 dlen = (u16) brcmf_sdio_glom_len(bus);
1560
1561                 /* Do an SDIO read for the superframe.  Configurable iovar to
1562                  * read directly into the chained packet, or allocate a large
1563                  * packet and and copy into the chain.
1564                  */
1565                 sdio_claim_host(bus->sdiodev->func1);
1566                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1567                                                  &bus->glom, dlen);
1568                 sdio_release_host(bus->sdiodev->func1);
1569                 bus->sdcnt.f2rxdata++;
1570
1571                 /* On failure, kill the superframe */
1572                 if (errcode < 0) {
1573                         brcmf_err("glom read of %d bytes failed: %d\n",
1574                                   dlen, errcode);
1575
1576                         sdio_claim_host(bus->sdiodev->func1);
1577                         brcmf_sdio_rxfail(bus, true, false);
1578                         bus->sdcnt.rxglomfail++;
1579                         brcmf_sdio_free_glom(bus);
1580                         sdio_release_host(bus->sdiodev->func1);
1581                         return 0;
1582                 }
1583
1584                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1585                                    pfirst->data, min_t(int, pfirst->len, 48),
1586                                    "SUPERFRAME:\n");
1587
1588                 rd_new.seq_num = rxseq;
1589                 rd_new.len = dlen;
1590                 sdio_claim_host(bus->sdiodev->func1);
1591                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1592                                              BRCMF_SDIO_FT_SUPER);
1593                 sdio_release_host(bus->sdiodev->func1);
1594                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1595
1596                 /* Remove superframe header, remember offset */
1597                 skb_pull(pfirst, rd_new.dat_offset);
1598                 sfdoff = rd_new.dat_offset;
1599                 num = 0;
1600
1601                 /* Validate all the subframe headers */
1602                 skb_queue_walk(&bus->glom, pnext) {
1603                         /* leave when invalid subframe is found */
1604                         if (errcode)
1605                                 break;
1606
1607                         rd_new.len = pnext->len;
1608                         rd_new.seq_num = rxseq++;
1609                         sdio_claim_host(bus->sdiodev->func1);
1610                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1611                                                      BRCMF_SDIO_FT_SUB);
1612                         sdio_release_host(bus->sdiodev->func1);
1613                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1614                                            pnext->data, 32, "subframe:\n");
1615
1616                         num++;
1617                 }
1618
1619                 if (errcode) {
1620                         /* Terminate frame on error */
1621                         sdio_claim_host(bus->sdiodev->func1);
1622                         brcmf_sdio_rxfail(bus, true, false);
1623                         bus->sdcnt.rxglomfail++;
1624                         brcmf_sdio_free_glom(bus);
1625                         sdio_release_host(bus->sdiodev->func1);
1626                         bus->cur_read.len = 0;
1627                         return 0;
1628                 }
1629
1630                 /* Basic SD framing looks ok - process each packet (header) */
1631
1632                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1633                         dptr = (u8 *) (pfirst->data);
1634                         sublen = get_unaligned_le16(dptr);
1635                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1636
1637                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1638                                            dptr, pfirst->len,
1639                                            "Rx Subframe Data:\n");
1640
1641                         __skb_trim(pfirst, sublen);
1642                         skb_pull(pfirst, doff);
1643
1644                         if (pfirst->len == 0) {
1645                                 skb_unlink(pfirst, &bus->glom);
1646                                 brcmu_pkt_buf_free_skb(pfirst);
1647                                 continue;
1648                         }
1649
1650                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1651                                            pfirst->data,
1652                                            min_t(int, pfirst->len, 32),
1653                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1654                                            bus->glom.qlen, pfirst, pfirst->data,
1655                                            pfirst->len, pfirst->next,
1656                                            pfirst->prev);
1657                         skb_unlink(pfirst, &bus->glom);
1658                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1659                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1660                         else
1661                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1662                                                false);
1663                         bus->sdcnt.rxglompkts++;
1664                 }
1665
1666                 bus->sdcnt.rxglomframes++;
1667         }
1668         return num;
1669 }
1670
1671 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1672                                      bool *pending)
1673 {
1674         DECLARE_WAITQUEUE(wait, current);
1675         int timeout = DCMD_RESP_TIMEOUT;
1676
1677         /* Wait until control frame is available */
1678         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1679         set_current_state(TASK_INTERRUPTIBLE);
1680
1681         while (!(*condition) && (!signal_pending(current) && timeout))
1682                 timeout = schedule_timeout(timeout);
1683
1684         if (signal_pending(current))
1685                 *pending = true;
1686
1687         set_current_state(TASK_RUNNING);
1688         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1689
1690         return timeout;
1691 }
1692
1693 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1694 {
1695         wake_up_interruptible(&bus->dcmd_resp_wait);
1696
1697         return 0;
1698 }
1699 static void
1700 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1701 {
1702         uint rdlen, pad;
1703         u8 *buf = NULL, *rbuf;
1704         int sdret;
1705
1706         brcmf_dbg(SDIO, "Enter\n");
1707         if (bus->rxblen)
1708                 buf = vzalloc(bus->rxblen);
1709         if (!buf)
1710                 goto done;
1711
1712         rbuf = bus->rxbuf;
1713         pad = ((unsigned long)rbuf % bus->head_align);
1714         if (pad)
1715                 rbuf += (bus->head_align - pad);
1716
1717         /* Copy the already-read portion over */
1718         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1719         if (len <= BRCMF_FIRSTREAD)
1720                 goto gotpkt;
1721
1722         /* Raise rdlen to next SDIO block to avoid tail command */
1723         rdlen = len - BRCMF_FIRSTREAD;
1724         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1725                 pad = bus->blocksize - (rdlen % bus->blocksize);
1726                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1727                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1728                         rdlen += pad;
1729         } else if (rdlen % bus->head_align) {
1730                 rdlen += bus->head_align - (rdlen % bus->head_align);
1731         }
1732
1733         /* Drop if the read is too big or it exceeds our maximum */
1734         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1735                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1736                           rdlen, bus->sdiodev->bus_if->maxctl);
1737                 brcmf_sdio_rxfail(bus, false, false);
1738                 goto done;
1739         }
1740
1741         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1742                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1743                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1744                 bus->sdcnt.rx_toolong++;
1745                 brcmf_sdio_rxfail(bus, false, false);
1746                 goto done;
1747         }
1748
1749         /* Read remain of frame body */
1750         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1751         bus->sdcnt.f2rxdata++;
1752
1753         /* Control frame failures need retransmission */
1754         if (sdret < 0) {
1755                 brcmf_err("read %d control bytes failed: %d\n",
1756                           rdlen, sdret);
1757                 bus->sdcnt.rxc_errors++;
1758                 brcmf_sdio_rxfail(bus, true, true);
1759                 goto done;
1760         } else
1761                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1762
1763 gotpkt:
1764
1765         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1766                            buf, len, "RxCtrl:\n");
1767
1768         /* Point to valid data and indicate its length */
1769         spin_lock_bh(&bus->rxctl_lock);
1770         if (bus->rxctl) {
1771                 brcmf_err("last control frame is being processed.\n");
1772                 spin_unlock_bh(&bus->rxctl_lock);
1773                 vfree(buf);
1774                 goto done;
1775         }
1776         bus->rxctl = buf + doff;
1777         bus->rxctl_orig = buf;
1778         bus->rxlen = len - doff;
1779         spin_unlock_bh(&bus->rxctl_lock);
1780
1781 done:
1782         /* Awake any waiters */
1783         brcmf_sdio_dcmd_resp_wake(bus);
1784 }
1785
1786 /* Pad read to blocksize for efficiency */
1787 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1788 {
1789         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1790                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1791                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1792                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1793                         *rdlen += *pad;
1794         } else if (*rdlen % bus->head_align) {
1795                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1796         }
1797 }
1798
1799 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1800 {
1801         struct sk_buff *pkt;            /* Packet for event or data frames */
1802         u16 pad;                /* Number of pad bytes to read */
1803         uint rxleft = 0;        /* Remaining number of frames allowed */
1804         int ret;                /* Return code from calls */
1805         uint rxcount = 0;       /* Total frames read */
1806         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1807         u8 head_read = 0;
1808
1809         brcmf_dbg(SDIO, "Enter\n");
1810
1811         /* Not finished unless we encounter no more frames indication */
1812         bus->rxpending = true;
1813
1814         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1815              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1816              rd->seq_num++, rxleft--) {
1817
1818                 /* Handle glomming separately */
1819                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1820                         u8 cnt;
1821                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1822                                   bus->glomd, skb_peek(&bus->glom));
1823                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1824                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1825                         rd->seq_num += cnt - 1;
1826                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1827                         continue;
1828                 }
1829
1830                 rd->len_left = rd->len;
1831                 /* read header first for unknow frame length */
1832                 sdio_claim_host(bus->sdiodev->func1);
1833                 if (!rd->len) {
1834                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1835                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1836                         bus->sdcnt.f2rxhdrs++;
1837                         if (ret < 0) {
1838                                 brcmf_err("RXHEADER FAILED: %d\n",
1839                                           ret);
1840                                 bus->sdcnt.rx_hdrfail++;
1841                                 brcmf_sdio_rxfail(bus, true, true);
1842                                 sdio_release_host(bus->sdiodev->func1);
1843                                 continue;
1844                         }
1845
1846                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1847                                            bus->rxhdr, SDPCM_HDRLEN,
1848                                            "RxHdr:\n");
1849
1850                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1851                                                BRCMF_SDIO_FT_NORMAL)) {
1852                                 sdio_release_host(bus->sdiodev->func1);
1853                                 if (!bus->rxpending)
1854                                         break;
1855                                 else
1856                                         continue;
1857                         }
1858
1859                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1860                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1861                                                         rd->len,
1862                                                         rd->dat_offset);
1863                                 /* prepare the descriptor for the next read */
1864                                 rd->len = rd->len_nxtfrm << 4;
1865                                 rd->len_nxtfrm = 0;
1866                                 /* treat all packet as event if we don't know */
1867                                 rd->channel = SDPCM_EVENT_CHANNEL;
1868                                 sdio_release_host(bus->sdiodev->func1);
1869                                 continue;
1870                         }
1871                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1872                                        rd->len - BRCMF_FIRSTREAD : 0;
1873                         head_read = BRCMF_FIRSTREAD;
1874                 }
1875
1876                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1877
1878                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1879                                             bus->head_align);
1880                 if (!pkt) {
1881                         /* Give up on data, request rtx of events */
1882                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1883                         brcmf_sdio_rxfail(bus, false,
1884                                             RETRYCHAN(rd->channel));
1885                         sdio_release_host(bus->sdiodev->func1);
1886                         continue;
1887                 }
1888                 skb_pull(pkt, head_read);
1889                 pkt_align(pkt, rd->len_left, bus->head_align);
1890
1891                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1892                 bus->sdcnt.f2rxdata++;
1893                 sdio_release_host(bus->sdiodev->func1);
1894
1895                 if (ret < 0) {
1896                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1897                                   rd->len, rd->channel, ret);
1898                         brcmu_pkt_buf_free_skb(pkt);
1899                         sdio_claim_host(bus->sdiodev->func1);
1900                         brcmf_sdio_rxfail(bus, true,
1901                                             RETRYCHAN(rd->channel));
1902                         sdio_release_host(bus->sdiodev->func1);
1903                         continue;
1904                 }
1905
1906                 if (head_read) {
1907                         skb_push(pkt, head_read);
1908                         memcpy(pkt->data, bus->rxhdr, head_read);
1909                         head_read = 0;
1910                 } else {
1911                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1912                         rd_new.seq_num = rd->seq_num;
1913                         sdio_claim_host(bus->sdiodev->func1);
1914                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1915                                                BRCMF_SDIO_FT_NORMAL)) {
1916                                 rd->len = 0;
1917                                 brcmu_pkt_buf_free_skb(pkt);
1918                         }
1919                         bus->sdcnt.rx_readahead_cnt++;
1920                         if (rd->len != roundup(rd_new.len, 16)) {
1921                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1922                                           rd->len,
1923                                           roundup(rd_new.len, 16) >> 4);
1924                                 rd->len = 0;
1925                                 brcmf_sdio_rxfail(bus, true, true);
1926                                 sdio_release_host(bus->sdiodev->func1);
1927                                 brcmu_pkt_buf_free_skb(pkt);
1928                                 continue;
1929                         }
1930                         sdio_release_host(bus->sdiodev->func1);
1931                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1932                         rd->channel = rd_new.channel;
1933                         rd->dat_offset = rd_new.dat_offset;
1934
1935                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1936                                              BRCMF_DATA_ON()) &&
1937                                            BRCMF_HDRS_ON(),
1938                                            bus->rxhdr, SDPCM_HDRLEN,
1939                                            "RxHdr:\n");
1940
1941                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1942                                 brcmf_err("readahead on control packet %d?\n",
1943                                           rd_new.seq_num);
1944                                 /* Force retry w/normal header read */
1945                                 rd->len = 0;
1946                                 sdio_claim_host(bus->sdiodev->func1);
1947                                 brcmf_sdio_rxfail(bus, false, true);
1948                                 sdio_release_host(bus->sdiodev->func1);
1949                                 brcmu_pkt_buf_free_skb(pkt);
1950                                 continue;
1951                         }
1952                 }
1953
1954                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1955                                    pkt->data, rd->len, "Rx Data:\n");
1956
1957                 /* Save superframe descriptor and allocate packet frame */
1958                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1959                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1960                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1961                                           rd->len);
1962                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1963                                                    pkt->data, rd->len,
1964                                                    "Glom Data:\n");
1965                                 __skb_trim(pkt, rd->len);
1966                                 skb_pull(pkt, SDPCM_HDRLEN);
1967                                 bus->glomd = pkt;
1968                         } else {
1969                                 brcmf_err("%s: glom superframe w/o "
1970                                           "descriptor!\n", __func__);
1971                                 sdio_claim_host(bus->sdiodev->func1);
1972                                 brcmf_sdio_rxfail(bus, false, false);
1973                                 sdio_release_host(bus->sdiodev->func1);
1974                         }
1975                         /* prepare the descriptor for the next read */
1976                         rd->len = rd->len_nxtfrm << 4;
1977                         rd->len_nxtfrm = 0;
1978                         /* treat all packet as event if we don't know */
1979                         rd->channel = SDPCM_EVENT_CHANNEL;
1980                         continue;
1981                 }
1982
1983                 /* Fill in packet len and prio, deliver upward */
1984                 __skb_trim(pkt, rd->len);
1985                 skb_pull(pkt, rd->dat_offset);
1986
1987                 if (pkt->len == 0)
1988                         brcmu_pkt_buf_free_skb(pkt);
1989                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
1990                         brcmf_rx_event(bus->sdiodev->dev, pkt);
1991                 else
1992                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
1993                                        false);
1994
1995                 /* prepare the descriptor for the next read */
1996                 rd->len = rd->len_nxtfrm << 4;
1997                 rd->len_nxtfrm = 0;
1998                 /* treat all packet as event if we don't know */
1999                 rd->channel = SDPCM_EVENT_CHANNEL;
2000         }
2001
2002         rxcount = maxframes - rxleft;
2003         /* Message if we hit the limit */
2004         if (!rxleft)
2005                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2006         else
2007                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2008         /* Back off rxseq if awaiting rtx, update rx_seq */
2009         if (bus->rxskip)
2010                 rd->seq_num--;
2011         bus->rx_seq = rd->seq_num;
2012
2013         return rxcount;
2014 }
2015
2016 static void
2017 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2018 {
2019         wake_up_interruptible(&bus->ctrl_wait);
2020         return;
2021 }
2022
2023 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2024 {
2025         struct brcmf_bus_stats *stats;
2026         u16 head_pad;
2027         u8 *dat_buf;
2028
2029         dat_buf = (u8 *)(pkt->data);
2030
2031         /* Check head padding */
2032         head_pad = ((unsigned long)dat_buf % bus->head_align);
2033         if (head_pad) {
2034                 if (skb_headroom(pkt) < head_pad) {
2035                         stats = &bus->sdiodev->bus_if->stats;
2036                         atomic_inc(&stats->pktcowed);
2037                         if (skb_cow_head(pkt, head_pad)) {
2038                                 atomic_inc(&stats->pktcow_failed);
2039                                 return -ENOMEM;
2040                         }
2041                         head_pad = 0;
2042                 }
2043                 skb_push(pkt, head_pad);
2044                 dat_buf = (u8 *)(pkt->data);
2045         }
2046         memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2047         return head_pad;
2048 }
2049
2050 /*
2051  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2052  * bus layer usage.
2053  */
2054 /* flag marking a dummy skb added for DMA alignment requirement */
2055 #define ALIGN_SKB_FLAG          0x8000
2056 /* bit mask of data length chopped from the previous packet */
2057 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2058
2059 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2060                                     struct sk_buff_head *pktq,
2061                                     struct sk_buff *pkt, u16 total_len)
2062 {
2063         struct brcmf_sdio_dev *sdiodev;
2064         struct sk_buff *pkt_pad;
2065         u16 tail_pad, tail_chop, chain_pad;
2066         unsigned int blksize;
2067         bool lastfrm;
2068         int ntail, ret;
2069
2070         sdiodev = bus->sdiodev;
2071         blksize = sdiodev->func2->cur_blksize;
2072         /* sg entry alignment should be a divisor of block size */
2073         WARN_ON(blksize % bus->sgentry_align);
2074
2075         /* Check tail padding */
2076         lastfrm = skb_queue_is_last(pktq, pkt);
2077         tail_pad = 0;
2078         tail_chop = pkt->len % bus->sgentry_align;
2079         if (tail_chop)
2080                 tail_pad = bus->sgentry_align - tail_chop;
2081         chain_pad = (total_len + tail_pad) % blksize;
2082         if (lastfrm && chain_pad)
2083                 tail_pad += blksize - chain_pad;
2084         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2085                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2086                                                 bus->head_align);
2087                 if (pkt_pad == NULL)
2088                         return -ENOMEM;
2089                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2090                 if (unlikely(ret < 0)) {
2091                         kfree_skb(pkt_pad);
2092                         return ret;
2093                 }
2094                 memcpy(pkt_pad->data,
2095                        pkt->data + pkt->len - tail_chop,
2096                        tail_chop);
2097                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2098                 skb_trim(pkt, pkt->len - tail_chop);
2099                 skb_trim(pkt_pad, tail_pad + tail_chop);
2100                 __skb_queue_after(pktq, pkt, pkt_pad);
2101         } else {
2102                 ntail = pkt->data_len + tail_pad -
2103                         (pkt->end - pkt->tail);
2104                 if (skb_cloned(pkt) || ntail > 0)
2105                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2106                                 return -ENOMEM;
2107                 if (skb_linearize(pkt))
2108                         return -ENOMEM;
2109                 __skb_put(pkt, tail_pad);
2110         }
2111
2112         return tail_pad;
2113 }
2114
2115 /**
2116  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2117  * @bus: brcmf_sdio structure pointer
2118  * @pktq: packet list pointer
2119  * @chan: virtual channel to transmit the packet
2120  *
2121  * Processes to be applied to the packet
2122  *      - Align data buffer pointer
2123  *      - Align data buffer length
2124  *      - Prepare header
2125  * Return: negative value if there is error
2126  */
2127 static int
2128 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2129                       uint chan)
2130 {
2131         u16 head_pad, total_len;
2132         struct sk_buff *pkt_next;
2133         u8 txseq;
2134         int ret;
2135         struct brcmf_sdio_hdrinfo hd_info = {0};
2136
2137         txseq = bus->tx_seq;
2138         total_len = 0;
2139         skb_queue_walk(pktq, pkt_next) {
2140                 /* alignment packet inserted in previous
2141                  * loop cycle can be skipped as it is
2142                  * already properly aligned and does not
2143                  * need an sdpcm header.
2144                  */
2145                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2146                         continue;
2147
2148                 /* align packet data pointer */
2149                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2150                 if (ret < 0)
2151                         return ret;
2152                 head_pad = (u16)ret;
2153                 if (head_pad)
2154                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2155
2156                 total_len += pkt_next->len;
2157
2158                 hd_info.len = pkt_next->len;
2159                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2160                 if (bus->txglom && pktq->qlen > 1) {
2161                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2162                                                        pkt_next, total_len);
2163                         if (ret < 0)
2164                                 return ret;
2165                         hd_info.tail_pad = (u16)ret;
2166                         total_len += (u16)ret;
2167                 }
2168
2169                 hd_info.channel = chan;
2170                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2171                 hd_info.seq_num = txseq++;
2172
2173                 /* Now fill the header */
2174                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2175
2176                 if (BRCMF_BYTES_ON() &&
2177                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2178                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2179                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2180                                            "Tx Frame:\n");
2181                 else if (BRCMF_HDRS_ON())
2182                         brcmf_dbg_hex_dump(true, pkt_next->data,
2183                                            head_pad + bus->tx_hdrlen,
2184                                            "Tx Header:\n");
2185         }
2186         /* Hardware length tag of the first packet should be total
2187          * length of the chain (including padding)
2188          */
2189         if (bus->txglom)
2190                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2191         return 0;
2192 }
2193
2194 /**
2195  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2196  * @bus: brcmf_sdio structure pointer
2197  * @pktq: packet list pointer
2198  *
2199  * Processes to be applied to the packet
2200  *      - Remove head padding
2201  *      - Remove tail padding
2202  */
2203 static void
2204 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2205 {
2206         u8 *hdr;
2207         u32 dat_offset;
2208         u16 tail_pad;
2209         u16 dummy_flags, chop_len;
2210         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2211
2212         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2213                 dummy_flags = *(u16 *)(pkt_next->cb);
2214                 if (dummy_flags & ALIGN_SKB_FLAG) {
2215                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2216                         if (chop_len) {
2217                                 pkt_prev = pkt_next->prev;
2218                                 skb_put(pkt_prev, chop_len);
2219                         }
2220                         __skb_unlink(pkt_next, pktq);
2221                         brcmu_pkt_buf_free_skb(pkt_next);
2222                 } else {
2223                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2224                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2225                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2226                                      SDPCM_DOFFSET_SHIFT;
2227                         skb_pull(pkt_next, dat_offset);
2228                         if (bus->txglom) {
2229                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2230                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2231                         }
2232                 }
2233         }
2234 }
2235
2236 /* Writes a HW/SW header into the packet and sends it. */
2237 /* Assumes: (a) header space already there, (b) caller holds lock */
2238 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2239                             uint chan)
2240 {
2241         int ret;
2242         struct sk_buff *pkt_next, *tmp;
2243
2244         brcmf_dbg(TRACE, "Enter\n");
2245
2246         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2247         if (ret)
2248                 goto done;
2249
2250         sdio_claim_host(bus->sdiodev->func1);
2251         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2252         bus->sdcnt.f2txdata++;
2253
2254         if (ret < 0)
2255                 brcmf_sdio_txfail(bus);
2256
2257         sdio_release_host(bus->sdiodev->func1);
2258
2259 done:
2260         brcmf_sdio_txpkt_postp(bus, pktq);
2261         if (ret == 0)
2262                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2263         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2264                 __skb_unlink(pkt_next, pktq);
2265                 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2266                                             ret == 0);
2267         }
2268         return ret;
2269 }
2270
2271 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2272 {
2273         struct sk_buff *pkt;
2274         struct sk_buff_head pktq;
2275         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2276         u32 intstatus = 0;
2277         int ret = 0, prec_out, i;
2278         uint cnt = 0;
2279         u8 tx_prec_map, pkt_num;
2280
2281         brcmf_dbg(TRACE, "Enter\n");
2282
2283         tx_prec_map = ~bus->flowcontrol;
2284
2285         /* Send frames until the limit or some other event */
2286         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2287                 pkt_num = 1;
2288                 if (bus->txglom)
2289                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2290                                         bus->sdiodev->txglomsz);
2291                 pkt_num = min_t(u32, pkt_num,
2292                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2293                 __skb_queue_head_init(&pktq);
2294                 spin_lock_bh(&bus->txq_lock);
2295                 for (i = 0; i < pkt_num; i++) {
2296                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2297                                               &prec_out);
2298                         if (pkt == NULL)
2299                                 break;
2300                         __skb_queue_tail(&pktq, pkt);
2301                 }
2302                 spin_unlock_bh(&bus->txq_lock);
2303                 if (i == 0)
2304                         break;
2305
2306                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2307
2308                 cnt += i;
2309
2310                 /* In poll mode, need to check for other events */
2311                 if (!bus->intr) {
2312                         /* Check device status, signal pending interrupt */
2313                         sdio_claim_host(bus->sdiodev->func1);
2314                         intstatus = brcmf_sdiod_readl(bus->sdiodev,
2315                                                       intstat_addr, &ret);
2316                         sdio_release_host(bus->sdiodev->func1);
2317
2318                         bus->sdcnt.f2txdata++;
2319                         if (ret != 0)
2320                                 break;
2321                         if (intstatus & bus->hostintmask)
2322                                 atomic_set(&bus->ipend, 1);
2323                 }
2324         }
2325
2326         /* Deflow-control stack if needed */
2327         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2328             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2329                 bus->txoff = false;
2330                 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2331         }
2332
2333         return cnt;
2334 }
2335
2336 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2337 {
2338         u8 doff;
2339         u16 pad;
2340         uint retries = 0;
2341         struct brcmf_sdio_hdrinfo hd_info = {0};
2342         int ret;
2343
2344         brcmf_dbg(SDIO, "Enter\n");
2345
2346         /* Back the pointer to make room for bus header */
2347         frame -= bus->tx_hdrlen;
2348         len += bus->tx_hdrlen;
2349
2350         /* Add alignment padding (optional for ctl frames) */
2351         doff = ((unsigned long)frame % bus->head_align);
2352         if (doff) {
2353                 frame -= doff;
2354                 len += doff;
2355                 memset(frame + bus->tx_hdrlen, 0, doff);
2356         }
2357
2358         /* Round send length to next SDIO block */
2359         pad = 0;
2360         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2361                 pad = bus->blocksize - (len % bus->blocksize);
2362                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2363                         pad = 0;
2364         } else if (len % bus->head_align) {
2365                 pad = bus->head_align - (len % bus->head_align);
2366         }
2367         len += pad;
2368
2369         hd_info.len = len - pad;
2370         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2371         hd_info.dat_offset = doff + bus->tx_hdrlen;
2372         hd_info.seq_num = bus->tx_seq;
2373         hd_info.lastfrm = true;
2374         hd_info.tail_pad = pad;
2375         brcmf_sdio_hdpack(bus, frame, &hd_info);
2376
2377         if (bus->txglom)
2378                 brcmf_sdio_update_hwhdr(frame, len);
2379
2380         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2381                            frame, len, "Tx Frame:\n");
2382         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2383                            BRCMF_HDRS_ON(),
2384                            frame, min_t(u16, len, 16), "TxHdr:\n");
2385
2386         do {
2387                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2388
2389                 if (ret < 0)
2390                         brcmf_sdio_txfail(bus);
2391                 else
2392                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2393         } while (ret < 0 && retries++ < TXRETRIES);
2394
2395         return ret;
2396 }
2397
2398 static void brcmf_sdio_bus_stop(struct device *dev)
2399 {
2400         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2401         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2402         struct brcmf_sdio *bus = sdiodev->bus;
2403         struct brcmf_core *core = bus->sdio_core;
2404         u32 local_hostintmask;
2405         u8 saveclk;
2406         int err;
2407
2408         brcmf_dbg(TRACE, "Enter\n");
2409
2410         if (bus->watchdog_tsk) {
2411                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2412                 kthread_stop(bus->watchdog_tsk);
2413                 bus->watchdog_tsk = NULL;
2414         }
2415
2416         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2417                 sdio_claim_host(sdiodev->func1);
2418
2419                 /* Enable clock for device interrupts */
2420                 brcmf_sdio_bus_sleep(bus, false, false);
2421
2422                 /* Disable and clear interrupts at the chip level also */
2423                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(hostintmask),
2424                                    0, NULL);
2425
2426                 local_hostintmask = bus->hostintmask;
2427                 bus->hostintmask = 0;
2428
2429                 /* Force backplane clocks to assure F2 interrupt propagates */
2430                 saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2431                                             &err);
2432                 if (!err)
2433                         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2434                                            (saveclk | SBSDIO_FORCE_HT), &err);
2435                 if (err)
2436                         brcmf_err("Failed to force clock for F2: err %d\n",
2437                                   err);
2438
2439                 /* Turn off the bus (F2), free any pending packets */
2440                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2441                 sdio_disable_func(sdiodev->func2);
2442
2443                 /* Clear any pending interrupts now that F2 is disabled */
2444                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(intstatus),
2445                                    local_hostintmask, NULL);
2446
2447                 sdio_release_host(sdiodev->func1);
2448         }
2449         /* Clear the data packet queues */
2450         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2451
2452         /* Clear any held glomming stuff */
2453         brcmu_pkt_buf_free_skb(bus->glomd);
2454         brcmf_sdio_free_glom(bus);
2455
2456         /* Clear rx control and wake any waiters */
2457         spin_lock_bh(&bus->rxctl_lock);
2458         bus->rxlen = 0;
2459         spin_unlock_bh(&bus->rxctl_lock);
2460         brcmf_sdio_dcmd_resp_wake(bus);
2461
2462         /* Reset some F2 state stuff */
2463         bus->rxskip = false;
2464         bus->tx_seq = bus->rx_seq = 0;
2465 }
2466
2467 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2468 {
2469         struct brcmf_sdio_dev *sdiodev;
2470         unsigned long flags;
2471
2472         sdiodev = bus->sdiodev;
2473         if (sdiodev->oob_irq_requested) {
2474                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2475                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2476                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2477                         sdiodev->irq_en = true;
2478                 }
2479                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2480         }
2481 }
2482
2483 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2484 {
2485         struct brcmf_core *core = bus->sdio_core;
2486         u32 addr;
2487         unsigned long val;
2488         int ret;
2489
2490         addr = core->base + SD_REG(intstatus);
2491
2492         val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
2493         bus->sdcnt.f1regdata++;
2494         if (ret != 0)
2495                 return ret;
2496
2497         val &= bus->hostintmask;
2498         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2499
2500         /* Clear interrupts */
2501         if (val) {
2502                 brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
2503                 bus->sdcnt.f1regdata++;
2504                 atomic_or(val, &bus->intstatus);
2505         }
2506
2507         return ret;
2508 }
2509
2510 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2511 {
2512         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
2513         u32 newstatus = 0;
2514         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2515         unsigned long intstatus;
2516         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2517         uint framecnt;                  /* Temporary counter of tx/rx frames */
2518         int err = 0;
2519
2520         brcmf_dbg(SDIO, "Enter\n");
2521
2522         sdio_claim_host(bus->sdiodev->func1);
2523
2524         /* If waiting for HTAVAIL, check status */
2525         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2526                 u8 clkctl, devctl = 0;
2527
2528 #ifdef DEBUG
2529                 /* Check for inconsistent device control */
2530                 devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2531                                            &err);
2532 #endif                          /* DEBUG */
2533
2534                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2535                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
2536                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2537
2538                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2539                           devctl, clkctl);
2540
2541                 if (SBSDIO_HTAV(clkctl)) {
2542                         devctl = brcmf_sdiod_readb(bus->sdiodev,
2543                                                    SBSDIO_DEVICE_CTL, &err);
2544                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2545                         brcmf_sdiod_writeb(bus->sdiodev,
2546                                            SBSDIO_DEVICE_CTL, devctl, &err);
2547                         bus->clkstate = CLK_AVAIL;
2548                 }
2549         }
2550
2551         /* Make sure backplane clock is on */
2552         brcmf_sdio_bus_sleep(bus, false, true);
2553
2554         /* Pending interrupt indicates new device status */
2555         if (atomic_read(&bus->ipend) > 0) {
2556                 atomic_set(&bus->ipend, 0);
2557                 err = brcmf_sdio_intr_rstatus(bus);
2558         }
2559
2560         /* Start with leftover status bits */
2561         intstatus = atomic_xchg(&bus->intstatus, 0);
2562
2563         /* Handle flow-control change: read new state in case our ack
2564          * crossed another change interrupt.  If change still set, assume
2565          * FC ON for safety, let next loop through do the debounce.
2566          */
2567         if (intstatus & I_HMB_FC_CHANGE) {
2568                 intstatus &= ~I_HMB_FC_CHANGE;
2569                 brcmf_sdiod_writel(sdiod, intstat_addr, I_HMB_FC_CHANGE, &err);
2570
2571                 newstatus = brcmf_sdiod_readl(sdiod, intstat_addr, &err);
2572
2573                 bus->sdcnt.f1regdata += 2;
2574                 atomic_set(&bus->fcstate,
2575                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2576                 intstatus |= (newstatus & bus->hostintmask);
2577         }
2578
2579         /* Handle host mailbox indication */
2580         if (intstatus & I_HMB_HOST_INT) {
2581                 intstatus &= ~I_HMB_HOST_INT;
2582                 intstatus |= brcmf_sdio_hostmail(bus);
2583         }
2584
2585         sdio_release_host(bus->sdiodev->func1);
2586
2587         /* Generally don't ask for these, can get CRC errors... */
2588         if (intstatus & I_WR_OOSYNC) {
2589                 brcmf_err("Dongle reports WR_OOSYNC\n");
2590                 intstatus &= ~I_WR_OOSYNC;
2591         }
2592
2593         if (intstatus & I_RD_OOSYNC) {
2594                 brcmf_err("Dongle reports RD_OOSYNC\n");
2595                 intstatus &= ~I_RD_OOSYNC;
2596         }
2597
2598         if (intstatus & I_SBINT) {
2599                 brcmf_err("Dongle reports SBINT\n");
2600                 intstatus &= ~I_SBINT;
2601         }
2602
2603         /* Would be active due to wake-wlan in gSPI */
2604         if (intstatus & I_CHIPACTIVE) {
2605                 brcmf_dbg(SDIO, "Dongle reports CHIPACTIVE\n");
2606                 intstatus &= ~I_CHIPACTIVE;
2607         }
2608
2609         /* Ignore frame indications if rxskip is set */
2610         if (bus->rxskip)
2611                 intstatus &= ~I_HMB_FRAME_IND;
2612
2613         /* On frame indication, read available frames */
2614         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2615                 brcmf_sdio_readframes(bus, bus->rxbound);
2616                 if (!bus->rxpending)
2617                         intstatus &= ~I_HMB_FRAME_IND;
2618         }
2619
2620         /* Keep still-pending events for next scheduling */
2621         if (intstatus)
2622                 atomic_or(intstatus, &bus->intstatus);
2623
2624         brcmf_sdio_clrintr(bus);
2625
2626         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2627             data_ok(bus)) {
2628                 sdio_claim_host(bus->sdiodev->func1);
2629                 if (bus->ctrl_frame_stat) {
2630                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2631                                                       bus->ctrl_frame_len);
2632                         bus->ctrl_frame_err = err;
2633                         wmb();
2634                         bus->ctrl_frame_stat = false;
2635                 }
2636                 sdio_release_host(bus->sdiodev->func1);
2637                 brcmf_sdio_wait_event_wakeup(bus);
2638         }
2639         /* Send queued frames (limit 1 if rx may still be pending) */
2640         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2641             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2642             data_ok(bus)) {
2643                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2644                                             txlimit;
2645                 brcmf_sdio_sendfromq(bus, framecnt);
2646         }
2647
2648         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2649                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2650                 atomic_set(&bus->intstatus, 0);
2651                 if (bus->ctrl_frame_stat) {
2652                         sdio_claim_host(bus->sdiodev->func1);
2653                         if (bus->ctrl_frame_stat) {
2654                                 bus->ctrl_frame_err = -ENODEV;
2655                                 wmb();
2656                                 bus->ctrl_frame_stat = false;
2657                                 brcmf_sdio_wait_event_wakeup(bus);
2658                         }
2659                         sdio_release_host(bus->sdiodev->func1);
2660                 }
2661         } else if (atomic_read(&bus->intstatus) ||
2662                    atomic_read(&bus->ipend) > 0 ||
2663                    (!atomic_read(&bus->fcstate) &&
2664                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2665                     data_ok(bus))) {
2666                 bus->dpc_triggered = true;
2667         }
2668 }
2669
2670 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2671 {
2672         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2673         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2674         struct brcmf_sdio *bus = sdiodev->bus;
2675
2676         return &bus->txq;
2677 }
2678
2679 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2680 {
2681         struct sk_buff *p;
2682         int eprec = -1;         /* precedence to evict from */
2683
2684         /* Fast case, precedence queue is not full and we are also not
2685          * exceeding total queue length
2686          */
2687         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2688                 brcmu_pktq_penq(q, prec, pkt);
2689                 return true;
2690         }
2691
2692         /* Determine precedence from which to evict packet, if any */
2693         if (pktq_pfull(q, prec)) {
2694                 eprec = prec;
2695         } else if (pktq_full(q)) {
2696                 p = brcmu_pktq_peek_tail(q, &eprec);
2697                 if (eprec > prec)
2698                         return false;
2699         }
2700
2701         /* Evict if needed */
2702         if (eprec >= 0) {
2703                 /* Detect queueing to unconfigured precedence */
2704                 if (eprec == prec)
2705                         return false;   /* refuse newer (incoming) packet */
2706                 /* Evict packet according to discard policy */
2707                 p = brcmu_pktq_pdeq_tail(q, eprec);
2708                 if (p == NULL)
2709                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2710                 brcmu_pkt_buf_free_skb(p);
2711         }
2712
2713         /* Enqueue */
2714         p = brcmu_pktq_penq(q, prec, pkt);
2715         if (p == NULL)
2716                 brcmf_err("brcmu_pktq_penq() failed\n");
2717
2718         return p != NULL;
2719 }
2720
2721 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2722 {
2723         int ret = -EBADE;
2724         uint prec;
2725         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2726         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2727         struct brcmf_sdio *bus = sdiodev->bus;
2728
2729         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2730         if (sdiodev->state != BRCMF_SDIOD_DATA)
2731                 return -EIO;
2732
2733         /* Add space for the header */
2734         skb_push(pkt, bus->tx_hdrlen);
2735         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2736
2737         prec = prio2prec((pkt->priority & PRIOMASK));
2738
2739         /* Check for existing queue, current flow-control,
2740                          pending event, or pending clock */
2741         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2742         bus->sdcnt.fcqueued++;
2743
2744         /* Priority based enq */
2745         spin_lock_bh(&bus->txq_lock);
2746         /* reset bus_flags in packet cb */
2747         *(u16 *)(pkt->cb) = 0;
2748         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2749                 skb_pull(pkt, bus->tx_hdrlen);
2750                 brcmf_err("out of bus->txq !!!\n");
2751                 ret = -ENOSR;
2752         } else {
2753                 ret = 0;
2754         }
2755
2756         if (pktq_len(&bus->txq) >= TXHI) {
2757                 bus->txoff = true;
2758                 brcmf_proto_bcdc_txflowblock(dev, true);
2759         }
2760         spin_unlock_bh(&bus->txq_lock);
2761
2762 #ifdef DEBUG
2763         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2764                 qcount[prec] = pktq_plen(&bus->txq, prec);
2765 #endif
2766
2767         brcmf_sdio_trigger_dpc(bus);
2768         return ret;
2769 }
2770
2771 #ifdef DEBUG
2772 #define CONSOLE_LINE_MAX        192
2773
2774 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2775 {
2776         struct brcmf_console *c = &bus->console;
2777         u8 line[CONSOLE_LINE_MAX], ch;
2778         u32 n, idx, addr;
2779         int rv;
2780
2781         /* Don't do anything until FWREADY updates console address */
2782         if (bus->console_addr == 0)
2783                 return 0;
2784
2785         /* Read console log struct */
2786         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2787         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2788                                sizeof(c->log_le));
2789         if (rv < 0)
2790                 return rv;
2791
2792         /* Allocate console buffer (one time only) */
2793         if (c->buf == NULL) {
2794                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2795                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2796                 if (c->buf == NULL)
2797                         return -ENOMEM;
2798         }
2799
2800         idx = le32_to_cpu(c->log_le.idx);
2801
2802         /* Protect against corrupt value */
2803         if (idx > c->bufsize)
2804                 return -EBADE;
2805
2806         /* Skip reading the console buffer if the index pointer
2807          has not moved */
2808         if (idx == c->last)
2809                 return 0;
2810
2811         /* Read the console buffer */
2812         addr = le32_to_cpu(c->log_le.buf);
2813         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2814         if (rv < 0)
2815                 return rv;
2816
2817         while (c->last != idx) {
2818                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2819                         if (c->last == idx) {
2820                                 /* This would output a partial line.
2821                                  * Instead, back up
2822                                  * the buffer pointer and output this
2823                                  * line next time around.
2824                                  */
2825                                 if (c->last >= n)
2826                                         c->last -= n;
2827                                 else
2828                                         c->last = c->bufsize - n;
2829                                 goto break2;
2830                         }
2831                         ch = c->buf[c->last];
2832                         c->last = (c->last + 1) % c->bufsize;
2833                         if (ch == '\n')
2834                                 break;
2835                         line[n] = ch;
2836                 }
2837
2838                 if (n > 0) {
2839                         if (line[n - 1] == '\r')
2840                                 n--;
2841                         line[n] = 0;
2842                         pr_debug("CONSOLE: %s\n", line);
2843                 }
2844         }
2845 break2:
2846
2847         return 0;
2848 }
2849 #endif                          /* DEBUG */
2850
2851 static int
2852 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2853 {
2854         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2855         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2856         struct brcmf_sdio *bus = sdiodev->bus;
2857         int ret;
2858
2859         brcmf_dbg(TRACE, "Enter\n");
2860         if (sdiodev->state != BRCMF_SDIOD_DATA)
2861                 return -EIO;
2862
2863         /* Send from dpc */
2864         bus->ctrl_frame_buf = msg;
2865         bus->ctrl_frame_len = msglen;
2866         wmb();
2867         bus->ctrl_frame_stat = true;
2868
2869         brcmf_sdio_trigger_dpc(bus);
2870         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2871                                          CTL_DONE_TIMEOUT);
2872         ret = 0;
2873         if (bus->ctrl_frame_stat) {
2874                 sdio_claim_host(bus->sdiodev->func1);
2875                 if (bus->ctrl_frame_stat) {
2876                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2877                         bus->ctrl_frame_stat = false;
2878                         ret = -ETIMEDOUT;
2879                 }
2880                 sdio_release_host(bus->sdiodev->func1);
2881         }
2882         if (!ret) {
2883                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2884                           bus->ctrl_frame_err);
2885                 rmb();
2886                 ret = bus->ctrl_frame_err;
2887         }
2888
2889         if (ret)
2890                 bus->sdcnt.tx_ctlerrs++;
2891         else
2892                 bus->sdcnt.tx_ctlpkts++;
2893
2894         return ret;
2895 }
2896
2897 #ifdef DEBUG
2898 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2899                                    struct sdpcm_shared *sh)
2900 {
2901         u32 addr, console_ptr, console_size, console_index;
2902         char *conbuf = NULL;
2903         __le32 sh_val;
2904         int rv;
2905
2906         /* obtain console information from device memory */
2907         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2908         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2909                                (u8 *)&sh_val, sizeof(u32));
2910         if (rv < 0)
2911                 return rv;
2912         console_ptr = le32_to_cpu(sh_val);
2913
2914         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2915         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2916                                (u8 *)&sh_val, sizeof(u32));
2917         if (rv < 0)
2918                 return rv;
2919         console_size = le32_to_cpu(sh_val);
2920
2921         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2922         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2923                                (u8 *)&sh_val, sizeof(u32));
2924         if (rv < 0)
2925                 return rv;
2926         console_index = le32_to_cpu(sh_val);
2927
2928         /* allocate buffer for console data */
2929         if (console_size <= CONSOLE_BUFFER_MAX)
2930                 conbuf = vzalloc(console_size+1);
2931
2932         if (!conbuf)
2933                 return -ENOMEM;
2934
2935         /* obtain the console data from device */
2936         conbuf[console_size] = '\0';
2937         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2938                                console_size);
2939         if (rv < 0)
2940                 goto done;
2941
2942         rv = seq_write(seq, conbuf + console_index,
2943                        console_size - console_index);
2944         if (rv < 0)
2945                 goto done;
2946
2947         if (console_index > 0)
2948                 rv = seq_write(seq, conbuf, console_index - 1);
2949
2950 done:
2951         vfree(conbuf);
2952         return rv;
2953 }
2954
2955 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2956                                 struct sdpcm_shared *sh)
2957 {
2958         int error;
2959         struct brcmf_trap_info tr;
2960
2961         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2962                 brcmf_dbg(INFO, "no trap in firmware\n");
2963                 return 0;
2964         }
2965
2966         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2967                                   sizeof(struct brcmf_trap_info));
2968         if (error < 0)
2969                 return error;
2970
2971         seq_printf(seq,
2972                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
2973                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2974                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2975                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2976                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2977                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2978                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2979                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2980                    le32_to_cpu(tr.pc), sh->trap_addr,
2981                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2982                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2983                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2984                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2985
2986         return 0;
2987 }
2988
2989 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
2990                                   struct sdpcm_shared *sh)
2991 {
2992         int error = 0;
2993         char file[80] = "?";
2994         char expr[80] = "<???>";
2995
2996         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2997                 brcmf_dbg(INFO, "firmware not built with -assert\n");
2998                 return 0;
2999         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3000                 brcmf_dbg(INFO, "no assert in dongle\n");
3001                 return 0;
3002         }
3003
3004         sdio_claim_host(bus->sdiodev->func1);
3005         if (sh->assert_file_addr != 0) {
3006                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3007                                           sh->assert_file_addr, (u8 *)file, 80);
3008                 if (error < 0)
3009                         return error;
3010         }
3011         if (sh->assert_exp_addr != 0) {
3012                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3013                                           sh->assert_exp_addr, (u8 *)expr, 80);
3014                 if (error < 0)
3015                         return error;
3016         }
3017         sdio_release_host(bus->sdiodev->func1);
3018
3019         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3020                    file, sh->assert_line, expr);
3021         return 0;
3022 }
3023
3024 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3025 {
3026         int error;
3027         struct sdpcm_shared sh;
3028
3029         error = brcmf_sdio_readshared(bus, &sh);
3030
3031         if (error < 0)
3032                 return error;
3033
3034         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3035                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3036         else if (sh.flags & SDPCM_SHARED_ASSERT)
3037                 brcmf_err("assertion in dongle\n");
3038
3039         if (sh.flags & SDPCM_SHARED_TRAP)
3040                 brcmf_err("firmware trap in dongle\n");
3041
3042         return 0;
3043 }
3044
3045 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3046 {
3047         int error = 0;
3048         struct sdpcm_shared sh;
3049
3050         error = brcmf_sdio_readshared(bus, &sh);
3051         if (error < 0)
3052                 goto done;
3053
3054         error = brcmf_sdio_assert_info(seq, bus, &sh);
3055         if (error < 0)
3056                 goto done;
3057
3058         error = brcmf_sdio_trap_info(seq, bus, &sh);
3059         if (error < 0)
3060                 goto done;
3061
3062         error = brcmf_sdio_dump_console(seq, bus, &sh);
3063
3064 done:
3065         return error;
3066 }
3067
3068 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3069 {
3070         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3071         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3072
3073         return brcmf_sdio_died_dump(seq, bus);
3074 }
3075
3076 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3077 {
3078         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3079         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3080         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3081
3082         seq_printf(seq,
3083                    "intrcount:    %u\nlastintrs:    %u\n"
3084                    "pollcnt:      %u\nregfails:     %u\n"
3085                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3086                    "rxrtx:        %u\nrx_toolong:   %u\n"
3087                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3088                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3089                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3090                    "fc_xon:       %u\nrxglomfail:   %u\n"
3091                    "rxglomframes: %u\nrxglompkts:   %u\n"
3092                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3093                    "f2txdata:     %u\nf1regdata:    %u\n"
3094                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3095                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3096                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3097                    sdcnt->intrcount, sdcnt->lastintrs,
3098                    sdcnt->pollcnt, sdcnt->regfails,
3099                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3100                    sdcnt->rxrtx, sdcnt->rx_toolong,
3101                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3102                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3103                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3104                    sdcnt->fc_xon, sdcnt->rxglomfail,
3105                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3106                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3107                    sdcnt->f2txdata, sdcnt->f1regdata,
3108                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3109                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3110                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3111
3112         return 0;
3113 }
3114
3115 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3116 {
3117         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3118         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3119
3120         if (IS_ERR_OR_NULL(dentry))
3121                 return;
3122
3123         bus->console_interval = BRCMF_CONSOLE;
3124
3125         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3126         brcmf_debugfs_add_entry(drvr, "counters",
3127                                 brcmf_debugfs_sdio_count_read);
3128         debugfs_create_u32("console_interval", 0644, dentry,
3129                            &bus->console_interval);
3130 }
3131 #else
3132 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3133 {
3134         return 0;
3135 }
3136
3137 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3138 {
3139 }
3140 #endif /* DEBUG */
3141
3142 static int
3143 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3144 {
3145         int timeleft;
3146         uint rxlen = 0;
3147         bool pending;
3148         u8 *buf;
3149         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3150         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3151         struct brcmf_sdio *bus = sdiodev->bus;
3152
3153         brcmf_dbg(TRACE, "Enter\n");
3154         if (sdiodev->state != BRCMF_SDIOD_DATA)
3155                 return -EIO;
3156
3157         /* Wait until control frame is available */
3158         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3159
3160         spin_lock_bh(&bus->rxctl_lock);
3161         rxlen = bus->rxlen;
3162         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3163         bus->rxctl = NULL;
3164         buf = bus->rxctl_orig;
3165         bus->rxctl_orig = NULL;
3166         bus->rxlen = 0;
3167         spin_unlock_bh(&bus->rxctl_lock);
3168         vfree(buf);
3169
3170         if (rxlen) {
3171                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3172                           rxlen, msglen);
3173         } else if (timeleft == 0) {
3174                 brcmf_err("resumed on timeout\n");
3175                 brcmf_sdio_checkdied(bus);
3176         } else if (pending) {
3177                 brcmf_dbg(CTL, "cancelled\n");
3178                 return -ERESTARTSYS;
3179         } else {
3180                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3181                 brcmf_sdio_checkdied(bus);
3182         }
3183
3184         if (rxlen)
3185                 bus->sdcnt.rx_ctlpkts++;
3186         else
3187                 bus->sdcnt.rx_ctlerrs++;
3188
3189         return rxlen ? (int)rxlen : -ETIMEDOUT;
3190 }
3191
3192 #ifdef DEBUG
3193 static bool
3194 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3195                         u8 *ram_data, uint ram_sz)
3196 {
3197         char *ram_cmp;
3198         int err;
3199         bool ret = true;
3200         int address;
3201         int offset;
3202         int len;
3203
3204         /* read back and verify */
3205         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3206                   ram_sz);
3207         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3208         /* do not proceed while no memory but  */
3209         if (!ram_cmp)
3210                 return true;
3211
3212         address = ram_addr;
3213         offset = 0;
3214         while (offset < ram_sz) {
3215                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3216                       ram_sz - offset;
3217                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3218                 if (err) {
3219                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3220                                   err, len, address);
3221                         ret = false;
3222                         break;
3223                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3224                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3225                                   offset, len);
3226                         ret = false;
3227                         break;
3228                 }
3229                 offset += len;
3230                 address += len;
3231         }
3232
3233         kfree(ram_cmp);
3234
3235         return ret;
3236 }
3237 #else   /* DEBUG */
3238 static bool
3239 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3240                         u8 *ram_data, uint ram_sz)
3241 {
3242         return true;
3243 }
3244 #endif  /* DEBUG */
3245
3246 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3247                                          const struct firmware *fw)
3248 {
3249         int err;
3250
3251         brcmf_dbg(TRACE, "Enter\n");
3252
3253         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3254                                 (u8 *)fw->data, fw->size);
3255         if (err)
3256                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3257                           err, (int)fw->size, bus->ci->rambase);
3258         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3259                                           (u8 *)fw->data, fw->size))
3260                 err = -EIO;
3261
3262         return err;
3263 }
3264
3265 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3266                                      void *vars, u32 varsz)
3267 {
3268         int address;
3269         int err;
3270
3271         brcmf_dbg(TRACE, "Enter\n");
3272
3273         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3274         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3275         if (err)
3276                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3277                           err, varsz, address);
3278         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3279                 err = -EIO;
3280
3281         return err;
3282 }
3283
3284 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3285                                         const struct firmware *fw,
3286                                         void *nvram, u32 nvlen)
3287 {
3288         int bcmerror;
3289         u32 rstvec;
3290
3291         sdio_claim_host(bus->sdiodev->func1);
3292         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3293
3294         rstvec = get_unaligned_le32(fw->data);
3295         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3296
3297         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3298         release_firmware(fw);
3299         if (bcmerror) {
3300                 brcmf_err("dongle image file download failed\n");
3301                 brcmf_fw_nvram_free(nvram);
3302                 goto err;
3303         }
3304
3305         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3306         brcmf_fw_nvram_free(nvram);
3307         if (bcmerror) {
3308                 brcmf_err("dongle nvram file download failed\n");
3309                 goto err;
3310         }
3311
3312         /* Take arm out of reset */
3313         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3314                 brcmf_err("error getting out of ARM core reset\n");
3315                 goto err;
3316         }
3317
3318 err:
3319         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3320         sdio_release_host(bus->sdiodev->func1);
3321         return bcmerror;
3322 }
3323
3324 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3325 {
3326         int err = 0;
3327         u8 val;
3328
3329         brcmf_dbg(TRACE, "Enter\n");
3330
3331         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3332         if (err) {
3333                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3334                 return;
3335         }
3336
3337         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3338         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3339         if (err) {
3340                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3341                 return;
3342         }
3343
3344         /* Add CMD14 Support */
3345         brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3346                              (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3347                               SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3348                              &err);
3349         if (err) {
3350                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3351                 return;
3352         }
3353
3354         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3355                            SBSDIO_FORCE_HT, &err);
3356         if (err) {
3357                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3358                 return;
3359         }
3360
3361         /* set flag */
3362         bus->sr_enabled = true;
3363         brcmf_dbg(INFO, "SR enabled\n");
3364 }
3365
3366 /* enable KSO bit */
3367 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3368 {
3369         struct brcmf_core *core = bus->sdio_core;
3370         u8 val;
3371         int err = 0;
3372
3373         brcmf_dbg(TRACE, "Enter\n");
3374
3375         /* KSO bit added in SDIO core rev 12 */
3376         if (core->rev < 12)
3377                 return 0;
3378
3379         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3380         if (err) {
3381                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3382                 return err;
3383         }
3384
3385         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3386                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3387                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3388                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3389                                    val, &err);
3390                 if (err) {
3391                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3392                         return err;
3393                 }
3394         }
3395
3396         return 0;
3397 }
3398
3399
3400 static int brcmf_sdio_bus_preinit(struct device *dev)
3401 {
3402         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3403         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3404         struct brcmf_sdio *bus = sdiodev->bus;
3405         struct brcmf_core *core = bus->sdio_core;
3406         uint pad_size;
3407         u32 value;
3408         int err;
3409
3410         /* maxctl provided by common layer */
3411         if (WARN_ON(!bus_if->maxctl))
3412                 return -EINVAL;
3413
3414         /* Allocate control receive buffer */
3415         bus_if->maxctl += bus->roundup;
3416         value = roundup((bus_if->maxctl + SDPCM_HDRLEN), ALIGNMENT);
3417         value += bus->head_align;
3418         bus->rxbuf = kmalloc(value, GFP_ATOMIC);
3419         if (bus->rxbuf)
3420                 bus->rxblen = value;
3421
3422         brcmf_sdio_debugfs_create(bus);
3423
3424         /* the commands below use the terms tx and rx from
3425          * a device perspective, ie. bus:txglom affects the
3426          * bus transfers from device to host.
3427          */
3428         if (core->rev < 12) {
3429                 /* for sdio core rev < 12, disable txgloming */
3430                 value = 0;
3431                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3432                                            sizeof(u32));
3433         } else {
3434                 /* otherwise, set txglomalign */
3435                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3436                 /* SDIO ADMA requires at least 32 bit alignment */
3437                 value = max_t(u32, value, ALIGNMENT);
3438                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3439                                            sizeof(u32));
3440         }
3441
3442         if (err < 0)
3443                 goto done;
3444
3445         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3446         if (sdiodev->sg_support) {
3447                 bus->txglom = false;
3448                 value = 1;
3449                 pad_size = bus->sdiodev->func2->cur_blksize << 1;
3450                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3451                                            &value, sizeof(u32));
3452                 if (err < 0) {
3453                         /* bus:rxglom is allowed to fail */
3454                         err = 0;
3455                 } else {
3456                         bus->txglom = true;
3457                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3458                 }
3459         }
3460         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3461
3462 done:
3463         return err;
3464 }
3465
3466 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3467 {
3468         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3469         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3470         struct brcmf_sdio *bus = sdiodev->bus;
3471
3472         return bus->ci->ramsize - bus->ci->srsize;
3473 }
3474
3475 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3476                                       size_t mem_size)
3477 {
3478         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3479         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3480         struct brcmf_sdio *bus = sdiodev->bus;
3481         int err;
3482         int address;
3483         int offset;
3484         int len;
3485
3486         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3487                   mem_size);
3488
3489         address = bus->ci->rambase;
3490         offset = err = 0;
3491         sdio_claim_host(sdiodev->func1);
3492         while (offset < mem_size) {
3493                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3494                       mem_size - offset;
3495                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3496                 if (err) {
3497                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3498                                   err, len, address);
3499                         goto done;
3500                 }
3501                 data += len;
3502                 offset += len;
3503                 address += len;
3504         }
3505
3506 done:
3507         sdio_release_host(sdiodev->func1);
3508         return err;
3509 }
3510
3511 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3512 {
3513         if (!bus->dpc_triggered) {
3514                 bus->dpc_triggered = true;
3515                 queue_work(bus->brcmf_wq, &bus->datawork);
3516         }
3517 }
3518
3519 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3520 {
3521         brcmf_dbg(TRACE, "Enter\n");
3522
3523         if (!bus) {
3524                 brcmf_err("bus is null pointer, exiting\n");
3525                 return;
3526         }
3527
3528         /* Count the interrupt call */
3529         bus->sdcnt.intrcount++;
3530         if (in_interrupt())
3531                 atomic_set(&bus->ipend, 1);
3532         else
3533                 if (brcmf_sdio_intr_rstatus(bus)) {
3534                         brcmf_err("failed backplane access\n");
3535                 }
3536
3537         /* Disable additional interrupts (is this needed now)? */
3538         if (!bus->intr)
3539                 brcmf_err("isr w/o interrupt configured!\n");
3540
3541         bus->dpc_triggered = true;
3542         queue_work(bus->brcmf_wq, &bus->datawork);
3543 }
3544
3545 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3546 {
3547         brcmf_dbg(TIMER, "Enter\n");
3548
3549         /* Poll period: check device if appropriate. */
3550         if (!bus->sr_enabled &&
3551             bus->poll && (++bus->polltick >= bus->pollrate)) {
3552                 u32 intstatus = 0;
3553
3554                 /* Reset poll tick */
3555                 bus->polltick = 0;
3556
3557                 /* Check device if no interrupts */
3558                 if (!bus->intr ||
3559                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3560
3561                         if (!bus->dpc_triggered) {
3562                                 u8 devpend;
3563
3564                                 sdio_claim_host(bus->sdiodev->func1);
3565                                 devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
3566                                                   SDIO_CCCR_INTx, NULL);
3567                                 sdio_release_host(bus->sdiodev->func1);
3568                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3569                                                        INTR_STATUS_FUNC2);
3570                         }
3571
3572                         /* If there is something, make like the ISR and
3573                                  schedule the DPC */
3574                         if (intstatus) {
3575                                 bus->sdcnt.pollcnt++;
3576                                 atomic_set(&bus->ipend, 1);
3577
3578                                 bus->dpc_triggered = true;
3579                                 queue_work(bus->brcmf_wq, &bus->datawork);
3580                         }
3581                 }
3582
3583                 /* Update interrupt tracking */
3584                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3585         }
3586 #ifdef DEBUG
3587         /* Poll for console output periodically */
3588         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3589             bus->console_interval != 0) {
3590                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3591                 if (bus->console.count >= bus->console_interval) {
3592                         bus->console.count -= bus->console_interval;
3593                         sdio_claim_host(bus->sdiodev->func1);
3594                         /* Make sure backplane clock is on */
3595                         brcmf_sdio_bus_sleep(bus, false, false);
3596                         if (brcmf_sdio_readconsole(bus) < 0)
3597                                 /* stop on error */
3598                                 bus->console_interval = 0;
3599                         sdio_release_host(bus->sdiodev->func1);
3600                 }
3601         }
3602 #endif                          /* DEBUG */
3603
3604         /* On idle timeout clear activity flag and/or turn off clock */
3605         if (!bus->dpc_triggered) {
3606                 rmb();
3607                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3608                     (bus->clkstate == CLK_AVAIL)) {
3609                         bus->idlecount++;
3610                         if (bus->idlecount > bus->idletime) {
3611                                 brcmf_dbg(SDIO, "idle\n");
3612                                 sdio_claim_host(bus->sdiodev->func1);
3613                                 brcmf_sdio_wd_timer(bus, false);
3614                                 bus->idlecount = 0;
3615                                 brcmf_sdio_bus_sleep(bus, true, false);
3616                                 sdio_release_host(bus->sdiodev->func1);
3617                         }
3618                 } else {
3619                         bus->idlecount = 0;
3620                 }
3621         } else {
3622                 bus->idlecount = 0;
3623         }
3624 }
3625
3626 static void brcmf_sdio_dataworker(struct work_struct *work)
3627 {
3628         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3629                                               datawork);
3630
3631         bus->dpc_running = true;
3632         wmb();
3633         while (READ_ONCE(bus->dpc_triggered)) {
3634                 bus->dpc_triggered = false;
3635                 brcmf_sdio_dpc(bus);
3636                 bus->idlecount = 0;
3637         }
3638         bus->dpc_running = false;
3639         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3640                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3641                 brcmf_sdiod_try_freeze(bus->sdiodev);
3642                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3643         }
3644 }
3645
3646 static void
3647 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3648                              struct brcmf_chip *ci, u32 drivestrength)
3649 {
3650         const struct sdiod_drive_str *str_tab = NULL;
3651         u32 str_mask;
3652         u32 str_shift;
3653         u32 i;
3654         u32 drivestrength_sel = 0;
3655         u32 cc_data_temp;
3656         u32 addr;
3657
3658         if (!(ci->cc_caps & CC_CAP_PMU))
3659                 return;
3660
3661         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3662         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3663                 str_tab = sdiod_drvstr_tab1_1v8;
3664                 str_mask = 0x00003800;
3665                 str_shift = 11;
3666                 break;
3667         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3668                 str_tab = sdiod_drvstr_tab6_1v8;
3669                 str_mask = 0x00001800;
3670                 str_shift = 11;
3671                 break;
3672         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3673                 /* note: 43143 does not support tristate */
3674                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3675                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3676                         str_tab = sdiod_drvstr_tab2_3v3;
3677                         str_mask = 0x00000007;
3678                         str_shift = 0;
3679                 } else
3680                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3681                                   ci->name, drivestrength);
3682                 break;
3683         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3684                 str_tab = sdiod_drive_strength_tab5_1v8;
3685                 str_mask = 0x00003800;
3686                 str_shift = 11;
3687                 break;
3688         default:
3689                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3690                           ci->name, ci->chiprev, ci->pmurev);
3691                 break;
3692         }
3693
3694         if (str_tab != NULL) {
3695                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3696
3697                 for (i = 0; str_tab[i].strength != 0; i++) {
3698                         if (drivestrength >= str_tab[i].strength) {
3699                                 drivestrength_sel = str_tab[i].sel;
3700                                 break;
3701                         }
3702                 }
3703                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3704                 brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
3705                 cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
3706                 cc_data_temp &= ~str_mask;
3707                 drivestrength_sel <<= str_shift;
3708                 cc_data_temp |= drivestrength_sel;
3709                 brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
3710
3711                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3712                           str_tab[i].strength, drivestrength, cc_data_temp);
3713         }
3714 }
3715
3716 static int brcmf_sdio_buscoreprep(void *ctx)
3717 {
3718         struct brcmf_sdio_dev *sdiodev = ctx;
3719         int err = 0;
3720         u8 clkval, clkset;
3721
3722         /* Try forcing SDIO core to do ALPAvail request only */
3723         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3724         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3725         if (err) {
3726                 brcmf_err("error writing for HT off\n");
3727                 return err;
3728         }
3729
3730         /* If register supported, wait for ALPAvail and then force ALP */
3731         /* This may take up to 15 milliseconds */
3732         clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3733
3734         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3735                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3736                           clkset, clkval);
3737                 return -EACCES;
3738         }
3739
3740         SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3741                                               NULL)),
3742                  !SBSDIO_ALPAV(clkval)),
3743                  PMU_MAX_TRANSITION_DLY);
3744
3745         if (!SBSDIO_ALPAV(clkval)) {
3746                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3747                           clkval);
3748                 return -EBUSY;
3749         }
3750
3751         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3752         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3753         udelay(65);
3754
3755         /* Also, disable the extra SDIO pull-ups */
3756         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3757
3758         return 0;
3759 }
3760
3761 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3762                                         u32 rstvec)
3763 {
3764         struct brcmf_sdio_dev *sdiodev = ctx;
3765         struct brcmf_core *core = sdiodev->bus->sdio_core;
3766         u32 reg_addr;
3767
3768         /* clear all interrupts */
3769         reg_addr = core->base + SD_REG(intstatus);
3770         brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3771
3772         if (rstvec)
3773                 /* Write reset vector to address 0 */
3774                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3775                                   sizeof(rstvec));
3776 }
3777
3778 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3779 {
3780         struct brcmf_sdio_dev *sdiodev = ctx;
3781         u32 val, rev;
3782
3783         val = brcmf_sdiod_readl(sdiodev, addr, NULL);
3784
3785         /*
3786          * this is a bit of special handling if reading the chipcommon chipid
3787          * register. The 4339 is a next-gen of the 4335. It uses the same
3788          * SDIO device id as 4335 and the chipid register returns 4335 as well.
3789          * It can be identified as 4339 by looking at the chip revision. It
3790          * is corrected here so the chip.c module has the right info.
3791          */
3792         if (addr == CORE_CC_REG(SI_ENUM_BASE, chipid) &&
3793             (sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4339 ||
3794              sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4335_4339)) {
3795                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3796                 if (rev >= 2) {
3797                         val &= ~CID_ID_MASK;
3798                         val |= BRCM_CC_4339_CHIP_ID;
3799                 }
3800         }
3801
3802         return val;
3803 }
3804
3805 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3806 {
3807         struct brcmf_sdio_dev *sdiodev = ctx;
3808
3809         brcmf_sdiod_writel(sdiodev, addr, val, NULL);
3810 }
3811
3812 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3813         .prepare = brcmf_sdio_buscoreprep,
3814         .activate = brcmf_sdio_buscore_activate,
3815         .read32 = brcmf_sdio_buscore_read32,
3816         .write32 = brcmf_sdio_buscore_write32,
3817 };
3818
3819 static bool
3820 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3821 {
3822         struct brcmf_sdio_dev *sdiodev;
3823         u8 clkctl = 0;
3824         int err = 0;
3825         int reg_addr;
3826         u32 reg_val;
3827         u32 drivestrength;
3828
3829         sdiodev = bus->sdiodev;
3830         sdio_claim_host(sdiodev->func1);
3831
3832         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3833                  brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
3834
3835         /*
3836          * Force PLL off until brcmf_chip_attach()
3837          * programs PLL control regs
3838          */
3839
3840         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
3841                            &err);
3842         if (!err)
3843                 clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3844                                            &err);
3845
3846         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3847                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3848                           err, BRCMF_INIT_CLKCTL1, clkctl);
3849                 goto fail;
3850         }
3851
3852         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3853         if (IS_ERR(bus->ci)) {
3854                 brcmf_err("brcmf_chip_attach failed!\n");
3855                 bus->ci = NULL;
3856                 goto fail;
3857         }
3858
3859         /* Pick up the SDIO core info struct from chip.c */
3860         bus->sdio_core   = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
3861         if (!bus->sdio_core)
3862                 goto fail;
3863
3864         /* Pick up the CHIPCOMMON core info struct, for bulk IO in bcmsdh.c */
3865         sdiodev->cc_core = brcmf_chip_get_core(bus->ci, BCMA_CORE_CHIPCOMMON);
3866         if (!sdiodev->cc_core)
3867                 goto fail;
3868
3869         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3870                                                    BRCMF_BUSTYPE_SDIO,
3871                                                    bus->ci->chip,
3872                                                    bus->ci->chiprev);
3873         if (!sdiodev->settings) {
3874                 brcmf_err("Failed to get device parameters\n");
3875                 goto fail;
3876         }
3877         /* platform specific configuration:
3878          *   alignments must be at least 4 bytes for ADMA
3879          */
3880         bus->head_align = ALIGNMENT;
3881         bus->sgentry_align = ALIGNMENT;
3882         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3883                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3884         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3885                 bus->sgentry_align =
3886                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3887
3888         /* allocate scatter-gather table. sg support
3889          * will be disabled upon allocation failure.
3890          */
3891         brcmf_sdiod_sgtable_alloc(sdiodev);
3892
3893 #ifdef CONFIG_PM_SLEEP
3894         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3895          * is true or when platform data OOB irq is true).
3896          */
3897         if ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_KEEP_POWER) &&
3898             ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_WAKE_SDIO_IRQ) ||
3899              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3900                 sdiodev->bus_if->wowl_supported = true;
3901 #endif
3902
3903         if (brcmf_sdio_kso_init(bus)) {
3904                 brcmf_err("error enabling KSO\n");
3905                 goto fail;
3906         }
3907
3908         if (sdiodev->settings->bus.sdio.drive_strength)
3909                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3910         else
3911                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3912         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3913
3914         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3915         reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3916         if (err)
3917                 goto fail;
3918
3919         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3920
3921         brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3922         if (err)
3923                 goto fail;
3924
3925         /* set PMUControl so a backplane reset does PMU state reload */
3926         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3927         reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
3928         if (err)
3929                 goto fail;
3930
3931         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3932
3933         brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
3934         if (err)
3935                 goto fail;
3936
3937         sdio_release_host(sdiodev->func1);
3938
3939         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3940
3941         /* allocate header buffer */
3942         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3943         if (!bus->hdrbuf)
3944                 return false;
3945         /* Locate an appropriately-aligned portion of hdrbuf */
3946         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3947                                     bus->head_align);
3948
3949         /* Set the poll and/or interrupt flags */
3950         bus->intr = true;
3951         bus->poll = false;
3952         if (bus->poll)
3953                 bus->pollrate = 1;
3954
3955         return true;
3956
3957 fail:
3958         sdio_release_host(sdiodev->func1);
3959         return false;
3960 }
3961
3962 static int
3963 brcmf_sdio_watchdog_thread(void *data)
3964 {
3965         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3966         int wait;
3967
3968         allow_signal(SIGTERM);
3969         /* Run until signal received */
3970         brcmf_sdiod_freezer_count(bus->sdiodev);
3971         while (1) {
3972                 if (kthread_should_stop())
3973                         break;
3974                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
3975                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
3976                 brcmf_sdiod_freezer_count(bus->sdiodev);
3977                 brcmf_sdiod_try_freeze(bus->sdiodev);
3978                 if (!wait) {
3979                         brcmf_sdio_bus_watchdog(bus);
3980                         /* Count the tick for reference */
3981                         bus->sdcnt.tickcnt++;
3982                         reinit_completion(&bus->watchdog_wait);
3983                 } else
3984                         break;
3985         }
3986         return 0;
3987 }
3988
3989 static void
3990 brcmf_sdio_watchdog(struct timer_list *t)
3991 {
3992         struct brcmf_sdio *bus = from_timer(bus, t, timer);
3993
3994         if (bus->watchdog_tsk) {
3995                 complete(&bus->watchdog_wait);
3996                 /* Reschedule the watchdog */
3997                 if (bus->wd_active)
3998                         mod_timer(&bus->timer,
3999                                   jiffies + BRCMF_WD_POLL);
4000         }
4001 }
4002
4003 static
4004 int brcmf_sdio_get_fwname(struct device *dev, const char *ext, u8 *fw_name)
4005 {
4006         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4007         struct brcmf_fw_request *fwreq;
4008         struct brcmf_fw_name fwnames[] = {
4009                 { ext, fw_name },
4010         };
4011
4012         fwreq = brcmf_fw_alloc_request(bus_if->chip, bus_if->chiprev,
4013                                        brcmf_sdio_fwnames,
4014                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4015                                        fwnames, ARRAY_SIZE(fwnames));
4016         if (!fwreq)
4017                 return -ENOMEM;
4018
4019         kfree(fwreq);
4020         return 0;
4021 }
4022
4023 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4024         .stop = brcmf_sdio_bus_stop,
4025         .preinit = brcmf_sdio_bus_preinit,
4026         .txdata = brcmf_sdio_bus_txdata,
4027         .txctl = brcmf_sdio_bus_txctl,
4028         .rxctl = brcmf_sdio_bus_rxctl,
4029         .gettxq = brcmf_sdio_bus_gettxq,
4030         .wowl_config = brcmf_sdio_wowl_config,
4031         .get_ramsize = brcmf_sdio_bus_get_ramsize,
4032         .get_memdump = brcmf_sdio_bus_get_memdump,
4033         .get_fwname = brcmf_sdio_get_fwname,
4034 };
4035
4036 #define BRCMF_SDIO_FW_CODE      0
4037 #define BRCMF_SDIO_FW_NVRAM     1
4038
4039 static void brcmf_sdio_firmware_callback(struct device *dev, int err,
4040                                          struct brcmf_fw_request *fwreq)
4041 {
4042         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4043         struct brcmf_sdio_dev *sdiod = bus_if->bus_priv.sdio;
4044         struct brcmf_sdio *bus = sdiod->bus;
4045         struct brcmf_core *core = bus->sdio_core;
4046         const struct firmware *code;
4047         void *nvram;
4048         u32 nvram_len;
4049         u8 saveclk;
4050
4051         brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
4052
4053         if (err)
4054                 goto fail;
4055
4056         code = fwreq->items[BRCMF_SDIO_FW_CODE].binary;
4057         nvram = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.data;
4058         nvram_len = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.len;
4059         kfree(fwreq);
4060
4061         /* try to download image and nvram to the dongle */
4062         bus->alp_only = true;
4063         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4064         if (err)
4065                 goto fail;
4066         bus->alp_only = false;
4067
4068         /* Start the watchdog timer */
4069         bus->sdcnt.tickcnt = 0;
4070         brcmf_sdio_wd_timer(bus, true);
4071
4072         sdio_claim_host(sdiod->func1);
4073
4074         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4075         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4076         if (bus->clkstate != CLK_AVAIL)
4077                 goto release;
4078
4079         /* Force clocks on backplane to be sure F2 interrupt propagates */
4080         saveclk = brcmf_sdiod_readb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4081         if (!err) {
4082                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4083                                    (saveclk | SBSDIO_FORCE_HT), &err);
4084         }
4085         if (err) {
4086                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4087                 goto release;
4088         }
4089
4090         /* Enable function 2 (frame transfers) */
4091         brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailboxdata),
4092                            SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, NULL);
4093
4094         err = sdio_enable_func(sdiod->func2);
4095
4096         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4097
4098         /* If F2 successfully enabled, set core and enable interrupts */
4099         if (!err) {
4100                 /* Set up the interrupt mask and enable interrupts */
4101                 bus->hostintmask = HOSTINTMASK;
4102                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(hostintmask),
4103                                    bus->hostintmask, NULL);
4104
4105
4106                 brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK, 8, &err);
4107         } else {
4108                 /* Disable F2 again */
4109                 sdio_disable_func(sdiod->func2);
4110                 goto release;
4111         }
4112
4113         if (brcmf_chip_sr_capable(bus->ci)) {
4114                 brcmf_sdio_sr_init(bus);
4115         } else {
4116                 /* Restore previous clock setting */
4117                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4118                                    saveclk, &err);
4119         }
4120
4121         if (err == 0) {
4122                 /* Allow full data communication using DPC from now on. */
4123                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4124
4125                 err = brcmf_sdiod_intr_register(sdiod);
4126                 if (err != 0)
4127                         brcmf_err("intr register failed:%d\n", err);
4128         }
4129
4130         /* If we didn't come up, turn off backplane clock */
4131         if (err != 0)
4132                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4133
4134         sdio_release_host(sdiod->func1);
4135
4136         /* Assign bus interface call back */
4137         sdiod->bus_if->dev = sdiod->dev;
4138         sdiod->bus_if->ops = &brcmf_sdio_bus_ops;
4139         sdiod->bus_if->chip = bus->ci->chip;
4140         sdiod->bus_if->chiprev = bus->ci->chiprev;
4141
4142         /* Attach to the common layer, reserve hdr space */
4143         err = brcmf_attach(sdiod->dev, sdiod->settings);
4144         if (err != 0) {
4145                 brcmf_err("brcmf_attach failed\n");
4146                 goto fail;
4147         }
4148
4149         /* ready */
4150         return;
4151
4152 release:
4153         sdio_release_host(sdiod->func1);
4154 fail:
4155         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4156         device_release_driver(&sdiod->func2->dev);
4157         device_release_driver(dev);
4158 }
4159
4160 static struct brcmf_fw_request *
4161 brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus)
4162 {
4163         struct brcmf_fw_request *fwreq;
4164         struct brcmf_fw_name fwnames[] = {
4165                 { ".bin", bus->sdiodev->fw_name },
4166                 { ".txt", bus->sdiodev->nvram_name },
4167         };
4168
4169         fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
4170                                        brcmf_sdio_fwnames,
4171                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4172                                        fwnames, ARRAY_SIZE(fwnames));
4173         if (!fwreq)
4174                 return NULL;
4175
4176         fwreq->items[BRCMF_SDIO_FW_CODE].type = BRCMF_FW_TYPE_BINARY;
4177         fwreq->items[BRCMF_SDIO_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM;
4178
4179         return fwreq;
4180 }
4181
4182 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4183 {
4184         int ret;
4185         struct brcmf_sdio *bus;
4186         struct workqueue_struct *wq;
4187         struct brcmf_fw_request *fwreq;
4188
4189         brcmf_dbg(TRACE, "Enter\n");
4190
4191         /* Allocate private bus interface state */
4192         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4193         if (!bus)
4194                 goto fail;
4195
4196         bus->sdiodev = sdiodev;
4197         sdiodev->bus = bus;
4198         skb_queue_head_init(&bus->glom);
4199         bus->txbound = BRCMF_TXBOUND;
4200         bus->rxbound = BRCMF_RXBOUND;
4201         bus->txminmax = BRCMF_TXMINMAX;
4202         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4203
4204         /* single-threaded workqueue */
4205         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4206                                      dev_name(&sdiodev->func1->dev));
4207         if (!wq) {
4208                 brcmf_err("insufficient memory to create txworkqueue\n");
4209                 goto fail;
4210         }
4211         brcmf_sdiod_freezer_count(sdiodev);
4212         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4213         bus->brcmf_wq = wq;
4214
4215         /* attempt to attach to the dongle */
4216         if (!(brcmf_sdio_probe_attach(bus))) {
4217                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4218                 goto fail;
4219         }
4220
4221         spin_lock_init(&bus->rxctl_lock);
4222         spin_lock_init(&bus->txq_lock);
4223         init_waitqueue_head(&bus->ctrl_wait);
4224         init_waitqueue_head(&bus->dcmd_resp_wait);
4225
4226         /* Set up the watchdog timer */
4227         timer_setup(&bus->timer, brcmf_sdio_watchdog, 0);
4228         /* Initialize watchdog thread */
4229         init_completion(&bus->watchdog_wait);
4230         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4231                                         bus, "brcmf_wdog/%s",
4232                                         dev_name(&sdiodev->func1->dev));
4233         if (IS_ERR(bus->watchdog_tsk)) {
4234                 pr_warn("brcmf_watchdog thread failed to start\n");
4235                 bus->watchdog_tsk = NULL;
4236         }
4237         /* Initialize DPC thread */
4238         bus->dpc_triggered = false;
4239         bus->dpc_running = false;
4240
4241         /* default sdio bus header length for tx packet */
4242         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4243
4244         /* Query the F2 block size, set roundup accordingly */
4245         bus->blocksize = bus->sdiodev->func2->cur_blksize;
4246         bus->roundup = min(max_roundup, bus->blocksize);
4247
4248         sdio_claim_host(bus->sdiodev->func1);
4249
4250         /* Disable F2 to clear any intermediate frame state on the dongle */
4251         sdio_disable_func(bus->sdiodev->func2);
4252
4253         bus->rxflow = false;
4254
4255         /* Done with backplane-dependent accesses, can drop clock... */
4256         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4257
4258         sdio_release_host(bus->sdiodev->func1);
4259
4260         /* ...and initialize clock/power states */
4261         bus->clkstate = CLK_SDONLY;
4262         bus->idletime = BRCMF_IDLE_INTERVAL;
4263         bus->idleclock = BRCMF_IDLE_ACTIVE;
4264
4265         /* SR state */
4266         bus->sr_enabled = false;
4267
4268         brcmf_dbg(INFO, "completed!!\n");
4269
4270         fwreq = brcmf_sdio_prepare_fw_request(bus);
4271         if (!fwreq) {
4272                 ret = -ENOMEM;
4273                 goto fail;
4274         }
4275
4276         ret = brcmf_fw_get_firmwares(sdiodev->dev, fwreq,
4277                                      brcmf_sdio_firmware_callback);
4278         if (ret != 0) {
4279                 brcmf_err("async firmware request failed: %d\n", ret);
4280                 kfree(fwreq);
4281                 goto fail;
4282         }
4283
4284         return bus;
4285
4286 fail:
4287         brcmf_sdio_remove(bus);
4288         return NULL;
4289 }
4290
4291 /* Detach and free everything */
4292 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4293 {
4294         brcmf_dbg(TRACE, "Enter\n");
4295
4296         if (bus) {
4297                 /* De-register interrupt handler */
4298                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4299
4300                 brcmf_detach(bus->sdiodev->dev);
4301
4302                 cancel_work_sync(&bus->datawork);
4303                 if (bus->brcmf_wq)
4304                         destroy_workqueue(bus->brcmf_wq);
4305
4306                 if (bus->ci) {
4307                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4308                                 sdio_claim_host(bus->sdiodev->func1);
4309                                 brcmf_sdio_wd_timer(bus, false);
4310                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4311                                 /* Leave the device in state where it is
4312                                  * 'passive'. This is done by resetting all
4313                                  * necessary cores.
4314                                  */
4315                                 msleep(20);
4316                                 brcmf_chip_set_passive(bus->ci);
4317                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4318                                 sdio_release_host(bus->sdiodev->func1);
4319                         }
4320                         brcmf_chip_detach(bus->ci);
4321                 }
4322                 if (bus->sdiodev->settings)
4323                         brcmf_release_module_param(bus->sdiodev->settings);
4324
4325                 kfree(bus->rxbuf);
4326                 kfree(bus->hdrbuf);
4327                 kfree(bus);
4328         }
4329
4330         brcmf_dbg(TRACE, "Disconnected\n");
4331 }
4332
4333 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4334 {
4335         /* Totally stop the timer */
4336         if (!active && bus->wd_active) {
4337                 del_timer_sync(&bus->timer);
4338                 bus->wd_active = false;
4339                 return;
4340         }
4341
4342         /* don't start the wd until fw is loaded */
4343         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4344                 return;
4345
4346         if (active) {
4347                 if (!bus->wd_active) {
4348                         /* Create timer again when watchdog period is
4349                            dynamically changed or in the first instance
4350                          */
4351                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4352                         add_timer(&bus->timer);
4353                         bus->wd_active = true;
4354                 } else {
4355                         /* Re arm the timer, at last watchdog period */
4356                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4357                 }
4358         }
4359 }
4360
4361 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4362 {
4363         int ret;
4364
4365         sdio_claim_host(bus->sdiodev->func1);
4366         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4367         sdio_release_host(bus->sdiodev->func1);
4368
4369         return ret;
4370 }
4371