2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/delay.h>
21 #include "../mt76x02_phy.h"
24 mt76x2_phy_tssi_init_cal(struct mt76x02_dev *dev)
26 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
29 if (!mt76x2_tssi_enabled(dev))
32 if (mt76x2_channel_silent(dev))
35 if (chan->band == NL80211_BAND_5GHZ)
38 if (mt76x02_ext_pa_enabled(dev, chan->band))
41 mt76x02_mcu_calibrate(dev, MCU_CAL_TSSI, flag, true);
42 dev->cal.tssi_cal_done = true;
47 mt76x2_phy_channel_calibrate(struct mt76x02_dev *dev, bool mac_stopped)
49 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
50 bool is_5ghz = chan->band == NL80211_BAND_5GHZ;
52 if (dev->cal.channel_cal_done)
55 if (mt76x2_channel_silent(dev))
58 if (!dev->cal.tssi_cal_done)
59 mt76x2_phy_tssi_init_cal(dev);
62 mt76x2_mac_stop(dev, false);
65 mt76x02_mcu_calibrate(dev, MCU_CAL_LC, 0, true);
67 mt76x02_mcu_calibrate(dev, MCU_CAL_TX_LOFT, is_5ghz, true);
68 mt76x02_mcu_calibrate(dev, MCU_CAL_TXIQ, is_5ghz, true);
69 mt76x02_mcu_calibrate(dev, MCU_CAL_RXIQC_FI, is_5ghz, true);
70 mt76x02_mcu_calibrate(dev, MCU_CAL_TEMP_SENSOR, 0, true);
71 mt76x02_mcu_calibrate(dev, MCU_CAL_TX_SHAPING, 0, true);
74 mt76x2_mac_resume(dev);
76 mt76x2_apply_gain_adj(dev);
78 dev->cal.channel_cal_done = true;
81 void mt76x2_phy_set_antenna(struct mt76x02_dev *dev)
85 val = mt76_rr(dev, MT_BBP(AGC, 0));
86 val &= ~(BIT(4) | BIT(1));
87 switch (dev->mt76.antenna_mask) {
89 /* disable mac DAC control */
90 mt76_clear(dev, MT_BBP(IBI, 9), BIT(11));
91 mt76_clear(dev, MT_BBP(TXBE, 5), 3);
92 mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0x3);
93 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 2);
95 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 4);
97 val &= ~(BIT(3) | BIT(0));
100 /* disable mac DAC control */
101 mt76_clear(dev, MT_BBP(IBI, 9), BIT(11));
102 mt76_rmw_field(dev, MT_BBP(TXBE, 5), 3, 1);
103 mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0xc);
104 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 1);
106 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 1);
113 /* enable mac DAC control */
114 mt76_set(dev, MT_BBP(IBI, 9), BIT(11));
115 mt76_set(dev, MT_BBP(TXBE, 5), 3);
116 mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0xf);
117 mt76_clear(dev, MT_BBP(CORE, 32), GENMASK(21, 20));
118 mt76_clear(dev, MT_BBP(CORE, 33), GENMASK(12, 9));
124 mt76_wr(dev, MT_BBP(AGC, 0), val);
128 mt76x2_get_agc_gain(struct mt76x02_dev *dev, u8 *dest)
130 dest[0] = mt76_get_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN);
131 dest[1] = mt76_get_field(dev, MT_BBP(AGC, 9), MT_BBP_AGC_GAIN);
135 mt76x2_phy_set_gain_val(struct mt76x02_dev *dev)
140 gain_val[0] = dev->cal.agc_gain_cur[0] - dev->cal.agc_gain_adjust;
141 gain_val[1] = dev->cal.agc_gain_cur[1] - dev->cal.agc_gain_adjust;
143 if (dev->mt76.chandef.width >= NL80211_CHAN_WIDTH_40)
150 mt76_wr(dev, MT_BBP(AGC, 8),
151 val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[0]));
152 mt76_wr(dev, MT_BBP(AGC, 9),
153 val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[1]));
155 if (dev->mt76.chandef.chan->flags & IEEE80211_CHAN_RADAR)
156 mt76x2_dfs_adjust_agc(dev);
160 mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev)
162 u8 *gain = dev->cal.agc_gain_init;
163 u8 low_gain_delta, gain_delta;
168 dev->cal.avg_rssi_all = mt76x02_phy_get_min_avg_rssi(dev);
170 low_gain = (dev->cal.avg_rssi_all > mt76x02_get_rssi_gain_thresh(dev)) +
171 (dev->cal.avg_rssi_all > mt76x02_get_low_rssi_gain_thresh(dev));
173 gain_change = (dev->cal.low_gain & 2) ^ (low_gain & 2);
174 dev->cal.low_gain = low_gain;
177 if (mt76x02_phy_adjust_vga_gain(dev))
178 mt76x2_phy_set_gain_val(dev);
182 if (dev->mt76.chandef.width == NL80211_CHAN_WIDTH_80) {
183 mt76_wr(dev, MT_BBP(RXO, 14), 0x00560211);
184 val = mt76_rr(dev, MT_BBP(AGC, 26)) & ~0xf;
189 mt76_wr(dev, MT_BBP(AGC, 26), val);
191 mt76_wr(dev, MT_BBP(RXO, 14), 0x00560423);
194 if (mt76x2_has_ext_lna(dev))
200 mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a990);
201 mt76_wr(dev, MT_BBP(AGC, 35), 0x08080808);
202 mt76_wr(dev, MT_BBP(AGC, 37), 0x08080808);
203 gain_delta = low_gain_delta;
204 dev->cal.agc_gain_adjust = 0;
206 mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a991);
207 if (dev->mt76.chandef.width == NL80211_CHAN_WIDTH_80)
208 mt76_wr(dev, MT_BBP(AGC, 35), 0x10101014);
210 mt76_wr(dev, MT_BBP(AGC, 35), 0x11111116);
211 mt76_wr(dev, MT_BBP(AGC, 37), 0x2121262C);
213 dev->cal.agc_gain_adjust = low_gain_delta;
216 dev->cal.agc_gain_cur[0] = gain[0] - gain_delta;
217 dev->cal.agc_gain_cur[1] = gain[1] - gain_delta;
218 mt76x2_phy_set_gain_val(dev);
220 /* clear false CCA counters */
221 mt76_rr(dev, MT_RX_STAT_1);
224 int mt76x2_phy_set_channel(struct mt76x02_dev *dev,
225 struct cfg80211_chan_def *chandef)
227 struct ieee80211_channel *chan = chandef->chan;
228 bool scan = test_bit(MT76_SCANNING, &dev->mt76.state);
229 enum nl80211_band band = chan->band;
232 u32 ext_cca_chan[4] = {
233 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |
234 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) |
235 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |
236 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |
237 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)),
238 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) |
239 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) |
240 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |
241 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |
242 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)),
243 [2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) |
244 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) |
245 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |
246 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |
247 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(2)),
248 [3] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 3) |
249 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 2) |
250 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |
251 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |
252 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(3)),
259 dev->cal.channel_cal_done = false;
260 freq = chandef->chan->center_freq;
261 freq1 = chandef->center_freq1;
262 channel = chan->hw_value;
264 switch (chandef->width) {
265 case NL80211_CHAN_WIDTH_40:
274 channel += 2 - ch_group_index * 4;
276 case NL80211_CHAN_WIDTH_80:
277 ch_group_index = (freq - freq1 + 30) / 20;
278 if (WARN_ON(ch_group_index < 0 || ch_group_index > 3))
281 bw_index = ch_group_index;
282 channel += 6 - ch_group_index * 4;
291 mt76x2_read_rx_gain(dev);
292 mt76x2_phy_set_txpower_regs(dev, band);
293 mt76x2_configure_tx_delay(dev, band, bw);
294 mt76x2_phy_set_txpower(dev);
296 mt76x02_phy_set_band(dev, chan->band, ch_group_index & 1);
297 mt76x02_phy_set_bw(dev, chandef->width, ch_group_index);
299 mt76_rmw(dev, MT_EXT_CCA_CFG,
300 (MT_EXT_CCA_CFG_CCA0 |
301 MT_EXT_CCA_CFG_CCA1 |
302 MT_EXT_CCA_CFG_CCA2 |
303 MT_EXT_CCA_CFG_CCA3 |
304 MT_EXT_CCA_CFG_CCA_MASK),
305 ext_cca_chan[ch_group_index]);
307 ret = mt76x2_mcu_set_channel(dev, channel, bw, bw_index, scan);
311 mt76x2_mcu_init_gain(dev, channel, dev->cal.rx.mcu_gain, true);
313 mt76x2_phy_set_antenna(dev);
316 if (mt76xx_rev(dev) >= MT76XX_REV_E3)
317 mt76_set(dev, MT_BBP(RXO, 13), BIT(10));
319 if (!dev->cal.init_cal_done) {
320 u8 val = mt76x02_eeprom_get(dev, MT_EE_BT_RCAL_RESULT);
323 mt76x02_mcu_calibrate(dev, MCU_CAL_R, 0, true);
326 mt76x02_mcu_calibrate(dev, MCU_CAL_RXDCOC, channel, true);
328 /* Rx LPF calibration */
329 if (!dev->cal.init_cal_done)
330 mt76x02_mcu_calibrate(dev, MCU_CAL_RC, 0, true);
332 dev->cal.init_cal_done = true;
334 mt76_wr(dev, MT_BBP(AGC, 61), 0xFF64A4E2);
335 mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010);
336 mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404);
337 mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070);
338 mt76_wr(dev, MT_TXOP_CTRL_CFG, 0x04101B3F);
343 dev->cal.low_gain = -1;
344 mt76x2_phy_channel_calibrate(dev, true);
345 mt76x2_get_agc_gain(dev, dev->cal.agc_gain_init);
346 memcpy(dev->cal.agc_gain_cur, dev->cal.agc_gain_init,
347 sizeof(dev->cal.agc_gain_cur));
349 /* init default values for temp compensation */
350 if (mt76x2_tssi_enabled(dev)) {
351 mt76_rmw_field(dev, MT_TX_ALC_CFG_1, MT_TX_ALC_CFG_1_TEMP_COMP,
353 mt76_rmw_field(dev, MT_TX_ALC_CFG_2, MT_TX_ALC_CFG_2_TEMP_COMP,
357 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
358 MT_CALIBRATE_INTERVAL);
364 mt76x2_phy_temp_compensate(struct mt76x02_dev *dev)
366 struct mt76x2_temp_comp t;
369 if (mt76x2_get_temp_comp(dev, &t))
372 temp = mt76_get_field(dev, MT_TEMP_SENSOR, MT_TEMP_SENSOR_VAL);
373 temp -= t.temp_25_ref;
374 temp = (temp * 1789) / 1000 + 25;
375 dev->cal.temp = temp;
378 db_diff = (temp - 25) / t.high_slope;
380 db_diff = (25 - temp) / t.low_slope;
382 db_diff = min(db_diff, t.upper_bound);
383 db_diff = max(db_diff, t.lower_bound);
385 mt76_rmw_field(dev, MT_TX_ALC_CFG_1, MT_TX_ALC_CFG_1_TEMP_COMP,
387 mt76_rmw_field(dev, MT_TX_ALC_CFG_2, MT_TX_ALC_CFG_2_TEMP_COMP,
391 void mt76x2_phy_calibrate(struct work_struct *work)
393 struct mt76x02_dev *dev;
395 dev = container_of(work, struct mt76x02_dev, cal_work.work);
396 mt76x2_phy_channel_calibrate(dev, false);
397 mt76x2_phy_tssi_compensate(dev, true);
398 mt76x2_phy_temp_compensate(dev);
399 mt76x2_phy_update_channel_gain(dev);
400 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
401 MT_CALIBRATE_INTERVAL);
404 int mt76x2_phy_start(struct mt76x02_dev *dev)
408 ret = mt76x02_mcu_set_radio_state(dev, true, true);
412 mt76x2_mcu_load_cr(dev, MT_RF_BBP_CR, 0, 0);