2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 #include "mt76x02_dma.h"
21 mt76x2_init_tx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
26 q->regs = dev->mt76.mmio.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
30 ret = mt76_queue_alloc(dev, q);
34 mt76x2_irq_enable(dev, MT_INT_TX_DONE(idx));
40 mt76x2_init_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
41 int idx, int n_desc, int bufsize)
45 q->regs = dev->mt76.mmio.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
47 q->buf_size = bufsize;
49 ret = mt76_queue_alloc(dev, q);
53 mt76x2_irq_enable(dev, MT_INT_RX_DONE(idx));
59 mt76x2_tx_tasklet(unsigned long data)
61 struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
64 mt76x2_mac_process_tx_status_fifo(dev);
66 for (i = MT_TXQ_MCU; i >= 0; i--)
67 mt76_queue_tx_cleanup(dev, i, false);
69 mt76x2_mac_poll_tx_status(dev, false);
70 mt76x2_irq_enable(dev, MT_INT_TX_DONE_ALL);
73 int mt76x2_dma_init(struct mt76x2_dev *dev)
77 struct mt76_txwi_cache __maybe_unused *t;
80 BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x02_txwi));
81 BUILD_BUG_ON(sizeof(struct mt76x02_rxwi) > MT_RX_HEADROOM);
83 mt76_dma_attach(&dev->mt76);
85 tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long) dev);
87 mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
89 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
90 ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i],
91 mt76_ac_to_hwq(i), MT_TX_RING_SIZE);
96 ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
97 MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
101 ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
102 MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
106 ret = mt76x2_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
107 MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
111 q = &dev->mt76.q_rx[MT_RXQ_MAIN];
112 q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x02_rxwi);
113 ret = mt76x2_init_rx_queue(dev, q, 0, MT76x2_RX_RING_SIZE, MT_RX_BUF_SIZE);
117 return mt76_init_queues(dev);
120 void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
122 tasklet_kill(&dev->tx_tasklet);
123 mt76_dma_cleanup(&dev->mt76);