2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/module.h>
18 #include <asm/unaligned.h>
20 #include "mt76x2_eeprom.h"
22 #define EE_FIELD(_name, _value) [MT_EE_##_name] = (_value) | 1
25 mt76x2_eeprom_copy(struct mt76x2_dev *dev, enum mt76x02_eeprom_field field,
28 if (field + len > dev->mt76.eeprom.size)
31 memcpy(dest, dev->mt76.eeprom.data + field, len);
36 mt76x2_eeprom_get_macaddr(struct mt76x2_dev *dev)
38 void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR;
40 memcpy(dev->mt76.macaddr, src, ETH_ALEN);
45 mt76x2_has_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
47 u16 *efuse_w = (u16 *) efuse;
49 if (efuse_w[MT_EE_NIC_CONF_0] != 0)
52 if (efuse_w[MT_EE_XTAL_TRIM_1] == 0xffff)
55 if (efuse_w[MT_EE_TX_POWER_DELTA_BW40] != 0)
58 if (efuse_w[MT_EE_TX_POWER_0_START_2G] == 0xffff)
61 if (efuse_w[MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA] != 0)
64 if (efuse_w[MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE] == 0xffff)
71 mt76x2_apply_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
73 #define GROUP_5G(_id) \
74 MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
75 MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1, \
76 MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
77 MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1
79 static const u8 cal_free_bytes[] = {
81 MT_EE_TX_POWER_EXT_PA_5G + 1,
82 MT_EE_TX_POWER_0_START_2G,
83 MT_EE_TX_POWER_0_START_2G + 1,
84 MT_EE_TX_POWER_1_START_2G,
85 MT_EE_TX_POWER_1_START_2G + 1,
92 MT_EE_RF_2G_TSSI_OFF_TXPOWER,
93 MT_EE_RF_2G_RX_HIGH_GAIN + 1,
94 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN,
95 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN + 1,
96 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN,
97 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN + 1,
98 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN,
99 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN + 1,
101 u8 *eeprom = dev->mt76.eeprom.data;
103 eeprom[MT_EE_TX_POWER_0_START_5G],
104 eeprom[MT_EE_TX_POWER_0_START_5G + 1],
105 eeprom[MT_EE_TX_POWER_1_START_5G],
106 eeprom[MT_EE_TX_POWER_1_START_5G + 1]
111 if (!mt76x2_has_cal_free_data(dev, efuse))
114 for (i = 0; i < ARRAY_SIZE(cal_free_bytes); i++) {
115 int offset = cal_free_bytes[i];
117 eeprom[offset] = efuse[offset];
120 if (!(efuse[MT_EE_TX_POWER_0_START_5G] |
121 efuse[MT_EE_TX_POWER_0_START_5G + 1]))
122 memcpy(eeprom + MT_EE_TX_POWER_0_START_5G, prev_grp0, 2);
123 if (!(efuse[MT_EE_TX_POWER_1_START_5G] |
124 efuse[MT_EE_TX_POWER_1_START_5G + 1]))
125 memcpy(eeprom + MT_EE_TX_POWER_1_START_5G, prev_grp0 + 2, 2);
127 val = get_unaligned_le16(efuse + MT_EE_BT_RCAL_RESULT);
129 eeprom[MT_EE_BT_RCAL_RESULT] = val & 0xff;
131 val = get_unaligned_le16(efuse + MT_EE_BT_VCDL_CALIBRATION);
133 eeprom[MT_EE_BT_VCDL_CALIBRATION + 1] = val >> 8;
135 val = get_unaligned_le16(efuse + MT_EE_BT_PMUCFG);
137 eeprom[MT_EE_BT_PMUCFG] = val & 0xff;
140 static int mt76x2_check_eeprom(struct mt76x2_dev *dev)
142 u16 val = get_unaligned_le16(dev->mt76.eeprom.data);
145 val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID);
152 dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val);
158 mt76x2_eeprom_load(struct mt76x2_dev *dev)
164 ret = mt76_eeprom_init(&dev->mt76, MT7662_EEPROM_SIZE);
170 found = !mt76x2_check_eeprom(dev);
172 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, MT7662_EEPROM_SIZE,
174 dev->mt76.otp.size = MT7662_EEPROM_SIZE;
175 if (!dev->mt76.otp.data)
178 efuse = dev->mt76.otp.data;
180 if (mt76x02_get_efuse_data(&dev->mt76, 0, efuse,
181 MT7662_EEPROM_SIZE, MT_EE_READ))
185 mt76x2_apply_cal_free_data(dev, efuse);
187 /* FIXME: check if efuse data is complete */
189 memcpy(dev->mt76.eeprom.data, efuse, MT7662_EEPROM_SIZE);
200 mt76x2_set_rx_gain_group(struct mt76x2_dev *dev, u8 val)
202 s8 *dest = dev->cal.rx.high_gain;
204 if (!mt76x02_field_valid(val)) {
210 dest[0] = mt76x02_sign_extend(val, 4);
211 dest[1] = mt76x02_sign_extend(val >> 4, 4);
215 mt76x2_set_rssi_offset(struct mt76x2_dev *dev, int chain, u8 val)
217 s8 *dest = dev->cal.rx.rssi_offset;
219 if (!mt76x02_field_valid(val)) {
224 dest[chain] = mt76x02_sign_extend_optional(val, 7);
227 static enum mt76x2_cal_channel_group
228 mt76x2_get_cal_channel_group(int channel)
230 if (channel >= 184 && channel <= 196)
231 return MT_CH_5G_JAPAN;
233 return MT_CH_5G_UNII_1;
235 return MT_CH_5G_UNII_2;
237 return MT_CH_5G_UNII_2E_1;
239 return MT_CH_5G_UNII_2E_2;
240 return MT_CH_5G_UNII_3;
244 mt76x2_get_5g_rx_gain(struct mt76x2_dev *dev, u8 channel)
246 enum mt76x2_cal_channel_group group;
248 group = mt76x2_get_cal_channel_group(channel);
251 return mt76x02_eeprom_get(&dev->mt76,
252 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN);
253 case MT_CH_5G_UNII_1:
254 return mt76x02_eeprom_get(&dev->mt76,
255 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN) >> 8;
256 case MT_CH_5G_UNII_2:
257 return mt76x02_eeprom_get(&dev->mt76,
258 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN);
259 case MT_CH_5G_UNII_2E_1:
260 return mt76x02_eeprom_get(&dev->mt76,
261 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN) >> 8;
262 case MT_CH_5G_UNII_2E_2:
263 return mt76x02_eeprom_get(&dev->mt76,
264 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN);
266 return mt76x02_eeprom_get(&dev->mt76,
267 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN) >> 8;
271 void mt76x2_read_rx_gain(struct mt76x2_dev *dev)
273 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
274 int channel = chan->hw_value;
275 s8 lna_5g[3], lna_2g;
279 if (chan->band == NL80211_BAND_2GHZ)
280 val = mt76x02_eeprom_get(&dev->mt76,
281 MT_EE_RF_2G_RX_HIGH_GAIN) >> 8;
283 val = mt76x2_get_5g_rx_gain(dev, channel);
285 mt76x2_set_rx_gain_group(dev, val);
287 mt76x02_get_rx_gain(&dev->mt76, chan->band, &val, &lna_2g, lna_5g);
288 mt76x2_set_rssi_offset(dev, 0, val);
289 mt76x2_set_rssi_offset(dev, 1, val >> 8);
291 dev->cal.rx.mcu_gain = (lna_2g & 0xff);
292 dev->cal.rx.mcu_gain |= (lna_5g[0] & 0xff) << 8;
293 dev->cal.rx.mcu_gain |= (lna_5g[1] & 0xff) << 16;
294 dev->cal.rx.mcu_gain |= (lna_5g[2] & 0xff) << 24;
296 lna = mt76x02_get_lna_gain(&dev->mt76, &lna_2g, lna_5g, chan);
297 dev->cal.rx.lna_gain = mt76x02_sign_extend(lna, 8);
299 EXPORT_SYMBOL_GPL(mt76x2_read_rx_gain);
301 void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
302 struct ieee80211_channel *chan)
307 is_5ghz = chan->band == NL80211_BAND_5GHZ;
309 memset(t, 0, sizeof(*t));
311 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_CCK);
312 t->cck[0] = t->cck[1] = mt76x02_rate_power_val(val);
313 t->cck[2] = t->cck[3] = mt76x02_rate_power_val(val >> 8);
316 val = mt76x02_eeprom_get(&dev->mt76,
317 MT_EE_TX_POWER_OFDM_5G_6M);
319 val = mt76x02_eeprom_get(&dev->mt76,
320 MT_EE_TX_POWER_OFDM_2G_6M);
321 t->ofdm[0] = t->ofdm[1] = mt76x02_rate_power_val(val);
322 t->ofdm[2] = t->ofdm[3] = mt76x02_rate_power_val(val >> 8);
325 val = mt76x02_eeprom_get(&dev->mt76,
326 MT_EE_TX_POWER_OFDM_5G_24M);
328 val = mt76x02_eeprom_get(&dev->mt76,
329 MT_EE_TX_POWER_OFDM_2G_24M);
330 t->ofdm[4] = t->ofdm[5] = mt76x02_rate_power_val(val);
331 t->ofdm[6] = t->ofdm[7] = mt76x02_rate_power_val(val >> 8);
333 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_HT_MCS0);
334 t->ht[0] = t->ht[1] = mt76x02_rate_power_val(val);
335 t->ht[2] = t->ht[3] = mt76x02_rate_power_val(val >> 8);
337 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_HT_MCS4);
338 t->ht[4] = t->ht[5] = mt76x02_rate_power_val(val);
339 t->ht[6] = t->ht[7] = mt76x02_rate_power_val(val >> 8);
341 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_HT_MCS8);
342 t->ht[8] = t->ht[9] = mt76x02_rate_power_val(val);
343 t->ht[10] = t->ht[11] = mt76x02_rate_power_val(val >> 8);
345 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_HT_MCS12);
346 t->ht[12] = t->ht[13] = mt76x02_rate_power_val(val);
347 t->ht[14] = t->ht[15] = mt76x02_rate_power_val(val >> 8);
349 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_VHT_MCS0);
350 t->vht[0] = t->vht[1] = mt76x02_rate_power_val(val);
351 t->vht[2] = t->vht[3] = mt76x02_rate_power_val(val >> 8);
353 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_VHT_MCS4);
354 t->vht[4] = t->vht[5] = mt76x02_rate_power_val(val);
355 t->vht[6] = t->vht[7] = mt76x02_rate_power_val(val >> 8);
357 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_VHT_MCS8);
360 t->vht[8] = t->vht[9] = mt76x02_rate_power_val(val >> 8);
362 memcpy(t->stbc, t->ht, sizeof(t->stbc[0]) * 8);
363 t->stbc[8] = t->vht[8];
364 t->stbc[9] = t->vht[9];
366 EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
369 mt76x2_get_power_info_2g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
370 struct ieee80211_channel *chan, int chain, int offset)
372 int channel = chan->hw_value;
379 else if (channel < 11)
384 mt76x2_eeprom_copy(dev, offset, data, sizeof(data));
386 t->chain[chain].tssi_slope = data[0];
387 t->chain[chain].tssi_offset = data[1];
388 t->chain[chain].target_power = data[2];
389 t->chain[chain].delta = mt76x02_sign_extend_optional(data[delta_idx], 7);
391 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_RF_2G_TSSI_OFF_TXPOWER);
392 t->target_power = val >> 8;
396 mt76x2_get_power_info_5g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
397 struct ieee80211_channel *chan, int chain, int offset)
399 int channel = chan->hw_value;
400 enum mt76x2_cal_channel_group group;
405 group = mt76x2_get_cal_channel_group(channel);
406 offset += group * MT_TX_POWER_GROUP_SIZE_5G;
410 else if (channel >= 184)
412 else if (channel < 44)
414 else if (channel < 52)
416 else if (channel < 58)
418 else if (channel < 98)
420 else if (channel < 106)
422 else if (channel < 116)
424 else if (channel < 130)
426 else if (channel < 149)
428 else if (channel < 157)
433 mt76x2_eeprom_copy(dev, offset, data, sizeof(data));
435 t->chain[chain].tssi_slope = data[0];
436 t->chain[chain].tssi_offset = data[1];
437 t->chain[chain].target_power = data[2];
438 t->chain[chain].delta = mt76x02_sign_extend_optional(data[delta_idx], 7);
440 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_RF_2G_RX_HIGH_GAIN);
441 t->target_power = val & 0xff;
444 void mt76x2_get_power_info(struct mt76x2_dev *dev,
445 struct mt76x2_tx_power_info *t,
446 struct ieee80211_channel *chan)
450 memset(t, 0, sizeof(*t));
452 bw40 = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_DELTA_BW40);
453 bw80 = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_DELTA_BW80);
455 if (chan->band == NL80211_BAND_5GHZ) {
457 mt76x2_get_power_info_5g(dev, t, chan, 0,
458 MT_EE_TX_POWER_0_START_5G);
459 mt76x2_get_power_info_5g(dev, t, chan, 1,
460 MT_EE_TX_POWER_1_START_5G);
462 mt76x2_get_power_info_2g(dev, t, chan, 0,
463 MT_EE_TX_POWER_0_START_2G);
464 mt76x2_get_power_info_2g(dev, t, chan, 1,
465 MT_EE_TX_POWER_1_START_2G);
468 if (mt76x02_tssi_enabled(&dev->mt76) ||
469 !mt76x02_field_valid(t->target_power))
470 t->target_power = t->chain[0].target_power;
472 t->delta_bw40 = mt76x02_rate_power_val(bw40);
473 t->delta_bw80 = mt76x02_rate_power_val(bw80);
475 EXPORT_SYMBOL_GPL(mt76x2_get_power_info);
477 int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t)
479 enum nl80211_band band = dev->mt76.chandef.chan->band;
483 memset(t, 0, sizeof(*t));
485 if (!mt76x02_temp_tx_alc_enabled(&dev->mt76))
488 if (!mt76x02_ext_pa_enabled(&dev->mt76, band))
491 val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_EXT_PA_5G) >> 8;
492 t->temp_25_ref = val & 0x7f;
493 if (band == NL80211_BAND_5GHZ) {
494 slope = mt76x02_eeprom_get(&dev->mt76,
495 MT_EE_RF_TEMP_COMP_SLOPE_5G);
496 bounds = mt76x02_eeprom_get(&dev->mt76,
497 MT_EE_TX_POWER_EXT_PA_5G);
499 slope = mt76x02_eeprom_get(&dev->mt76,
500 MT_EE_RF_TEMP_COMP_SLOPE_2G);
501 bounds = mt76x02_eeprom_get(&dev->mt76,
502 MT_EE_TX_POWER_DELTA_BW80) >> 8;
505 t->high_slope = slope & 0xff;
506 t->low_slope = slope >> 8;
507 t->lower_bound = 0 - (bounds & 0xf);
508 t->upper_bound = (bounds >> 4) & 0xf;
512 EXPORT_SYMBOL_GPL(mt76x2_get_temp_comp);
514 int mt76x2_eeprom_init(struct mt76x2_dev *dev)
518 ret = mt76x2_eeprom_load(dev);
522 mt76x02_eeprom_parse_hw_cap(&dev->mt76);
523 mt76x2_eeprom_get_macaddr(dev);
524 mt76_eeprom_override(&dev->mt76);
525 dev->mt76.macaddr[0] &= ~BIT(1);
529 EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);
531 MODULE_LICENSE("Dual BSD/GPL");