1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
12 static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev *rtwdev,
15 struct rtw_c2h_cmd *c2h;
18 c2h = get_c2h_from_skb(skb);
19 sub_cmd_id = c2h->payload[0];
23 rtw_tx_report_handle(rtwdev, skb);
30 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb)
32 struct rtw_c2h_cmd *c2h;
36 pkt_offset = *((u32 *)skb->cb);
37 c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset);
38 len = skb->len - pkt_offset - 2;
40 mutex_lock(&rtwdev->mutex);
44 rtw_coex_bt_info_notify(rtwdev, c2h->payload, len);
47 rtw_coex_wl_fwdbginfo_notify(rtwdev, c2h->payload, len);
50 rtw_fw_c2h_cmd_handle_ext(rtwdev, skb);
56 mutex_unlock(&rtwdev->mutex);
59 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset,
62 struct rtw_c2h_cmd *c2h;
65 c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset);
66 len = skb->len - pkt_offset - 2;
67 *((u32 *)skb->cb) = pkt_offset;
69 rtw_dbg(rtwdev, RTW_DBG_FW, "recv C2H, id=0x%02x, seq=0x%02x, len=%d\n",
70 c2h->id, c2h->seq, len);
74 rtw_coex_info_response(rtwdev, skb);
77 /* pass offset for further operation */
78 *((u32 *)skb->cb) = pkt_offset;
79 skb_queue_tail(&rtwdev->c2h_queue, skb);
80 ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work);
84 EXPORT_SYMBOL(rtw_fw_c2h_cmd_rx_irqsafe);
86 static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev,
91 u32 box_reg, box_ex_reg;
95 rtw_dbg(rtwdev, RTW_DBG_FW,
96 "send H2C content %02x%02x%02x%02x %02x%02x%02x%02x\n",
97 h2c[3], h2c[2], h2c[1], h2c[0],
98 h2c[7], h2c[6], h2c[5], h2c[4]);
100 spin_lock(&rtwdev->h2c.lock);
102 box = rtwdev->h2c.last_box_num;
105 box_reg = REG_HMEBOX0;
106 box_ex_reg = REG_HMEBOX0_EX;
109 box_reg = REG_HMEBOX1;
110 box_ex_reg = REG_HMEBOX1_EX;
113 box_reg = REG_HMEBOX2;
114 box_ex_reg = REG_HMEBOX2_EX;
117 box_reg = REG_HMEBOX3;
118 box_ex_reg = REG_HMEBOX3_EX;
121 WARN(1, "invalid h2c mail box number\n");
127 box_state = rtw_read8(rtwdev, REG_HMETFR);
128 } while ((box_state >> box) & 0x1 && --h2c_wait > 0);
131 rtw_err(rtwdev, "failed to send h2c command\n");
135 for (idx = 0; idx < 4; idx++)
136 rtw_write8(rtwdev, box_reg + idx, h2c[idx]);
137 for (idx = 0; idx < 4; idx++)
138 rtw_write8(rtwdev, box_ex_reg + idx, h2c[idx + 4]);
140 if (++rtwdev->h2c.last_box_num >= 4)
141 rtwdev->h2c.last_box_num = 0;
144 spin_unlock(&rtwdev->h2c.lock);
147 static void rtw_fw_send_h2c_packet(struct rtw_dev *rtwdev, u8 *h2c_pkt)
151 spin_lock(&rtwdev->h2c.lock);
153 FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq);
154 ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE);
156 rtw_err(rtwdev, "failed to send h2c packet\n");
159 spin_unlock(&rtwdev->h2c.lock);
163 rtw_fw_send_general_info(struct rtw_dev *rtwdev)
165 struct rtw_fifo_conf *fifo = &rtwdev->fifo;
166 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
167 u16 total_size = H2C_PKT_HDR_SIZE + 4;
169 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_GENERAL_INFO);
171 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);
173 GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt,
174 fifo->rsvd_fw_txbuf_addr -
175 fifo->rsvd_boundary);
177 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);
181 rtw_fw_send_phydm_info(struct rtw_dev *rtwdev)
183 struct rtw_hal *hal = &rtwdev->hal;
184 struct rtw_efuse *efuse = &rtwdev->efuse;
185 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
186 u16 total_size = H2C_PKT_HDR_SIZE + 8;
189 if (hal->rf_type == RF_1T1R)
190 fw_rf_type = FW_RF_1T1R;
191 else if (hal->rf_type == RF_2T2R)
192 fw_rf_type = FW_RF_2T2R;
194 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_PHYDM_INFO);
196 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);
197 PHYDM_INFO_SET_REF_TYPE(h2c_pkt, efuse->rfe_option);
198 PHYDM_INFO_SET_RF_TYPE(h2c_pkt, fw_rf_type);
199 PHYDM_INFO_SET_CUT_VER(h2c_pkt, hal->cut_version);
200 PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, hal->antenna_tx);
201 PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, hal->antenna_rx);
203 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);
206 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para)
208 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
209 u16 total_size = H2C_PKT_HDR_SIZE + 1;
211 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_IQK);
212 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size);
213 IQK_SET_CLEAR(h2c_pkt, para->clear);
214 IQK_SET_SEGMENT_IQK(h2c_pkt, para->segment_iqk);
216 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt);
219 void rtw_fw_query_bt_info(struct rtw_dev *rtwdev)
221 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
223 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_INFO);
225 SET_QUERY_BT_INFO(h2c_pkt, true);
227 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
230 void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw)
232 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
234 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WL_CH_INFO);
236 SET_WL_CH_INFO_LINK(h2c_pkt, link);
237 SET_WL_CH_INFO_CHNL(h2c_pkt, ch);
238 SET_WL_CH_INFO_BW(h2c_pkt, bw);
240 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
243 void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev,
244 struct rtw_coex_info_req *req)
246 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
248 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_MP_INFO);
250 SET_BT_MP_INFO_SEQ(h2c_pkt, req->seq);
251 SET_BT_MP_INFO_OP_CODE(h2c_pkt, req->op_code);
252 SET_BT_MP_INFO_PARA1(h2c_pkt, req->para1);
253 SET_BT_MP_INFO_PARA2(h2c_pkt, req->para2);
254 SET_BT_MP_INFO_PARA3(h2c_pkt, req->para3);
256 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
259 void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl)
261 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
262 u8 index = 0 - bt_pwr_dec_lvl;
264 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_FORCE_BT_TX_POWER);
266 SET_BT_TX_POWER_INDEX(h2c_pkt, index);
268 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
271 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable)
273 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
275 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_IGNORE_WLAN_ACTION);
277 SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, enable);
279 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
282 void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev,
283 u8 para1, u8 para2, u8 para3, u8 para4, u8 para5)
285 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
287 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_COEX_TDMA_TYPE);
289 SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, para1);
290 SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, para2);
291 SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, para3);
292 SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, para4);
293 SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, para5);
295 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
298 void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data)
300 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
302 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BT_WIFI_CONTROL);
304 SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, op_code);
306 SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, *data);
307 SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, *(data + 1));
308 SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, *(data + 2));
309 SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, *(data + 3));
310 SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, *(data + 4));
312 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
315 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
317 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
318 u8 rssi = ewma_rssi_read(&si->avg_rssi);
319 bool stbc_en = si->stbc_en ? true : false;
321 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSSI_MONITOR);
323 SET_RSSI_INFO_MACID(h2c_pkt, si->mac_id);
324 SET_RSSI_INFO_RSSI(h2c_pkt, rssi);
325 SET_RSSI_INFO_STBC(h2c_pkt, stbc_en);
327 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
330 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
332 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
333 bool no_update = si->updated;
334 bool disable_pt = true;
336 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO);
338 SET_RA_INFO_MACID(h2c_pkt, si->mac_id);
339 SET_RA_INFO_RATE_ID(h2c_pkt, si->rate_id);
340 SET_RA_INFO_INIT_RA_LVL(h2c_pkt, si->init_ra_lv);
341 SET_RA_INFO_SGI_EN(h2c_pkt, si->sgi_enable);
342 SET_RA_INFO_BW_MODE(h2c_pkt, si->bw_mode);
343 SET_RA_INFO_LDPC(h2c_pkt, si->ldpc_en);
344 SET_RA_INFO_NO_UPDATE(h2c_pkt, no_update);
345 SET_RA_INFO_VHT_EN(h2c_pkt, si->vht_enable);
346 SET_RA_INFO_DIS_PT(h2c_pkt, disable_pt);
347 SET_RA_INFO_RA_MASK0(h2c_pkt, (si->ra_mask & 0xff));
348 SET_RA_INFO_RA_MASK1(h2c_pkt, (si->ra_mask & 0xff00) >> 8);
349 SET_RA_INFO_RA_MASK2(h2c_pkt, (si->ra_mask & 0xff0000) >> 16);
350 SET_RA_INFO_RA_MASK3(h2c_pkt, (si->ra_mask & 0xff000000) >> 24);
355 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
358 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool connect)
360 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
362 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_MEDIA_STATUS_RPT);
363 MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, connect);
364 MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, mac_id);
366 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
369 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev)
371 struct rtw_lps_conf *conf = &rtwdev->lps_conf;
372 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
374 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_SET_PWR_MODE);
376 SET_PWR_MODE_SET_MODE(h2c_pkt, conf->mode);
377 SET_PWR_MODE_SET_RLBM(h2c_pkt, conf->rlbm);
378 SET_PWR_MODE_SET_SMART_PS(h2c_pkt, conf->smart_ps);
379 SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, conf->awake_interval);
380 SET_PWR_MODE_SET_PORT_ID(h2c_pkt, conf->port_id);
381 SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, conf->state);
383 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
386 static u8 rtw_get_rsvd_page_location(struct rtw_dev *rtwdev,
387 enum rtw_rsvd_packet_type type)
389 struct rtw_rsvd_page *rsvd_pkt;
392 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) {
393 if (type == rsvd_pkt->type)
394 location = rsvd_pkt->page;
400 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev)
402 u8 h2c_pkt[H2C_PKT_SIZE] = {0};
405 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSVD_PAGE);
407 location = rtw_get_rsvd_page_location(rtwdev, RSVD_PROBE_RESP);
408 *(h2c_pkt + 1) = location;
409 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PROBE_RESP loc: %d\n", location);
411 location = rtw_get_rsvd_page_location(rtwdev, RSVD_PS_POLL);
412 *(h2c_pkt + 2) = location;
413 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PS_POLL loc: %d\n", location);
415 location = rtw_get_rsvd_page_location(rtwdev, RSVD_NULL);
416 *(h2c_pkt + 3) = location;
417 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_NULL loc: %d\n", location);
419 location = rtw_get_rsvd_page_location(rtwdev, RSVD_QOS_NULL);
420 *(h2c_pkt + 4) = location;
421 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_QOS_NULL loc: %d\n", location);
423 rtw_fw_send_h2c_command(rtwdev, h2c_pkt);
426 static struct sk_buff *
427 rtw_beacon_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
429 struct sk_buff *skb_new;
431 if (vif->type != NL80211_IFTYPE_AP &&
432 vif->type != NL80211_IFTYPE_ADHOC &&
433 !ieee80211_vif_is_mesh(vif)) {
434 skb_new = alloc_skb(1, GFP_KERNEL);
439 skb_new = ieee80211_beacon_get(hw, vif);
445 static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw,
446 struct ieee80211_vif *vif,
447 enum rtw_rsvd_packet_type type)
449 struct sk_buff *skb_new;
453 skb_new = rtw_beacon_get(hw, vif);
456 skb_new = ieee80211_pspoll_get(hw, vif);
458 case RSVD_PROBE_RESP:
459 skb_new = ieee80211_proberesp_get(hw, vif);
462 skb_new = ieee80211_nullfunc_get(hw, vif, false);
465 skb_new = ieee80211_nullfunc_get(hw, vif, true);
477 static void rtw_fill_rsvd_page_desc(struct rtw_dev *rtwdev, struct sk_buff *skb)
479 struct rtw_tx_pkt_info pkt_info;
480 struct rtw_chip_info *chip = rtwdev->chip;
483 memset(&pkt_info, 0, sizeof(pkt_info));
484 rtw_rsvd_page_pkt_info_update(rtwdev, &pkt_info, skb);
485 pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz);
486 memset(pkt_desc, 0, chip->tx_pkt_desc_sz);
487 rtw_tx_fill_tx_desc(&pkt_info, skb);
490 static inline u8 rtw_len_to_page(unsigned int len, u8 page_size)
492 return DIV_ROUND_UP(len, page_size);
495 static void rtw_rsvd_page_list_to_buf(struct rtw_dev *rtwdev, u8 page_size,
496 u8 page_margin, u32 page, u8 *buf,
497 struct rtw_rsvd_page *rsvd_pkt)
499 struct sk_buff *skb = rsvd_pkt->skb;
501 if (rsvd_pkt->add_txdesc)
502 rtw_fill_rsvd_page_desc(rtwdev, skb);
505 memcpy(buf + page_margin + page_size * (page - 1),
506 skb->data, skb->len);
508 memcpy(buf, skb->data, skb->len);
511 void rtw_add_rsvd_page(struct rtw_dev *rtwdev, enum rtw_rsvd_packet_type type,
514 struct rtw_rsvd_page *rsvd_pkt;
516 lockdep_assert_held(&rtwdev->mutex);
518 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) {
519 if (rsvd_pkt->type == type)
523 rsvd_pkt = kmalloc(sizeof(*rsvd_pkt), GFP_KERNEL);
527 rsvd_pkt->type = type;
528 rsvd_pkt->add_txdesc = txdesc;
529 list_add_tail(&rsvd_pkt->list, &rtwdev->rsvd_page_list);
532 void rtw_reset_rsvd_page(struct rtw_dev *rtwdev)
534 struct rtw_rsvd_page *rsvd_pkt, *tmp;
536 lockdep_assert_held(&rtwdev->mutex);
538 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
539 if (rsvd_pkt->type == RSVD_BEACON)
541 list_del(&rsvd_pkt->list);
546 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
554 lockdep_assert_held(&rtwdev->mutex);
559 pg_addr &= BIT_MASK_BCN_HEAD_1_V1;
560 rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, pg_addr | BIT_BCN_VALID_V1);
562 val = rtw_read8(rtwdev, REG_CR + 1);
564 val |= BIT_ENSWBCN >> 8;
565 rtw_write8(rtwdev, REG_CR + 1, val);
567 val = rtw_read8(rtwdev, REG_FWHW_TXQ_CTRL + 2);
569 val &= ~(BIT_EN_BCNQ_DL >> 16);
570 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, val);
572 ret = rtw_hci_write_data_rsvd_page(rtwdev, buf, size);
574 rtw_err(rtwdev, "failed to write data to rsvd page\n");
578 if (!check_hw_ready(rtwdev, REG_FIFOPAGE_CTRL_2, BIT_BCN_VALID_V1, 1)) {
579 rtw_err(rtwdev, "error beacon valid\n");
584 rsvd_pg_head = rtwdev->fifo.rsvd_boundary;
585 rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2,
586 rsvd_pg_head | BIT_BCN_VALID_V1);
587 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, bckp[1]);
588 rtw_write8(rtwdev, REG_CR + 1, bckp[0]);
593 static int rtw_download_drv_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)
599 pg_size = rtwdev->chip->page_size;
600 pg_num = size / pg_size + ((size & (pg_size - 1)) ? 1 : 0);
601 if (pg_num > rtwdev->fifo.rsvd_drv_pg_num)
604 pg_addr = rtwdev->fifo.rsvd_drv_addr;
606 return rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, size);
609 static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev,
610 struct ieee80211_vif *vif, u32 *size)
612 struct ieee80211_hw *hw = rtwdev->hw;
613 struct rtw_chip_info *chip = rtwdev->chip;
614 struct sk_buff *iter;
615 struct rtw_rsvd_page *rsvd_pkt;
618 u8 page_size, page_margin, tx_desc_sz;
621 page_size = chip->page_size;
622 tx_desc_sz = chip->tx_pkt_desc_sz;
623 page_margin = page_size - tx_desc_sz;
625 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) {
626 iter = rtw_get_rsvd_page_skb(hw, vif, rsvd_pkt->type);
628 rtw_err(rtwdev, "fail to build rsvd packet\n");
631 rsvd_pkt->skb = iter;
632 rsvd_pkt->page = total_page;
633 if (rsvd_pkt->add_txdesc)
634 total_page += rtw_len_to_page(iter->len + tx_desc_sz,
637 total_page += rtw_len_to_page(iter->len, page_size);
640 if (total_page > rtwdev->fifo.rsvd_drv_pg_num) {
641 rtw_err(rtwdev, "rsvd page over size: %d\n", total_page);
645 *size = (total_page - 1) * page_size + page_margin;
646 buf = kzalloc(*size, GFP_KERNEL);
650 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) {
651 rtw_rsvd_page_list_to_buf(rtwdev, page_size, page_margin,
652 page, buf, rsvd_pkt);
653 page += rtw_len_to_page(rsvd_pkt->skb->len, page_size);
655 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list)
656 kfree_skb(rsvd_pkt->skb);
661 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list)
662 kfree_skb(rsvd_pkt->skb);
668 rtw_download_beacon(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)
670 struct ieee80211_hw *hw = rtwdev->hw;
674 skb = rtw_beacon_get(hw, vif);
676 rtw_err(rtwdev, "failed to get beacon skb\n");
681 ret = rtw_download_drv_rsvd_page(rtwdev, skb->data, skb->len);
683 rtw_err(rtwdev, "failed to download drv rsvd page\n");
691 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)
697 buf = rtw_build_rsvd_page(rtwdev, vif, &size);
699 rtw_err(rtwdev, "failed to build rsvd page pkt\n");
703 ret = rtw_download_drv_rsvd_page(rtwdev, buf, size);
705 rtw_err(rtwdev, "failed to download drv rsvd page\n");
709 ret = rtw_download_beacon(rtwdev, vif);
711 rtw_err(rtwdev, "failed to download beacon\n");
721 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev,
722 u32 offset, u32 size, u32 *buf)
724 struct rtw_fifo_conf *fifo = &rtwdev->fifo;
732 rtw_warn(rtwdev, "should be 4-byte aligned\n");
736 offset += fifo->rsvd_boundary << TX_PAGE_SIZE_SHIFT;
737 residue = offset & (FIFO_PAGE_SIZE - 1);
738 start_pg = offset >> FIFO_PAGE_SIZE_SHIFT;
739 start_pg += RSVD_PAGE_START_ADDR;
741 rcr = rtw_read8(rtwdev, REG_RCR + 2);
742 ctl = rtw_read16(rtwdev, REG_PKTBUF_DBG_CTRL) & 0xf000;
744 /* disable rx clock gate */
745 rtw_write8(rtwdev, REG_RCR, rcr | BIT(3));
748 rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, start_pg | ctl);
750 for (i = FIFO_DUMP_ADDR + residue;
751 i < FIFO_DUMP_ADDR + FIFO_PAGE_SIZE; i += 4) {
752 buf[idx++] = rtw_read32(rtwdev, i);
763 rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, ctl);
764 rtw_write8(rtwdev, REG_RCR + 2, rcr);