1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
17 static bool rtw_fw_support_lps;
18 unsigned int rtw_debug_mask;
19 EXPORT_SYMBOL(rtw_debug_mask);
21 module_param_named(support_lps, rtw_fw_support_lps, bool, 0644);
22 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
24 MODULE_PARM_DESC(support_lps, "Set Y to enable Leisure Power Save support, to turn radio off between beacons");
25 MODULE_PARM_DESC(debug_mask, "Debugging mask");
27 static struct ieee80211_channel rtw_channeltable_2g[] = {
28 {.center_freq = 2412, .hw_value = 1,},
29 {.center_freq = 2417, .hw_value = 2,},
30 {.center_freq = 2422, .hw_value = 3,},
31 {.center_freq = 2427, .hw_value = 4,},
32 {.center_freq = 2432, .hw_value = 5,},
33 {.center_freq = 2437, .hw_value = 6,},
34 {.center_freq = 2442, .hw_value = 7,},
35 {.center_freq = 2447, .hw_value = 8,},
36 {.center_freq = 2452, .hw_value = 9,},
37 {.center_freq = 2457, .hw_value = 10,},
38 {.center_freq = 2462, .hw_value = 11,},
39 {.center_freq = 2467, .hw_value = 12,},
40 {.center_freq = 2472, .hw_value = 13,},
41 {.center_freq = 2484, .hw_value = 14,},
44 static struct ieee80211_channel rtw_channeltable_5g[] = {
45 {.center_freq = 5180, .hw_value = 36,},
46 {.center_freq = 5200, .hw_value = 40,},
47 {.center_freq = 5220, .hw_value = 44,},
48 {.center_freq = 5240, .hw_value = 48,},
49 {.center_freq = 5260, .hw_value = 52,},
50 {.center_freq = 5280, .hw_value = 56,},
51 {.center_freq = 5300, .hw_value = 60,},
52 {.center_freq = 5320, .hw_value = 64,},
53 {.center_freq = 5500, .hw_value = 100,},
54 {.center_freq = 5520, .hw_value = 104,},
55 {.center_freq = 5540, .hw_value = 108,},
56 {.center_freq = 5560, .hw_value = 112,},
57 {.center_freq = 5580, .hw_value = 116,},
58 {.center_freq = 5600, .hw_value = 120,},
59 {.center_freq = 5620, .hw_value = 124,},
60 {.center_freq = 5640, .hw_value = 128,},
61 {.center_freq = 5660, .hw_value = 132,},
62 {.center_freq = 5680, .hw_value = 136,},
63 {.center_freq = 5700, .hw_value = 140,},
64 {.center_freq = 5745, .hw_value = 149,},
65 {.center_freq = 5765, .hw_value = 153,},
66 {.center_freq = 5785, .hw_value = 157,},
67 {.center_freq = 5805, .hw_value = 161,},
68 {.center_freq = 5825, .hw_value = 165,
69 .flags = IEEE80211_CHAN_NO_HT40MINUS},
72 static struct ieee80211_rate rtw_ratetable[] = {
73 {.bitrate = 10, .hw_value = 0x00,},
74 {.bitrate = 20, .hw_value = 0x01,},
75 {.bitrate = 55, .hw_value = 0x02,},
76 {.bitrate = 110, .hw_value = 0x03,},
77 {.bitrate = 60, .hw_value = 0x04,},
78 {.bitrate = 90, .hw_value = 0x05,},
79 {.bitrate = 120, .hw_value = 0x06,},
80 {.bitrate = 180, .hw_value = 0x07,},
81 {.bitrate = 240, .hw_value = 0x08,},
82 {.bitrate = 360, .hw_value = 0x09,},
83 {.bitrate = 480, .hw_value = 0x0a,},
84 {.bitrate = 540, .hw_value = 0x0b,},
87 static struct ieee80211_supported_band rtw_band_2ghz = {
88 .band = NL80211_BAND_2GHZ,
90 .channels = rtw_channeltable_2g,
91 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
93 .bitrates = rtw_ratetable,
94 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
100 static struct ieee80211_supported_band rtw_band_5ghz = {
101 .band = NL80211_BAND_5GHZ,
103 .channels = rtw_channeltable_5g,
104 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
106 /* 5G has no CCK rates */
107 .bitrates = rtw_ratetable + 4,
108 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
114 struct rtw_watch_dog_iter_data {
115 struct rtw_vif *rtwvif;
120 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
121 struct ieee80211_vif *vif)
123 struct rtw_watch_dog_iter_data *iter_data = data;
124 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
126 if (vif->type == NL80211_IFTYPE_STATION) {
127 if (vif->bss_conf.assoc) {
128 iter_data->assoc_cnt++;
129 iter_data->rtwvif = rtwvif;
131 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD ||
132 rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD)
133 iter_data->active = true;
135 /* only STATION mode can enter lps */
136 iter_data->active = true;
139 rtwvif->stats.tx_unicast = 0;
140 rtwvif->stats.rx_unicast = 0;
141 rtwvif->stats.tx_cnt = 0;
142 rtwvif->stats.rx_cnt = 0;
145 /* process TX/RX statistics periodically for hardware,
146 * the information helps hardware to enhance performance
148 static void rtw_watch_dog_work(struct work_struct *work)
150 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
151 watch_dog_work.work);
152 struct rtw_watch_dog_iter_data data = {};
153 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
155 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
158 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
159 RTW_WATCH_DOG_DELAY_TIME);
161 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
162 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
164 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
166 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
167 rtw_coex_wl_status_change_notify(rtwdev);
169 /* reset tx/rx statictics */
170 rtwdev->stats.tx_unicast = 0;
171 rtwdev->stats.rx_unicast = 0;
172 rtwdev->stats.tx_cnt = 0;
173 rtwdev->stats.rx_cnt = 0;
175 /* use atomic version to avoid taking local->iflist_mtx mutex */
176 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
178 /* fw supports only one station associated to enter lps, if there are
179 * more than two stations associated to the AP, then we can not enter
180 * lps, because fw does not handle the overlapped beacon interval
182 if (rtw_fw_support_lps &&
183 data.rtwvif && !data.active && data.assoc_cnt == 1)
184 rtw_enter_lps(rtwdev, data.rtwvif);
186 rtw_leave_lps(rtwdev, rtwdev->lps_conf.rtwvif);
188 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
191 rtw_phy_dynamic_mechanism(rtwdev);
193 rtwdev->watch_dog_cnt++;
196 static void rtw_c2h_work(struct work_struct *work)
198 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
199 struct sk_buff *skb, *tmp;
201 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
202 skb_unlink(skb, &rtwdev->c2h_queue);
203 rtw_fw_c2h_cmd_handle(rtwdev, skb);
204 dev_kfree_skb_any(skb);
208 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
209 struct rtw_channel_params *chan_params)
211 struct ieee80211_channel *channel = chandef->chan;
212 enum nl80211_chan_width width = chandef->width;
213 u8 *cch_by_bw = chan_params->cch_by_bw;
214 u32 primary_freq, center_freq;
216 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
217 u8 primary_chan_idx = 0;
220 center_chan = channel->hw_value;
221 primary_freq = channel->center_freq;
222 center_freq = chandef->center_freq1;
224 /* assign the center channel used while 20M bw is selected */
225 cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
228 case NL80211_CHAN_WIDTH_20_NOHT:
229 case NL80211_CHAN_WIDTH_20:
230 bandwidth = RTW_CHANNEL_WIDTH_20;
231 primary_chan_idx = 0;
233 case NL80211_CHAN_WIDTH_40:
234 bandwidth = RTW_CHANNEL_WIDTH_40;
235 if (primary_freq > center_freq) {
236 primary_chan_idx = 1;
239 primary_chan_idx = 2;
243 case NL80211_CHAN_WIDTH_80:
244 bandwidth = RTW_CHANNEL_WIDTH_80;
245 if (primary_freq > center_freq) {
246 if (primary_freq - center_freq == 10) {
247 primary_chan_idx = 1;
250 primary_chan_idx = 3;
253 /* assign the center channel used
254 * while 40M bw is selected
256 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
258 if (center_freq - primary_freq == 10) {
259 primary_chan_idx = 2;
262 primary_chan_idx = 4;
265 /* assign the center channel used
266 * while 40M bw is selected
268 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
276 chan_params->center_chan = center_chan;
277 chan_params->bandwidth = bandwidth;
278 chan_params->primary_chan_idx = primary_chan_idx;
280 /* assign the center channel used while current bw is selected */
281 cch_by_bw[bandwidth] = center_chan;
283 for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
287 void rtw_set_channel(struct rtw_dev *rtwdev)
289 struct ieee80211_hw *hw = rtwdev->hw;
290 struct rtw_hal *hal = &rtwdev->hal;
291 struct rtw_chip_info *chip = rtwdev->chip;
292 struct rtw_channel_params ch_param;
293 u8 center_chan, bandwidth, primary_chan_idx;
296 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
297 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
300 center_chan = ch_param.center_chan;
301 bandwidth = ch_param.bandwidth;
302 primary_chan_idx = ch_param.primary_chan_idx;
304 hal->current_band_width = bandwidth;
305 hal->current_channel = center_chan;
306 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
308 for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
309 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
311 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
313 if (hal->current_band_type == RTW_BAND_5G) {
314 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
316 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
317 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
319 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
322 rtw_phy_set_tx_power_level(rtwdev, center_chan);
325 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
329 for (i = 0; i < ETH_ALEN; i++)
330 rtw_write8(rtwdev, start + i, addr[i]);
333 void rtw_vif_port_config(struct rtw_dev *rtwdev,
334 struct rtw_vif *rtwvif,
339 if (config & PORT_SET_MAC_ADDR) {
340 addr = rtwvif->conf->mac_addr.addr;
341 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
343 if (config & PORT_SET_BSSID) {
344 addr = rtwvif->conf->bssid.addr;
345 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
347 if (config & PORT_SET_NET_TYPE) {
348 addr = rtwvif->conf->net_type.addr;
349 mask = rtwvif->conf->net_type.mask;
350 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
352 if (config & PORT_SET_AID) {
353 addr = rtwvif->conf->aid.addr;
354 mask = rtwvif->conf->aid.mask;
355 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
357 if (config & PORT_SET_BCN_CTRL) {
358 addr = rtwvif->conf->bcn_ctrl.addr;
359 mask = rtwvif->conf->bcn_ctrl.mask;
360 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
364 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
369 case EFUSE_HW_CAP_IGNORE:
370 case EFUSE_HW_CAP_SUPP_BW80:
371 bw |= BIT(RTW_CHANNEL_WIDTH_80);
373 case EFUSE_HW_CAP_SUPP_BW40:
374 bw |= BIT(RTW_CHANNEL_WIDTH_40);
377 bw |= BIT(RTW_CHANNEL_WIDTH_20);
384 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
386 struct rtw_hal *hal = &rtwdev->hal;
388 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
389 hw_ant_num >= hal->rf_path_num)
392 switch (hw_ant_num) {
394 hal->rf_type = RF_1T1R;
395 hal->rf_path_num = 1;
396 hal->antenna_tx = BB_PATH_A;
397 hal->antenna_rx = BB_PATH_A;
400 WARN(1, "invalid hw configuration from efuse\n");
405 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
408 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
412 /* 4SS, every two bits for MCS7/8/9 */
413 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
414 vht_mcs_cap = mcs_map & 0x3;
415 switch (vht_mcs_cap) {
417 ra_mask |= 0x3ffULL << nss;
420 ra_mask |= 0x1ffULL << nss;
423 ra_mask |= 0x0ffULL << nss;
433 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
437 switch (wireless_set) {
439 rate_id = RTW_RATEID_B_20M;
442 rate_id = RTW_RATEID_G;
444 case WIRELESS_CCK | WIRELESS_OFDM:
445 rate_id = RTW_RATEID_BG;
447 case WIRELESS_OFDM | WIRELESS_HT:
449 rate_id = RTW_RATEID_GN_N1SS;
450 else if (tx_num == 2)
451 rate_id = RTW_RATEID_GN_N2SS;
452 else if (tx_num == 3)
453 rate_id = RTW_RATEID_ARFR5_N_3SS;
455 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
456 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
458 rate_id = RTW_RATEID_BGN_40M_1SS;
459 else if (tx_num == 2)
460 rate_id = RTW_RATEID_BGN_40M_2SS;
461 else if (tx_num == 3)
462 rate_id = RTW_RATEID_ARFR5_N_3SS;
463 else if (tx_num == 4)
464 rate_id = RTW_RATEID_ARFR7_N_4SS;
467 rate_id = RTW_RATEID_BGN_20M_1SS;
468 else if (tx_num == 2)
469 rate_id = RTW_RATEID_BGN_20M_2SS;
470 else if (tx_num == 3)
471 rate_id = RTW_RATEID_ARFR5_N_3SS;
472 else if (tx_num == 4)
473 rate_id = RTW_RATEID_ARFR7_N_4SS;
476 case WIRELESS_OFDM | WIRELESS_VHT:
478 rate_id = RTW_RATEID_ARFR1_AC_1SS;
479 else if (tx_num == 2)
480 rate_id = RTW_RATEID_ARFR0_AC_2SS;
481 else if (tx_num == 3)
482 rate_id = RTW_RATEID_ARFR4_AC_3SS;
483 else if (tx_num == 4)
484 rate_id = RTW_RATEID_ARFR6_AC_4SS;
486 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
487 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
489 rate_id = RTW_RATEID_ARFR1_AC_1SS;
490 else if (tx_num == 2)
491 rate_id = RTW_RATEID_ARFR0_AC_2SS;
492 else if (tx_num == 3)
493 rate_id = RTW_RATEID_ARFR4_AC_3SS;
494 else if (tx_num == 4)
495 rate_id = RTW_RATEID_ARFR6_AC_4SS;
498 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
499 else if (tx_num == 2)
500 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
501 else if (tx_num == 3)
502 rate_id = RTW_RATEID_ARFR4_AC_3SS;
503 else if (tx_num == 4)
504 rate_id = RTW_RATEID_ARFR6_AC_4SS;
514 #define RA_MASK_CCK_RATES 0x0000f
515 #define RA_MASK_OFDM_RATES 0x00ff0
516 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
517 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
518 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
519 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
520 RA_MASK_HT_RATES_2SS | \
521 RA_MASK_HT_RATES_3SS)
522 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
523 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
524 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
525 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
526 RA_MASK_VHT_RATES_2SS | \
527 RA_MASK_VHT_RATES_3SS)
528 #define RA_MASK_CCK_IN_HT 0x00005
529 #define RA_MASK_CCK_IN_VHT 0x00005
530 #define RA_MASK_OFDM_IN_VHT 0x00010
531 #define RA_MASK_OFDM_IN_HT_2G 0x00010
532 #define RA_MASK_OFDM_IN_HT_5G 0x00030
534 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
536 struct ieee80211_sta *sta = si->sta;
537 struct rtw_efuse *efuse = &rtwdev->efuse;
538 struct rtw_hal *hal = &rtwdev->hal;
543 u8 rf_type = RF_1T1R;
548 bool is_vht_enable = false;
549 bool is_support_sgi = false;
551 if (sta->vht_cap.vht_supported) {
552 is_vht_enable = true;
553 ra_mask |= get_vht_ra_mask(sta);
554 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
555 stbc_en = VHT_STBC_EN;
556 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
557 ldpc_en = VHT_LDPC_EN;
558 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
559 is_support_sgi = true;
560 } else if (sta->ht_cap.ht_supported) {
561 ra_mask |= (sta->ht_cap.mcs.rx_mask[NL80211_BAND_5GHZ] << 20) |
562 (sta->ht_cap.mcs.rx_mask[NL80211_BAND_2GHZ] << 12);
563 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
564 stbc_en = HT_STBC_EN;
565 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
566 ldpc_en = HT_LDPC_EN;
567 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
568 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
569 is_support_sgi = true;
572 if (hal->current_band_type == RTW_BAND_5G) {
573 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
574 if (sta->vht_cap.vht_supported) {
575 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
576 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
577 } else if (sta->ht_cap.ht_supported) {
578 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
579 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
581 wireless_set = WIRELESS_OFDM;
583 } else if (hal->current_band_type == RTW_BAND_2G) {
584 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
585 if (sta->vht_cap.vht_supported) {
586 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
588 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
589 WIRELESS_HT | WIRELESS_VHT;
590 } else if (sta->ht_cap.ht_supported) {
591 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
592 RA_MASK_OFDM_IN_HT_2G;
593 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
595 } else if (sta->supp_rates[0] <= 0xf) {
596 wireless_set = WIRELESS_CCK;
598 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
601 rtw_err(rtwdev, "Unknown band type\n");
605 if (efuse->hw_cap.nss == 1) {
606 ra_mask &= RA_MASK_VHT_RATES_1SS;
607 ra_mask &= RA_MASK_HT_RATES_1SS;
610 switch (sta->bandwidth) {
611 case IEEE80211_STA_RX_BW_80:
612 bw_mode = RTW_CHANNEL_WIDTH_80;
614 case IEEE80211_STA_RX_BW_40:
615 bw_mode = RTW_CHANNEL_WIDTH_40;
618 bw_mode = RTW_CHANNEL_WIDTH_20;
622 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
625 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
630 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
632 if (wireless_set != WIRELESS_CCK) {
633 rssi_level = si->rssi_level;
635 ra_mask &= 0xffffffffffffffffULL;
636 else if (rssi_level == 1)
637 ra_mask &= 0xfffffffffffffff0ULL;
638 else if (rssi_level == 2)
639 ra_mask &= 0xffffffffffffefe0ULL;
640 else if (rssi_level == 3)
641 ra_mask &= 0xffffffffffffcfc0ULL;
642 else if (rssi_level == 4)
643 ra_mask &= 0xffffffffffff8f80ULL;
644 else if (rssi_level >= 5)
645 ra_mask &= 0xffffffffffff0f00ULL;
648 si->bw_mode = bw_mode;
649 si->stbc_en = stbc_en;
650 si->ldpc_en = ldpc_en;
651 si->rf_type = rf_type;
652 si->wireless_set = wireless_set;
653 si->sgi_enable = is_support_sgi;
654 si->vht_enable = is_vht_enable;
655 si->ra_mask = ra_mask;
656 si->rate_id = rate_id;
658 rtw_fw_send_ra_info(rtwdev, si);
661 static int rtw_power_on(struct rtw_dev *rtwdev)
663 struct rtw_chip_info *chip = rtwdev->chip;
664 struct rtw_fw_state *fw = &rtwdev->fw;
668 ret = rtw_hci_setup(rtwdev);
670 rtw_err(rtwdev, "failed to setup hci\n");
674 /* power on MAC before firmware downloaded */
675 ret = rtw_mac_power_on(rtwdev);
677 rtw_err(rtwdev, "failed to power on mac\n");
681 wait_for_completion(&fw->completion);
684 rtw_err(rtwdev, "failed to load firmware\n");
688 ret = rtw_download_firmware(rtwdev, fw);
690 rtw_err(rtwdev, "failed to download firmware\n");
694 /* config mac after firmware downloaded */
695 ret = rtw_mac_init(rtwdev);
697 rtw_err(rtwdev, "failed to configure mac\n");
701 chip->ops->phy_set_param(rtwdev);
703 ret = rtw_hci_start(rtwdev);
705 rtw_err(rtwdev, "failed to start hci\n");
709 /* send H2C after HCI has started */
710 rtw_fw_send_general_info(rtwdev);
711 rtw_fw_send_phydm_info(rtwdev);
713 wifi_only = !rtwdev->efuse.btcoex;
714 rtw_coex_power_on_setting(rtwdev);
715 rtw_coex_init_hw_config(rtwdev, wifi_only);
720 rtw_mac_power_off(rtwdev);
726 int rtw_core_start(struct rtw_dev *rtwdev)
730 ret = rtw_power_on(rtwdev);
734 rtw_sec_enable_sec_engine(rtwdev);
736 /* rcr reset after powered on */
737 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
739 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
740 RTW_WATCH_DOG_DELAY_TIME);
742 set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
747 static void rtw_power_off(struct rtw_dev *rtwdev)
749 rtwdev->hci.ops->stop(rtwdev);
750 rtw_mac_power_off(rtwdev);
753 void rtw_core_stop(struct rtw_dev *rtwdev)
755 struct rtw_coex *coex = &rtwdev->coex;
757 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
758 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
760 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
761 cancel_delayed_work_sync(&coex->bt_relink_work);
762 cancel_delayed_work_sync(&coex->bt_reenable_work);
763 cancel_delayed_work_sync(&coex->defreeze_work);
765 rtw_power_off(rtwdev);
768 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
769 struct ieee80211_sta_ht_cap *ht_cap)
771 struct rtw_efuse *efuse = &rtwdev->efuse;
773 ht_cap->ht_supported = true;
775 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
776 IEEE80211_HT_CAP_MAX_AMSDU |
777 IEEE80211_HT_CAP_LDPC_CODING |
778 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
779 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
780 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
781 IEEE80211_HT_CAP_DSSSCCK40 |
782 IEEE80211_HT_CAP_SGI_40;
783 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
784 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
785 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
786 if (efuse->hw_cap.nss > 1) {
787 ht_cap->mcs.rx_mask[0] = 0xFF;
788 ht_cap->mcs.rx_mask[1] = 0xFF;
789 ht_cap->mcs.rx_mask[4] = 0x01;
790 ht_cap->mcs.rx_highest = cpu_to_le16(300);
792 ht_cap->mcs.rx_mask[0] = 0xFF;
793 ht_cap->mcs.rx_mask[1] = 0x00;
794 ht_cap->mcs.rx_mask[4] = 0x01;
795 ht_cap->mcs.rx_highest = cpu_to_le16(150);
799 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
800 struct ieee80211_sta_vht_cap *vht_cap)
802 struct rtw_efuse *efuse = &rtwdev->efuse;
806 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
807 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
810 vht_cap->vht_supported = true;
811 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
812 IEEE80211_VHT_CAP_RXLDPC |
813 IEEE80211_VHT_CAP_SHORT_GI_80 |
814 IEEE80211_VHT_CAP_TXSTBC |
815 IEEE80211_VHT_CAP_RXSTBC_1 |
816 IEEE80211_VHT_CAP_HTC_VHT |
817 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
819 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
820 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
821 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
822 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
823 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
824 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
825 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
826 if (efuse->hw_cap.nss > 1) {
827 highest = cpu_to_le16(780);
828 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
830 highest = cpu_to_le16(390);
831 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
834 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
835 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
836 vht_cap->vht_mcs.rx_highest = highest;
837 vht_cap->vht_mcs.tx_highest = highest;
840 static void rtw_set_supported_band(struct ieee80211_hw *hw,
841 struct rtw_chip_info *chip)
843 struct rtw_dev *rtwdev = hw->priv;
844 struct ieee80211_supported_band *sband;
846 if (chip->band & RTW_BAND_2G) {
847 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
850 if (chip->ht_supported)
851 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
852 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
855 if (chip->band & RTW_BAND_5G) {
856 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
859 if (chip->ht_supported)
860 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
861 if (chip->vht_supported)
862 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
863 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
869 rtw_err(rtwdev, "failed to set supported band\n");
873 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
874 struct rtw_chip_info *chip)
876 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
877 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
880 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
882 struct rtw_dev *rtwdev = context;
883 struct rtw_fw_state *fw = &rtwdev->fw;
886 rtw_err(rtwdev, "failed to request firmware\n");
888 fw->firmware = firmware;
889 complete_all(&fw->completion);
892 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
894 struct rtw_fw_state *fw = &rtwdev->fw;
897 init_completion(&fw->completion);
899 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
900 GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
902 rtw_err(rtwdev, "async firmware request failed\n");
909 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
911 struct rtw_chip_info *chip = rtwdev->chip;
912 struct rtw_hal *hal = &rtwdev->hal;
913 struct rtw_efuse *efuse = &rtwdev->efuse;
916 switch (rtw_hci_type(rtwdev)) {
917 case RTW_HCI_TYPE_PCIE:
918 rtwdev->hci.rpwm_addr = 0x03d9;
921 rtw_err(rtwdev, "unsupported hci type\n");
925 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
926 hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
927 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
928 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
929 if (hal->chip_version & BIT_RF_TYPE_ID) {
930 hal->rf_type = RF_2T2R;
931 hal->rf_path_num = 2;
932 hal->antenna_tx = BB_PATH_AB;
933 hal->antenna_rx = BB_PATH_AB;
935 hal->rf_type = RF_1T1R;
936 hal->rf_path_num = 1;
937 hal->antenna_tx = BB_PATH_A;
938 hal->antenna_rx = BB_PATH_A;
941 if (hal->fab_version == 2)
942 hal->fab_version = 1;
943 else if (hal->fab_version == 1)
944 hal->fab_version = 2;
946 efuse->physical_size = chip->phy_efuse_size;
947 efuse->logical_size = chip->log_efuse_size;
948 efuse->protect_size = chip->ptct_efuse_size;
950 /* default use ack */
951 rtwdev->hal.rcr |= BIT_VHT_DACK;
956 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
958 struct rtw_fw_state *fw = &rtwdev->fw;
961 ret = rtw_hci_setup(rtwdev);
963 rtw_err(rtwdev, "failed to setup hci\n");
967 ret = rtw_mac_power_on(rtwdev);
969 rtw_err(rtwdev, "failed to power on mac\n");
973 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
975 wait_for_completion(&fw->completion);
978 rtw_err(rtwdev, "failed to load firmware\n");
982 ret = rtw_download_firmware(rtwdev, fw);
984 rtw_err(rtwdev, "failed to download firmware\n");
991 rtw_mac_power_off(rtwdev);
997 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
999 struct rtw_efuse *efuse = &rtwdev->efuse;
1000 u8 hw_feature[HW_FEATURE_LEN];
1005 id = rtw_read8(rtwdev, REG_C2HEVT);
1006 if (id != C2H_HW_FEATURE_REPORT) {
1007 rtw_err(rtwdev, "failed to read hw feature report\n");
1011 for (i = 0; i < HW_FEATURE_LEN; i++)
1012 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1014 rtw_write8(rtwdev, REG_C2HEVT, 0);
1016 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1017 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1018 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1019 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1020 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1021 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1023 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1025 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE)
1026 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1028 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1029 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1030 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1031 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1036 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1038 rtw_hci_stop(rtwdev);
1039 rtw_mac_power_off(rtwdev);
1042 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1044 struct rtw_efuse *efuse = &rtwdev->efuse;
1047 mutex_lock(&rtwdev->mutex);
1049 /* power on mac to read efuse */
1050 ret = rtw_chip_efuse_enable(rtwdev);
1054 ret = rtw_parse_efuse_map(rtwdev);
1058 ret = rtw_dump_hw_feature(rtwdev);
1062 ret = rtw_check_supported_rfe(rtwdev);
1066 if (efuse->crystal_cap == 0xff)
1067 efuse->crystal_cap = 0;
1068 if (efuse->pa_type_2g == 0xff)
1069 efuse->pa_type_2g = 0;
1070 if (efuse->pa_type_5g == 0xff)
1071 efuse->pa_type_5g = 0;
1072 if (efuse->lna_type_2g == 0xff)
1073 efuse->lna_type_2g = 0;
1074 if (efuse->lna_type_5g == 0xff)
1075 efuse->lna_type_5g = 0;
1076 if (efuse->channel_plan == 0xff)
1077 efuse->channel_plan = 0x7f;
1078 if (efuse->rf_board_option == 0xff)
1079 efuse->rf_board_option = 0;
1080 if (efuse->bt_setting & BIT(0))
1081 efuse->share_ant = true;
1082 if (efuse->regd == 0xff)
1085 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1086 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1087 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1088 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1089 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1091 rtw_chip_efuse_disable(rtwdev);
1094 mutex_unlock(&rtwdev->mutex);
1098 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1100 struct rtw_hal *hal = &rtwdev->hal;
1101 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1106 rtw_phy_setup_phy_cond(rtwdev, 0);
1108 rtw_phy_init_tx_power(rtwdev);
1109 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1110 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1111 rtw_phy_tx_power_by_rate_config(hal);
1112 rtw_phy_tx_power_limit_config(hal);
1117 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1121 ret = rtw_chip_parameter_setup(rtwdev);
1123 rtw_err(rtwdev, "failed to setup chip parameters\n");
1127 ret = rtw_chip_efuse_info_setup(rtwdev);
1129 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1133 ret = rtw_chip_board_info_setup(rtwdev);
1135 rtw_err(rtwdev, "failed to setup chip board info\n");
1144 EXPORT_SYMBOL(rtw_chip_info_setup);
1146 int rtw_core_init(struct rtw_dev *rtwdev)
1148 struct rtw_coex *coex = &rtwdev->coex;
1151 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1153 timer_setup(&rtwdev->tx_report.purge_timer,
1154 rtw_tx_report_purge_timer, 0);
1156 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1157 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
1158 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
1159 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
1160 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1161 skb_queue_head_init(&rtwdev->c2h_queue);
1162 skb_queue_head_init(&rtwdev->coex.queue);
1163 skb_queue_head_init(&rtwdev->tx_report.queue);
1165 spin_lock_init(&rtwdev->dm_lock);
1166 spin_lock_init(&rtwdev->rf_lock);
1167 spin_lock_init(&rtwdev->h2c.lock);
1168 spin_lock_init(&rtwdev->tx_report.q_lock);
1170 mutex_init(&rtwdev->mutex);
1171 mutex_init(&rtwdev->coex.mutex);
1172 mutex_init(&rtwdev->hal.tx_power_mutex);
1174 init_waitqueue_head(&rtwdev->coex.wait);
1176 rtwdev->sec.total_cam_num = 32;
1177 rtwdev->hal.current_channel = 1;
1178 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1180 mutex_lock(&rtwdev->mutex);
1181 rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1182 mutex_unlock(&rtwdev->mutex);
1184 /* default rx filter setting */
1185 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1186 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1187 BIT_AB | BIT_AM | BIT_APM;
1189 ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1191 rtw_warn(rtwdev, "no firmware loaded\n");
1197 EXPORT_SYMBOL(rtw_core_init);
1199 void rtw_core_deinit(struct rtw_dev *rtwdev)
1201 struct rtw_fw_state *fw = &rtwdev->fw;
1202 struct rtw_rsvd_page *rsvd_pkt, *tmp;
1203 unsigned long flags;
1206 release_firmware(fw->firmware);
1208 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1209 skb_queue_purge(&rtwdev->tx_report.queue);
1210 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1212 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1213 list_del(&rsvd_pkt->list);
1217 mutex_destroy(&rtwdev->mutex);
1218 mutex_destroy(&rtwdev->coex.mutex);
1219 mutex_destroy(&rtwdev->hal.tx_power_mutex);
1221 EXPORT_SYMBOL(rtw_core_deinit);
1223 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1225 int max_tx_headroom = 0;
1228 /* TODO: USB & SDIO may need extra room? */
1229 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1231 hw->extra_tx_headroom = max_tx_headroom;
1232 hw->queues = IEEE80211_NUM_ACS;
1233 hw->sta_data_size = sizeof(struct rtw_sta_info);
1234 hw->vif_data_size = sizeof(struct rtw_vif);
1236 ieee80211_hw_set(hw, SIGNAL_DBM);
1237 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1238 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1239 ieee80211_hw_set(hw, MFP_CAPABLE);
1240 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1241 ieee80211_hw_set(hw, SUPPORTS_PS);
1242 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1243 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
1244 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
1246 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1247 BIT(NL80211_IFTYPE_AP) |
1248 BIT(NL80211_IFTYPE_ADHOC) |
1249 BIT(NL80211_IFTYPE_MESH_POINT);
1251 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1252 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1254 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
1256 rtw_set_supported_band(hw, rtwdev->chip);
1257 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1259 rtw_regd_init(rtwdev, rtw_regd_notifier);
1261 ret = ieee80211_register_hw(hw);
1263 rtw_err(rtwdev, "failed to register hw\n");
1267 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1268 rtw_err(rtwdev, "regulatory_hint fail\n");
1270 rtw_debugfs_init(rtwdev);
1274 EXPORT_SYMBOL(rtw_register_hw);
1276 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1278 struct rtw_chip_info *chip = rtwdev->chip;
1280 ieee80211_unregister_hw(hw);
1281 rtw_unset_supported_band(hw, chip);
1283 EXPORT_SYMBOL(rtw_unregister_hw);
1285 MODULE_AUTHOR("Realtek Corporation");
1286 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1287 MODULE_LICENSE("Dual BSD/GPL");