1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
16 static bool rtw_fw_support_lps;
17 unsigned int rtw_debug_mask;
18 EXPORT_SYMBOL(rtw_debug_mask);
20 module_param_named(support_lps, rtw_fw_support_lps, bool, 0644);
21 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
23 MODULE_PARM_DESC(support_lps, "Set Y to enable LPS support");
24 MODULE_PARM_DESC(debug_mask, "Debugging mask");
26 static struct ieee80211_channel rtw_channeltable_2g[] = {
27 {.center_freq = 2412, .hw_value = 1,},
28 {.center_freq = 2417, .hw_value = 2,},
29 {.center_freq = 2422, .hw_value = 3,},
30 {.center_freq = 2427, .hw_value = 4,},
31 {.center_freq = 2432, .hw_value = 5,},
32 {.center_freq = 2437, .hw_value = 6,},
33 {.center_freq = 2442, .hw_value = 7,},
34 {.center_freq = 2447, .hw_value = 8,},
35 {.center_freq = 2452, .hw_value = 9,},
36 {.center_freq = 2457, .hw_value = 10,},
37 {.center_freq = 2462, .hw_value = 11,},
38 {.center_freq = 2467, .hw_value = 12,},
39 {.center_freq = 2472, .hw_value = 13,},
40 {.center_freq = 2484, .hw_value = 14,},
43 static struct ieee80211_channel rtw_channeltable_5g[] = {
44 {.center_freq = 5180, .hw_value = 36,},
45 {.center_freq = 5200, .hw_value = 40,},
46 {.center_freq = 5220, .hw_value = 44,},
47 {.center_freq = 5240, .hw_value = 48,},
48 {.center_freq = 5260, .hw_value = 52,},
49 {.center_freq = 5280, .hw_value = 56,},
50 {.center_freq = 5300, .hw_value = 60,},
51 {.center_freq = 5320, .hw_value = 64,},
52 {.center_freq = 5500, .hw_value = 100,},
53 {.center_freq = 5520, .hw_value = 104,},
54 {.center_freq = 5540, .hw_value = 108,},
55 {.center_freq = 5560, .hw_value = 112,},
56 {.center_freq = 5580, .hw_value = 116,},
57 {.center_freq = 5600, .hw_value = 120,},
58 {.center_freq = 5620, .hw_value = 124,},
59 {.center_freq = 5640, .hw_value = 128,},
60 {.center_freq = 5660, .hw_value = 132,},
61 {.center_freq = 5680, .hw_value = 136,},
62 {.center_freq = 5700, .hw_value = 140,},
63 {.center_freq = 5745, .hw_value = 149,},
64 {.center_freq = 5765, .hw_value = 153,},
65 {.center_freq = 5785, .hw_value = 157,},
66 {.center_freq = 5805, .hw_value = 161,},
67 {.center_freq = 5825, .hw_value = 165,
68 .flags = IEEE80211_CHAN_NO_HT40MINUS},
71 static struct ieee80211_rate rtw_ratetable[] = {
72 {.bitrate = 10, .hw_value = 0x00,},
73 {.bitrate = 20, .hw_value = 0x01,},
74 {.bitrate = 55, .hw_value = 0x02,},
75 {.bitrate = 110, .hw_value = 0x03,},
76 {.bitrate = 60, .hw_value = 0x04,},
77 {.bitrate = 90, .hw_value = 0x05,},
78 {.bitrate = 120, .hw_value = 0x06,},
79 {.bitrate = 180, .hw_value = 0x07,},
80 {.bitrate = 240, .hw_value = 0x08,},
81 {.bitrate = 360, .hw_value = 0x09,},
82 {.bitrate = 480, .hw_value = 0x0a,},
83 {.bitrate = 540, .hw_value = 0x0b,},
86 static struct ieee80211_supported_band rtw_band_2ghz = {
87 .band = NL80211_BAND_2GHZ,
89 .channels = rtw_channeltable_2g,
90 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
92 .bitrates = rtw_ratetable,
93 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
99 static struct ieee80211_supported_band rtw_band_5ghz = {
100 .band = NL80211_BAND_5GHZ,
102 .channels = rtw_channeltable_5g,
103 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
105 /* 5G has no CCK rates */
106 .bitrates = rtw_ratetable + 4,
107 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
113 struct rtw_watch_dog_iter_data {
114 struct rtw_vif *rtwvif;
119 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
120 struct ieee80211_vif *vif)
122 struct rtw_watch_dog_iter_data *iter_data = data;
123 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
125 if (vif->type == NL80211_IFTYPE_STATION) {
126 if (vif->bss_conf.assoc) {
127 iter_data->assoc_cnt++;
128 iter_data->rtwvif = rtwvif;
130 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD ||
131 rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD)
132 iter_data->active = true;
134 /* only STATION mode can enter lps */
135 iter_data->active = true;
138 rtwvif->stats.tx_unicast = 0;
139 rtwvif->stats.rx_unicast = 0;
140 rtwvif->stats.tx_cnt = 0;
141 rtwvif->stats.rx_cnt = 0;
144 /* process TX/RX statistics periodically for hardware,
145 * the information helps hardware to enhance performance
147 static void rtw_watch_dog_work(struct work_struct *work)
149 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
150 watch_dog_work.work);
151 struct rtw_watch_dog_iter_data data = {};
153 if (!rtw_flag_check(rtwdev, RTW_FLAG_RUNNING))
156 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
157 RTW_WATCH_DOG_DELAY_TIME);
159 /* reset tx/rx statictics */
160 rtwdev->stats.tx_unicast = 0;
161 rtwdev->stats.rx_unicast = 0;
162 rtwdev->stats.tx_cnt = 0;
163 rtwdev->stats.rx_cnt = 0;
165 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data);
167 /* fw supports only one station associated to enter lps, if there are
168 * more than two stations associated to the AP, then we can not enter
169 * lps, because fw does not handle the overlapped beacon interval
171 if (rtw_fw_support_lps &&
172 data.rtwvif && !data.active && data.assoc_cnt == 1)
173 rtw_enter_lps(rtwdev, data.rtwvif);
175 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
178 rtw_phy_dynamic_mechanism(rtwdev);
180 rtwdev->watch_dog_cnt++;
183 static void rtw_c2h_work(struct work_struct *work)
185 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
186 struct sk_buff *skb, *tmp;
188 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
189 skb_unlink(skb, &rtwdev->c2h_queue);
190 rtw_fw_c2h_cmd_handle(rtwdev, skb);
191 dev_kfree_skb_any(skb);
195 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
196 struct rtw_channel_params *chan_params)
198 struct ieee80211_channel *channel = chandef->chan;
199 enum nl80211_chan_width width = chandef->width;
200 u32 primary_freq, center_freq;
202 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
203 u8 primary_chan_idx = 0;
205 center_chan = channel->hw_value;
206 primary_freq = channel->center_freq;
207 center_freq = chandef->center_freq1;
210 case NL80211_CHAN_WIDTH_20_NOHT:
211 case NL80211_CHAN_WIDTH_20:
212 bandwidth = RTW_CHANNEL_WIDTH_20;
213 primary_chan_idx = 0;
215 case NL80211_CHAN_WIDTH_40:
216 bandwidth = RTW_CHANNEL_WIDTH_40;
217 if (primary_freq > center_freq) {
218 primary_chan_idx = 1;
221 primary_chan_idx = 2;
225 case NL80211_CHAN_WIDTH_80:
226 bandwidth = RTW_CHANNEL_WIDTH_80;
227 if (primary_freq > center_freq) {
228 if (primary_freq - center_freq == 10) {
229 primary_chan_idx = 1;
232 primary_chan_idx = 3;
236 if (center_freq - primary_freq == 10) {
237 primary_chan_idx = 2;
240 primary_chan_idx = 4;
250 chan_params->center_chan = center_chan;
251 chan_params->bandwidth = bandwidth;
252 chan_params->primary_chan_idx = primary_chan_idx;
255 void rtw_set_channel(struct rtw_dev *rtwdev)
257 struct ieee80211_hw *hw = rtwdev->hw;
258 struct rtw_hal *hal = &rtwdev->hal;
259 struct rtw_chip_info *chip = rtwdev->chip;
260 struct rtw_channel_params ch_param;
261 u8 center_chan, bandwidth, primary_chan_idx;
263 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
264 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
267 center_chan = ch_param.center_chan;
268 bandwidth = ch_param.bandwidth;
269 primary_chan_idx = ch_param.primary_chan_idx;
271 hal->current_band_width = bandwidth;
272 hal->current_channel = center_chan;
273 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
274 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
276 rtw_phy_set_tx_power_level(rtwdev, center_chan);
279 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
283 for (i = 0; i < ETH_ALEN; i++)
284 rtw_write8(rtwdev, start + i, addr[i]);
287 void rtw_vif_port_config(struct rtw_dev *rtwdev,
288 struct rtw_vif *rtwvif,
293 if (config & PORT_SET_MAC_ADDR) {
294 addr = rtwvif->conf->mac_addr.addr;
295 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
297 if (config & PORT_SET_BSSID) {
298 addr = rtwvif->conf->bssid.addr;
299 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
301 if (config & PORT_SET_NET_TYPE) {
302 addr = rtwvif->conf->net_type.addr;
303 mask = rtwvif->conf->net_type.mask;
304 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
306 if (config & PORT_SET_AID) {
307 addr = rtwvif->conf->aid.addr;
308 mask = rtwvif->conf->aid.mask;
309 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
313 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
318 case EFUSE_HW_CAP_IGNORE:
319 case EFUSE_HW_CAP_SUPP_BW80:
320 bw |= BIT(RTW_CHANNEL_WIDTH_80);
322 case EFUSE_HW_CAP_SUPP_BW40:
323 bw |= BIT(RTW_CHANNEL_WIDTH_40);
326 bw |= BIT(RTW_CHANNEL_WIDTH_20);
333 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
335 struct rtw_hal *hal = &rtwdev->hal;
337 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
338 hw_ant_num >= hal->rf_path_num)
341 switch (hw_ant_num) {
343 hal->rf_type = RF_1T1R;
344 hal->rf_path_num = 1;
345 hal->antenna_tx = BB_PATH_A;
346 hal->antenna_rx = BB_PATH_A;
349 WARN(1, "invalid hw configuration from efuse\n");
354 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
357 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
361 /* 4SS, every two bits for MCS7/8/9 */
362 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
363 vht_mcs_cap = mcs_map & 0x3;
364 switch (vht_mcs_cap) {
366 ra_mask |= 0x3ffULL << nss;
369 ra_mask |= 0x1ffULL << nss;
372 ra_mask |= 0x0ffULL << nss;
382 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
386 switch (wireless_set) {
388 rate_id = RTW_RATEID_B_20M;
391 rate_id = RTW_RATEID_G;
393 case WIRELESS_CCK | WIRELESS_OFDM:
394 rate_id = RTW_RATEID_BG;
396 case WIRELESS_OFDM | WIRELESS_HT:
398 rate_id = RTW_RATEID_GN_N1SS;
399 else if (tx_num == 2)
400 rate_id = RTW_RATEID_GN_N2SS;
401 else if (tx_num == 3)
402 rate_id = RTW_RATEID_ARFR5_N_3SS;
404 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
405 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
407 rate_id = RTW_RATEID_BGN_40M_1SS;
408 else if (tx_num == 2)
409 rate_id = RTW_RATEID_BGN_40M_2SS;
410 else if (tx_num == 3)
411 rate_id = RTW_RATEID_ARFR5_N_3SS;
412 else if (tx_num == 4)
413 rate_id = RTW_RATEID_ARFR7_N_4SS;
416 rate_id = RTW_RATEID_BGN_20M_1SS;
417 else if (tx_num == 2)
418 rate_id = RTW_RATEID_BGN_20M_2SS;
419 else if (tx_num == 3)
420 rate_id = RTW_RATEID_ARFR5_N_3SS;
421 else if (tx_num == 4)
422 rate_id = RTW_RATEID_ARFR7_N_4SS;
425 case WIRELESS_OFDM | WIRELESS_VHT:
427 rate_id = RTW_RATEID_ARFR1_AC_1SS;
428 else if (tx_num == 2)
429 rate_id = RTW_RATEID_ARFR0_AC_2SS;
430 else if (tx_num == 3)
431 rate_id = RTW_RATEID_ARFR4_AC_3SS;
432 else if (tx_num == 4)
433 rate_id = RTW_RATEID_ARFR6_AC_4SS;
435 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
436 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
438 rate_id = RTW_RATEID_ARFR1_AC_1SS;
439 else if (tx_num == 2)
440 rate_id = RTW_RATEID_ARFR0_AC_2SS;
441 else if (tx_num == 3)
442 rate_id = RTW_RATEID_ARFR4_AC_3SS;
443 else if (tx_num == 4)
444 rate_id = RTW_RATEID_ARFR6_AC_4SS;
447 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
448 else if (tx_num == 2)
449 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
450 else if (tx_num == 3)
451 rate_id = RTW_RATEID_ARFR4_AC_3SS;
452 else if (tx_num == 4)
453 rate_id = RTW_RATEID_ARFR6_AC_4SS;
463 #define RA_MASK_CCK_RATES 0x0000f
464 #define RA_MASK_OFDM_RATES 0x00ff0
465 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
466 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
467 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
468 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
469 RA_MASK_HT_RATES_2SS | \
470 RA_MASK_HT_RATES_3SS)
471 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
472 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
473 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
474 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
475 RA_MASK_VHT_RATES_2SS | \
476 RA_MASK_VHT_RATES_3SS)
477 #define RA_MASK_CCK_IN_HT 0x00005
478 #define RA_MASK_CCK_IN_VHT 0x00005
479 #define RA_MASK_OFDM_IN_VHT 0x00010
480 #define RA_MASK_OFDM_IN_HT_2G 0x00010
481 #define RA_MASK_OFDM_IN_HT_5G 0x00030
483 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
485 struct ieee80211_sta *sta = si->sta;
486 struct rtw_efuse *efuse = &rtwdev->efuse;
487 struct rtw_hal *hal = &rtwdev->hal;
492 u8 rf_type = RF_1T1R;
497 bool is_vht_enable = false;
498 bool is_support_sgi = false;
500 if (sta->vht_cap.vht_supported) {
501 is_vht_enable = true;
502 ra_mask |= get_vht_ra_mask(sta);
503 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
504 stbc_en = VHT_STBC_EN;
505 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
506 ldpc_en = VHT_LDPC_EN;
507 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
508 is_support_sgi = true;
509 } else if (sta->ht_cap.ht_supported) {
510 ra_mask |= (sta->ht_cap.mcs.rx_mask[NL80211_BAND_5GHZ] << 20) |
511 (sta->ht_cap.mcs.rx_mask[NL80211_BAND_2GHZ] << 12);
512 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
513 stbc_en = HT_STBC_EN;
514 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
515 ldpc_en = HT_LDPC_EN;
516 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
517 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
518 is_support_sgi = true;
521 if (hal->current_band_type == RTW_BAND_5G) {
522 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
523 if (sta->vht_cap.vht_supported) {
524 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
525 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
526 } else if (sta->ht_cap.ht_supported) {
527 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
528 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
530 wireless_set = WIRELESS_OFDM;
532 } else if (hal->current_band_type == RTW_BAND_2G) {
533 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
534 if (sta->vht_cap.vht_supported) {
535 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
537 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
538 WIRELESS_HT | WIRELESS_VHT;
539 } else if (sta->ht_cap.ht_supported) {
540 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
541 RA_MASK_OFDM_IN_HT_2G;
542 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
544 } else if (sta->supp_rates[0] <= 0xf) {
545 wireless_set = WIRELESS_CCK;
547 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
550 rtw_err(rtwdev, "Unknown band type\n");
554 if (efuse->hw_cap.nss == 1) {
555 ra_mask &= RA_MASK_VHT_RATES_1SS;
556 ra_mask &= RA_MASK_HT_RATES_1SS;
559 switch (sta->bandwidth) {
560 case IEEE80211_STA_RX_BW_80:
561 bw_mode = RTW_CHANNEL_WIDTH_80;
563 case IEEE80211_STA_RX_BW_40:
564 bw_mode = RTW_CHANNEL_WIDTH_40;
567 bw_mode = RTW_CHANNEL_WIDTH_20;
571 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
574 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
579 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
581 if (wireless_set != WIRELESS_CCK) {
582 rssi_level = si->rssi_level;
584 ra_mask &= 0xffffffffffffffffULL;
585 else if (rssi_level == 1)
586 ra_mask &= 0xfffffffffffffff0ULL;
587 else if (rssi_level == 2)
588 ra_mask &= 0xffffffffffffefe0ULL;
589 else if (rssi_level == 3)
590 ra_mask &= 0xffffffffffffcfc0ULL;
591 else if (rssi_level == 4)
592 ra_mask &= 0xffffffffffff8f80ULL;
593 else if (rssi_level >= 5)
594 ra_mask &= 0xffffffffffff0f00ULL;
597 si->bw_mode = bw_mode;
598 si->stbc_en = stbc_en;
599 si->ldpc_en = ldpc_en;
600 si->rf_type = rf_type;
601 si->wireless_set = wireless_set;
602 si->sgi_enable = is_support_sgi;
603 si->vht_enable = is_vht_enable;
604 si->ra_mask = ra_mask;
605 si->rate_id = rate_id;
607 rtw_fw_send_ra_info(rtwdev, si);
610 static int rtw_power_on(struct rtw_dev *rtwdev)
612 struct rtw_chip_info *chip = rtwdev->chip;
613 struct rtw_fw_state *fw = &rtwdev->fw;
616 ret = rtw_hci_setup(rtwdev);
618 rtw_err(rtwdev, "failed to setup hci\n");
622 /* power on MAC before firmware downloaded */
623 ret = rtw_mac_power_on(rtwdev);
625 rtw_err(rtwdev, "failed to power on mac\n");
629 wait_for_completion(&fw->completion);
632 rtw_err(rtwdev, "failed to load firmware\n");
636 ret = rtw_download_firmware(rtwdev, fw);
638 rtw_err(rtwdev, "failed to download firmware\n");
642 /* config mac after firmware downloaded */
643 ret = rtw_mac_init(rtwdev);
645 rtw_err(rtwdev, "failed to configure mac\n");
649 chip->ops->phy_set_param(rtwdev);
651 ret = rtw_hci_start(rtwdev);
653 rtw_err(rtwdev, "failed to start hci\n");
660 rtw_mac_power_off(rtwdev);
666 int rtw_core_start(struct rtw_dev *rtwdev)
670 ret = rtw_power_on(rtwdev);
674 rtw_sec_enable_sec_engine(rtwdev);
676 /* rcr reset after powered on */
677 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
679 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
680 RTW_WATCH_DOG_DELAY_TIME);
682 rtw_flag_set(rtwdev, RTW_FLAG_RUNNING);
687 static void rtw_power_off(struct rtw_dev *rtwdev)
689 rtwdev->hci.ops->stop(rtwdev);
690 rtw_mac_power_off(rtwdev);
693 void rtw_core_stop(struct rtw_dev *rtwdev)
695 rtw_flag_clear(rtwdev, RTW_FLAG_RUNNING);
696 rtw_flag_clear(rtwdev, RTW_FLAG_FW_RUNNING);
698 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
700 rtw_power_off(rtwdev);
703 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
704 struct ieee80211_sta_ht_cap *ht_cap)
706 struct rtw_efuse *efuse = &rtwdev->efuse;
708 ht_cap->ht_supported = true;
710 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
711 IEEE80211_HT_CAP_MAX_AMSDU |
712 IEEE80211_HT_CAP_LDPC_CODING |
713 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
714 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
715 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
716 IEEE80211_HT_CAP_DSSSCCK40 |
717 IEEE80211_HT_CAP_SGI_40;
718 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
719 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
720 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
721 if (efuse->hw_cap.nss > 1) {
722 ht_cap->mcs.rx_mask[0] = 0xFF;
723 ht_cap->mcs.rx_mask[1] = 0xFF;
724 ht_cap->mcs.rx_mask[4] = 0x01;
725 ht_cap->mcs.rx_highest = cpu_to_le16(300);
727 ht_cap->mcs.rx_mask[0] = 0xFF;
728 ht_cap->mcs.rx_mask[1] = 0x00;
729 ht_cap->mcs.rx_mask[4] = 0x01;
730 ht_cap->mcs.rx_highest = cpu_to_le16(150);
734 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
735 struct ieee80211_sta_vht_cap *vht_cap)
737 struct rtw_efuse *efuse = &rtwdev->efuse;
741 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
742 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
745 vht_cap->vht_supported = true;
746 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
747 IEEE80211_VHT_CAP_RXLDPC |
748 IEEE80211_VHT_CAP_SHORT_GI_80 |
749 IEEE80211_VHT_CAP_TXSTBC |
750 IEEE80211_VHT_CAP_RXSTBC_1 |
751 IEEE80211_VHT_CAP_HTC_VHT |
752 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
754 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
755 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
756 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
757 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
758 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
759 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
760 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
761 if (efuse->hw_cap.nss > 1) {
762 highest = cpu_to_le16(780);
763 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
765 highest = cpu_to_le16(390);
766 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
769 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
770 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
771 vht_cap->vht_mcs.rx_highest = highest;
772 vht_cap->vht_mcs.tx_highest = highest;
775 static void rtw_set_supported_band(struct ieee80211_hw *hw,
776 struct rtw_chip_info *chip)
778 struct rtw_dev *rtwdev = hw->priv;
779 struct ieee80211_supported_band *sband;
781 if (chip->band & RTW_BAND_2G) {
782 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
785 if (chip->ht_supported)
786 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
787 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
790 if (chip->band & RTW_BAND_5G) {
791 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
794 if (chip->ht_supported)
795 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
796 if (chip->vht_supported)
797 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
798 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
804 rtw_err(rtwdev, "failed to set supported band\n");
808 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
809 struct rtw_chip_info *chip)
811 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
812 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
815 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
817 struct rtw_dev *rtwdev = context;
818 struct rtw_fw_state *fw = &rtwdev->fw;
821 rtw_err(rtwdev, "failed to request firmware\n");
823 fw->firmware = firmware;
824 complete_all(&fw->completion);
827 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
829 struct rtw_fw_state *fw = &rtwdev->fw;
832 init_completion(&fw->completion);
834 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
835 GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
837 rtw_err(rtwdev, "async firmware request failed\n");
844 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
846 struct rtw_chip_info *chip = rtwdev->chip;
847 struct rtw_hal *hal = &rtwdev->hal;
848 struct rtw_efuse *efuse = &rtwdev->efuse;
852 switch (rtw_hci_type(rtwdev)) {
853 case RTW_HCI_TYPE_PCIE:
854 rtwdev->hci.rpwm_addr = 0x03d9;
857 rtw_err(rtwdev, "unsupported hci type\n");
861 wl_bt_pwr_ctrl = rtw_read32(rtwdev, REG_WL_BT_PWR_CTRL);
862 if (wl_bt_pwr_ctrl & BIT_BT_FUNC_EN)
863 rtwdev->efuse.btcoex = true;
864 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
865 hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
866 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
867 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
868 if (hal->chip_version & BIT_RF_TYPE_ID) {
869 hal->rf_type = RF_2T2R;
870 hal->rf_path_num = 2;
871 hal->antenna_tx = BB_PATH_AB;
872 hal->antenna_rx = BB_PATH_AB;
874 hal->rf_type = RF_1T1R;
875 hal->rf_path_num = 1;
876 hal->antenna_tx = BB_PATH_A;
877 hal->antenna_rx = BB_PATH_A;
880 if (hal->fab_version == 2)
881 hal->fab_version = 1;
882 else if (hal->fab_version == 1)
883 hal->fab_version = 2;
885 efuse->physical_size = chip->phy_efuse_size;
886 efuse->logical_size = chip->log_efuse_size;
887 efuse->protect_size = chip->ptct_efuse_size;
889 /* default use ack */
890 rtwdev->hal.rcr |= BIT_VHT_DACK;
895 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
897 struct rtw_fw_state *fw = &rtwdev->fw;
900 ret = rtw_hci_setup(rtwdev);
902 rtw_err(rtwdev, "failed to setup hci\n");
906 ret = rtw_mac_power_on(rtwdev);
908 rtw_err(rtwdev, "failed to power on mac\n");
912 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
914 wait_for_completion(&fw->completion);
917 rtw_err(rtwdev, "failed to load firmware\n");
921 ret = rtw_download_firmware(rtwdev, fw);
923 rtw_err(rtwdev, "failed to download firmware\n");
930 rtw_mac_power_off(rtwdev);
936 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
938 struct rtw_efuse *efuse = &rtwdev->efuse;
939 u8 hw_feature[HW_FEATURE_LEN];
944 id = rtw_read8(rtwdev, REG_C2HEVT);
945 if (id != C2H_HW_FEATURE_REPORT) {
946 rtw_err(rtwdev, "failed to read hw feature report\n");
950 for (i = 0; i < HW_FEATURE_LEN; i++)
951 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
953 rtw_write8(rtwdev, REG_C2HEVT, 0);
955 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
956 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
957 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
958 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
959 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
960 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
962 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
964 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE)
965 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
967 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
968 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
969 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
970 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
975 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
977 rtw_hci_stop(rtwdev);
978 rtw_mac_power_off(rtwdev);
981 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
983 struct rtw_efuse *efuse = &rtwdev->efuse;
986 mutex_lock(&rtwdev->mutex);
988 /* power on mac to read efuse */
989 ret = rtw_chip_efuse_enable(rtwdev);
993 ret = rtw_parse_efuse_map(rtwdev);
997 ret = rtw_dump_hw_feature(rtwdev);
1001 ret = rtw_check_supported_rfe(rtwdev);
1005 if (efuse->crystal_cap == 0xff)
1006 efuse->crystal_cap = 0;
1007 if (efuse->pa_type_2g == 0xff)
1008 efuse->pa_type_2g = 0;
1009 if (efuse->pa_type_5g == 0xff)
1010 efuse->pa_type_5g = 0;
1011 if (efuse->lna_type_2g == 0xff)
1012 efuse->lna_type_2g = 0;
1013 if (efuse->lna_type_5g == 0xff)
1014 efuse->lna_type_5g = 0;
1015 if (efuse->channel_plan == 0xff)
1016 efuse->channel_plan = 0x7f;
1017 if (efuse->bt_setting & BIT(0))
1018 efuse->share_ant = true;
1019 if (efuse->regd == 0xff)
1022 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1023 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1024 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1025 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1027 rtw_chip_efuse_disable(rtwdev);
1030 mutex_unlock(&rtwdev->mutex);
1034 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1036 struct rtw_hal *hal = &rtwdev->hal;
1037 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1042 rtw_phy_setup_phy_cond(rtwdev, 0);
1044 rtw_hw_init_tx_power(hal);
1045 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1046 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1047 rtw_phy_tx_power_by_rate_config(hal);
1048 rtw_phy_tx_power_limit_config(hal);
1053 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1057 ret = rtw_chip_parameter_setup(rtwdev);
1059 rtw_err(rtwdev, "failed to setup chip parameters\n");
1063 ret = rtw_chip_efuse_info_setup(rtwdev);
1065 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1069 ret = rtw_chip_board_info_setup(rtwdev);
1071 rtw_err(rtwdev, "failed to setup chip board info\n");
1080 EXPORT_SYMBOL(rtw_chip_info_setup);
1082 int rtw_core_init(struct rtw_dev *rtwdev)
1086 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1088 timer_setup(&rtwdev->tx_report.purge_timer,
1089 rtw_tx_report_purge_timer, 0);
1091 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1092 INIT_DELAYED_WORK(&rtwdev->lps_work, rtw_lps_work);
1093 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1094 skb_queue_head_init(&rtwdev->c2h_queue);
1095 skb_queue_head_init(&rtwdev->tx_report.queue);
1097 spin_lock_init(&rtwdev->dm_lock);
1098 spin_lock_init(&rtwdev->rf_lock);
1099 spin_lock_init(&rtwdev->h2c.lock);
1100 spin_lock_init(&rtwdev->tx_report.q_lock);
1102 mutex_init(&rtwdev->mutex);
1103 mutex_init(&rtwdev->hal.tx_power_mutex);
1105 rtwdev->sec.total_cam_num = 32;
1106 rtwdev->hal.current_channel = 1;
1107 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1109 mutex_lock(&rtwdev->mutex);
1110 rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1111 mutex_unlock(&rtwdev->mutex);
1113 /* default rx filter setting */
1114 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1115 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1116 BIT_AB | BIT_AM | BIT_APM;
1118 ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1120 rtw_warn(rtwdev, "no firmware loaded\n");
1126 EXPORT_SYMBOL(rtw_core_init);
1128 void rtw_core_deinit(struct rtw_dev *rtwdev)
1130 struct rtw_fw_state *fw = &rtwdev->fw;
1131 struct rtw_rsvd_page *rsvd_pkt, *tmp;
1132 unsigned long flags;
1135 release_firmware(fw->firmware);
1137 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1138 skb_queue_purge(&rtwdev->tx_report.queue);
1139 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1141 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1142 list_del(&rsvd_pkt->list);
1146 mutex_destroy(&rtwdev->mutex);
1147 mutex_destroy(&rtwdev->hal.tx_power_mutex);
1149 EXPORT_SYMBOL(rtw_core_deinit);
1151 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1153 int max_tx_headroom = 0;
1156 /* TODO: USB & SDIO may need extra room? */
1157 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1159 hw->extra_tx_headroom = max_tx_headroom;
1160 hw->queues = IEEE80211_NUM_ACS;
1161 hw->sta_data_size = sizeof(struct rtw_sta_info);
1162 hw->vif_data_size = sizeof(struct rtw_vif);
1164 ieee80211_hw_set(hw, SIGNAL_DBM);
1165 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1166 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1167 ieee80211_hw_set(hw, MFP_CAPABLE);
1168 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1169 ieee80211_hw_set(hw, SUPPORTS_PS);
1170 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1172 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1173 BIT(NL80211_IFTYPE_AP) |
1174 BIT(NL80211_IFTYPE_ADHOC) |
1175 BIT(NL80211_IFTYPE_MESH_POINT);
1177 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1178 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1180 rtw_set_supported_band(hw, rtwdev->chip);
1181 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1183 rtw_regd_init(rtwdev, rtw_regd_notifier);
1185 ret = ieee80211_register_hw(hw);
1187 rtw_err(rtwdev, "failed to register hw\n");
1191 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1192 rtw_err(rtwdev, "regulatory_hint fail\n");
1194 rtw_debugfs_init(rtwdev);
1198 EXPORT_SYMBOL(rtw_register_hw);
1200 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1202 struct rtw_chip_info *chip = rtwdev->chip;
1204 ieee80211_unregister_hw(hw);
1205 rtw_unset_supported_band(hw, chip);
1207 EXPORT_SYMBOL(rtw_unregister_hw);
1209 MODULE_AUTHOR("Realtek Corporation");
1210 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1211 MODULE_LICENSE("Dual BSD/GPL");