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rtw88: add TX-AMSDU support
[linux.git] / drivers / net / wireless / realtek / rtw88 / main.c
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019  Realtek Corporation
3  */
4
5 #include "main.h"
6 #include "regd.h"
7 #include "fw.h"
8 #include "ps.h"
9 #include "sec.h"
10 #include "mac.h"
11 #include "coex.h"
12 #include "phy.h"
13 #include "reg.h"
14 #include "efuse.h"
15 #include "tx.h"
16 #include "debug.h"
17
18 unsigned int rtw_fw_lps_deep_mode;
19 EXPORT_SYMBOL(rtw_fw_lps_deep_mode);
20 unsigned int rtw_debug_mask;
21 EXPORT_SYMBOL(rtw_debug_mask);
22
23 module_param_named(lps_deep_mode, rtw_fw_lps_deep_mode, uint, 0644);
24 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
25
26 MODULE_PARM_DESC(lps_deep_mode, "Deeper PS mode. If 0, deep PS is disabled");
27 MODULE_PARM_DESC(debug_mask, "Debugging mask");
28
29 static struct ieee80211_channel rtw_channeltable_2g[] = {
30         {.center_freq = 2412, .hw_value = 1,},
31         {.center_freq = 2417, .hw_value = 2,},
32         {.center_freq = 2422, .hw_value = 3,},
33         {.center_freq = 2427, .hw_value = 4,},
34         {.center_freq = 2432, .hw_value = 5,},
35         {.center_freq = 2437, .hw_value = 6,},
36         {.center_freq = 2442, .hw_value = 7,},
37         {.center_freq = 2447, .hw_value = 8,},
38         {.center_freq = 2452, .hw_value = 9,},
39         {.center_freq = 2457, .hw_value = 10,},
40         {.center_freq = 2462, .hw_value = 11,},
41         {.center_freq = 2467, .hw_value = 12,},
42         {.center_freq = 2472, .hw_value = 13,},
43         {.center_freq = 2484, .hw_value = 14,},
44 };
45
46 static struct ieee80211_channel rtw_channeltable_5g[] = {
47         {.center_freq = 5180, .hw_value = 36,},
48         {.center_freq = 5200, .hw_value = 40,},
49         {.center_freq = 5220, .hw_value = 44,},
50         {.center_freq = 5240, .hw_value = 48,},
51         {.center_freq = 5260, .hw_value = 52,},
52         {.center_freq = 5280, .hw_value = 56,},
53         {.center_freq = 5300, .hw_value = 60,},
54         {.center_freq = 5320, .hw_value = 64,},
55         {.center_freq = 5500, .hw_value = 100,},
56         {.center_freq = 5520, .hw_value = 104,},
57         {.center_freq = 5540, .hw_value = 108,},
58         {.center_freq = 5560, .hw_value = 112,},
59         {.center_freq = 5580, .hw_value = 116,},
60         {.center_freq = 5600, .hw_value = 120,},
61         {.center_freq = 5620, .hw_value = 124,},
62         {.center_freq = 5640, .hw_value = 128,},
63         {.center_freq = 5660, .hw_value = 132,},
64         {.center_freq = 5680, .hw_value = 136,},
65         {.center_freq = 5700, .hw_value = 140,},
66         {.center_freq = 5745, .hw_value = 149,},
67         {.center_freq = 5765, .hw_value = 153,},
68         {.center_freq = 5785, .hw_value = 157,},
69         {.center_freq = 5805, .hw_value = 161,},
70         {.center_freq = 5825, .hw_value = 165,
71          .flags = IEEE80211_CHAN_NO_HT40MINUS},
72 };
73
74 static struct ieee80211_rate rtw_ratetable[] = {
75         {.bitrate = 10, .hw_value = 0x00,},
76         {.bitrate = 20, .hw_value = 0x01,},
77         {.bitrate = 55, .hw_value = 0x02,},
78         {.bitrate = 110, .hw_value = 0x03,},
79         {.bitrate = 60, .hw_value = 0x04,},
80         {.bitrate = 90, .hw_value = 0x05,},
81         {.bitrate = 120, .hw_value = 0x06,},
82         {.bitrate = 180, .hw_value = 0x07,},
83         {.bitrate = 240, .hw_value = 0x08,},
84         {.bitrate = 360, .hw_value = 0x09,},
85         {.bitrate = 480, .hw_value = 0x0a,},
86         {.bitrate = 540, .hw_value = 0x0b,},
87 };
88
89 u16 rtw_desc_to_bitrate(u8 desc_rate)
90 {
91         struct ieee80211_rate rate;
92
93         if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
94                 return 0;
95
96         rate = rtw_ratetable[desc_rate];
97
98         return rate.bitrate;
99 }
100
101 static struct ieee80211_supported_band rtw_band_2ghz = {
102         .band = NL80211_BAND_2GHZ,
103
104         .channels = rtw_channeltable_2g,
105         .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
106
107         .bitrates = rtw_ratetable,
108         .n_bitrates = ARRAY_SIZE(rtw_ratetable),
109
110         .ht_cap = {0},
111         .vht_cap = {0},
112 };
113
114 static struct ieee80211_supported_band rtw_band_5ghz = {
115         .band = NL80211_BAND_5GHZ,
116
117         .channels = rtw_channeltable_5g,
118         .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
119
120         /* 5G has no CCK rates */
121         .bitrates = rtw_ratetable + 4,
122         .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
123
124         .ht_cap = {0},
125         .vht_cap = {0},
126 };
127
128 struct rtw_watch_dog_iter_data {
129         struct rtw_vif *rtwvif;
130 };
131
132 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
133                                    struct ieee80211_vif *vif)
134 {
135         struct rtw_watch_dog_iter_data *iter_data = data;
136         struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
137
138         if (vif->type == NL80211_IFTYPE_STATION)
139                 if (vif->bss_conf.assoc)
140                         iter_data->rtwvif = rtwvif;
141
142         rtwvif->stats.tx_unicast = 0;
143         rtwvif->stats.rx_unicast = 0;
144         rtwvif->stats.tx_cnt = 0;
145         rtwvif->stats.rx_cnt = 0;
146 }
147
148 /* process TX/RX statistics periodically for hardware,
149  * the information helps hardware to enhance performance
150  */
151 static void rtw_watch_dog_work(struct work_struct *work)
152 {
153         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
154                                               watch_dog_work.work);
155         struct rtw_watch_dog_iter_data data = {};
156         bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
157         bool ps_active;
158
159         mutex_lock(&rtwdev->mutex);
160
161         if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
162                 goto unlock;
163
164         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
165                                      RTW_WATCH_DOG_DELAY_TIME);
166
167         if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
168                 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
169         else
170                 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
171
172         if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
173                 rtw_coex_wl_status_change_notify(rtwdev);
174
175         if (rtwdev->stats.tx_cnt > RTW_LPS_THRESHOLD ||
176             rtwdev->stats.rx_cnt > RTW_LPS_THRESHOLD)
177                 ps_active = true;
178         else
179                 ps_active = false;
180
181         /* reset tx/rx statictics */
182         rtwdev->stats.tx_unicast = 0;
183         rtwdev->stats.rx_unicast = 0;
184         rtwdev->stats.tx_cnt = 0;
185         rtwdev->stats.rx_cnt = 0;
186
187         if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
188                 goto unlock;
189
190         /* make sure BB/RF is working for dynamic mech */
191         rtw_leave_lps(rtwdev);
192
193         rtw_phy_dynamic_mechanism(rtwdev);
194
195         /* use atomic version to avoid taking local->iflist_mtx mutex */
196         rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
197
198         /* fw supports only one station associated to enter lps, if there are
199          * more than two stations associated to the AP, then we can not enter
200          * lps, because fw does not handle the overlapped beacon interval
201          *
202          * mac80211 should iterate vifs and determine if driver can enter
203          * ps by passing IEEE80211_CONF_PS to us, all we need to do is to
204          * get that vif and check if device is having traffic more than the
205          * threshold.
206          */
207         if (rtwdev->ps_enabled && data.rtwvif && !ps_active)
208                 rtw_enter_lps(rtwdev, data.rtwvif->port);
209
210         rtwdev->watch_dog_cnt++;
211
212 unlock:
213         mutex_unlock(&rtwdev->mutex);
214 }
215
216 static void rtw_c2h_work(struct work_struct *work)
217 {
218         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
219         struct sk_buff *skb, *tmp;
220
221         skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
222                 skb_unlink(skb, &rtwdev->c2h_queue);
223                 rtw_fw_c2h_cmd_handle(rtwdev, skb);
224                 dev_kfree_skb_any(skb);
225         }
226 }
227
228 struct rtw_txq_ba_iter_data {
229 };
230
231 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
232 {
233         struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
234         int ret;
235         u8 tid;
236
237         tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
238         while (tid != IEEE80211_NUM_TIDS) {
239                 clear_bit(tid, si->tid_ba);
240                 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
241                 if (ret == -EINVAL) {
242                         struct ieee80211_txq *txq;
243                         struct rtw_txq *rtwtxq;
244
245                         txq = sta->txq[tid];
246                         rtwtxq = (struct rtw_txq *)txq->drv_priv;
247                         set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
248                 }
249
250                 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
251         }
252 }
253
254 static void rtw_txq_ba_work(struct work_struct *work)
255 {
256         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
257         struct rtw_txq_ba_iter_data data;
258
259         rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
260 }
261
262 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
263                             struct rtw_channel_params *chan_params)
264 {
265         struct ieee80211_channel *channel = chandef->chan;
266         enum nl80211_chan_width width = chandef->width;
267         u8 *cch_by_bw = chan_params->cch_by_bw;
268         u32 primary_freq, center_freq;
269         u8 center_chan;
270         u8 bandwidth = RTW_CHANNEL_WIDTH_20;
271         u8 primary_chan_idx = 0;
272         u8 i;
273
274         center_chan = channel->hw_value;
275         primary_freq = channel->center_freq;
276         center_freq = chandef->center_freq1;
277
278         /* assign the center channel used while 20M bw is selected */
279         cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
280
281         switch (width) {
282         case NL80211_CHAN_WIDTH_20_NOHT:
283         case NL80211_CHAN_WIDTH_20:
284                 bandwidth = RTW_CHANNEL_WIDTH_20;
285                 primary_chan_idx = 0;
286                 break;
287         case NL80211_CHAN_WIDTH_40:
288                 bandwidth = RTW_CHANNEL_WIDTH_40;
289                 if (primary_freq > center_freq) {
290                         primary_chan_idx = 1;
291                         center_chan -= 2;
292                 } else {
293                         primary_chan_idx = 2;
294                         center_chan += 2;
295                 }
296                 break;
297         case NL80211_CHAN_WIDTH_80:
298                 bandwidth = RTW_CHANNEL_WIDTH_80;
299                 if (primary_freq > center_freq) {
300                         if (primary_freq - center_freq == 10) {
301                                 primary_chan_idx = 1;
302                                 center_chan -= 2;
303                         } else {
304                                 primary_chan_idx = 3;
305                                 center_chan -= 6;
306                         }
307                         /* assign the center channel used
308                          * while 40M bw is selected
309                          */
310                         cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
311                 } else {
312                         if (center_freq - primary_freq == 10) {
313                                 primary_chan_idx = 2;
314                                 center_chan += 2;
315                         } else {
316                                 primary_chan_idx = 4;
317                                 center_chan += 6;
318                         }
319                         /* assign the center channel used
320                          * while 40M bw is selected
321                          */
322                         cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
323                 }
324                 break;
325         default:
326                 center_chan = 0;
327                 break;
328         }
329
330         chan_params->center_chan = center_chan;
331         chan_params->bandwidth = bandwidth;
332         chan_params->primary_chan_idx = primary_chan_idx;
333
334         /* assign the center channel used while current bw is selected */
335         cch_by_bw[bandwidth] = center_chan;
336
337         for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
338                 cch_by_bw[i] = 0;
339 }
340
341 void rtw_set_channel(struct rtw_dev *rtwdev)
342 {
343         struct ieee80211_hw *hw = rtwdev->hw;
344         struct rtw_hal *hal = &rtwdev->hal;
345         struct rtw_chip_info *chip = rtwdev->chip;
346         struct rtw_channel_params ch_param;
347         u8 center_chan, bandwidth, primary_chan_idx;
348         u8 i;
349
350         rtw_get_channel_params(&hw->conf.chandef, &ch_param);
351         if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
352                 return;
353
354         center_chan = ch_param.center_chan;
355         bandwidth = ch_param.bandwidth;
356         primary_chan_idx = ch_param.primary_chan_idx;
357
358         hal->current_band_width = bandwidth;
359         hal->current_channel = center_chan;
360         hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
361
362         for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
363                 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
364
365         chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
366
367         if (hal->current_band_type == RTW_BAND_5G) {
368                 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
369         } else {
370                 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
371                         rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
372                 else
373                         rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
374         }
375
376         rtw_phy_set_tx_power_level(rtwdev, center_chan);
377 }
378
379 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
380 {
381         int i;
382
383         for (i = 0; i < ETH_ALEN; i++)
384                 rtw_write8(rtwdev, start + i, addr[i]);
385 }
386
387 void rtw_vif_port_config(struct rtw_dev *rtwdev,
388                          struct rtw_vif *rtwvif,
389                          u32 config)
390 {
391         u32 addr, mask;
392
393         if (config & PORT_SET_MAC_ADDR) {
394                 addr = rtwvif->conf->mac_addr.addr;
395                 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
396         }
397         if (config & PORT_SET_BSSID) {
398                 addr = rtwvif->conf->bssid.addr;
399                 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
400         }
401         if (config & PORT_SET_NET_TYPE) {
402                 addr = rtwvif->conf->net_type.addr;
403                 mask = rtwvif->conf->net_type.mask;
404                 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
405         }
406         if (config & PORT_SET_AID) {
407                 addr = rtwvif->conf->aid.addr;
408                 mask = rtwvif->conf->aid.mask;
409                 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
410         }
411         if (config & PORT_SET_BCN_CTRL) {
412                 addr = rtwvif->conf->bcn_ctrl.addr;
413                 mask = rtwvif->conf->bcn_ctrl.mask;
414                 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
415         }
416 }
417
418 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
419 {
420         u8 bw = 0;
421
422         switch (bw_cap) {
423         case EFUSE_HW_CAP_IGNORE:
424         case EFUSE_HW_CAP_SUPP_BW80:
425                 bw |= BIT(RTW_CHANNEL_WIDTH_80);
426                 /* fall through */
427         case EFUSE_HW_CAP_SUPP_BW40:
428                 bw |= BIT(RTW_CHANNEL_WIDTH_40);
429                 /* fall through */
430         default:
431                 bw |= BIT(RTW_CHANNEL_WIDTH_20);
432                 break;
433         }
434
435         return bw;
436 }
437
438 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
439 {
440         struct rtw_hal *hal = &rtwdev->hal;
441
442         if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
443             hw_ant_num >= hal->rf_path_num)
444                 return;
445
446         switch (hw_ant_num) {
447         case 1:
448                 hal->rf_type = RF_1T1R;
449                 hal->rf_path_num = 1;
450                 hal->antenna_tx = BB_PATH_A;
451                 hal->antenna_rx = BB_PATH_A;
452                 break;
453         default:
454                 WARN(1, "invalid hw configuration from efuse\n");
455                 break;
456         }
457 }
458
459 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
460 {
461         u64 ra_mask = 0;
462         u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
463         u8 vht_mcs_cap;
464         int i, nss;
465
466         /* 4SS, every two bits for MCS7/8/9 */
467         for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
468                 vht_mcs_cap = mcs_map & 0x3;
469                 switch (vht_mcs_cap) {
470                 case 2: /* MCS9 */
471                         ra_mask |= 0x3ffULL << nss;
472                         break;
473                 case 1: /* MCS8 */
474                         ra_mask |= 0x1ffULL << nss;
475                         break;
476                 case 0: /* MCS7 */
477                         ra_mask |= 0x0ffULL << nss;
478                         break;
479                 default:
480                         break;
481                 }
482         }
483
484         return ra_mask;
485 }
486
487 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
488 {
489         u8 rate_id = 0;
490
491         switch (wireless_set) {
492         case WIRELESS_CCK:
493                 rate_id = RTW_RATEID_B_20M;
494                 break;
495         case WIRELESS_OFDM:
496                 rate_id = RTW_RATEID_G;
497                 break;
498         case WIRELESS_CCK | WIRELESS_OFDM:
499                 rate_id = RTW_RATEID_BG;
500                 break;
501         case WIRELESS_OFDM | WIRELESS_HT:
502                 if (tx_num == 1)
503                         rate_id = RTW_RATEID_GN_N1SS;
504                 else if (tx_num == 2)
505                         rate_id = RTW_RATEID_GN_N2SS;
506                 else if (tx_num == 3)
507                         rate_id = RTW_RATEID_ARFR5_N_3SS;
508                 break;
509         case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
510                 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
511                         if (tx_num == 1)
512                                 rate_id = RTW_RATEID_BGN_40M_1SS;
513                         else if (tx_num == 2)
514                                 rate_id = RTW_RATEID_BGN_40M_2SS;
515                         else if (tx_num == 3)
516                                 rate_id = RTW_RATEID_ARFR5_N_3SS;
517                         else if (tx_num == 4)
518                                 rate_id = RTW_RATEID_ARFR7_N_4SS;
519                 } else {
520                         if (tx_num == 1)
521                                 rate_id = RTW_RATEID_BGN_20M_1SS;
522                         else if (tx_num == 2)
523                                 rate_id = RTW_RATEID_BGN_20M_2SS;
524                         else if (tx_num == 3)
525                                 rate_id = RTW_RATEID_ARFR5_N_3SS;
526                         else if (tx_num == 4)
527                                 rate_id = RTW_RATEID_ARFR7_N_4SS;
528                 }
529                 break;
530         case WIRELESS_OFDM | WIRELESS_VHT:
531                 if (tx_num == 1)
532                         rate_id = RTW_RATEID_ARFR1_AC_1SS;
533                 else if (tx_num == 2)
534                         rate_id = RTW_RATEID_ARFR0_AC_2SS;
535                 else if (tx_num == 3)
536                         rate_id = RTW_RATEID_ARFR4_AC_3SS;
537                 else if (tx_num == 4)
538                         rate_id = RTW_RATEID_ARFR6_AC_4SS;
539                 break;
540         case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
541                 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
542                         if (tx_num == 1)
543                                 rate_id = RTW_RATEID_ARFR1_AC_1SS;
544                         else if (tx_num == 2)
545                                 rate_id = RTW_RATEID_ARFR0_AC_2SS;
546                         else if (tx_num == 3)
547                                 rate_id = RTW_RATEID_ARFR4_AC_3SS;
548                         else if (tx_num == 4)
549                                 rate_id = RTW_RATEID_ARFR6_AC_4SS;
550                 } else {
551                         if (tx_num == 1)
552                                 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
553                         else if (tx_num == 2)
554                                 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
555                         else if (tx_num == 3)
556                                 rate_id = RTW_RATEID_ARFR4_AC_3SS;
557                         else if (tx_num == 4)
558                                 rate_id = RTW_RATEID_ARFR6_AC_4SS;
559                 }
560                 break;
561         default:
562                 break;
563         }
564
565         return rate_id;
566 }
567
568 #define RA_MASK_CCK_RATES       0x0000f
569 #define RA_MASK_OFDM_RATES      0x00ff0
570 #define RA_MASK_HT_RATES_1SS    (0xff000ULL << 0)
571 #define RA_MASK_HT_RATES_2SS    (0xff000ULL << 8)
572 #define RA_MASK_HT_RATES_3SS    (0xff000ULL << 16)
573 #define RA_MASK_HT_RATES        (RA_MASK_HT_RATES_1SS | \
574                                  RA_MASK_HT_RATES_2SS | \
575                                  RA_MASK_HT_RATES_3SS)
576 #define RA_MASK_VHT_RATES_1SS   (0x3ff000ULL << 0)
577 #define RA_MASK_VHT_RATES_2SS   (0x3ff000ULL << 10)
578 #define RA_MASK_VHT_RATES_3SS   (0x3ff000ULL << 20)
579 #define RA_MASK_VHT_RATES       (RA_MASK_VHT_RATES_1SS | \
580                                  RA_MASK_VHT_RATES_2SS | \
581                                  RA_MASK_VHT_RATES_3SS)
582 #define RA_MASK_CCK_IN_HT       0x00005
583 #define RA_MASK_CCK_IN_VHT      0x00005
584 #define RA_MASK_OFDM_IN_VHT     0x00010
585 #define RA_MASK_OFDM_IN_HT_2G   0x00010
586 #define RA_MASK_OFDM_IN_HT_5G   0x00030
587
588 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
589 {
590         struct ieee80211_sta *sta = si->sta;
591         struct rtw_efuse *efuse = &rtwdev->efuse;
592         struct rtw_hal *hal = &rtwdev->hal;
593         u8 rssi_level;
594         u8 wireless_set;
595         u8 bw_mode;
596         u8 rate_id;
597         u8 rf_type = RF_1T1R;
598         u8 stbc_en = 0;
599         u8 ldpc_en = 0;
600         u8 tx_num = 1;
601         u64 ra_mask = 0;
602         bool is_vht_enable = false;
603         bool is_support_sgi = false;
604
605         if (sta->vht_cap.vht_supported) {
606                 is_vht_enable = true;
607                 ra_mask |= get_vht_ra_mask(sta);
608                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
609                         stbc_en = VHT_STBC_EN;
610                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
611                         ldpc_en = VHT_LDPC_EN;
612                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
613                         is_support_sgi = true;
614         } else if (sta->ht_cap.ht_supported) {
615                 ra_mask |= (sta->ht_cap.mcs.rx_mask[NL80211_BAND_5GHZ] << 20) |
616                            (sta->ht_cap.mcs.rx_mask[NL80211_BAND_2GHZ] << 12);
617                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
618                         stbc_en = HT_STBC_EN;
619                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
620                         ldpc_en = HT_LDPC_EN;
621                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
622                     sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
623                         is_support_sgi = true;
624         }
625
626         if (hal->current_band_type == RTW_BAND_5G) {
627                 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
628                 if (sta->vht_cap.vht_supported) {
629                         ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
630                         wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
631                 } else if (sta->ht_cap.ht_supported) {
632                         ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
633                         wireless_set = WIRELESS_OFDM | WIRELESS_HT;
634                 } else {
635                         wireless_set = WIRELESS_OFDM;
636                 }
637         } else if (hal->current_band_type == RTW_BAND_2G) {
638                 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
639                 if (sta->vht_cap.vht_supported) {
640                         ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
641                                    RA_MASK_OFDM_IN_VHT;
642                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
643                                        WIRELESS_HT | WIRELESS_VHT;
644                 } else if (sta->ht_cap.ht_supported) {
645                         ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
646                                    RA_MASK_OFDM_IN_HT_2G;
647                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
648                                        WIRELESS_HT;
649                 } else if (sta->supp_rates[0] <= 0xf) {
650                         wireless_set = WIRELESS_CCK;
651                 } else {
652                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
653                 }
654         } else {
655                 rtw_err(rtwdev, "Unknown band type\n");
656                 wireless_set = 0;
657         }
658
659         if (efuse->hw_cap.nss == 1) {
660                 ra_mask &= RA_MASK_VHT_RATES_1SS;
661                 ra_mask &= RA_MASK_HT_RATES_1SS;
662         }
663
664         switch (sta->bandwidth) {
665         case IEEE80211_STA_RX_BW_80:
666                 bw_mode = RTW_CHANNEL_WIDTH_80;
667                 break;
668         case IEEE80211_STA_RX_BW_40:
669                 bw_mode = RTW_CHANNEL_WIDTH_40;
670                 break;
671         default:
672                 bw_mode = RTW_CHANNEL_WIDTH_20;
673                 break;
674         }
675
676         if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
677                 tx_num = 2;
678                 rf_type = RF_2T2R;
679         } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
680                 tx_num = 2;
681                 rf_type = RF_2T2R;
682         }
683
684         rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
685
686         if (wireless_set != WIRELESS_CCK) {
687                 rssi_level = si->rssi_level;
688                 if (rssi_level == 0)
689                         ra_mask &= 0xffffffffffffffffULL;
690                 else if (rssi_level == 1)
691                         ra_mask &= 0xfffffffffffffff0ULL;
692                 else if (rssi_level == 2)
693                         ra_mask &= 0xffffffffffffefe0ULL;
694                 else if (rssi_level == 3)
695                         ra_mask &= 0xffffffffffffcfc0ULL;
696                 else if (rssi_level == 4)
697                         ra_mask &= 0xffffffffffff8f80ULL;
698                 else if (rssi_level >= 5)
699                         ra_mask &= 0xffffffffffff0f00ULL;
700         }
701
702         si->bw_mode = bw_mode;
703         si->stbc_en = stbc_en;
704         si->ldpc_en = ldpc_en;
705         si->rf_type = rf_type;
706         si->wireless_set = wireless_set;
707         si->sgi_enable = is_support_sgi;
708         si->vht_enable = is_vht_enable;
709         si->ra_mask = ra_mask;
710         si->rate_id = rate_id;
711
712         rtw_fw_send_ra_info(rtwdev, si);
713 }
714
715 static int rtw_power_on(struct rtw_dev *rtwdev)
716 {
717         struct rtw_chip_info *chip = rtwdev->chip;
718         struct rtw_fw_state *fw = &rtwdev->fw;
719         bool wifi_only;
720         int ret;
721
722         ret = rtw_hci_setup(rtwdev);
723         if (ret) {
724                 rtw_err(rtwdev, "failed to setup hci\n");
725                 goto err;
726         }
727
728         /* power on MAC before firmware downloaded */
729         ret = rtw_mac_power_on(rtwdev);
730         if (ret) {
731                 rtw_err(rtwdev, "failed to power on mac\n");
732                 goto err;
733         }
734
735         wait_for_completion(&fw->completion);
736         if (!fw->firmware) {
737                 ret = -EINVAL;
738                 rtw_err(rtwdev, "failed to load firmware\n");
739                 goto err;
740         }
741
742         ret = rtw_download_firmware(rtwdev, fw);
743         if (ret) {
744                 rtw_err(rtwdev, "failed to download firmware\n");
745                 goto err_off;
746         }
747
748         /* config mac after firmware downloaded */
749         ret = rtw_mac_init(rtwdev);
750         if (ret) {
751                 rtw_err(rtwdev, "failed to configure mac\n");
752                 goto err_off;
753         }
754
755         chip->ops->phy_set_param(rtwdev);
756
757         ret = rtw_hci_start(rtwdev);
758         if (ret) {
759                 rtw_err(rtwdev, "failed to start hci\n");
760                 goto err_off;
761         }
762
763         /* send H2C after HCI has started */
764         rtw_fw_send_general_info(rtwdev);
765         rtw_fw_send_phydm_info(rtwdev);
766
767         wifi_only = !rtwdev->efuse.btcoex;
768         rtw_coex_power_on_setting(rtwdev);
769         rtw_coex_init_hw_config(rtwdev, wifi_only);
770
771         return 0;
772
773 err_off:
774         rtw_mac_power_off(rtwdev);
775
776 err:
777         return ret;
778 }
779
780 int rtw_core_start(struct rtw_dev *rtwdev)
781 {
782         int ret;
783
784         ret = rtw_power_on(rtwdev);
785         if (ret)
786                 return ret;
787
788         rtw_sec_enable_sec_engine(rtwdev);
789
790         /* rcr reset after powered on */
791         rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
792
793         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
794                                      RTW_WATCH_DOG_DELAY_TIME);
795
796         set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
797
798         return 0;
799 }
800
801 static void rtw_power_off(struct rtw_dev *rtwdev)
802 {
803         rtwdev->hci.ops->stop(rtwdev);
804         rtw_mac_power_off(rtwdev);
805 }
806
807 void rtw_core_stop(struct rtw_dev *rtwdev)
808 {
809         struct rtw_coex *coex = &rtwdev->coex;
810
811         clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
812         clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
813
814         cancel_delayed_work_sync(&rtwdev->watch_dog_work);
815         cancel_delayed_work_sync(&coex->bt_relink_work);
816         cancel_delayed_work_sync(&coex->bt_reenable_work);
817         cancel_delayed_work_sync(&coex->defreeze_work);
818
819         rtw_power_off(rtwdev);
820 }
821
822 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
823                             struct ieee80211_sta_ht_cap *ht_cap)
824 {
825         struct rtw_efuse *efuse = &rtwdev->efuse;
826
827         ht_cap->ht_supported = true;
828         ht_cap->cap = 0;
829         ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
830                         IEEE80211_HT_CAP_MAX_AMSDU |
831                         IEEE80211_HT_CAP_LDPC_CODING |
832                         (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
833         if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
834                 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
835                                 IEEE80211_HT_CAP_DSSSCCK40 |
836                                 IEEE80211_HT_CAP_SGI_40;
837         ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
838         ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
839         ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
840         if (efuse->hw_cap.nss > 1) {
841                 ht_cap->mcs.rx_mask[0] = 0xFF;
842                 ht_cap->mcs.rx_mask[1] = 0xFF;
843                 ht_cap->mcs.rx_mask[4] = 0x01;
844                 ht_cap->mcs.rx_highest = cpu_to_le16(300);
845         } else {
846                 ht_cap->mcs.rx_mask[0] = 0xFF;
847                 ht_cap->mcs.rx_mask[1] = 0x00;
848                 ht_cap->mcs.rx_mask[4] = 0x01;
849                 ht_cap->mcs.rx_highest = cpu_to_le16(150);
850         }
851 }
852
853 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
854                              struct ieee80211_sta_vht_cap *vht_cap)
855 {
856         struct rtw_efuse *efuse = &rtwdev->efuse;
857         u16 mcs_map;
858         __le16 highest;
859
860         if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
861             efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
862                 return;
863
864         vht_cap->vht_supported = true;
865         vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
866                        IEEE80211_VHT_CAP_RXLDPC |
867                        IEEE80211_VHT_CAP_SHORT_GI_80 |
868                        IEEE80211_VHT_CAP_TXSTBC |
869                        IEEE80211_VHT_CAP_RXSTBC_1 |
870                        IEEE80211_VHT_CAP_HTC_VHT |
871                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
872                        0;
873         mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
874                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
875                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
876                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
877                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
878                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
879                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
880         if (efuse->hw_cap.nss > 1) {
881                 highest = cpu_to_le16(780);
882                 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
883         } else {
884                 highest = cpu_to_le16(390);
885                 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
886         }
887
888         vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
889         vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
890         vht_cap->vht_mcs.rx_highest = highest;
891         vht_cap->vht_mcs.tx_highest = highest;
892 }
893
894 static void rtw_set_supported_band(struct ieee80211_hw *hw,
895                                    struct rtw_chip_info *chip)
896 {
897         struct rtw_dev *rtwdev = hw->priv;
898         struct ieee80211_supported_band *sband;
899
900         if (chip->band & RTW_BAND_2G) {
901                 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
902                 if (!sband)
903                         goto err_out;
904                 if (chip->ht_supported)
905                         rtw_init_ht_cap(rtwdev, &sband->ht_cap);
906                 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
907         }
908
909         if (chip->band & RTW_BAND_5G) {
910                 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
911                 if (!sband)
912                         goto err_out;
913                 if (chip->ht_supported)
914                         rtw_init_ht_cap(rtwdev, &sband->ht_cap);
915                 if (chip->vht_supported)
916                         rtw_init_vht_cap(rtwdev, &sband->vht_cap);
917                 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
918         }
919
920         return;
921
922 err_out:
923         rtw_err(rtwdev, "failed to set supported band\n");
924         kfree(sband);
925 }
926
927 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
928                                      struct rtw_chip_info *chip)
929 {
930         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
931         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
932 }
933
934 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
935 {
936         struct rtw_dev *rtwdev = context;
937         struct rtw_fw_state *fw = &rtwdev->fw;
938
939         if (!firmware)
940                 rtw_err(rtwdev, "failed to request firmware\n");
941
942         fw->firmware = firmware;
943         complete_all(&fw->completion);
944 }
945
946 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
947 {
948         struct rtw_fw_state *fw = &rtwdev->fw;
949         int ret;
950
951         init_completion(&fw->completion);
952
953         ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
954                                       GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
955         if (ret) {
956                 rtw_err(rtwdev, "async firmware request failed\n");
957                 return ret;
958         }
959
960         return 0;
961 }
962
963 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
964 {
965         struct rtw_chip_info *chip = rtwdev->chip;
966         struct rtw_hal *hal = &rtwdev->hal;
967         struct rtw_efuse *efuse = &rtwdev->efuse;
968         int ret = 0;
969
970         switch (rtw_hci_type(rtwdev)) {
971         case RTW_HCI_TYPE_PCIE:
972                 rtwdev->hci.rpwm_addr = 0x03d9;
973                 rtwdev->hci.cpwm_addr = 0x03da;
974                 break;
975         default:
976                 rtw_err(rtwdev, "unsupported hci type\n");
977                 return -EINVAL;
978         }
979
980         hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
981         hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
982         hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
983         hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
984         if (hal->chip_version & BIT_RF_TYPE_ID) {
985                 hal->rf_type = RF_2T2R;
986                 hal->rf_path_num = 2;
987                 hal->antenna_tx = BB_PATH_AB;
988                 hal->antenna_rx = BB_PATH_AB;
989         } else {
990                 hal->rf_type = RF_1T1R;
991                 hal->rf_path_num = 1;
992                 hal->antenna_tx = BB_PATH_A;
993                 hal->antenna_rx = BB_PATH_A;
994         }
995
996         if (hal->fab_version == 2)
997                 hal->fab_version = 1;
998         else if (hal->fab_version == 1)
999                 hal->fab_version = 2;
1000
1001         efuse->physical_size = chip->phy_efuse_size;
1002         efuse->logical_size = chip->log_efuse_size;
1003         efuse->protect_size = chip->ptct_efuse_size;
1004
1005         /* default use ack */
1006         rtwdev->hal.rcr |= BIT_VHT_DACK;
1007
1008         return ret;
1009 }
1010
1011 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1012 {
1013         struct rtw_fw_state *fw = &rtwdev->fw;
1014         int ret;
1015
1016         ret = rtw_hci_setup(rtwdev);
1017         if (ret) {
1018                 rtw_err(rtwdev, "failed to setup hci\n");
1019                 goto err;
1020         }
1021
1022         ret = rtw_mac_power_on(rtwdev);
1023         if (ret) {
1024                 rtw_err(rtwdev, "failed to power on mac\n");
1025                 goto err;
1026         }
1027
1028         rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
1029
1030         wait_for_completion(&fw->completion);
1031         if (!fw->firmware) {
1032                 ret = -EINVAL;
1033                 rtw_err(rtwdev, "failed to load firmware\n");
1034                 goto err;
1035         }
1036
1037         ret = rtw_download_firmware(rtwdev, fw);
1038         if (ret) {
1039                 rtw_err(rtwdev, "failed to download firmware\n");
1040                 goto err_off;
1041         }
1042
1043         return 0;
1044
1045 err_off:
1046         rtw_mac_power_off(rtwdev);
1047
1048 err:
1049         return ret;
1050 }
1051
1052 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
1053 {
1054         struct rtw_efuse *efuse = &rtwdev->efuse;
1055         u8 hw_feature[HW_FEATURE_LEN];
1056         u8 id;
1057         u8 bw;
1058         int i;
1059
1060         id = rtw_read8(rtwdev, REG_C2HEVT);
1061         if (id != C2H_HW_FEATURE_REPORT) {
1062                 rtw_err(rtwdev, "failed to read hw feature report\n");
1063                 return -EBUSY;
1064         }
1065
1066         for (i = 0; i < HW_FEATURE_LEN; i++)
1067                 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1068
1069         rtw_write8(rtwdev, REG_C2HEVT, 0);
1070
1071         bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1072         efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1073         efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1074         efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1075         efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1076         efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1077
1078         rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1079
1080         if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE)
1081                 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1082
1083         rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1084                 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1085                 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1086                 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1087
1088         return 0;
1089 }
1090
1091 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1092 {
1093         rtw_hci_stop(rtwdev);
1094         rtw_mac_power_off(rtwdev);
1095 }
1096
1097 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1098 {
1099         struct rtw_efuse *efuse = &rtwdev->efuse;
1100         int ret;
1101
1102         mutex_lock(&rtwdev->mutex);
1103
1104         /* power on mac to read efuse */
1105         ret = rtw_chip_efuse_enable(rtwdev);
1106         if (ret)
1107                 goto out;
1108
1109         ret = rtw_parse_efuse_map(rtwdev);
1110         if (ret)
1111                 goto out;
1112
1113         ret = rtw_dump_hw_feature(rtwdev);
1114         if (ret)
1115                 goto out;
1116
1117         ret = rtw_check_supported_rfe(rtwdev);
1118         if (ret)
1119                 goto out;
1120
1121         if (efuse->crystal_cap == 0xff)
1122                 efuse->crystal_cap = 0;
1123         if (efuse->pa_type_2g == 0xff)
1124                 efuse->pa_type_2g = 0;
1125         if (efuse->pa_type_5g == 0xff)
1126                 efuse->pa_type_5g = 0;
1127         if (efuse->lna_type_2g == 0xff)
1128                 efuse->lna_type_2g = 0;
1129         if (efuse->lna_type_5g == 0xff)
1130                 efuse->lna_type_5g = 0;
1131         if (efuse->channel_plan == 0xff)
1132                 efuse->channel_plan = 0x7f;
1133         if (efuse->rf_board_option == 0xff)
1134                 efuse->rf_board_option = 0;
1135         if (efuse->bt_setting & BIT(0))
1136                 efuse->share_ant = true;
1137         if (efuse->regd == 0xff)
1138                 efuse->regd = 0;
1139
1140         efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1141         efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1142         efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1143         efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1144         efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1145
1146         rtw_chip_efuse_disable(rtwdev);
1147
1148 out:
1149         mutex_unlock(&rtwdev->mutex);
1150         return ret;
1151 }
1152
1153 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1154 {
1155         struct rtw_hal *hal = &rtwdev->hal;
1156         const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1157
1158         if (!rfe_def)
1159                 return -ENODEV;
1160
1161         rtw_phy_setup_phy_cond(rtwdev, 0);
1162
1163         rtw_phy_init_tx_power(rtwdev);
1164         rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1165         rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1166         rtw_phy_tx_power_by_rate_config(hal);
1167         rtw_phy_tx_power_limit_config(hal);
1168
1169         return 0;
1170 }
1171
1172 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1173 {
1174         int ret;
1175
1176         ret = rtw_chip_parameter_setup(rtwdev);
1177         if (ret) {
1178                 rtw_err(rtwdev, "failed to setup chip parameters\n");
1179                 goto err_out;
1180         }
1181
1182         ret = rtw_chip_efuse_info_setup(rtwdev);
1183         if (ret) {
1184                 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1185                 goto err_out;
1186         }
1187
1188         ret = rtw_chip_board_info_setup(rtwdev);
1189         if (ret) {
1190                 rtw_err(rtwdev, "failed to setup chip board info\n");
1191                 goto err_out;
1192         }
1193
1194         return 0;
1195
1196 err_out:
1197         return ret;
1198 }
1199 EXPORT_SYMBOL(rtw_chip_info_setup);
1200
1201 int rtw_core_init(struct rtw_dev *rtwdev)
1202 {
1203         struct rtw_chip_info *chip = rtwdev->chip;
1204         struct rtw_coex *coex = &rtwdev->coex;
1205         int ret;
1206
1207         INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1208         INIT_LIST_HEAD(&rtwdev->txqs);
1209
1210         timer_setup(&rtwdev->tx_report.purge_timer,
1211                     rtw_tx_report_purge_timer, 0);
1212         tasklet_init(&rtwdev->tx_tasklet, rtw_tx_tasklet,
1213                      (unsigned long)rtwdev);
1214
1215         INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1216         INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
1217         INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
1218         INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
1219         INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1220         INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
1221         skb_queue_head_init(&rtwdev->c2h_queue);
1222         skb_queue_head_init(&rtwdev->coex.queue);
1223         skb_queue_head_init(&rtwdev->tx_report.queue);
1224
1225         spin_lock_init(&rtwdev->dm_lock);
1226         spin_lock_init(&rtwdev->rf_lock);
1227         spin_lock_init(&rtwdev->h2c.lock);
1228         spin_lock_init(&rtwdev->txq_lock);
1229         spin_lock_init(&rtwdev->tx_report.q_lock);
1230
1231         mutex_init(&rtwdev->mutex);
1232         mutex_init(&rtwdev->coex.mutex);
1233         mutex_init(&rtwdev->hal.tx_power_mutex);
1234
1235         init_waitqueue_head(&rtwdev->coex.wait);
1236
1237         rtwdev->sec.total_cam_num = 32;
1238         rtwdev->hal.current_channel = 1;
1239         set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1240         if (!(BIT(rtw_fw_lps_deep_mode) & chip->lps_deep_mode_supported))
1241                 rtwdev->lps_conf.deep_mode = LPS_DEEP_MODE_NONE;
1242         else
1243                 rtwdev->lps_conf.deep_mode = rtw_fw_lps_deep_mode;
1244
1245         mutex_lock(&rtwdev->mutex);
1246         rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1247         mutex_unlock(&rtwdev->mutex);
1248
1249         /* default rx filter setting */
1250         rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1251                           BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1252                           BIT_AB | BIT_AM | BIT_APM;
1253
1254         ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1255         if (ret) {
1256                 rtw_warn(rtwdev, "no firmware loaded\n");
1257                 return ret;
1258         }
1259
1260         return 0;
1261 }
1262 EXPORT_SYMBOL(rtw_core_init);
1263
1264 void rtw_core_deinit(struct rtw_dev *rtwdev)
1265 {
1266         struct rtw_fw_state *fw = &rtwdev->fw;
1267         struct rtw_rsvd_page *rsvd_pkt, *tmp;
1268         unsigned long flags;
1269
1270         if (fw->firmware)
1271                 release_firmware(fw->firmware);
1272
1273         tasklet_kill(&rtwdev->tx_tasklet);
1274         spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1275         skb_queue_purge(&rtwdev->tx_report.queue);
1276         spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1277
1278         list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1279                 list_del(&rsvd_pkt->list);
1280                 kfree(rsvd_pkt);
1281         }
1282
1283         mutex_destroy(&rtwdev->mutex);
1284         mutex_destroy(&rtwdev->coex.mutex);
1285         mutex_destroy(&rtwdev->hal.tx_power_mutex);
1286 }
1287 EXPORT_SYMBOL(rtw_core_deinit);
1288
1289 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1290 {
1291         int max_tx_headroom = 0;
1292         int ret;
1293
1294         /* TODO: USB & SDIO may need extra room? */
1295         max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1296
1297         hw->extra_tx_headroom = max_tx_headroom;
1298         hw->queues = IEEE80211_NUM_ACS;
1299         hw->txq_data_size = sizeof(struct rtw_txq);
1300         hw->sta_data_size = sizeof(struct rtw_sta_info);
1301         hw->vif_data_size = sizeof(struct rtw_vif);
1302
1303         ieee80211_hw_set(hw, SIGNAL_DBM);
1304         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1305         ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1306         ieee80211_hw_set(hw, MFP_CAPABLE);
1307         ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1308         ieee80211_hw_set(hw, SUPPORTS_PS);
1309         ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1310         ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
1311         ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
1312         ieee80211_hw_set(hw, HAS_RATE_CONTROL);
1313         ieee80211_hw_set(hw, TX_AMSDU);
1314
1315         hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1316                                      BIT(NL80211_IFTYPE_AP) |
1317                                      BIT(NL80211_IFTYPE_ADHOC) |
1318                                      BIT(NL80211_IFTYPE_MESH_POINT);
1319
1320         hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1321                             WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1322
1323         hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
1324
1325         rtw_set_supported_band(hw, rtwdev->chip);
1326         SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1327
1328         rtw_regd_init(rtwdev, rtw_regd_notifier);
1329
1330         ret = ieee80211_register_hw(hw);
1331         if (ret) {
1332                 rtw_err(rtwdev, "failed to register hw\n");
1333                 return ret;
1334         }
1335
1336         if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1337                 rtw_err(rtwdev, "regulatory_hint fail\n");
1338
1339         rtw_debugfs_init(rtwdev);
1340
1341         return 0;
1342 }
1343 EXPORT_SYMBOL(rtw_register_hw);
1344
1345 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1346 {
1347         struct rtw_chip_info *chip = rtwdev->chip;
1348
1349         ieee80211_unregister_hw(hw);
1350         rtw_unset_supported_band(hw, chip);
1351 }
1352 EXPORT_SYMBOL(rtw_unregister_hw);
1353
1354 MODULE_AUTHOR("Realtek Corporation");
1355 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1356 MODULE_LICENSE("Dual BSD/GPL");