drivers/nvme/host/nvme.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/lightnvm.h>
  15 #include <linux/sed-opal.h>
  16 #include <linux/fault-inject.h>
  17 #include <linux/rcupdate.h>
  18
  19 #include <trace/events/block.h>
  20
  21 extern unsigned int nvme_io_timeout;
  22 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  23
  24 extern unsigned int admin_timeout;
  25 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  26
  27 #define NVME_DEFAULT_KATO       5
  28 #define NVME_KATO_GRACE         10
  29
  30 extern struct workqueue_struct *nvme_wq;
  31 extern struct workqueue_struct *nvme_reset_wq;
  32 extern struct workqueue_struct *nvme_delete_wq;
  33
  34 enum {
  35         NVME_NS_LBA             = 0,
  36         NVME_NS_LIGHTNVM        = 1,
  37 };
  38
  39 /*
  40  * List of workarounds for devices that required behavior not specified in
  41  * the standard.
  42  */
  43 enum nvme_quirks {
  44         /*
  45          * Prefers I/O aligned to a stripe size specified in a vendor
  46          * specific Identify field.
  47          */
  48         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  49
  50         /*
  51          * The controller doesn't handle Identify value others than 0 or 1
  52          * correctly.
  53          */
  54         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  55
  56         /*
  57          * The controller deterministically returns O's on reads to
  58          * logical blocks that deallocate was called on.
  59          */
  60         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  61
  62         /*
  63          * The controller needs a delay before starts checking the device
  64          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  65          */
  66         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  67
  68         /*
  69          * APST should not be used.
  70          */
  71         NVME_QUIRK_NO_APST                      = (1 << 4),
  72
  73         /*
  74          * The deepest sleep state should not be used.
  75          */
  76         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  77
  78         /*
  79          * Supports the LighNVM command set if indicated in vs[1].
  80          */
  81         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
  82
  83         /*
  84          * Set MEDIUM priority on SQ creation
  85          */
  86         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  87
  88         /*
  89          * Ignore device provided subnqn.
  90          */
  91         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
  92
  93         /*
  94          * Broken Write Zeroes.
  95          */
  96         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
  97
  98         /*
  99          * Use only one interrupt vector for all queues
 100          */
 101         NVME_QUIRK_SINGLE_VECTOR                = (1 << 10),
 102
 103         /*
 104          * Use non-standard 128 bytes SQEs.
 105          */
 106         NVME_QUIRK_128_BYTES_SQES               = (1 << 11),
 107
 108         /*
 109          * Prevent tag overlap between queues
 110          */
 111         NVME_QUIRK_SHARED_TAGS                  = (1 << 12),
 112 };
 113
 114 /*
 115  * Common request structure for NVMe passthrough.  All drivers must have
 116  * this structure as the first member of their request-private data.
 117  */
 118 struct nvme_request {
 119         struct nvme_command     *cmd;
 120         union nvme_result       result;
 121         u8                      retries;
 122         u8                      flags;
 123         u16                     status;
 124         struct nvme_ctrl        *ctrl;
 125 };
 126
 127 /*
 128  * Mark a bio as coming in through the mpath node.
 129  */
 130 #define REQ_NVME_MPATH          REQ_DRV
 131
 132 enum {
 133         NVME_REQ_CANCELLED              = (1 << 0),
 134         NVME_REQ_USERCMD                = (1 << 1),
 135 };
 136
 137 static inline struct nvme_request *nvme_req(struct request *req)
 138 {
 139         return blk_mq_rq_to_pdu(req);
 140 }
 141
 142 static inline u16 nvme_req_qid(struct request *req)
 143 {
 144         if (!req->rq_disk)
 145                 return 0;
 146         return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1;
 147 }
 148
 149 /* The below value is the specific amount of delay needed before checking
 150  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 151  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 152  * found empirically.
 153  */
 154 #define NVME_QUIRK_DELAY_AMOUNT         2300
 155
 156 enum nvme_ctrl_state {
 157         NVME_CTRL_NEW,
 158         NVME_CTRL_LIVE,
 159         NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
 160         NVME_CTRL_RESETTING,
 161         NVME_CTRL_CONNECTING,
 162         NVME_CTRL_DELETING,
 163         NVME_CTRL_DEAD,
 164 };
 165
 166 struct nvme_fault_inject {
 167 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 168         struct fault_attr attr;
 169         struct dentry *parent;
 170         bool dont_retry;        /* DNR, do not retry */
 171         u16 status;             /* status code */
 172 #endif
 173 };
 174
 175 struct nvme_ctrl {
 176         bool comp_seen;
 177         enum nvme_ctrl_state state;
 178         bool identified;
 179         spinlock_t lock;
 180         struct mutex scan_lock;
 181         const struct nvme_ctrl_ops *ops;
 182         struct request_queue *admin_q;
 183         struct request_queue *connect_q;
 184         struct device *dev;
 185         int instance;
 186         int numa_node;
 187         struct blk_mq_tag_set *tagset;
 188         struct blk_mq_tag_set *admin_tagset;
 189         struct list_head namespaces;
 190         struct rw_semaphore namespaces_rwsem;
 191         struct device ctrl_device;
 192         struct device *device;  /* char device */
 193         struct cdev cdev;
 194         struct work_struct reset_work;
 195         struct work_struct delete_work;
 196
 197         struct nvme_subsystem *subsys;
 198         struct list_head subsys_entry;
 199
 200         struct opal_dev *opal_dev;
 201
 202         char name[12];
 203         u16 cntlid;
 204
 205         u32 ctrl_config;
 206         u16 mtfa;
 207         u32 queue_count;
 208
 209         u64 cap;
 210         u32 page_size;
 211         u32 max_hw_sectors;
 212         u32 max_segments;
 213         u16 crdt[3];
 214         u16 oncs;
 215         u16 oacs;
 216         u16 nssa;
 217         u16 nr_streams;
 218         u32 max_namespaces;
 219         atomic_t abort_limit;
 220         u8 vwc;
 221         u32 vs;
 222         u32 sgls;
 223         u16 kas;
 224         u8 npss;
 225         u8 apsta;
 226         u32 oaes;
 227         u32 aen_result;
 228         u32 ctratt;
 229         unsigned int shutdown_timeout;
 230         unsigned int kato;
 231         bool subsystem;
 232         unsigned long quirks;
 233         struct nvme_id_power_state psd[32];
 234         struct nvme_effects_log *effects;
 235         struct work_struct scan_work;
 236         struct work_struct async_event_work;
 237         struct delayed_work ka_work;
 238         struct nvme_command ka_cmd;
 239         struct work_struct fw_act_work;
 240         unsigned long events;
 241
 242 #ifdef CONFIG_NVME_MULTIPATH
 243         /* asymmetric namespace access: */
 244         u8 anacap;
 245         u8 anatt;
 246         u32 anagrpmax;
 247         u32 nanagrpid;
 248         struct mutex ana_lock;
 249         struct nvme_ana_rsp_hdr *ana_log_buf;
 250         size_t ana_log_size;
 251         struct timer_list anatt_timer;
 252         struct work_struct ana_work;
 253 #endif
 254
 255         /* Power saving configuration */
 256         u64 ps_max_latency_us;
 257         bool apst_enabled;
 258
 259         /* PCIe only: */
 260         u32 hmpre;
 261         u32 hmmin;
 262         u32 hmminds;
 263         u16 hmmaxd;
 264
 265         /* Fabrics only */
 266         u16 sqsize;
 267         u32 ioccsz;
 268         u32 iorcsz;
 269         u16 icdoff;
 270         u16 maxcmd;
 271         int nr_reconnects;
 272         struct nvmf_ctrl_options *opts;
 273
 274         struct page *discard_page;
 275         unsigned long discard_page_busy;
 276
 277         struct nvme_fault_inject fault_inject;
 278 };
 279
 280 enum nvme_iopolicy {
 281         NVME_IOPOLICY_NUMA,
 282         NVME_IOPOLICY_RR,
 283 };
 284
 285 struct nvme_subsystem {
 286         int                     instance;
 287         struct device           dev;
 288         /*
 289          * Because we unregister the device on the last put we need
 290          * a separate refcount.
 291          */
 292         struct kref             ref;
 293         struct list_head        entry;
 294         struct mutex            lock;
 295         struct list_head        ctrls;
 296         struct list_head        nsheads;
 297         char                    subnqn[NVMF_NQN_SIZE];
 298         char                    serial[20];
 299         char                    model[40];
 300         char                    firmware_rev[8];
 301         u8                      cmic;
 302         u16                     vendor_id;
 303         u16                     awupf;  /* 0's based awupf value. */
 304         struct ida              ns_ida;
 305 #ifdef CONFIG_NVME_MULTIPATH
 306         enum nvme_iopolicy      iopolicy;
 307 #endif
 308 };
 309
 310 /*
 311  * Container structure for uniqueue namespace identifiers.
 312  */
 313 struct nvme_ns_ids {
 314         u8      eui64[8];
 315         u8      nguid[16];
 316         uuid_t  uuid;
 317 };
 318
 319 /*
 320  * Anchor structure for namespaces.  There is one for each namespace in a
 321  * NVMe subsystem that any of our controllers can see, and the namespace
 322  * structure for each controller is chained of it.  For private namespaces
 323  * there is a 1:1 relation to our namespace structures, that is ->list
 324  * only ever has a single entry for private namespaces.
 325  */
 326 struct nvme_ns_head {
 327         struct list_head        list;
 328         struct srcu_struct      srcu;
 329         struct nvme_subsystem   *subsys;
 330         unsigned                ns_id;
 331         struct nvme_ns_ids      ids;
 332         struct list_head        entry;
 333         struct kref             ref;
 334         int                     instance;
 335 #ifdef CONFIG_NVME_MULTIPATH
 336         struct gendisk          *disk;
 337         struct bio_list         requeue_list;
 338         spinlock_t              requeue_lock;
 339         struct work_struct      requeue_work;
 340         struct mutex            lock;
 341         struct nvme_ns __rcu    *current_path[];
 342 #endif
 343 };
 344
 345 struct nvme_ns {
 346         struct list_head list;
 347
 348         struct nvme_ctrl *ctrl;
 349         struct request_queue *queue;
 350         struct gendisk *disk;
 351 #ifdef CONFIG_NVME_MULTIPATH
 352         enum nvme_ana_state ana_state;
 353         u32 ana_grpid;
 354 #endif
 355         struct list_head siblings;
 356         struct nvm_dev *ndev;
 357         struct kref kref;
 358         struct nvme_ns_head *head;
 359
 360         int lba_shift;
 361         u16 ms;
 362         u16 sgs;
 363         u32 sws;
 364         bool ext;
 365         u8 pi_type;
 366         unsigned long flags;
 367 #define NVME_NS_REMOVING        0
 368 #define NVME_NS_DEAD            1
 369 #define NVME_NS_ANA_PENDING     2
 370         u16 noiob;
 371
 372         struct nvme_fault_inject fault_inject;
 373
 374 };
 375
 376 struct nvme_ctrl_ops {
 377         const char *name;
 378         struct module *module;
 379         unsigned int flags;
 380 #define NVME_F_FABRICS                  (1 << 0)
 381 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 382 #define NVME_F_PCI_P2PDMA               (1 << 2)
 383         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 384         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 385         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 386         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 387         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 388         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 389         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 390 };
 391
 392 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 393 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 394                             const char *dev_name);
 395 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
 396 void nvme_should_fail(struct request *req);
 397 #else
 398 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 399                                           const char *dev_name)
 400 {
 401 }
 402 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
 403 {
 404 }
 405 static inline void nvme_should_fail(struct request *req) {}
 406 #endif
 407
 408 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 409 {
 410         if (!ctrl->subsystem)
 411                 return -ENOTTY;
 412         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 413 }
 414
 415 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 416 {
 417         return (sector >> (ns->lba_shift - 9));
 418 }
 419
 420 static inline void nvme_end_request(struct request *req, __le16 status,
 421                 union nvme_result result)
 422 {
 423         struct nvme_request *rq = nvme_req(req);
 424
 425         rq->status = le16_to_cpu(status) >> 1;
 426         rq->result = result;
 427         /* inject error when permitted by fault injection framework */
 428         nvme_should_fail(req);
 429         blk_mq_complete_request(req);
 430 }
 431
 432 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 433 {
 434         get_device(ctrl->device);
 435 }
 436
 437 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 438 {
 439         put_device(ctrl->device);
 440 }
 441
 442 void nvme_complete_rq(struct request *req);
 443 bool nvme_cancel_request(struct request *req, void *data, bool reserved);
 444 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 445                 enum nvme_ctrl_state new_state);
 446 int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
 447 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 448 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 449 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 450                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 451 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 452 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 453 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 454 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 455 int nvme_init_identify(struct nvme_ctrl *ctrl);
 456
 457 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 458
 459 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 460                 bool send);
 461
 462 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 463                 volatile union nvme_result *res);
 464
 465 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 466 void nvme_start_queues(struct nvme_ctrl *ctrl);
 467 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 468 void nvme_sync_queues(struct nvme_ctrl *ctrl);
 469 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 470 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 471 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 472 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 473
 474 #define NVME_QID_ANY -1
 475 struct request *nvme_alloc_request(struct request_queue *q,
 476                 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
 477 void nvme_cleanup_cmd(struct request *req);
 478 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 479                 struct nvme_command *cmd);
 480 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 481                 void *buf, unsigned bufflen);
 482 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 483                 union nvme_result *result, void *buffer, unsigned bufflen,
 484                 unsigned timeout, int qid, int at_head,
 485                 blk_mq_req_flags_t flags, bool poll);
 486 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
 487                       unsigned int dword11, void *buffer, size_t buflen,
 488                       u32 *result);
 489 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
 490                       unsigned int dword11, void *buffer, size_t buflen,
 491                       u32 *result);
 492 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 493 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 494 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 495 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 496 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 497
 498 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,
 499                 void *log, size_t size, u64 offset);
 500
 501 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 502 extern const struct block_device_operations nvme_ns_head_ops;
 503
 504 #ifdef CONFIG_NVME_MULTIPATH
 505 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 506 {
 507         return ctrl->ana_log_buf != NULL;
 508 }
 509
 510 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 511                         struct nvme_ctrl *ctrl, int *flags);
 512 void nvme_failover_req(struct request *req);
 513 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 514 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 515 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
 516 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 517 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 518 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 519 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 520 void nvme_mpath_clear_current_path(struct nvme_ns *ns);
 521 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 522
 523 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 524 {
 525         struct nvme_ns_head *head = ns->head;
 526
 527         if (head->disk && list_empty(&head->list))
 528                 kblockd_schedule_work(&head->requeue_work);
 529 }
 530
 531 static inline void nvme_trace_bio_complete(struct request *req,
 532         blk_status_t status)
 533 {
 534         struct nvme_ns *ns = req->q->queuedata;
 535
 536         if (req->cmd_flags & REQ_NVME_MPATH)
 537                 trace_block_bio_complete(ns->head->disk->queue,
 538                                          req->bio, status);
 539 }
 540
 541 extern struct device_attribute dev_attr_ana_grpid;
 542 extern struct device_attribute dev_attr_ana_state;
 543 extern struct device_attribute subsys_attr_iopolicy;
 544
 545 #else
 546 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 547 {
 548         return false;
 549 }
 550 /*
 551  * Without the multipath code enabled, multiple controller per subsystems are
 552  * visible as devices and thus we cannot use the subsystem instance.
 553  */
 554 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
 555                                       struct nvme_ctrl *ctrl, int *flags)
 556 {
 557         sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
 558 }
 559
 560 static inline void nvme_failover_req(struct request *req)
 561 {
 562 }
 563 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 564 {
 565 }
 566 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 567                 struct nvme_ns_head *head)
 568 {
 569         return 0;
 570 }
 571 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
 572                 struct nvme_id_ns *id)
 573 {
 574 }
 575 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 576 {
 577 }
 578 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
 579 {
 580 }
 581 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
 582 {
 583 }
 584 static inline void nvme_trace_bio_complete(struct request *req,
 585         blk_status_t status)
 586 {
 587 }
 588 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl,
 589                 struct nvme_id_ctrl *id)
 590 {
 591         if (ctrl->subsys->cmic & (1 << 3))
 592                 dev_warn(ctrl->device,
 593 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 594         return 0;
 595 }
 596 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 597 {
 598 }
 599 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 600 {
 601 }
 602 #endif /* CONFIG_NVME_MULTIPATH */
 603
 604 #ifdef CONFIG_NVM
 605 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 606 void nvme_nvm_unregister(struct nvme_ns *ns);
 607 extern const struct attribute_group nvme_nvm_attr_group;
 608 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 609 #else
 610 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 611                                     int node)
 612 {
 613         return 0;
 614 }
 615
 616 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 617 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 618                                                         unsigned long arg)
 619 {
 620         return -ENOTTY;
 621 }
 622 #endif /* CONFIG_NVM */
 623
 624 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 625 {
 626         return dev_to_disk(dev)->private_data;
 627 }
 628
 629 #endif /* _NVME_H */