drivers/nvme/host/nvme.h

   1 /*
   2  * Copyright (c) 2011-2014, Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #ifndef _NVME_H
  15 #define _NVME_H
  16
  17 #include <linux/nvme.h>
  18 #include <linux/pci.h>
  19 #include <linux/kref.h>
  20 #include <linux/blk-mq.h>
  21 #include <linux/lightnvm.h>
  22 #include <linux/sed-opal.h>
  23
  24 extern unsigned char nvme_io_timeout;
  25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  26
  27 extern unsigned char admin_timeout;
  28 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  29
  30 #define NVME_DEFAULT_KATO       5
  31 #define NVME_KATO_GRACE         10
  32
  33 extern struct workqueue_struct *nvme_wq;
  34
  35 enum {
  36         NVME_NS_LBA             = 0,
  37         NVME_NS_LIGHTNVM        = 1,
  38 };
  39
  40 /*
  41  * List of workarounds for devices that required behavior not specified in
  42  * the standard.
  43  */
  44 enum nvme_quirks {
  45         /*
  46          * Prefers I/O aligned to a stripe size specified in a vendor
  47          * specific Identify field.
  48          */
  49         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  50
  51         /*
  52          * The controller doesn't handle Identify value others than 0 or 1
  53          * correctly.
  54          */
  55         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  56
  57         /*
  58          * The controller deterministically returns O's on reads to
  59          * logical blocks that deallocate was called on.
  60          */
  61         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  62
  63         /*
  64          * The controller needs a delay before starts checking the device
  65          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  66          */
  67         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  68
  69         /*
  70          * APST should not be used.
  71          */
  72         NVME_QUIRK_NO_APST                      = (1 << 4),
  73
  74         /*
  75          * The deepest sleep state should not be used.
  76          */
  77         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  78 };
  79
  80 /*
  81  * Common request structure for NVMe passthrough.  All drivers must have
  82  * this structure as the first member of their request-private data.
  83  */
  84 struct nvme_request {
  85         struct nvme_command     *cmd;
  86         union nvme_result       result;
  87         u8                      retries;
  88         u8                      flags;
  89         u16                     status;
  90 };
  91
  92 enum {
  93         NVME_REQ_CANCELLED              = (1 << 0),
  94 };
  95
  96 static inline struct nvme_request *nvme_req(struct request *req)
  97 {
  98         return blk_mq_rq_to_pdu(req);
  99 }
 100
 101 /* The below value is the specific amount of delay needed before checking
 102  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 103  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 104  * found empirically.
 105  */
 106 #define NVME_QUIRK_DELAY_AMOUNT         2000
 107
 108 enum nvme_ctrl_state {
 109         NVME_CTRL_NEW,
 110         NVME_CTRL_LIVE,
 111         NVME_CTRL_RESETTING,
 112         NVME_CTRL_RECONNECTING,
 113         NVME_CTRL_DELETING,
 114         NVME_CTRL_DEAD,
 115 };
 116
 117 struct nvme_ctrl {
 118         enum nvme_ctrl_state state;
 119         bool identified;
 120         spinlock_t lock;
 121         const struct nvme_ctrl_ops *ops;
 122         struct request_queue *admin_q;
 123         struct request_queue *connect_q;
 124         struct device *dev;
 125         struct kref kref;
 126         int instance;
 127         struct blk_mq_tag_set *tagset;
 128         struct list_head namespaces;
 129         struct mutex namespaces_mutex;
 130         struct device *device;  /* char device */
 131         struct list_head node;
 132         struct ida ns_ida;
 133         struct work_struct reset_work;
 134
 135         struct opal_dev *opal_dev;
 136
 137         char name[12];
 138         char serial[20];
 139         char model[40];
 140         char firmware_rev[8];
 141         u16 cntlid;
 142
 143         u32 ctrl_config;
 144
 145         u32 page_size;
 146         u32 max_hw_sectors;
 147         u16 oncs;
 148         u16 vid;
 149         u16 oacs;
 150         atomic_t abort_limit;
 151         u8 event_limit;
 152         u8 vwc;
 153         u32 vs;
 154         u32 sgls;
 155         u16 kas;
 156         u8 npss;
 157         u8 apsta;
 158         unsigned int kato;
 159         bool subsystem;
 160         unsigned long quirks;
 161         struct nvme_id_power_state psd[32];
 162         struct work_struct scan_work;
 163         struct work_struct async_event_work;
 164         struct delayed_work ka_work;
 165
 166         /* Power saving configuration */
 167         u64 ps_max_latency_us;
 168
 169         u32 hmpre;
 170         u32 hmmin;
 171
 172         /* Fabrics only */
 173         u16 sqsize;
 174         u32 ioccsz;
 175         u32 iorcsz;
 176         u16 icdoff;
 177         u16 maxcmd;
 178         int nr_reconnects;
 179         struct nvmf_ctrl_options *opts;
 180 };
 181
 182 /*
 183  * An NVM Express namespace is equivalent to a SCSI LUN
 184  */
 185 struct nvme_ns {
 186         struct list_head list;
 187
 188         struct nvme_ctrl *ctrl;
 189         struct request_queue *queue;
 190         struct gendisk *disk;
 191         struct nvm_dev *ndev;
 192         struct kref kref;
 193         int instance;
 194
 195         u8 eui[8];
 196         u8 nguid[16];
 197         uuid_t uuid;
 198
 199         unsigned ns_id;
 200         int lba_shift;
 201         u16 ms;
 202         bool ext;
 203         u8 pi_type;
 204         unsigned long flags;
 205
 206 #define NVME_NS_REMOVING 0
 207 #define NVME_NS_DEAD     1
 208
 209         u64 mode_select_num_blocks;
 210         u32 mode_select_block_len;
 211 };
 212
 213 struct nvme_ctrl_ops {
 214         const char *name;
 215         struct module *module;
 216         unsigned int flags;
 217 #define NVME_F_FABRICS                  (1 << 0)
 218 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 219         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 220         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 221         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 222         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 223         void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
 224         int (*delete_ctrl)(struct nvme_ctrl *ctrl);
 225         const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
 226         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 227 };
 228
 229 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
 230 {
 231         u32 val = 0;
 232
 233         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
 234                 return false;
 235         return val & NVME_CSTS_RDY;
 236 }
 237
 238 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 239 {
 240         if (!ctrl->subsystem)
 241                 return -ENOTTY;
 242         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 243 }
 244
 245 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 246 {
 247         return (sector >> (ns->lba_shift - 9));
 248 }
 249
 250 static inline void nvme_cleanup_cmd(struct request *req)
 251 {
 252         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
 253                 kfree(page_address(req->special_vec.bv_page) +
 254                       req->special_vec.bv_offset);
 255         }
 256 }
 257
 258 static inline void nvme_end_request(struct request *req, __le16 status,
 259                 union nvme_result result)
 260 {
 261         struct nvme_request *rq = nvme_req(req);
 262
 263         rq->status = le16_to_cpu(status) >> 1;
 264         rq->result = result;
 265         blk_mq_complete_request(req);
 266 }
 267
 268 void nvme_complete_rq(struct request *req);
 269 void nvme_cancel_request(struct request *req, void *data, bool reserved);
 270 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 271                 enum nvme_ctrl_state new_state);
 272 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 273 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 274 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 275 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 276                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 277 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 278 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 279 int nvme_init_identify(struct nvme_ctrl *ctrl);
 280
 281 void nvme_queue_scan(struct nvme_ctrl *ctrl);
 282 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 283
 284 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 285                 bool send);
 286
 287 #define NVME_NR_AERS    1
 288 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 289                 union nvme_result *res);
 290 void nvme_queue_async_events(struct nvme_ctrl *ctrl);
 291
 292 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 293 void nvme_start_queues(struct nvme_ctrl *ctrl);
 294 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 295 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 296 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 297 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 298 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 299
 300 #define NVME_QID_ANY -1
 301 struct request *nvme_alloc_request(struct request_queue *q,
 302                 struct nvme_command *cmd, unsigned int flags, int qid);
 303 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 304                 struct nvme_command *cmd);
 305 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 306                 void *buf, unsigned bufflen);
 307 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 308                 union nvme_result *result, void *buffer, unsigned bufflen,
 309                 unsigned timeout, int qid, int at_head, int flags);
 310 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 311                 void __user *ubuffer, unsigned bufflen, u32 *result,
 312                 unsigned timeout);
 313 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 314                 void __user *ubuffer, unsigned bufflen,
 315                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
 316                 u32 *result, unsigned timeout);
 317 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
 318 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
 319                 struct nvme_id_ns **id);
 320 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
 321 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
 322                       void *buffer, size_t buflen, u32 *result);
 323 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
 324                       void *buffer, size_t buflen, u32 *result);
 325 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 326 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
 327 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 328 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 329
 330 struct sg_io_hdr;
 331
 332 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
 333 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
 334 int nvme_sg_get_version_num(int __user *ip);
 335
 336 #ifdef CONFIG_NVM
 337 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
 338 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 339 void nvme_nvm_unregister(struct nvme_ns *ns);
 340 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
 341 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
 342 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 343 #else
 344 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 345                                     int node)
 346 {
 347         return 0;
 348 }
 349
 350 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 351 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
 352 {
 353         return 0;
 354 }
 355 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
 356 static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
 357 {
 358         return 0;
 359 }
 360 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 361                                                         unsigned long arg)
 362 {
 363         return -ENOTTY;
 364 }
 365 #endif /* CONFIG_NVM */
 366
 367 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 368 {
 369         return dev_to_disk(dev)->private_data;
 370 }
 371
 372 int __init nvme_core_init(void);
 373 void nvme_core_exit(void);
 374
 375 #endif /* _NVME_H */