1 # SPDX-License-Identifier: GPL-2.0
3 menu "DesignWare PCI Core Support"
11 depends on PCI_MSI_IRQ_DOMAIN
16 depends on PCI_ENDPOINT
22 config PCI_DRA7XX_HOST
23 bool "TI DRA7xx PCIe controller Host Mode"
24 depends on SOC_DRA7XX || COMPILE_TEST
25 depends on PCI_MSI_IRQ_DOMAIN
26 depends on OF && HAS_IOMEM && TI_PIPE3
31 Enables support for the PCIe controller in the DRA7xx SoC to work in
32 host mode. There are two instances of PCIe controller in DRA7xx.
33 This controller can work either as EP or RC. In order to enable
34 host-specific features PCI_DRA7XX_HOST must be selected and in order
35 to enable device-specific features PCI_DRA7XX_EP must be selected.
36 This uses the DesignWare core.
39 bool "TI DRA7xx PCIe controller Endpoint Mode"
40 depends on SOC_DRA7XX || COMPILE_TEST
41 depends on PCI_ENDPOINT
42 depends on OF && HAS_IOMEM && TI_PIPE3
46 Enables support for the PCIe controller in the DRA7xx SoC to work in
47 endpoint mode. There are two instances of PCIe controller in DRA7xx.
48 This controller can work either as EP or RC. In order to enable
49 host-specific features PCI_DRA7XX_HOST must be selected and in order
50 to enable device-specific features PCI_DRA7XX_EP must be selected.
51 This uses the DesignWare core.
56 config PCIE_DW_PLAT_HOST
57 bool "Platform bus based DesignWare PCIe Controller - Host mode"
58 depends on PCI && PCI_MSI_IRQ_DOMAIN
62 Enables support for the PCIe controller in the Designware IP to
63 work in host mode. There are two instances of PCIe controller in
65 This controller can work either as EP or RC. In order to enable
66 host-specific features PCIE_DW_PLAT_HOST must be selected and in
67 order to enable device-specific features PCI_DW_PLAT_EP must be
70 config PCIE_DW_PLAT_EP
71 bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
72 depends on PCI && PCI_MSI_IRQ_DOMAIN
73 depends on PCI_ENDPOINT
77 Enables support for the PCIe controller in the Designware IP to
78 work in endpoint mode. There are two instances of PCIe controller
80 This controller can work either as EP or RC. In order to enable
81 host-specific features PCIE_DW_PLAT_HOST must be selected and in
82 order to enable device-specific features PCI_DW_PLAT_EP must be
86 bool "Samsung Exynos PCIe controller"
87 depends on SOC_EXYNOS5440 || COMPILE_TEST
88 depends on PCI_MSI_IRQ_DOMAIN
92 bool "Freescale i.MX6/7/8 PCIe controller"
93 depends on ARCH_MXC || COMPILE_TEST
94 depends on PCI_MSI_IRQ_DOMAIN
98 bool "STMicroelectronics SPEAr PCIe controller"
99 depends on ARCH_SPEAR13XX || COMPILE_TEST
100 depends on PCI_MSI_IRQ_DOMAIN
103 Say Y here if you want PCIe support on SPEAr13XX SoCs.
108 config PCI_KEYSTONE_HOST
109 bool "PCI Keystone Host Mode"
110 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
111 depends on PCI_MSI_IRQ_DOMAIN
116 Enables support for the PCIe controller in the Keystone SoC to
117 work in host mode. The PCI controller on Keystone is based on
118 DesignWare hardware and therefore the driver re-uses the
119 DesignWare core functions to implement the driver.
121 config PCI_KEYSTONE_EP
122 bool "PCI Keystone Endpoint Mode"
123 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
124 depends on PCI_ENDPOINT
128 Enables support for the PCIe controller in the Keystone SoC to
129 work in endpoint mode. The PCI controller on Keystone is based
130 on DesignWare hardware and therefore the driver re-uses the
131 DesignWare core functions to implement the driver.
133 config PCI_LAYERSCAPE
134 bool "Freescale Layerscape PCIe controller - Host mode"
135 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
136 depends on PCI_MSI_IRQ_DOMAIN
140 Say Y here if you want to enable PCIe controller support on Layerscape
141 SoCs to work in Host mode.
142 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
143 determines which PCIe controller works in EP mode and which PCIe
144 controller works in RC mode.
146 config PCI_LAYERSCAPE_EP
147 bool "Freescale Layerscape PCIe controller - Endpoint mode"
148 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
149 depends on PCI_ENDPOINT
152 Say Y here if you want to enable PCIe controller support on Layerscape
153 SoCs to work in Endpoint mode.
154 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
155 determines which PCIe controller works in EP mode and which PCIe
156 controller works in RC mode.
159 depends on OF && (ARM64 || COMPILE_TEST)
160 bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
161 depends on PCI_MSI_IRQ_DOMAIN
163 select PCI_HOST_COMMON
165 Say Y here if you want PCIe controller support on HiSilicon
169 bool "Qualcomm PCIe controller"
170 depends on OF && (ARCH_QCOM || COMPILE_TEST)
171 depends on PCI_MSI_IRQ_DOMAIN
174 Say Y here to enable PCIe controller support on Qualcomm SoCs. The
175 PCIe controller uses the DesignWare core plus Qualcomm-specific
178 config PCIE_ARMADA_8K
179 bool "Marvell Armada-8K PCIe controller"
180 depends on ARCH_MVEBU || COMPILE_TEST
181 depends on PCI_MSI_IRQ_DOMAIN
184 Say Y here if you want to enable PCIe controller support on
185 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
186 DesignWare hardware and therefore the driver re-uses the
187 DesignWare core functions to implement the driver.
192 config PCIE_ARTPEC6_HOST
193 bool "Axis ARTPEC-6 PCIe controller Host Mode"
194 depends on MACH_ARTPEC6 || COMPILE_TEST
195 depends on PCI_MSI_IRQ_DOMAIN
199 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
200 host mode. This uses the DesignWare core.
202 config PCIE_ARTPEC6_EP
203 bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
204 depends on MACH_ARTPEC6 || COMPILE_TEST
205 depends on PCI_ENDPOINT
209 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
210 endpoint mode. This uses the DesignWare core.
213 depends on OF && (ARM64 || COMPILE_TEST)
214 bool "HiSilicon Kirin series SoCs PCIe controllers"
215 depends on PCI_MSI_IRQ_DOMAIN
218 Say Y here if you want PCIe controller support
219 on HiSilicon Kirin series SoCs.
222 bool "HiSilicon STB SoCs PCIe controllers"
223 depends on ARCH_HISI || COMPILE_TEST
224 depends on PCI_MSI_IRQ_DOMAIN
227 Say Y here if you want PCIe controller support on HiSilicon STB SoCs
230 bool "MESON PCIe controller"
231 depends on PCI_MSI_IRQ_DOMAIN
234 Say Y here if you want to enable PCI controller support on Amlogic
235 SoCs. The PCI controller on Amlogic is based on DesignWare hardware
236 and therefore the driver re-uses the DesignWare core functions to
237 implement the driver.
240 bool "Socionext UniPhier PCIe controllers"
241 depends on ARCH_UNIPHIER || COMPILE_TEST
242 depends on OF && HAS_IOMEM
243 depends on PCI_MSI_IRQ_DOMAIN
246 Say Y here if you want PCIe controller support on UniPhier SoCs.
247 This driver supports LD20 and PXs3 SoCs.
250 bool "Amazon Annapurna Labs PCIe controller"
251 depends on OF && (ARM64 || COMPILE_TEST)
252 depends on PCI_MSI_IRQ_DOMAIN
255 Say Y here to enable support of the Amazon's Annapurna Labs PCIe
256 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
257 core plus Annapurna Labs proprietary hardware wrappers. This is
258 required only for DT-based platforms. ACPI platforms with the
259 Annapurna Labs PCIe controller don't need to enable this.