1 // SPDX-License-Identifier: GPL-2.0
3 * Microsemi Switchtec(tm) PCIe Management Driver
4 * Copyright (c) 2017, Microsemi Corporation
7 #include <linux/switchtec.h>
8 #include <linux/switchtec_ioctl.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
13 #include <linux/uaccess.h>
14 #include <linux/poll.h>
15 #include <linux/wait.h>
16 #include <linux/io-64-nonatomic-lo-hi.h>
17 #include <linux/nospec.h>
19 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
20 MODULE_VERSION("0.1");
21 MODULE_LICENSE("GPL");
22 MODULE_AUTHOR("Microsemi Corporation");
24 static int max_devices = 16;
25 module_param(max_devices, int, 0644);
26 MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
28 static bool use_dma_mrpc = 1;
29 module_param(use_dma_mrpc, bool, 0644);
30 MODULE_PARM_DESC(use_dma_mrpc,
31 "Enable the use of the DMA MRPC feature");
33 static int nirqs = 32;
34 module_param(nirqs, int, 0644);
35 MODULE_PARM_DESC(nirqs, "number of interrupts to allocate (more may be useful for NTB applications)");
37 static dev_t switchtec_devt;
38 static DEFINE_IDA(switchtec_minor_ida);
40 struct class *switchtec_class;
41 EXPORT_SYMBOL_GPL(switchtec_class);
50 struct switchtec_user {
51 struct switchtec_dev *stdev;
53 enum mrpc_state state;
55 struct completion comp;
57 struct list_head list;
64 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
68 static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
70 struct switchtec_user *stuser;
72 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
74 return ERR_PTR(-ENOMEM);
76 get_device(&stdev->dev);
77 stuser->stdev = stdev;
78 kref_init(&stuser->kref);
79 INIT_LIST_HEAD(&stuser->list);
80 init_completion(&stuser->comp);
81 stuser->event_cnt = atomic_read(&stdev->event_cnt);
83 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
88 static void stuser_free(struct kref *kref)
90 struct switchtec_user *stuser;
92 stuser = container_of(kref, struct switchtec_user, kref);
94 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
96 put_device(&stuser->stdev->dev);
100 static void stuser_put(struct switchtec_user *stuser)
102 kref_put(&stuser->kref, stuser_free);
105 static void stuser_set_state(struct switchtec_user *stuser,
106 enum mrpc_state state)
108 /* requires the mrpc_mutex to already be held when called */
110 const char * const state_names[] = {
111 [MRPC_IDLE] = "IDLE",
112 [MRPC_QUEUED] = "QUEUED",
113 [MRPC_RUNNING] = "RUNNING",
114 [MRPC_DONE] = "DONE",
117 stuser->state = state;
119 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
120 stuser, state_names[state]);
123 static void mrpc_complete_cmd(struct switchtec_dev *stdev);
125 static void flush_wc_buf(struct switchtec_dev *stdev)
127 struct ntb_dbmsg_regs __iomem *mmio_dbmsg;
130 * odb (outbound doorbell) register is processed by low latency
131 * hardware and w/o side effect
133 mmio_dbmsg = (void __iomem *)stdev->mmio_ntb +
134 SWITCHTEC_NTB_REG_DBMSG_OFFSET;
135 ioread32(&mmio_dbmsg->odb);
138 static void mrpc_cmd_submit(struct switchtec_dev *stdev)
140 /* requires the mrpc_mutex to already be held when called */
142 struct switchtec_user *stuser;
144 if (stdev->mrpc_busy)
147 if (list_empty(&stdev->mrpc_queue))
150 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
153 if (stdev->dma_mrpc) {
154 stdev->dma_mrpc->status = SWITCHTEC_MRPC_STATUS_INPROGRESS;
155 memset(stdev->dma_mrpc->data, 0xFF, SWITCHTEC_MRPC_PAYLOAD_SIZE);
158 stuser_set_state(stuser, MRPC_RUNNING);
159 stdev->mrpc_busy = 1;
160 memcpy_toio(&stdev->mmio_mrpc->input_data,
161 stuser->data, stuser->data_len);
163 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
165 schedule_delayed_work(&stdev->mrpc_timeout,
166 msecs_to_jiffies(500));
169 static int mrpc_queue_cmd(struct switchtec_user *stuser)
171 /* requires the mrpc_mutex to already be held when called */
173 struct switchtec_dev *stdev = stuser->stdev;
175 kref_get(&stuser->kref);
176 stuser->read_len = sizeof(stuser->data);
177 stuser_set_state(stuser, MRPC_QUEUED);
178 init_completion(&stuser->comp);
179 list_add_tail(&stuser->list, &stdev->mrpc_queue);
181 mrpc_cmd_submit(stdev);
186 static void mrpc_complete_cmd(struct switchtec_dev *stdev)
188 /* requires the mrpc_mutex to already be held when called */
189 struct switchtec_user *stuser;
191 if (list_empty(&stdev->mrpc_queue))
194 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
198 stuser->status = stdev->dma_mrpc->status;
200 stuser->status = ioread32(&stdev->mmio_mrpc->status);
202 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
205 stuser_set_state(stuser, MRPC_DONE);
206 stuser->return_code = 0;
208 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE)
212 stuser->return_code = stdev->dma_mrpc->rtn_code;
214 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
215 if (stuser->return_code != 0)
219 memcpy(stuser->data, &stdev->dma_mrpc->data,
222 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
225 complete_all(&stuser->comp);
226 list_del_init(&stuser->list);
228 stdev->mrpc_busy = 0;
230 mrpc_cmd_submit(stdev);
233 static void mrpc_event_work(struct work_struct *work)
235 struct switchtec_dev *stdev;
237 stdev = container_of(work, struct switchtec_dev, mrpc_work);
239 dev_dbg(&stdev->dev, "%s\n", __func__);
241 mutex_lock(&stdev->mrpc_mutex);
242 cancel_delayed_work(&stdev->mrpc_timeout);
243 mrpc_complete_cmd(stdev);
244 mutex_unlock(&stdev->mrpc_mutex);
247 static void mrpc_timeout_work(struct work_struct *work)
249 struct switchtec_dev *stdev;
252 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
254 dev_dbg(&stdev->dev, "%s\n", __func__);
256 mutex_lock(&stdev->mrpc_mutex);
259 status = stdev->dma_mrpc->status;
261 status = ioread32(&stdev->mmio_mrpc->status);
262 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
263 schedule_delayed_work(&stdev->mrpc_timeout,
264 msecs_to_jiffies(500));
268 mrpc_complete_cmd(stdev);
270 mutex_unlock(&stdev->mrpc_mutex);
273 static ssize_t device_version_show(struct device *dev,
274 struct device_attribute *attr, char *buf)
276 struct switchtec_dev *stdev = to_stdev(dev);
279 ver = ioread32(&stdev->mmio_sys_info->device_version);
281 return sprintf(buf, "%x\n", ver);
283 static DEVICE_ATTR_RO(device_version);
285 static ssize_t fw_version_show(struct device *dev,
286 struct device_attribute *attr, char *buf)
288 struct switchtec_dev *stdev = to_stdev(dev);
291 ver = ioread32(&stdev->mmio_sys_info->firmware_version);
293 return sprintf(buf, "%08x\n", ver);
295 static DEVICE_ATTR_RO(fw_version);
297 static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
301 memcpy_fromio(buf, attr, len);
305 for (i = len - 1; i > 0; i--) {
315 #define DEVICE_ATTR_SYS_INFO_STR(field) \
316 static ssize_t field ## _show(struct device *dev, \
317 struct device_attribute *attr, char *buf) \
319 struct switchtec_dev *stdev = to_stdev(dev); \
320 struct sys_info_regs __iomem *si = stdev->mmio_sys_info; \
321 if (stdev->gen == SWITCHTEC_GEN3) \
322 return io_string_show(buf, &si->gen3.field, \
323 sizeof(si->gen3.field)); \
324 else if (stdev->gen == SWITCHTEC_GEN4) \
325 return io_string_show(buf, &si->gen4.field, \
326 sizeof(si->gen4.field)); \
331 static DEVICE_ATTR_RO(field)
333 DEVICE_ATTR_SYS_INFO_STR(vendor_id);
334 DEVICE_ATTR_SYS_INFO_STR(product_id);
335 DEVICE_ATTR_SYS_INFO_STR(product_revision);
337 static ssize_t component_vendor_show(struct device *dev,
338 struct device_attribute *attr, char *buf)
340 struct switchtec_dev *stdev = to_stdev(dev);
341 struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
343 /* component_vendor field not supported after gen3 */
344 if (stdev->gen != SWITCHTEC_GEN3)
345 return sprintf(buf, "none\n");
347 return io_string_show(buf, &si->gen3.component_vendor,
348 sizeof(si->gen3.component_vendor));
350 static DEVICE_ATTR_RO(component_vendor);
352 static ssize_t component_id_show(struct device *dev,
353 struct device_attribute *attr, char *buf)
355 struct switchtec_dev *stdev = to_stdev(dev);
356 int id = ioread16(&stdev->mmio_sys_info->gen3.component_id);
358 /* component_id field not supported after gen3 */
359 if (stdev->gen != SWITCHTEC_GEN3)
360 return sprintf(buf, "none\n");
362 return sprintf(buf, "PM%04X\n", id);
364 static DEVICE_ATTR_RO(component_id);
366 static ssize_t component_revision_show(struct device *dev,
367 struct device_attribute *attr, char *buf)
369 struct switchtec_dev *stdev = to_stdev(dev);
370 int rev = ioread8(&stdev->mmio_sys_info->gen3.component_revision);
372 /* component_revision field not supported after gen3 */
373 if (stdev->gen != SWITCHTEC_GEN3)
374 return sprintf(buf, "255\n");
376 return sprintf(buf, "%d\n", rev);
378 static DEVICE_ATTR_RO(component_revision);
380 static ssize_t partition_show(struct device *dev,
381 struct device_attribute *attr, char *buf)
383 struct switchtec_dev *stdev = to_stdev(dev);
385 return sprintf(buf, "%d\n", stdev->partition);
387 static DEVICE_ATTR_RO(partition);
389 static ssize_t partition_count_show(struct device *dev,
390 struct device_attribute *attr, char *buf)
392 struct switchtec_dev *stdev = to_stdev(dev);
394 return sprintf(buf, "%d\n", stdev->partition_count);
396 static DEVICE_ATTR_RO(partition_count);
398 static struct attribute *switchtec_device_attrs[] = {
399 &dev_attr_device_version.attr,
400 &dev_attr_fw_version.attr,
401 &dev_attr_vendor_id.attr,
402 &dev_attr_product_id.attr,
403 &dev_attr_product_revision.attr,
404 &dev_attr_component_vendor.attr,
405 &dev_attr_component_id.attr,
406 &dev_attr_component_revision.attr,
407 &dev_attr_partition.attr,
408 &dev_attr_partition_count.attr,
412 ATTRIBUTE_GROUPS(switchtec_device);
414 static int switchtec_dev_open(struct inode *inode, struct file *filp)
416 struct switchtec_dev *stdev;
417 struct switchtec_user *stuser;
419 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
421 stuser = stuser_create(stdev);
423 return PTR_ERR(stuser);
425 filp->private_data = stuser;
426 stream_open(inode, filp);
428 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
433 static int switchtec_dev_release(struct inode *inode, struct file *filp)
435 struct switchtec_user *stuser = filp->private_data;
442 static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
444 if (mutex_lock_interruptible(&stdev->mrpc_mutex))
448 mutex_unlock(&stdev->mrpc_mutex);
455 static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
456 size_t size, loff_t *off)
458 struct switchtec_user *stuser = filp->private_data;
459 struct switchtec_dev *stdev = stuser->stdev;
462 if (size < sizeof(stuser->cmd) ||
463 size > sizeof(stuser->cmd) + sizeof(stuser->data))
466 stuser->data_len = size - sizeof(stuser->cmd);
468 rc = lock_mutex_and_test_alive(stdev);
472 if (stuser->state != MRPC_IDLE) {
477 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
483 data += sizeof(stuser->cmd);
484 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
490 rc = mrpc_queue_cmd(stuser);
493 mutex_unlock(&stdev->mrpc_mutex);
501 static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
502 size_t size, loff_t *off)
504 struct switchtec_user *stuser = filp->private_data;
505 struct switchtec_dev *stdev = stuser->stdev;
508 if (size < sizeof(stuser->cmd) ||
509 size > sizeof(stuser->cmd) + sizeof(stuser->data))
512 rc = lock_mutex_and_test_alive(stdev);
516 if (stuser->state == MRPC_IDLE) {
517 mutex_unlock(&stdev->mrpc_mutex);
521 stuser->read_len = size - sizeof(stuser->return_code);
523 mutex_unlock(&stdev->mrpc_mutex);
525 if (filp->f_flags & O_NONBLOCK) {
526 if (!try_wait_for_completion(&stuser->comp))
529 rc = wait_for_completion_interruptible(&stuser->comp);
534 rc = lock_mutex_and_test_alive(stdev);
538 if (stuser->state != MRPC_DONE) {
539 mutex_unlock(&stdev->mrpc_mutex);
543 rc = copy_to_user(data, &stuser->return_code,
544 sizeof(stuser->return_code));
550 data += sizeof(stuser->return_code);
551 rc = copy_to_user(data, &stuser->data,
552 size - sizeof(stuser->return_code));
558 stuser_set_state(stuser, MRPC_IDLE);
561 mutex_unlock(&stdev->mrpc_mutex);
563 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE)
565 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
571 static __poll_t switchtec_dev_poll(struct file *filp, poll_table *wait)
573 struct switchtec_user *stuser = filp->private_data;
574 struct switchtec_dev *stdev = stuser->stdev;
577 poll_wait(filp, &stuser->comp.wait, wait);
578 poll_wait(filp, &stdev->event_wq, wait);
580 if (lock_mutex_and_test_alive(stdev))
581 return EPOLLIN | EPOLLRDHUP | EPOLLOUT | EPOLLERR | EPOLLHUP;
583 mutex_unlock(&stdev->mrpc_mutex);
585 if (try_wait_for_completion(&stuser->comp))
586 ret |= EPOLLIN | EPOLLRDNORM;
588 if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
589 ret |= EPOLLPRI | EPOLLRDBAND;
594 static int ioctl_flash_info(struct switchtec_dev *stdev,
595 struct switchtec_ioctl_flash_info __user *uinfo)
597 struct switchtec_ioctl_flash_info info = {0};
598 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
600 if (stdev->gen == SWITCHTEC_GEN3) {
601 info.flash_length = ioread32(&fi->gen3.flash_length);
602 info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN3;
607 if (copy_to_user(uinfo, &info, sizeof(info)))
613 static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
614 struct partition_info __iomem *pi)
616 info->address = ioread32(&pi->address);
617 info->length = ioread32(&pi->length);
620 static int flash_part_info_gen3(struct switchtec_dev *stdev,
621 struct switchtec_ioctl_flash_part_info *info)
623 struct flash_info_regs_gen3 __iomem *fi =
624 &stdev->mmio_flash_info->gen3;
625 struct sys_info_regs_gen3 __iomem *si = &stdev->mmio_sys_info->gen3;
626 u32 active_addr = -1;
628 switch (info->flash_partition) {
629 case SWITCHTEC_IOCTL_PART_CFG0:
630 active_addr = ioread32(&fi->active_cfg);
631 set_fw_info_part(info, &fi->cfg0);
632 if (ioread16(&si->cfg_running) == SWITCHTEC_GEN3_CFG0_RUNNING)
633 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
635 case SWITCHTEC_IOCTL_PART_CFG1:
636 active_addr = ioread32(&fi->active_cfg);
637 set_fw_info_part(info, &fi->cfg1);
638 if (ioread16(&si->cfg_running) == SWITCHTEC_GEN3_CFG1_RUNNING)
639 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
641 case SWITCHTEC_IOCTL_PART_IMG0:
642 active_addr = ioread32(&fi->active_img);
643 set_fw_info_part(info, &fi->img0);
644 if (ioread16(&si->img_running) == SWITCHTEC_GEN3_IMG0_RUNNING)
645 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
647 case SWITCHTEC_IOCTL_PART_IMG1:
648 active_addr = ioread32(&fi->active_img);
649 set_fw_info_part(info, &fi->img1);
650 if (ioread16(&si->img_running) == SWITCHTEC_GEN3_IMG1_RUNNING)
651 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
653 case SWITCHTEC_IOCTL_PART_NVLOG:
654 set_fw_info_part(info, &fi->nvlog);
656 case SWITCHTEC_IOCTL_PART_VENDOR0:
657 set_fw_info_part(info, &fi->vendor[0]);
659 case SWITCHTEC_IOCTL_PART_VENDOR1:
660 set_fw_info_part(info, &fi->vendor[1]);
662 case SWITCHTEC_IOCTL_PART_VENDOR2:
663 set_fw_info_part(info, &fi->vendor[2]);
665 case SWITCHTEC_IOCTL_PART_VENDOR3:
666 set_fw_info_part(info, &fi->vendor[3]);
668 case SWITCHTEC_IOCTL_PART_VENDOR4:
669 set_fw_info_part(info, &fi->vendor[4]);
671 case SWITCHTEC_IOCTL_PART_VENDOR5:
672 set_fw_info_part(info, &fi->vendor[5]);
674 case SWITCHTEC_IOCTL_PART_VENDOR6:
675 set_fw_info_part(info, &fi->vendor[6]);
677 case SWITCHTEC_IOCTL_PART_VENDOR7:
678 set_fw_info_part(info, &fi->vendor[7]);
684 if (info->address == active_addr)
685 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
690 static int ioctl_flash_part_info(struct switchtec_dev *stdev,
691 struct switchtec_ioctl_flash_part_info __user *uinfo)
694 struct switchtec_ioctl_flash_part_info info = {0};
696 if (copy_from_user(&info, uinfo, sizeof(info)))
699 if (stdev->gen == SWITCHTEC_GEN3) {
700 ret = flash_part_info_gen3(stdev, &info);
707 if (copy_to_user(uinfo, &info, sizeof(info)))
713 static int ioctl_event_summary(struct switchtec_dev *stdev,
714 struct switchtec_user *stuser,
715 struct switchtec_ioctl_event_summary __user *usum,
718 struct switchtec_ioctl_event_summary *s;
723 s = kzalloc(sizeof(*s), GFP_KERNEL);
727 s->global = ioread32(&stdev->mmio_sw_event->global_summary);
728 s->part_bitmap = ioread64(&stdev->mmio_sw_event->part_event_bitmap);
729 s->local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
731 for (i = 0; i < stdev->partition_count; i++) {
732 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
736 for (i = 0; i < stdev->pff_csr_count; i++) {
737 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
741 if (copy_to_user(usum, s, size)) {
746 stuser->event_cnt = atomic_read(&stdev->event_cnt);
753 static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
754 size_t offset, int index)
756 return (void __iomem *)stdev->mmio_sw_event + offset;
759 static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
760 size_t offset, int index)
762 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
765 static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
766 size_t offset, int index)
768 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
771 #define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
772 #define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
773 #define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
775 static const struct event_reg {
777 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
778 size_t offset, int index);
780 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
781 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
782 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
783 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
784 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
785 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
786 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
787 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
788 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
789 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
790 twi_mrpc_comp_async_hdr),
791 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
792 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
793 cli_mrpc_comp_async_hdr),
794 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
795 EV_GLB(SWITCHTEC_IOCTL_EVENT_GFMS, gfms_event_hdr),
796 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
797 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
798 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
799 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
800 EV_PAR(SWITCHTEC_IOCTL_EVENT_INTERCOMM_REQ_NOTIFY,
801 intercomm_notify_hdr),
802 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
803 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
804 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
805 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
806 EV_PFF(SWITCHTEC_IOCTL_EVENT_UEC, uec_hdr),
807 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
808 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
809 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
810 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
811 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
812 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
813 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
814 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
817 static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
818 int event_id, int index)
822 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
823 return ERR_PTR(-EINVAL);
825 off = event_regs[event_id].offset;
827 if (event_regs[event_id].map_reg == part_ev_reg) {
828 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
829 index = stdev->partition;
830 else if (index < 0 || index >= stdev->partition_count)
831 return ERR_PTR(-EINVAL);
832 } else if (event_regs[event_id].map_reg == pff_ev_reg) {
833 if (index < 0 || index >= stdev->pff_csr_count)
834 return ERR_PTR(-EINVAL);
837 return event_regs[event_id].map_reg(stdev, off, index);
840 static int event_ctl(struct switchtec_dev *stdev,
841 struct switchtec_ioctl_event_ctl *ctl)
847 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
852 for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
853 ctl->data[i] = ioread32(®[i + 1]);
855 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
856 ctl->count = (hdr >> 5) & 0xFF;
858 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
859 hdr &= ~SWITCHTEC_EVENT_CLEAR;
860 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
861 hdr |= SWITCHTEC_EVENT_EN_IRQ;
862 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
863 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
864 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
865 hdr |= SWITCHTEC_EVENT_EN_LOG;
866 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
867 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
868 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
869 hdr |= SWITCHTEC_EVENT_EN_CLI;
870 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
871 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
872 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
873 hdr |= SWITCHTEC_EVENT_FATAL;
874 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
875 hdr &= ~SWITCHTEC_EVENT_FATAL;
881 if (hdr & SWITCHTEC_EVENT_EN_IRQ)
882 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
883 if (hdr & SWITCHTEC_EVENT_EN_LOG)
884 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
885 if (hdr & SWITCHTEC_EVENT_EN_CLI)
886 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
887 if (hdr & SWITCHTEC_EVENT_FATAL)
888 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
893 static int ioctl_event_ctl(struct switchtec_dev *stdev,
894 struct switchtec_ioctl_event_ctl __user *uctl)
898 unsigned int event_flags;
899 struct switchtec_ioctl_event_ctl ctl;
901 if (copy_from_user(&ctl, uctl, sizeof(ctl)))
904 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
907 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
910 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
911 if (event_regs[ctl.event_id].map_reg == global_ev_reg)
913 else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
914 nr_idxs = stdev->partition_count;
915 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
916 nr_idxs = stdev->pff_csr_count;
920 event_flags = ctl.flags;
921 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
922 ctl.flags = event_flags;
923 ret = event_ctl(stdev, &ctl);
928 ret = event_ctl(stdev, &ctl);
933 if (copy_to_user(uctl, &ctl, sizeof(ctl)))
939 static int ioctl_pff_to_port(struct switchtec_dev *stdev,
940 struct switchtec_ioctl_pff_port *up)
944 struct part_cfg_regs *pcfg;
945 struct switchtec_ioctl_pff_port p;
947 if (copy_from_user(&p, up, sizeof(p)))
951 for (part = 0; part < stdev->partition_count; part++) {
952 pcfg = &stdev->mmio_part_cfg_all[part];
955 reg = ioread32(&pcfg->usp_pff_inst_id);
961 reg = ioread32(&pcfg->vep_pff_inst_id);
963 p.port = SWITCHTEC_IOCTL_PFF_VEP;
967 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
968 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
980 if (copy_to_user(up, &p, sizeof(p)))
986 static int ioctl_port_to_pff(struct switchtec_dev *stdev,
987 struct switchtec_ioctl_pff_port *up)
989 struct switchtec_ioctl_pff_port p;
990 struct part_cfg_regs *pcfg;
992 if (copy_from_user(&p, up, sizeof(p)))
995 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
996 pcfg = stdev->mmio_part_cfg;
997 else if (p.partition < stdev->partition_count)
998 pcfg = &stdev->mmio_part_cfg_all[p.partition];
1004 p.pff = ioread32(&pcfg->usp_pff_inst_id);
1006 case SWITCHTEC_IOCTL_PFF_VEP:
1007 p.pff = ioread32(&pcfg->vep_pff_inst_id);
1010 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
1012 p.port = array_index_nospec(p.port,
1013 ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
1014 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
1018 if (copy_to_user(up, &p, sizeof(p)))
1024 static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
1027 struct switchtec_user *stuser = filp->private_data;
1028 struct switchtec_dev *stdev = stuser->stdev;
1030 void __user *argp = (void __user *)arg;
1032 rc = lock_mutex_and_test_alive(stdev);
1037 case SWITCHTEC_IOCTL_FLASH_INFO:
1038 rc = ioctl_flash_info(stdev, argp);
1040 case SWITCHTEC_IOCTL_FLASH_PART_INFO:
1041 rc = ioctl_flash_part_info(stdev, argp);
1043 case SWITCHTEC_IOCTL_EVENT_SUMMARY_LEGACY:
1044 rc = ioctl_event_summary(stdev, stuser, argp,
1045 sizeof(struct switchtec_ioctl_event_summary_legacy));
1047 case SWITCHTEC_IOCTL_EVENT_CTL:
1048 rc = ioctl_event_ctl(stdev, argp);
1050 case SWITCHTEC_IOCTL_PFF_TO_PORT:
1051 rc = ioctl_pff_to_port(stdev, argp);
1053 case SWITCHTEC_IOCTL_PORT_TO_PFF:
1054 rc = ioctl_port_to_pff(stdev, argp);
1056 case SWITCHTEC_IOCTL_EVENT_SUMMARY:
1057 rc = ioctl_event_summary(stdev, stuser, argp,
1058 sizeof(struct switchtec_ioctl_event_summary));
1065 mutex_unlock(&stdev->mrpc_mutex);
1069 static const struct file_operations switchtec_fops = {
1070 .owner = THIS_MODULE,
1071 .open = switchtec_dev_open,
1072 .release = switchtec_dev_release,
1073 .write = switchtec_dev_write,
1074 .read = switchtec_dev_read,
1075 .poll = switchtec_dev_poll,
1076 .unlocked_ioctl = switchtec_dev_ioctl,
1077 .compat_ioctl = compat_ptr_ioctl,
1080 static void link_event_work(struct work_struct *work)
1082 struct switchtec_dev *stdev;
1084 stdev = container_of(work, struct switchtec_dev, link_event_work);
1086 if (stdev->link_notifier)
1087 stdev->link_notifier(stdev);
1090 static void check_link_state_events(struct switchtec_dev *stdev)
1097 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1098 reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr);
1099 dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg);
1100 count = (reg >> 5) & 0xFF;
1102 if (count != stdev->link_event_count[idx]) {
1104 stdev->link_event_count[idx] = count;
1109 schedule_work(&stdev->link_event_work);
1112 static void enable_link_state_events(struct switchtec_dev *stdev)
1116 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1117 iowrite32(SWITCHTEC_EVENT_CLEAR |
1118 SWITCHTEC_EVENT_EN_IRQ,
1119 &stdev->mmio_pff_csr[idx].link_state_hdr);
1123 static void enable_dma_mrpc(struct switchtec_dev *stdev)
1125 writeq(stdev->dma_mrpc_dma_addr, &stdev->mmio_mrpc->dma_addr);
1126 flush_wc_buf(stdev);
1127 iowrite32(SWITCHTEC_DMA_MRPC_EN, &stdev->mmio_mrpc->dma_en);
1130 static void stdev_release(struct device *dev)
1132 struct switchtec_dev *stdev = to_stdev(dev);
1134 if (stdev->dma_mrpc) {
1135 iowrite32(0, &stdev->mmio_mrpc->dma_en);
1136 flush_wc_buf(stdev);
1137 writeq(0, &stdev->mmio_mrpc->dma_addr);
1138 dma_free_coherent(&stdev->pdev->dev, sizeof(*stdev->dma_mrpc),
1139 stdev->dma_mrpc, stdev->dma_mrpc_dma_addr);
1144 static void stdev_kill(struct switchtec_dev *stdev)
1146 struct switchtec_user *stuser, *tmpuser;
1148 pci_clear_master(stdev->pdev);
1150 cancel_delayed_work_sync(&stdev->mrpc_timeout);
1152 /* Mark the hardware as unavailable and complete all completions */
1153 mutex_lock(&stdev->mrpc_mutex);
1154 stdev->alive = false;
1156 /* Wake up and kill any users waiting on an MRPC request */
1157 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1158 complete_all(&stuser->comp);
1159 list_del_init(&stuser->list);
1163 mutex_unlock(&stdev->mrpc_mutex);
1165 /* Wake up any users waiting on event_wq */
1166 wake_up_interruptible(&stdev->event_wq);
1169 static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1171 struct switchtec_dev *stdev;
1177 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1178 dev_to_node(&pdev->dev));
1180 return ERR_PTR(-ENOMEM);
1182 stdev->alive = true;
1184 INIT_LIST_HEAD(&stdev->mrpc_queue);
1185 mutex_init(&stdev->mrpc_mutex);
1186 stdev->mrpc_busy = 0;
1187 INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1188 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
1189 INIT_WORK(&stdev->link_event_work, link_event_work);
1190 init_waitqueue_head(&stdev->event_wq);
1191 atomic_set(&stdev->event_cnt, 0);
1194 device_initialize(dev);
1195 dev->class = switchtec_class;
1196 dev->parent = &pdev->dev;
1197 dev->groups = switchtec_device_groups;
1198 dev->release = stdev_release;
1200 minor = ida_simple_get(&switchtec_minor_ida, 0, 0,
1207 dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1208 dev_set_name(dev, "switchtec%d", minor);
1210 cdev = &stdev->cdev;
1211 cdev_init(cdev, &switchtec_fops);
1212 cdev->owner = THIS_MODULE;
1217 put_device(&stdev->dev);
1221 static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1223 size_t off = event_regs[eid].offset;
1224 u32 __iomem *hdr_reg;
1227 hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1228 hdr = ioread32(hdr_reg);
1230 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1233 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1234 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1235 iowrite32(hdr, hdr_reg);
1240 static int mask_all_events(struct switchtec_dev *stdev, int eid)
1245 if (event_regs[eid].map_reg == part_ev_reg) {
1246 for (idx = 0; idx < stdev->partition_count; idx++)
1247 count += mask_event(stdev, eid, idx);
1248 } else if (event_regs[eid].map_reg == pff_ev_reg) {
1249 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1250 if (!stdev->pff_local[idx])
1253 count += mask_event(stdev, eid, idx);
1256 count += mask_event(stdev, eid, 0);
1262 static irqreturn_t switchtec_event_isr(int irq, void *dev)
1264 struct switchtec_dev *stdev = dev;
1266 irqreturn_t ret = IRQ_NONE;
1267 int eid, event_count = 0;
1269 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1270 if (reg & SWITCHTEC_EVENT_OCCURRED) {
1271 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1273 schedule_work(&stdev->mrpc_work);
1274 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1277 check_link_state_events(stdev);
1279 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++) {
1280 if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE ||
1281 eid == SWITCHTEC_IOCTL_EVENT_MRPC_COMP)
1284 event_count += mask_all_events(stdev, eid);
1288 atomic_inc(&stdev->event_cnt);
1289 wake_up_interruptible(&stdev->event_wq);
1290 dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1299 static irqreturn_t switchtec_dma_mrpc_isr(int irq, void *dev)
1301 struct switchtec_dev *stdev = dev;
1302 irqreturn_t ret = IRQ_NONE;
1304 iowrite32(SWITCHTEC_EVENT_CLEAR |
1305 SWITCHTEC_EVENT_EN_IRQ,
1306 &stdev->mmio_part_cfg->mrpc_comp_hdr);
1307 schedule_work(&stdev->mrpc_work);
1313 static int switchtec_init_isr(struct switchtec_dev *stdev)
1323 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, nirqs,
1324 PCI_IRQ_MSIX | PCI_IRQ_MSI |
1329 event_irq = ioread16(&stdev->mmio_part_cfg->vep_vector_number);
1330 if (event_irq < 0 || event_irq >= nvecs)
1333 event_irq = pci_irq_vector(stdev->pdev, event_irq);
1337 rc = devm_request_irq(&stdev->pdev->dev, event_irq,
1338 switchtec_event_isr, 0,
1339 KBUILD_MODNAME, stdev);
1344 if (!stdev->dma_mrpc)
1347 dma_mrpc_irq = ioread32(&stdev->mmio_mrpc->dma_vector);
1348 if (dma_mrpc_irq < 0 || dma_mrpc_irq >= nvecs)
1351 dma_mrpc_irq = pci_irq_vector(stdev->pdev, dma_mrpc_irq);
1352 if (dma_mrpc_irq < 0)
1353 return dma_mrpc_irq;
1355 rc = devm_request_irq(&stdev->pdev->dev, dma_mrpc_irq,
1356 switchtec_dma_mrpc_isr, 0,
1357 KBUILD_MODNAME, stdev);
1362 static void init_pff(struct switchtec_dev *stdev)
1366 struct part_cfg_regs *pcfg = stdev->mmio_part_cfg;
1368 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1369 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1370 if (reg != PCI_VENDOR_ID_MICROSEMI)
1374 stdev->pff_csr_count = i;
1376 reg = ioread32(&pcfg->usp_pff_inst_id);
1377 if (reg < stdev->pff_csr_count)
1378 stdev->pff_local[reg] = 1;
1380 reg = ioread32(&pcfg->vep_pff_inst_id);
1381 if (reg < stdev->pff_csr_count)
1382 stdev->pff_local[reg] = 1;
1384 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1385 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1386 if (reg < stdev->pff_csr_count)
1387 stdev->pff_local[reg] = 1;
1391 static int switchtec_init_pci(struct switchtec_dev *stdev,
1392 struct pci_dev *pdev)
1396 unsigned long res_start, res_len;
1397 u32 __iomem *part_id;
1399 rc = pcim_enable_device(pdev);
1403 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1407 pci_set_master(pdev);
1409 res_start = pci_resource_start(pdev, 0);
1410 res_len = pci_resource_len(pdev, 0);
1412 if (!devm_request_mem_region(&pdev->dev, res_start,
1413 res_len, KBUILD_MODNAME))
1416 stdev->mmio_mrpc = devm_ioremap_wc(&pdev->dev, res_start,
1417 SWITCHTEC_GAS_TOP_CFG_OFFSET);
1418 if (!stdev->mmio_mrpc)
1421 map = devm_ioremap(&pdev->dev,
1422 res_start + SWITCHTEC_GAS_TOP_CFG_OFFSET,
1423 res_len - SWITCHTEC_GAS_TOP_CFG_OFFSET);
1427 stdev->mmio = map - SWITCHTEC_GAS_TOP_CFG_OFFSET;
1428 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1429 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1430 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1431 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
1433 if (stdev->gen == SWITCHTEC_GEN3)
1434 part_id = &stdev->mmio_sys_info->gen3.partition_id;
1435 else if (stdev->gen == SWITCHTEC_GEN4)
1436 part_id = &stdev->mmio_sys_info->gen4.partition_id;
1440 stdev->partition = ioread8(part_id);
1441 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1442 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1443 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1444 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1446 if (stdev->partition_count < 1)
1447 stdev->partition_count = 1;
1451 pci_set_drvdata(pdev, stdev);
1456 if (ioread32(&stdev->mmio_mrpc->dma_ver) == 0)
1459 stdev->dma_mrpc = dma_alloc_coherent(&stdev->pdev->dev,
1460 sizeof(*stdev->dma_mrpc),
1461 &stdev->dma_mrpc_dma_addr,
1463 if (stdev->dma_mrpc == NULL)
1469 static int switchtec_pci_probe(struct pci_dev *pdev,
1470 const struct pci_device_id *id)
1472 struct switchtec_dev *stdev;
1475 if (pdev->class == (PCI_CLASS_BRIDGE_OTHER << 8))
1476 request_module_nowait("ntb_hw_switchtec");
1478 stdev = stdev_create(pdev);
1480 return PTR_ERR(stdev);
1482 stdev->gen = id->driver_data;
1484 rc = switchtec_init_pci(stdev, pdev);
1488 rc = switchtec_init_isr(stdev);
1490 dev_err(&stdev->dev, "failed to init isr.\n");
1494 iowrite32(SWITCHTEC_EVENT_CLEAR |
1495 SWITCHTEC_EVENT_EN_IRQ,
1496 &stdev->mmio_part_cfg->mrpc_comp_hdr);
1497 enable_link_state_events(stdev);
1499 if (stdev->dma_mrpc)
1500 enable_dma_mrpc(stdev);
1502 rc = cdev_device_add(&stdev->cdev, &stdev->dev);
1506 dev_info(&stdev->dev, "Management device registered.\n");
1513 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1514 put_device(&stdev->dev);
1518 static void switchtec_pci_remove(struct pci_dev *pdev)
1520 struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1522 pci_set_drvdata(pdev, NULL);
1524 cdev_device_del(&stdev->cdev, &stdev->dev);
1525 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1526 dev_info(&stdev->dev, "unregistered.\n");
1528 put_device(&stdev->dev);
1531 #define SWITCHTEC_PCI_DEVICE(device_id, gen) \
1533 .vendor = PCI_VENDOR_ID_MICROSEMI, \
1534 .device = device_id, \
1535 .subvendor = PCI_ANY_ID, \
1536 .subdevice = PCI_ANY_ID, \
1537 .class = (PCI_CLASS_MEMORY_OTHER << 8), \
1538 .class_mask = 0xFFFFFFFF, \
1539 .driver_data = gen, \
1542 .vendor = PCI_VENDOR_ID_MICROSEMI, \
1543 .device = device_id, \
1544 .subvendor = PCI_ANY_ID, \
1545 .subdevice = PCI_ANY_ID, \
1546 .class = (PCI_CLASS_BRIDGE_OTHER << 8), \
1547 .class_mask = 0xFFFFFFFF, \
1548 .driver_data = gen, \
1551 static const struct pci_device_id switchtec_pci_tbl[] = {
1552 SWITCHTEC_PCI_DEVICE(0x8531, SWITCHTEC_GEN3), //PFX 24xG3
1553 SWITCHTEC_PCI_DEVICE(0x8532, SWITCHTEC_GEN3), //PFX 32xG3
1554 SWITCHTEC_PCI_DEVICE(0x8533, SWITCHTEC_GEN3), //PFX 48xG3
1555 SWITCHTEC_PCI_DEVICE(0x8534, SWITCHTEC_GEN3), //PFX 64xG3
1556 SWITCHTEC_PCI_DEVICE(0x8535, SWITCHTEC_GEN3), //PFX 80xG3
1557 SWITCHTEC_PCI_DEVICE(0x8536, SWITCHTEC_GEN3), //PFX 96xG3
1558 SWITCHTEC_PCI_DEVICE(0x8541, SWITCHTEC_GEN3), //PSX 24xG3
1559 SWITCHTEC_PCI_DEVICE(0x8542, SWITCHTEC_GEN3), //PSX 32xG3
1560 SWITCHTEC_PCI_DEVICE(0x8543, SWITCHTEC_GEN3), //PSX 48xG3
1561 SWITCHTEC_PCI_DEVICE(0x8544, SWITCHTEC_GEN3), //PSX 64xG3
1562 SWITCHTEC_PCI_DEVICE(0x8545, SWITCHTEC_GEN3), //PSX 80xG3
1563 SWITCHTEC_PCI_DEVICE(0x8546, SWITCHTEC_GEN3), //PSX 96xG3
1564 SWITCHTEC_PCI_DEVICE(0x8551, SWITCHTEC_GEN3), //PAX 24XG3
1565 SWITCHTEC_PCI_DEVICE(0x8552, SWITCHTEC_GEN3), //PAX 32XG3
1566 SWITCHTEC_PCI_DEVICE(0x8553, SWITCHTEC_GEN3), //PAX 48XG3
1567 SWITCHTEC_PCI_DEVICE(0x8554, SWITCHTEC_GEN3), //PAX 64XG3
1568 SWITCHTEC_PCI_DEVICE(0x8555, SWITCHTEC_GEN3), //PAX 80XG3
1569 SWITCHTEC_PCI_DEVICE(0x8556, SWITCHTEC_GEN3), //PAX 96XG3
1570 SWITCHTEC_PCI_DEVICE(0x8561, SWITCHTEC_GEN3), //PFXL 24XG3
1571 SWITCHTEC_PCI_DEVICE(0x8562, SWITCHTEC_GEN3), //PFXL 32XG3
1572 SWITCHTEC_PCI_DEVICE(0x8563, SWITCHTEC_GEN3), //PFXL 48XG3
1573 SWITCHTEC_PCI_DEVICE(0x8564, SWITCHTEC_GEN3), //PFXL 64XG3
1574 SWITCHTEC_PCI_DEVICE(0x8565, SWITCHTEC_GEN3), //PFXL 80XG3
1575 SWITCHTEC_PCI_DEVICE(0x8566, SWITCHTEC_GEN3), //PFXL 96XG3
1576 SWITCHTEC_PCI_DEVICE(0x8571, SWITCHTEC_GEN3), //PFXI 24XG3
1577 SWITCHTEC_PCI_DEVICE(0x8572, SWITCHTEC_GEN3), //PFXI 32XG3
1578 SWITCHTEC_PCI_DEVICE(0x8573, SWITCHTEC_GEN3), //PFXI 48XG3
1579 SWITCHTEC_PCI_DEVICE(0x8574, SWITCHTEC_GEN3), //PFXI 64XG3
1580 SWITCHTEC_PCI_DEVICE(0x8575, SWITCHTEC_GEN3), //PFXI 80XG3
1581 SWITCHTEC_PCI_DEVICE(0x8576, SWITCHTEC_GEN3), //PFXI 96XG3
1584 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1586 static struct pci_driver switchtec_pci_driver = {
1587 .name = KBUILD_MODNAME,
1588 .id_table = switchtec_pci_tbl,
1589 .probe = switchtec_pci_probe,
1590 .remove = switchtec_pci_remove,
1593 static int __init switchtec_init(void)
1597 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1602 switchtec_class = class_create(THIS_MODULE, "switchtec");
1603 if (IS_ERR(switchtec_class)) {
1604 rc = PTR_ERR(switchtec_class);
1605 goto err_create_class;
1608 rc = pci_register_driver(&switchtec_pci_driver);
1610 goto err_pci_register;
1612 pr_info(KBUILD_MODNAME ": loaded.\n");
1617 class_destroy(switchtec_class);
1620 unregister_chrdev_region(switchtec_devt, max_devices);
1624 module_init(switchtec_init);
1626 static void __exit switchtec_exit(void)
1628 pci_unregister_driver(&switchtec_pci_driver);
1629 class_destroy(switchtec_class);
1630 unregister_chrdev_region(switchtec_devt, max_devices);
1631 ida_destroy(&switchtec_minor_ida);
1633 pr_info(KBUILD_MODNAME ": unloaded.\n");
1635 module_exit(switchtec_exit);