drivers/phy/allwinner/phy-sun4i-usb.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Allwinner sun4i USB phy driver
   4  *
   5  * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * Based on code from
   8  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
   9  *
  10  * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
  11  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  12  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/delay.h>
  17 #include <linux/err.h>
  18 #include <linux/extcon-provider.h>
  19 #include <linux/io.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/mutex.h>
  24 #include <linux/of.h>
  25 #include <linux/of_address.h>
  26 #include <linux/of_device.h>
  27 #include <linux/of_gpio.h>
  28 #include <linux/phy/phy.h>
  29 #include <linux/phy/phy-sun4i-usb.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/power_supply.h>
  32 #include <linux/regulator/consumer.h>
  33 #include <linux/reset.h>
  34 #include <linux/spinlock.h>
  35 #include <linux/usb/of.h>
  36 #include <linux/workqueue.h>
  37
  38 #define REG_ISCR                        0x00
  39 #define REG_PHYCTL_A10                  0x04
  40 #define REG_PHYBIST                     0x08
  41 #define REG_PHYTUNE                     0x0c
  42 #define REG_PHYCTL_A33                  0x10
  43 #define REG_PHY_OTGCTL                  0x20
  44
  45 #define REG_PMU_UNK1                    0x10
  46
  47 #define PHYCTL_DATA                     BIT(7)
  48
  49 #define OTGCTL_ROUTE_MUSB               BIT(0)
  50
  51 #define SUNXI_AHB_ICHR8_EN              BIT(10)
  52 #define SUNXI_AHB_INCR4_BURST_EN        BIT(9)
  53 #define SUNXI_AHB_INCRX_ALIGN_EN        BIT(8)
  54 #define SUNXI_ULPI_BYPASS_EN            BIT(0)
  55
  56 /* ISCR, Interface Status and Control bits */
  57 #define ISCR_ID_PULLUP_EN               (1 << 17)
  58 #define ISCR_DPDM_PULLUP_EN     (1 << 16)
  59 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
  60 #define ISCR_FORCE_ID_MASK      (3 << 14)
  61 #define ISCR_FORCE_ID_LOW               (2 << 14)
  62 #define ISCR_FORCE_ID_HIGH      (3 << 14)
  63 #define ISCR_FORCE_VBUS_MASK    (3 << 12)
  64 #define ISCR_FORCE_VBUS_LOW     (2 << 12)
  65 #define ISCR_FORCE_VBUS_HIGH    (3 << 12)
  66
  67 /* Common Control Bits for Both PHYs */
  68 #define PHY_PLL_BW                      0x03
  69 #define PHY_RES45_CAL_EN                0x0c
  70
  71 /* Private Control Bits for Each PHY */
  72 #define PHY_TX_AMPLITUDE_TUNE           0x20
  73 #define PHY_TX_SLEWRATE_TUNE            0x22
  74 #define PHY_VBUSVALID_TH_SEL            0x25
  75 #define PHY_PULLUP_RES_SEL              0x27
  76 #define PHY_OTG_FUNC_EN                 0x28
  77 #define PHY_VBUS_DET_EN                 0x29
  78 #define PHY_DISCON_TH_SEL               0x2a
  79 #define PHY_SQUELCH_DETECT              0x3c
  80
  81 /* A83T specific control bits for PHY0 */
  82 #define PHY_CTL_VBUSVLDEXT              BIT(5)
  83 #define PHY_CTL_SIDDQ                   BIT(3)
  84
  85 /* A83T specific control bits for PHY2 HSIC */
  86 #define SUNXI_EHCI_HS_FORCE             BIT(20)
  87 #define SUNXI_HSIC_CONNECT_DET          BIT(17)
  88 #define SUNXI_HSIC_CONNECT_INT          BIT(16)
  89 #define SUNXI_HSIC                      BIT(1)
  90
  91 #define MAX_PHYS                        4
  92
  93 /*
  94  * Note do not raise the debounce time, we must report Vusb high within 100ms
  95  * otherwise we get Vbus errors
  96  */
  97 #define DEBOUNCE_TIME                   msecs_to_jiffies(50)
  98 #define POLL_TIME                       msecs_to_jiffies(250)
  99
 100 enum sun4i_usb_phy_type {
 101         sun4i_a10_phy,
 102         sun6i_a31_phy,
 103         sun8i_a33_phy,
 104         sun8i_a83t_phy,
 105         sun8i_h3_phy,
 106         sun8i_r40_phy,
 107         sun8i_v3s_phy,
 108         sun50i_a64_phy,
 109         sun50i_h6_phy,
 110 };
 111
 112 struct sun4i_usb_phy_cfg {
 113         int num_phys;
 114         int hsic_index;
 115         enum sun4i_usb_phy_type type;
 116         u32 disc_thresh;
 117         u8 phyctl_offset;
 118         bool dedicated_clocks;
 119         bool enable_pmu_unk1;
 120         bool phy0_dual_route;
 121         int missing_phys;
 122 };
 123
 124 struct sun4i_usb_phy_data {
 125         void __iomem *base;
 126         const struct sun4i_usb_phy_cfg *cfg;
 127         enum usb_dr_mode dr_mode;
 128         spinlock_t reg_lock; /* guard access to phyctl reg */
 129         struct sun4i_usb_phy {
 130                 struct phy *phy;
 131                 void __iomem *pmu;
 132                 struct regulator *vbus;
 133                 struct reset_control *reset;
 134                 struct clk *clk;
 135                 struct clk *clk2;
 136                 bool regulator_on;
 137                 int index;
 138         } phys[MAX_PHYS];
 139         /* phy0 / otg related variables */
 140         struct extcon_dev *extcon;
 141         bool phy0_init;
 142         struct gpio_desc *id_det_gpio;
 143         struct gpio_desc *vbus_det_gpio;
 144         struct power_supply *vbus_power_supply;
 145         struct notifier_block vbus_power_nb;
 146         bool vbus_power_nb_registered;
 147         bool force_session_end;
 148         int id_det_irq;
 149         int vbus_det_irq;
 150         int id_det;
 151         int vbus_det;
 152         struct delayed_work detect;
 153 };
 154
 155 #define to_sun4i_usb_phy_data(phy) \
 156         container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
 157
 158 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
 159 {
 160         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 161         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 162         u32 iscr;
 163
 164         iscr = readl(data->base + REG_ISCR);
 165         iscr &= ~clr;
 166         iscr |= set;
 167         writel(iscr, data->base + REG_ISCR);
 168 }
 169
 170 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
 171 {
 172         if (val)
 173                 val = ISCR_FORCE_ID_HIGH;
 174         else
 175                 val = ISCR_FORCE_ID_LOW;
 176
 177         sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
 178 }
 179
 180 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
 181 {
 182         if (val)
 183                 val = ISCR_FORCE_VBUS_HIGH;
 184         else
 185                 val = ISCR_FORCE_VBUS_LOW;
 186
 187         sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
 188 }
 189
 190 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
 191                                 int len)
 192 {
 193         struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
 194         u32 temp, usbc_bit = BIT(phy->index * 2);
 195         void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
 196         unsigned long flags;
 197         int i;
 198
 199         spin_lock_irqsave(&phy_data->reg_lock, flags);
 200
 201         if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
 202                 /* SoCs newer than A33 need us to set phyctl to 0 explicitly */
 203                 writel(0, phyctl);
 204         }
 205
 206         for (i = 0; i < len; i++) {
 207                 temp = readl(phyctl);
 208
 209                 /* clear the address portion */
 210                 temp &= ~(0xff << 8);
 211
 212                 /* set the address */
 213                 temp |= ((addr + i) << 8);
 214                 writel(temp, phyctl);
 215
 216                 /* set the data bit and clear usbc bit*/
 217                 temp = readb(phyctl);
 218                 if (data & 0x1)
 219                         temp |= PHYCTL_DATA;
 220                 else
 221                         temp &= ~PHYCTL_DATA;
 222                 temp &= ~usbc_bit;
 223                 writeb(temp, phyctl);
 224
 225                 /* pulse usbc_bit */
 226                 temp = readb(phyctl);
 227                 temp |= usbc_bit;
 228                 writeb(temp, phyctl);
 229
 230                 temp = readb(phyctl);
 231                 temp &= ~usbc_bit;
 232                 writeb(temp, phyctl);
 233
 234                 data >>= 1;
 235         }
 236
 237         spin_unlock_irqrestore(&phy_data->reg_lock, flags);
 238 }
 239
 240 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
 241 {
 242         struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
 243         u32 bits, reg_value;
 244
 245         if (!phy->pmu)
 246                 return;
 247
 248         bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
 249                 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
 250
 251         /* A83T USB2 is HSIC */
 252         if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
 253                 bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
 254                         SUNXI_HSIC;
 255
 256         reg_value = readl(phy->pmu);
 257
 258         if (enable)
 259                 reg_value |= bits;
 260         else
 261                 reg_value &= ~bits;
 262
 263         writel(reg_value, phy->pmu);
 264 }
 265
 266 static int sun4i_usb_phy_init(struct phy *_phy)
 267 {
 268         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 269         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 270         int ret;
 271         u32 val;
 272
 273         ret = clk_prepare_enable(phy->clk);
 274         if (ret)
 275                 return ret;
 276
 277         ret = clk_prepare_enable(phy->clk2);
 278         if (ret) {
 279                 clk_disable_unprepare(phy->clk);
 280                 return ret;
 281         }
 282
 283         ret = reset_control_deassert(phy->reset);
 284         if (ret) {
 285                 clk_disable_unprepare(phy->clk2);
 286                 clk_disable_unprepare(phy->clk);
 287                 return ret;
 288         }
 289
 290         if (data->cfg->type == sun8i_a83t_phy ||
 291             data->cfg->type == sun50i_h6_phy) {
 292                 if (phy->index == 0) {
 293                         val = readl(data->base + data->cfg->phyctl_offset);
 294                         val |= PHY_CTL_VBUSVLDEXT;
 295                         val &= ~PHY_CTL_SIDDQ;
 296                         writel(val, data->base + data->cfg->phyctl_offset);
 297                 }
 298         } else {
 299                 if (phy->pmu && data->cfg->enable_pmu_unk1) {
 300                         val = readl(phy->pmu + REG_PMU_UNK1);
 301                         writel(val & ~2, phy->pmu + REG_PMU_UNK1);
 302                 }
 303
 304                 /* Enable USB 45 Ohm resistor calibration */
 305                 if (phy->index == 0)
 306                         sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
 307
 308                 /* Adjust PHY's magnitude and rate */
 309                 sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
 310
 311                 /* Disconnect threshold adjustment */
 312                 sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
 313                                     data->cfg->disc_thresh, 2);
 314         }
 315
 316         sun4i_usb_phy_passby(phy, 1);
 317
 318         if (phy->index == 0) {
 319                 data->phy0_init = true;
 320
 321                 /* Enable pull-ups */
 322                 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
 323                 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
 324
 325                 /* Force ISCR and cable state updates */
 326                 data->id_det = -1;
 327                 data->vbus_det = -1;
 328                 queue_delayed_work(system_wq, &data->detect, 0);
 329         }
 330
 331         return 0;
 332 }
 333
 334 static int sun4i_usb_phy_exit(struct phy *_phy)
 335 {
 336         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 337         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 338
 339         if (phy->index == 0) {
 340                 if (data->cfg->type == sun8i_a83t_phy ||
 341                     data->cfg->type == sun50i_h6_phy) {
 342                         void __iomem *phyctl = data->base +
 343                                 data->cfg->phyctl_offset;
 344
 345                         writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
 346                 }
 347
 348                 /* Disable pull-ups */
 349                 sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
 350                 sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
 351                 data->phy0_init = false;
 352         }
 353
 354         sun4i_usb_phy_passby(phy, 0);
 355         reset_control_assert(phy->reset);
 356         clk_disable_unprepare(phy->clk2);
 357         clk_disable_unprepare(phy->clk);
 358
 359         return 0;
 360 }
 361
 362 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
 363 {
 364         switch (data->dr_mode) {
 365         case USB_DR_MODE_OTG:
 366                 if (data->id_det_gpio)
 367                         return gpiod_get_value_cansleep(data->id_det_gpio);
 368                 else
 369                         return 1; /* Fallback to peripheral mode */
 370         case USB_DR_MODE_HOST:
 371                 return 0;
 372         case USB_DR_MODE_PERIPHERAL:
 373         default:
 374                 return 1;
 375         }
 376 }
 377
 378 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
 379 {
 380         if (data->vbus_det_gpio)
 381                 return gpiod_get_value_cansleep(data->vbus_det_gpio);
 382
 383         if (data->vbus_power_supply) {
 384                 union power_supply_propval val;
 385                 int r;
 386
 387                 r = power_supply_get_property(data->vbus_power_supply,
 388                                               POWER_SUPPLY_PROP_PRESENT, &val);
 389                 if (r == 0)
 390                         return val.intval;
 391         }
 392
 393         /* Fallback: report vbus as high */
 394         return 1;
 395 }
 396
 397 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
 398 {
 399         return data->vbus_det_gpio || data->vbus_power_supply;
 400 }
 401
 402 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
 403 {
 404         if ((data->id_det_gpio && data->id_det_irq <= 0) ||
 405             (data->vbus_det_gpio && data->vbus_det_irq <= 0))
 406                 return true;
 407
 408         /*
 409          * The A31/A23/A33 companion pmics (AXP221/AXP223) do not
 410          * generate vbus change interrupts when the board is driving
 411          * vbus using the N_VBUSEN pin on the pmic, so we must poll
 412          * when using the pmic for vbus-det _and_ we're driving vbus.
 413          */
 414         if ((data->cfg->type == sun6i_a31_phy ||
 415              data->cfg->type == sun8i_a33_phy) &&
 416             data->vbus_power_supply && data->phys[0].regulator_on)
 417                 return true;
 418
 419         return false;
 420 }
 421
 422 static int sun4i_usb_phy_power_on(struct phy *_phy)
 423 {
 424         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 425         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 426         int ret;
 427
 428         if (!phy->vbus || phy->regulator_on)
 429                 return 0;
 430
 431         /* For phy0 only turn on Vbus if we don't have an ext. Vbus */
 432         if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
 433                                 data->vbus_det) {
 434                 dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
 435                 return 0;
 436         }
 437
 438         ret = regulator_enable(phy->vbus);
 439         if (ret)
 440                 return ret;
 441
 442         phy->regulator_on = true;
 443
 444         /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
 445         if (phy->index == 0 && sun4i_usb_phy0_poll(data))
 446                 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
 447
 448         return 0;
 449 }
 450
 451 static int sun4i_usb_phy_power_off(struct phy *_phy)
 452 {
 453         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 454         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 455
 456         if (!phy->vbus || !phy->regulator_on)
 457                 return 0;
 458
 459         regulator_disable(phy->vbus);
 460         phy->regulator_on = false;
 461
 462         /*
 463          * phy0 vbus typically slowly discharges, sometimes this causes the
 464          * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
 465          */
 466         if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
 467                 mod_delayed_work(system_wq, &data->detect, POLL_TIME);
 468
 469         return 0;
 470 }
 471
 472 static int sun4i_usb_phy_set_mode(struct phy *_phy,
 473                                   enum phy_mode mode, int submode)
 474 {
 475         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 476         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
 477         int new_mode;
 478
 479         if (phy->index != 0) {
 480                 if (mode == PHY_MODE_USB_HOST)
 481                         return 0;
 482                 return -EINVAL;
 483         }
 484
 485         switch (mode) {
 486         case PHY_MODE_USB_HOST:
 487                 new_mode = USB_DR_MODE_HOST;
 488                 break;
 489         case PHY_MODE_USB_DEVICE:
 490                 new_mode = USB_DR_MODE_PERIPHERAL;
 491                 break;
 492         case PHY_MODE_USB_OTG:
 493                 new_mode = USB_DR_MODE_OTG;
 494                 break;
 495         default:
 496                 return -EINVAL;
 497         }
 498
 499         if (new_mode != data->dr_mode) {
 500                 dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
 501                 data->dr_mode = new_mode;
 502         }
 503
 504         data->id_det = -1; /* Force reprocessing of id */
 505         data->force_session_end = true;
 506         queue_delayed_work(system_wq, &data->detect, 0);
 507
 508         return 0;
 509 }
 510
 511 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
 512 {
 513         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
 514
 515         sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
 516 }
 517 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
 518
 519 static const struct phy_ops sun4i_usb_phy_ops = {
 520         .init           = sun4i_usb_phy_init,
 521         .exit           = sun4i_usb_phy_exit,
 522         .power_on       = sun4i_usb_phy_power_on,
 523         .power_off      = sun4i_usb_phy_power_off,
 524         .set_mode       = sun4i_usb_phy_set_mode,
 525         .owner          = THIS_MODULE,
 526 };
 527
 528 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
 529 {
 530         u32 regval;
 531
 532         regval = readl(data->base + REG_PHY_OTGCTL);
 533         if (id_det == 0) {
 534                 /* Host mode. Route phy0 to EHCI/OHCI */
 535                 regval &= ~OTGCTL_ROUTE_MUSB;
 536         } else {
 537                 /* Peripheral mode. Route phy0 to MUSB */
 538                 regval |= OTGCTL_ROUTE_MUSB;
 539         }
 540         writel(regval, data->base + REG_PHY_OTGCTL);
 541 }
 542
 543 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
 544 {
 545         struct sun4i_usb_phy_data *data =
 546                 container_of(work, struct sun4i_usb_phy_data, detect.work);
 547         struct phy *phy0 = data->phys[0].phy;
 548         struct sun4i_usb_phy *phy = phy_get_drvdata(phy0);
 549         bool force_session_end, id_notify = false, vbus_notify = false;
 550         int id_det, vbus_det;
 551
 552         if (phy0 == NULL)
 553                 return;
 554
 555         id_det = sun4i_usb_phy0_get_id_det(data);
 556         vbus_det = sun4i_usb_phy0_get_vbus_det(data);
 557
 558         mutex_lock(&phy0->mutex);
 559
 560         if (!data->phy0_init) {
 561                 mutex_unlock(&phy0->mutex);
 562                 return;
 563         }
 564
 565         force_session_end = data->force_session_end;
 566         data->force_session_end = false;
 567
 568         if (id_det != data->id_det) {
 569                 /* id-change, force session end if we've no vbus detection */
 570                 if (data->dr_mode == USB_DR_MODE_OTG &&
 571                     !sun4i_usb_phy0_have_vbus_det(data))
 572                         force_session_end = true;
 573
 574                 /* When entering host mode (id = 0) force end the session now */
 575                 if (force_session_end && id_det == 0) {
 576                         sun4i_usb_phy0_set_vbus_detect(phy0, 0);
 577                         msleep(200);
 578                         sun4i_usb_phy0_set_vbus_detect(phy0, 1);
 579                 }
 580                 sun4i_usb_phy0_set_id_detect(phy0, id_det);
 581                 data->id_det = id_det;
 582                 id_notify = true;
 583         }
 584
 585         if (vbus_det != data->vbus_det) {
 586                 sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
 587                 data->vbus_det = vbus_det;
 588                 vbus_notify = true;
 589         }
 590
 591         mutex_unlock(&phy0->mutex);
 592
 593         if (id_notify) {
 594                 extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
 595                                         !id_det);
 596                 /* When leaving host mode force end the session here */
 597                 if (force_session_end && id_det == 1) {
 598                         mutex_lock(&phy0->mutex);
 599                         sun4i_usb_phy0_set_vbus_detect(phy0, 0);
 600                         msleep(1000);
 601                         sun4i_usb_phy0_set_vbus_detect(phy0, 1);
 602                         mutex_unlock(&phy0->mutex);
 603                 }
 604
 605                 /* Enable PHY0 passby for host mode only. */
 606                 sun4i_usb_phy_passby(phy, !id_det);
 607
 608                 /* Re-route PHY0 if necessary */
 609                 if (data->cfg->phy0_dual_route)
 610                         sun4i_usb_phy0_reroute(data, id_det);
 611         }
 612
 613         if (vbus_notify)
 614                 extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
 615
 616         if (sun4i_usb_phy0_poll(data))
 617                 queue_delayed_work(system_wq, &data->detect, POLL_TIME);
 618 }
 619
 620 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
 621 {
 622         struct sun4i_usb_phy_data *data = dev_id;
 623
 624         /* vbus or id changed, let the pins settle and then scan them */
 625         mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
 626
 627         return IRQ_HANDLED;
 628 }
 629
 630 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
 631                                       unsigned long val, void *v)
 632 {
 633         struct sun4i_usb_phy_data *data =
 634                 container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
 635         struct power_supply *psy = v;
 636
 637         /* Properties on the vbus_power_supply changed, scan vbus_det */
 638         if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
 639                 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
 640
 641         return NOTIFY_OK;
 642 }
 643
 644 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
 645                                         struct of_phandle_args *args)
 646 {
 647         struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
 648
 649         if (args->args[0] >= data->cfg->num_phys)
 650                 return ERR_PTR(-ENODEV);
 651
 652         if (data->cfg->missing_phys & BIT(args->args[0]))
 653                 return ERR_PTR(-ENODEV);
 654
 655         return data->phys[args->args[0]].phy;
 656 }
 657
 658 static int sun4i_usb_phy_remove(struct platform_device *pdev)
 659 {
 660         struct device *dev = &pdev->dev;
 661         struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
 662
 663         if (data->vbus_power_nb_registered)
 664                 power_supply_unreg_notifier(&data->vbus_power_nb);
 665         if (data->id_det_irq > 0)
 666                 devm_free_irq(dev, data->id_det_irq, data);
 667         if (data->vbus_det_irq > 0)
 668                 devm_free_irq(dev, data->vbus_det_irq, data);
 669
 670         cancel_delayed_work_sync(&data->detect);
 671
 672         return 0;
 673 }
 674
 675 static const unsigned int sun4i_usb_phy0_cable[] = {
 676         EXTCON_USB,
 677         EXTCON_USB_HOST,
 678         EXTCON_NONE,
 679 };
 680
 681 static int sun4i_usb_phy_probe(struct platform_device *pdev)
 682 {
 683         struct sun4i_usb_phy_data *data;
 684         struct device *dev = &pdev->dev;
 685         struct device_node *np = dev->of_node;
 686         struct phy_provider *phy_provider;
 687         struct resource *res;
 688         int i, ret;
 689
 690         data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
 691         if (!data)
 692                 return -ENOMEM;
 693
 694         spin_lock_init(&data->reg_lock);
 695         INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
 696         dev_set_drvdata(dev, data);
 697         data->cfg = of_device_get_match_data(dev);
 698         if (!data->cfg)
 699                 return -EINVAL;
 700
 701         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
 702         data->base = devm_ioremap_resource(dev, res);
 703         if (IS_ERR(data->base))
 704                 return PTR_ERR(data->base);
 705
 706         data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
 707                                                     GPIOD_IN);
 708         if (IS_ERR(data->id_det_gpio)) {
 709                 dev_err(dev, "Couldn't request ID GPIO\n");
 710                 return PTR_ERR(data->id_det_gpio);
 711         }
 712
 713         data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
 714                                                       GPIOD_IN);
 715         if (IS_ERR(data->vbus_det_gpio)) {
 716                 dev_err(dev, "Couldn't request VBUS detect GPIO\n");
 717                 return PTR_ERR(data->vbus_det_gpio);
 718         }
 719
 720         if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
 721                 data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
 722                                                      "usb0_vbus_power-supply");
 723                 if (IS_ERR(data->vbus_power_supply)) {
 724                         dev_err(dev, "Couldn't get the VBUS power supply\n");
 725                         return PTR_ERR(data->vbus_power_supply);
 726                 }
 727
 728                 if (!data->vbus_power_supply)
 729                         return -EPROBE_DEFER;
 730         }
 731
 732         data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
 733
 734         data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
 735         if (IS_ERR(data->extcon)) {
 736                 dev_err(dev, "Couldn't allocate our extcon device\n");
 737                 return PTR_ERR(data->extcon);
 738         }
 739
 740         ret = devm_extcon_dev_register(dev, data->extcon);
 741         if (ret) {
 742                 dev_err(dev, "failed to register extcon: %d\n", ret);
 743                 return ret;
 744         }
 745
 746         for (i = 0; i < data->cfg->num_phys; i++) {
 747                 struct sun4i_usb_phy *phy = data->phys + i;
 748                 char name[16];
 749
 750                 if (data->cfg->missing_phys & BIT(i))
 751                         continue;
 752
 753                 snprintf(name, sizeof(name), "usb%d_vbus", i);
 754                 phy->vbus = devm_regulator_get_optional(dev, name);
 755                 if (IS_ERR(phy->vbus)) {
 756                         if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
 757                                 dev_err(dev,
 758                                         "Couldn't get regulator %s... Deferring probe\n",
 759                                         name);
 760                                 return -EPROBE_DEFER;
 761                         }
 762
 763                         phy->vbus = NULL;
 764                 }
 765
 766                 if (data->cfg->dedicated_clocks)
 767                         snprintf(name, sizeof(name), "usb%d_phy", i);
 768                 else
 769                         strlcpy(name, "usb_phy", sizeof(name));
 770
 771                 phy->clk = devm_clk_get(dev, name);
 772                 if (IS_ERR(phy->clk)) {
 773                         dev_err(dev, "failed to get clock %s\n", name);
 774                         return PTR_ERR(phy->clk);
 775                 }
 776
 777                 /* The first PHY is always tied to OTG, and never HSIC */
 778                 if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
 779                         /* HSIC needs secondary clock */
 780                         snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
 781                         phy->clk2 = devm_clk_get(dev, name);
 782                         if (IS_ERR(phy->clk2)) {
 783                                 dev_err(dev, "failed to get clock %s\n", name);
 784                                 return PTR_ERR(phy->clk2);
 785                         }
 786                 }
 787
 788                 snprintf(name, sizeof(name), "usb%d_reset", i);
 789                 phy->reset = devm_reset_control_get(dev, name);
 790                 if (IS_ERR(phy->reset)) {
 791                         dev_err(dev, "failed to get reset %s\n", name);
 792                         return PTR_ERR(phy->reset);
 793                 }
 794
 795                 if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
 796                         snprintf(name, sizeof(name), "pmu%d", i);
 797                         res = platform_get_resource_byname(pdev,
 798                                                         IORESOURCE_MEM, name);
 799                         phy->pmu = devm_ioremap_resource(dev, res);
 800                         if (IS_ERR(phy->pmu))
 801                                 return PTR_ERR(phy->pmu);
 802                 }
 803
 804                 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
 805                 if (IS_ERR(phy->phy)) {
 806                         dev_err(dev, "failed to create PHY %d\n", i);
 807                         return PTR_ERR(phy->phy);
 808                 }
 809
 810                 phy->index = i;
 811                 phy_set_drvdata(phy->phy, &data->phys[i]);
 812         }
 813
 814         data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
 815         if (data->id_det_irq > 0) {
 816                 ret = devm_request_irq(dev, data->id_det_irq,
 817                                 sun4i_usb_phy0_id_vbus_det_irq,
 818                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 819                                 "usb0-id-det", data);
 820                 if (ret) {
 821                         dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
 822                         return ret;
 823                 }
 824         }
 825
 826         data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
 827         if (data->vbus_det_irq > 0) {
 828                 ret = devm_request_irq(dev, data->vbus_det_irq,
 829                                 sun4i_usb_phy0_id_vbus_det_irq,
 830                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 831                                 "usb0-vbus-det", data);
 832                 if (ret) {
 833                         dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
 834                         data->vbus_det_irq = -1;
 835                         sun4i_usb_phy_remove(pdev); /* Stop detect work */
 836                         return ret;
 837                 }
 838         }
 839
 840         if (data->vbus_power_supply) {
 841                 data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
 842                 data->vbus_power_nb.priority = 0;
 843                 ret = power_supply_reg_notifier(&data->vbus_power_nb);
 844                 if (ret) {
 845                         sun4i_usb_phy_remove(pdev); /* Stop detect work */
 846                         return ret;
 847                 }
 848                 data->vbus_power_nb_registered = true;
 849         }
 850
 851         phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
 852         if (IS_ERR(phy_provider)) {
 853                 sun4i_usb_phy_remove(pdev); /* Stop detect work */
 854                 return PTR_ERR(phy_provider);
 855         }
 856
 857         dev_dbg(dev, "successfully loaded\n");
 858
 859         return 0;
 860 }
 861
 862 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
 863         .num_phys = 3,
 864         .type = sun4i_a10_phy,
 865         .disc_thresh = 3,
 866         .phyctl_offset = REG_PHYCTL_A10,
 867         .dedicated_clocks = false,
 868         .enable_pmu_unk1 = false,
 869 };
 870
 871 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
 872         .num_phys = 2,
 873         .type = sun4i_a10_phy,
 874         .disc_thresh = 2,
 875         .phyctl_offset = REG_PHYCTL_A10,
 876         .dedicated_clocks = false,
 877         .enable_pmu_unk1 = false,
 878 };
 879
 880 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
 881         .num_phys = 3,
 882         .type = sun6i_a31_phy,
 883         .disc_thresh = 3,
 884         .phyctl_offset = REG_PHYCTL_A10,
 885         .dedicated_clocks = true,
 886         .enable_pmu_unk1 = false,
 887 };
 888
 889 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
 890         .num_phys = 3,
 891         .type = sun4i_a10_phy,
 892         .disc_thresh = 2,
 893         .phyctl_offset = REG_PHYCTL_A10,
 894         .dedicated_clocks = false,
 895         .enable_pmu_unk1 = false,
 896 };
 897
 898 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
 899         .num_phys = 2,
 900         .type = sun6i_a31_phy,
 901         .disc_thresh = 3,
 902         .phyctl_offset = REG_PHYCTL_A10,
 903         .dedicated_clocks = true,
 904         .enable_pmu_unk1 = false,
 905 };
 906
 907 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
 908         .num_phys = 2,
 909         .type = sun8i_a33_phy,
 910         .disc_thresh = 3,
 911         .phyctl_offset = REG_PHYCTL_A33,
 912         .dedicated_clocks = true,
 913         .enable_pmu_unk1 = false,
 914 };
 915
 916 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
 917         .num_phys = 3,
 918         .hsic_index = 2,
 919         .type = sun8i_a83t_phy,
 920         .phyctl_offset = REG_PHYCTL_A33,
 921         .dedicated_clocks = true,
 922 };
 923
 924 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
 925         .num_phys = 4,
 926         .type = sun8i_h3_phy,
 927         .disc_thresh = 3,
 928         .phyctl_offset = REG_PHYCTL_A33,
 929         .dedicated_clocks = true,
 930         .enable_pmu_unk1 = true,
 931         .phy0_dual_route = true,
 932 };
 933
 934 static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
 935         .num_phys = 3,
 936         .type = sun8i_r40_phy,
 937         .disc_thresh = 3,
 938         .phyctl_offset = REG_PHYCTL_A33,
 939         .dedicated_clocks = true,
 940         .enable_pmu_unk1 = true,
 941         .phy0_dual_route = true,
 942 };
 943
 944 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
 945         .num_phys = 1,
 946         .type = sun8i_v3s_phy,
 947         .disc_thresh = 3,
 948         .phyctl_offset = REG_PHYCTL_A33,
 949         .dedicated_clocks = true,
 950         .enable_pmu_unk1 = true,
 951         .phy0_dual_route = true,
 952 };
 953
 954 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
 955         .num_phys = 2,
 956         .type = sun50i_a64_phy,
 957         .disc_thresh = 3,
 958         .phyctl_offset = REG_PHYCTL_A33,
 959         .dedicated_clocks = true,
 960         .enable_pmu_unk1 = true,
 961         .phy0_dual_route = true,
 962 };
 963
 964 static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
 965         .num_phys = 4,
 966         .type = sun50i_h6_phy,
 967         .disc_thresh = 3,
 968         .phyctl_offset = REG_PHYCTL_A33,
 969         .dedicated_clocks = true,
 970         .enable_pmu_unk1 = true,
 971         .phy0_dual_route = true,
 972         .missing_phys = BIT(1) | BIT(2),
 973 };
 974
 975 static const struct of_device_id sun4i_usb_phy_of_match[] = {
 976         { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
 977         { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
 978         { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
 979         { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
 980         { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
 981         { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
 982         { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
 983         { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
 984         { .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg },
 985         { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
 986         { .compatible = "allwinner,sun50i-a64-usb-phy",
 987           .data = &sun50i_a64_cfg},
 988         { .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg },
 989         { },
 990 };
 991 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
 992
 993 static struct platform_driver sun4i_usb_phy_driver = {
 994         .probe  = sun4i_usb_phy_probe,
 995         .remove = sun4i_usb_phy_remove,
 996         .driver = {
 997                 .of_match_table = sun4i_usb_phy_of_match,
 998                 .name  = "sun4i-usb-phy",
 999         }
1000 };
1001 module_platform_driver(sun4i_usb_phy_driver);
1002
1003 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
1004 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
1005 MODULE_LICENSE("GPL v2");